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40 #include <sys/epoll.h>
42 #include <rte_atomic.h>
43 #include <rte_byteorder.h>
44 #include <rte_common.h>
45 #include <rte_debug.h>
48 #include <rte_fslmc.h>
49 #include <rte_lcore.h>
51 #include <rte_malloc.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
57 #include <fslmc_vfio.h>
58 #include <dpaa2_hw_pvt.h>
59 #include <dpaa2_hw_mempool.h>
60 #include <dpaa2_hw_dpio.h>
61 #include "dpaa2_eventdev.h"
62 #include <portal/dpaa2_hw_pvt.h>
63 #include <mc/fsl_dpci.h>
66 * Evendev = SoC Instance
67 * Eventport = DPIO Instance
68 * Eventqueue = DPCON Instance
69 * 1 Eventdev can have N Eventqueue
70 * Soft Event Flow is DPCI Instance
74 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
79 RTE_SET_USED(nb_events);
85 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
87 return dpaa2_eventdev_enqueue_burst(port, ev, 1);
91 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
92 uint16_t nb_events, uint64_t timeout_ticks)
96 RTE_SET_USED(nb_events);
97 RTE_SET_USED(timeout_ticks);
103 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
104 uint64_t timeout_ticks)
106 return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
110 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
111 struct rte_event_dev_info *dev_info)
113 struct dpaa2_eventdev *priv = dev->data->dev_private;
115 PMD_DRV_FUNC_TRACE();
119 memset(dev_info, 0, sizeof(struct rte_event_dev_info));
120 dev_info->min_dequeue_timeout_ns =
121 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
122 dev_info->max_dequeue_timeout_ns =
123 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
124 dev_info->dequeue_timeout_ns =
125 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
126 dev_info->max_event_queues = priv->max_event_queues;
127 dev_info->max_event_queue_flows =
128 DPAA2_EVENT_MAX_QUEUE_FLOWS;
129 dev_info->max_event_queue_priority_levels =
130 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
131 dev_info->max_event_priority_levels =
132 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
133 dev_info->max_event_ports = RTE_MAX_LCORE;
134 dev_info->max_event_port_dequeue_depth =
135 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
136 dev_info->max_event_port_enqueue_depth =
137 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
138 dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
139 dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED;
143 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
145 struct dpaa2_eventdev *priv = dev->data->dev_private;
146 struct rte_event_dev_config *conf = &dev->data->dev_conf;
148 PMD_DRV_FUNC_TRACE();
150 priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
151 priv->nb_event_queues = conf->nb_event_queues;
152 priv->nb_event_ports = conf->nb_event_ports;
153 priv->nb_event_queue_flows = conf->nb_event_queue_flows;
154 priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
155 priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
156 priv->event_dev_cfg = conf->event_dev_cfg;
158 PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
163 dpaa2_eventdev_start(struct rte_eventdev *dev)
165 PMD_DRV_FUNC_TRACE();
173 dpaa2_eventdev_stop(struct rte_eventdev *dev)
175 PMD_DRV_FUNC_TRACE();
181 dpaa2_eventdev_close(struct rte_eventdev *dev)
183 PMD_DRV_FUNC_TRACE();
191 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
192 struct rte_event_queue_conf *queue_conf)
194 PMD_DRV_FUNC_TRACE();
197 RTE_SET_USED(queue_id);
198 RTE_SET_USED(queue_conf);
200 queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
201 queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
202 RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
203 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
207 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
209 PMD_DRV_FUNC_TRACE();
212 RTE_SET_USED(queue_id);
216 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
217 const struct rte_event_queue_conf *queue_conf)
219 struct dpaa2_eventdev *priv = dev->data->dev_private;
220 struct evq_info_t *evq_info =
221 &priv->evq_info[queue_id];
223 PMD_DRV_FUNC_TRACE();
225 evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
231 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
232 struct rte_event_port_conf *port_conf)
234 PMD_DRV_FUNC_TRACE();
237 RTE_SET_USED(port_id);
238 RTE_SET_USED(port_conf);
240 port_conf->new_event_threshold =
241 DPAA2_EVENT_MAX_NUM_EVENTS;
242 port_conf->dequeue_depth =
243 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
244 port_conf->enqueue_depth =
245 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
249 dpaa2_eventdev_port_release(void *port)
251 PMD_DRV_FUNC_TRACE();
257 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
258 const struct rte_event_port_conf *port_conf)
260 PMD_DRV_FUNC_TRACE();
262 RTE_SET_USED(port_conf);
264 if (!dpaa2_io_portal[port_id].dpio_dev) {
265 dpaa2_io_portal[port_id].dpio_dev =
266 dpaa2_get_qbman_swp(port_id);
267 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
268 if (!dpaa2_io_portal[port_id].dpio_dev)
272 dpaa2_io_portal[port_id].eventdev = dev;
273 dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
278 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
279 uint8_t queues[], uint16_t nb_unlinks)
281 struct dpaa2_eventdev *priv = dev->data->dev_private;
282 struct dpaa2_io_portal_t *dpaa2_portal = port;
283 struct evq_info_t *evq_info;
286 PMD_DRV_FUNC_TRACE();
288 for (i = 0; i < nb_unlinks; i++) {
289 evq_info = &priv->evq_info[queues[i]];
290 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
291 evq_info->dpcon->channel_index, 0);
292 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
293 0, dpaa2_portal->dpio_dev->token,
294 evq_info->dpcon->dpcon_id);
298 return (int)nb_unlinks;
302 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
303 const uint8_t queues[], const uint8_t priorities[],
306 struct dpaa2_eventdev *priv = dev->data->dev_private;
307 struct dpaa2_io_portal_t *dpaa2_portal = port;
308 struct evq_info_t *evq_info;
309 uint8_t channel_index;
312 PMD_DRV_FUNC_TRACE();
314 for (i = 0; i < nb_links; i++) {
315 evq_info = &priv->evq_info[queues[i]];
319 ret = dpio_add_static_dequeue_channel(
320 dpaa2_portal->dpio_dev->dpio,
321 CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
322 evq_info->dpcon->dpcon_id, &channel_index);
324 PMD_DRV_ERR("Static dequeue cfg failed with ret: %d\n",
329 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
331 evq_info->dpcon->channel_index = channel_index;
335 RTE_SET_USED(priorities);
337 return (int)nb_links;
339 for (n = 0; n < i; n++) {
340 evq_info = &priv->evq_info[queues[n]];
341 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
342 evq_info->dpcon->channel_index, 0);
343 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
344 0, dpaa2_portal->dpio_dev->token,
345 evq_info->dpcon->dpcon_id);
352 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
353 uint64_t *timeout_ticks)
357 PMD_DRV_FUNC_TRACE();
360 *timeout_ticks = ns * scale;
366 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
368 PMD_DRV_FUNC_TRACE();
374 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
375 .dev_infos_get = dpaa2_eventdev_info_get,
376 .dev_configure = dpaa2_eventdev_configure,
377 .dev_start = dpaa2_eventdev_start,
378 .dev_stop = dpaa2_eventdev_stop,
379 .dev_close = dpaa2_eventdev_close,
380 .queue_def_conf = dpaa2_eventdev_queue_def_conf,
381 .queue_setup = dpaa2_eventdev_queue_setup,
382 .queue_release = dpaa2_eventdev_queue_release,
383 .port_def_conf = dpaa2_eventdev_port_def_conf,
384 .port_setup = dpaa2_eventdev_port_setup,
385 .port_release = dpaa2_eventdev_port_release,
386 .port_link = dpaa2_eventdev_port_link,
387 .port_unlink = dpaa2_eventdev_port_unlink,
388 .timeout_ticks = dpaa2_eventdev_timeout_ticks,
389 .dump = dpaa2_eventdev_dump
393 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
394 struct dpaa2_dpcon_dev *dpcon_dev)
396 struct dpci_rx_queue_cfg rx_queue_cfg;
399 /*Do settings to get the frame on a DPCON object*/
400 rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST;
401 rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
402 rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
403 rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
405 for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
406 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
407 ret = dpci_set_rx_queue(&dpci_dev->dpci,
412 PMD_DRV_LOG(ERR, PMD,
413 "set_rx_q failed with err code: %d", ret);
421 dpaa2_eventdev_create(const char *name)
423 struct rte_eventdev *eventdev;
424 struct dpaa2_eventdev *priv;
425 struct dpaa2_dpcon_dev *dpcon_dev = NULL;
426 struct dpaa2_dpci_dev *dpci_dev = NULL;
429 eventdev = rte_event_pmd_vdev_init(name,
430 sizeof(struct dpaa2_eventdev),
432 if (eventdev == NULL) {
433 PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
437 eventdev->dev_ops = &dpaa2_eventdev_ops;
438 eventdev->schedule = NULL;
439 eventdev->enqueue = dpaa2_eventdev_enqueue;
440 eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
441 eventdev->dequeue = dpaa2_eventdev_dequeue;
442 eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
444 /* For secondary processes, the primary has done all the work */
445 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
448 priv = eventdev->data->dev_private;
449 priv->max_event_queues = 0;
452 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
455 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
457 dpci_dev = rte_dpaa2_alloc_dpci_dev();
459 rte_dpaa2_free_dpcon_dev(dpcon_dev);
462 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
464 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
466 PMD_DRV_LOG(ERR, PMD,
467 "dpci setup failed with err code: %d", ret);
470 priv->max_event_queues++;
471 } while (dpcon_dev && dpci_dev);
479 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
483 name = rte_vdev_device_name(vdev);
484 PMD_DRV_LOG(INFO, PMD, "Initializing %s\n", name);
485 return dpaa2_eventdev_create(name);
489 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
493 name = rte_vdev_device_name(vdev);
494 PMD_DRV_LOG(INFO, "Closing %s", name);
496 return rte_event_pmd_vdev_uninit(name);
499 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
500 .probe = dpaa2_eventdev_probe,
501 .remove = dpaa2_eventdev_remove
504 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);