drivers/event/dpaa2/dpaa2_eventdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2017 NXP
   4  *
   5  */
   6
   7 #include <assert.h>
   8 #include <stdio.h>
   9 #include <stdbool.h>
  10 #include <errno.h>
  11 #include <stdint.h>
  12 #include <string.h>
  13 #include <sys/epoll.h>
  14
  15 #include <rte_atomic.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_common.h>
  18 #include <rte_debug.h>
  19 #include <rte_dev.h>
  20 #include <rte_eal.h>
  21 #include <rte_fslmc.h>
  22 #include <rte_lcore.h>
  23 #include <rte_log.h>
  24 #include <rte_malloc.h>
  25 #include <rte_memcpy.h>
  26 #include <rte_memory.h>
  27 #include <rte_pci.h>
  28 #include <rte_bus_vdev.h>
  29 #include <rte_ethdev.h>
  30 #include <rte_event_eth_rx_adapter.h>
  31
  32 #include <fslmc_vfio.h>
  33 #include <dpaa2_hw_pvt.h>
  34 #include <dpaa2_hw_mempool.h>
  35 #include <dpaa2_hw_dpio.h>
  36 #include <dpaa2_ethdev.h>
  37 #include "dpaa2_eventdev.h"
  38 #include "dpaa2_eventdev_logs.h"
  39 #include <portal/dpaa2_hw_pvt.h>
  40 #include <mc/fsl_dpci.h>
  41
  42 /* Clarifications
  43  * Evendev = SoC Instance
  44  * Eventport = DPIO Instance
  45  * Eventqueue = DPCON Instance
  46  * 1 Eventdev can have N Eventqueue
  47  * Soft Event Flow is DPCI Instance
  48  */
  49
  50 /* Dynamic logging identified for mempool */
  51 int dpaa2_logtype_event;
  52
  53 static uint16_t
  54 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  55                              uint16_t nb_events)
  56 {
  57         struct rte_eventdev *ev_dev =
  58                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  59         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  60         uint32_t queue_id = ev[0].queue_id;
  61         struct evq_info_t *evq_info = &priv->evq_info[queue_id];
  62         uint32_t fqid;
  63         struct qbman_swp *swp;
  64         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  65         uint32_t loop, frames_to_send;
  66         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  67         uint16_t num_tx = 0;
  68         int ret;
  69
  70         RTE_SET_USED(port);
  71
  72         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  73                 ret = dpaa2_affine_qbman_swp();
  74                 if (ret) {
  75                         DPAA2_EVENTDEV_ERR("Failure in affining portal\n");
  76                         return 0;
  77                 }
  78         }
  79
  80         swp = DPAA2_PER_LCORE_PORTAL;
  81
  82         while (nb_events) {
  83                 frames_to_send = (nb_events >> 3) ?
  84                         MAX_TX_RING_SLOTS : nb_events;
  85
  86                 for (loop = 0; loop < frames_to_send; loop++) {
  87                         const struct rte_event *event = &ev[num_tx + loop];
  88
  89                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
  90                                 fqid = evq_info->dpci->queue[
  91                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
  92                         else
  93                                 fqid = evq_info->dpci->queue[
  94                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
  95
  96                         /* Prepare enqueue descriptor */
  97                         qbman_eq_desc_clear(&eqdesc[loop]);
  98                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
  99                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 100                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 101
 102                         if (event->impl_opaque) {
 103                                 uint8_t dqrr_index = event->impl_opaque - 1;
 104
 105                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 106                                                       dqrr_index, 0);
 107                                 DPAA2_PER_LCORE_DPIO->dqrr_size--;
 108                                 DPAA2_PER_LCORE_DPIO->dqrr_held &=
 109                                         ~(1 << dqrr_index);
 110                         }
 111
 112                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 113
 114                         /*
 115                          * todo - need to align with hw context data
 116                          * to avoid copy
 117                          */
 118                         struct rte_event *ev_temp = rte_malloc(NULL,
 119                                 sizeof(struct rte_event), 0);
 120
 121                         if (!ev_temp) {
 122                                 if (!loop)
 123                                         return num_tx;
 124                                 frames_to_send = loop;
 125                                 DPAA2_EVENTDEV_ERR("Unable to allocate memory");
 126                                 goto send_partial;
 127                         }
 128                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 129                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
 130                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 131                                          sizeof(struct rte_event));
 132                 }
 133 send_partial:
 134                 loop = 0;
 135                 while (loop < frames_to_send) {
 136                         loop += qbman_swp_enqueue_multiple_desc(swp,
 137                                         &eqdesc[loop], &fd_arr[loop],
 138                                         frames_to_send - loop);
 139                 }
 140                 num_tx += frames_to_send;
 141                 nb_events -= frames_to_send;
 142         }
 143
 144         return num_tx;
 145 }
 146
 147 static uint16_t
 148 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 149 {
 150         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 151 }
 152
 153 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 154 {
 155         struct epoll_event epoll_ev;
 156         int ret, i = 0;
 157
 158         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 159                                          QBMAN_SWP_INTERRUPT_DQRI);
 160
 161 RETRY:
 162         ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 163                          &epoll_ev, 1, timeout_ticks);
 164         if (ret < 1) {
 165                 /* sometimes due to some spurious interrupts epoll_wait fails
 166                  * with errno EINTR. so here we are retrying epoll_wait in such
 167                  * case to avoid the problem.
 168                  */
 169                 if (errno == EINTR) {
 170                         DPAA2_EVENTDEV_DEBUG("epoll_wait fails\n");
 171                         if (i++ > 10)
 172                                 DPAA2_EVENTDEV_DEBUG("Dequeue burst Failed\n");
 173                 goto RETRY;
 174                 }
 175         }
 176 }
 177
 178 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 179                                             const struct qbman_fd *fd,
 180                                             const struct qbman_result *dq,
 181                                             struct dpaa2_queue *rxq,
 182                                             struct rte_event *ev)
 183 {
 184         struct rte_event *ev_temp =
 185                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 186
 187         RTE_SET_USED(rxq);
 188
 189         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 190         rte_free(ev_temp);
 191
 192         qbman_swp_dqrr_consume(swp, dq);
 193 }
 194
 195 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 196                                           const struct qbman_fd *fd,
 197                                           const struct qbman_result *dq,
 198                                           struct dpaa2_queue *rxq,
 199                                           struct rte_event *ev)
 200 {
 201         struct rte_event *ev_temp =
 202                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 203         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 204
 205         RTE_SET_USED(swp);
 206         RTE_SET_USED(rxq);
 207
 208         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 209         rte_free(ev_temp);
 210         ev->impl_opaque = dqrr_index + 1;
 211         DPAA2_PER_LCORE_DPIO->dqrr_size++;
 212         DPAA2_PER_LCORE_DPIO->dqrr_held |= 1 << dqrr_index;
 213 }
 214
 215 static uint16_t
 216 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 217                              uint16_t nb_events, uint64_t timeout_ticks)
 218 {
 219         const struct qbman_result *dq;
 220         struct qbman_swp *swp;
 221         const struct qbman_fd *fd;
 222         struct dpaa2_queue *rxq;
 223         int num_pkts = 0, ret, i = 0;
 224
 225         RTE_SET_USED(port);
 226
 227         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 228                 ret = dpaa2_affine_qbman_swp();
 229                 if (ret) {
 230                         DPAA2_EVENTDEV_ERR("Failure in affining portal\n");
 231                         return 0;
 232                 }
 233         }
 234
 235         swp = DPAA2_PER_LCORE_PORTAL;
 236
 237         /* Check if there are atomic contexts to be released */
 238         while (DPAA2_PER_LCORE_DPIO->dqrr_size) {
 239                 if (DPAA2_PER_LCORE_DPIO->dqrr_held & (1 << i)) {
 240                         qbman_swp_dqrr_idx_consume(swp, i);
 241                         DPAA2_PER_LCORE_DPIO->dqrr_size--;
 242                 }
 243                 i++;
 244         }
 245         DPAA2_PER_LCORE_DPIO->dqrr_held = 0;
 246
 247         do {
 248                 dq = qbman_swp_dqrr_next(swp);
 249                 if (!dq) {
 250                         if (!num_pkts && timeout_ticks) {
 251                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 252                                 timeout_ticks = 0;
 253                                 continue;
 254                         }
 255                         return num_pkts;
 256                 }
 257
 258                 fd = qbman_result_DQ_fd(dq);
 259
 260                 rxq = (struct dpaa2_queue *)qbman_result_DQ_fqd_ctx(dq);
 261                 if (rxq) {
 262                         rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
 263                 } else {
 264                         qbman_swp_dqrr_consume(swp, dq);
 265                         DPAA2_EVENTDEV_ERR("Null Return VQ received\n");
 266                         return 0;
 267                 }
 268
 269                 num_pkts++;
 270         } while (num_pkts < nb_events);
 271
 272         return num_pkts;
 273 }
 274
 275 static uint16_t
 276 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 277                        uint64_t timeout_ticks)
 278 {
 279         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 280 }
 281
 282 static void
 283 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 284                         struct rte_event_dev_info *dev_info)
 285 {
 286         struct dpaa2_eventdev *priv = dev->data->dev_private;
 287
 288         EVENTDEV_INIT_FUNC_TRACE();
 289
 290         RTE_SET_USED(dev);
 291
 292         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 293         dev_info->min_dequeue_timeout_ns =
 294                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 295         dev_info->max_dequeue_timeout_ns =
 296                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 297         dev_info->dequeue_timeout_ns =
 298                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 299         dev_info->max_event_queues = priv->max_event_queues;
 300         dev_info->max_event_queue_flows =
 301                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 302         dev_info->max_event_queue_priority_levels =
 303                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 304         dev_info->max_event_priority_levels =
 305                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 306         dev_info->max_event_ports = RTE_MAX_LCORE;
 307         dev_info->max_event_port_dequeue_depth =
 308                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 309         dev_info->max_event_port_enqueue_depth =
 310                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 311         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 312         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
 313                 RTE_EVENT_DEV_CAP_BURST_MODE|
 314                 RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
 315                 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
 316                 RTE_EVENT_DEV_CAP_NONSEQ_MODE;
 317
 318 }
 319
 320 static int
 321 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 322 {
 323         struct dpaa2_eventdev *priv = dev->data->dev_private;
 324         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 325
 326         EVENTDEV_INIT_FUNC_TRACE();
 327
 328         priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 329         priv->nb_event_queues = conf->nb_event_queues;
 330         priv->nb_event_ports = conf->nb_event_ports;
 331         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 332         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 333         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 334         priv->event_dev_cfg = conf->event_dev_cfg;
 335
 336         DPAA2_EVENTDEV_DEBUG("Configured eventdev devid=%d",
 337                 dev->data->dev_id);
 338         return 0;
 339 }
 340
 341 static int
 342 dpaa2_eventdev_start(struct rte_eventdev *dev)
 343 {
 344         EVENTDEV_INIT_FUNC_TRACE();
 345
 346         RTE_SET_USED(dev);
 347
 348         return 0;
 349 }
 350
 351 static void
 352 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 353 {
 354         EVENTDEV_INIT_FUNC_TRACE();
 355
 356         RTE_SET_USED(dev);
 357 }
 358
 359 static int
 360 dpaa2_eventdev_close(struct rte_eventdev *dev)
 361 {
 362         EVENTDEV_INIT_FUNC_TRACE();
 363
 364         RTE_SET_USED(dev);
 365
 366         return 0;
 367 }
 368
 369 static void
 370 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 371                               struct rte_event_queue_conf *queue_conf)
 372 {
 373         EVENTDEV_INIT_FUNC_TRACE();
 374
 375         RTE_SET_USED(dev);
 376         RTE_SET_USED(queue_id);
 377         RTE_SET_USED(queue_conf);
 378
 379         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 380         queue_conf->schedule_type = RTE_SCHED_TYPE_ATOMIC |
 381                                       RTE_SCHED_TYPE_PARALLEL;
 382         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 383 }
 384
 385 static void
 386 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 387 {
 388         EVENTDEV_INIT_FUNC_TRACE();
 389
 390         RTE_SET_USED(dev);
 391         RTE_SET_USED(queue_id);
 392 }
 393
 394 static int
 395 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 396                            const struct rte_event_queue_conf *queue_conf)
 397 {
 398         struct dpaa2_eventdev *priv = dev->data->dev_private;
 399         struct evq_info_t *evq_info =
 400                 &priv->evq_info[queue_id];
 401
 402         EVENTDEV_INIT_FUNC_TRACE();
 403
 404         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 405
 406         return 0;
 407 }
 408
 409 static void
 410 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 411                              struct rte_event_port_conf *port_conf)
 412 {
 413         EVENTDEV_INIT_FUNC_TRACE();
 414
 415         RTE_SET_USED(dev);
 416         RTE_SET_USED(port_id);
 417         RTE_SET_USED(port_conf);
 418
 419         port_conf->new_event_threshold =
 420                 DPAA2_EVENT_MAX_NUM_EVENTS;
 421         port_conf->dequeue_depth =
 422                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 423         port_conf->enqueue_depth =
 424                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 425         port_conf->disable_implicit_release = 0;
 426 }
 427
 428 static void
 429 dpaa2_eventdev_port_release(void *port)
 430 {
 431         EVENTDEV_INIT_FUNC_TRACE();
 432
 433         RTE_SET_USED(port);
 434 }
 435
 436 static int
 437 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 438                           const struct rte_event_port_conf *port_conf)
 439 {
 440         EVENTDEV_INIT_FUNC_TRACE();
 441
 442         RTE_SET_USED(port_conf);
 443
 444         if (!dpaa2_io_portal[port_id].dpio_dev) {
 445                 dpaa2_io_portal[port_id].dpio_dev =
 446                                 dpaa2_get_qbman_swp(port_id);
 447                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 448                 if (!dpaa2_io_portal[port_id].dpio_dev)
 449                         return -1;
 450         }
 451
 452         dpaa2_io_portal[port_id].eventdev = dev;
 453         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 454         return 0;
 455 }
 456
 457 static int
 458 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 459                            uint8_t queues[], uint16_t nb_unlinks)
 460 {
 461         struct dpaa2_eventdev *priv = dev->data->dev_private;
 462         struct dpaa2_io_portal_t *dpaa2_portal = port;
 463         struct evq_info_t *evq_info;
 464         int i;
 465
 466         EVENTDEV_INIT_FUNC_TRACE();
 467
 468         for (i = 0; i < nb_unlinks; i++) {
 469                 evq_info = &priv->evq_info[queues[i]];
 470                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 471                                    evq_info->dpcon->channel_index, 0);
 472                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 473                                         0, dpaa2_portal->dpio_dev->token,
 474                         evq_info->dpcon->dpcon_id);
 475                 evq_info->link = 0;
 476         }
 477
 478         return (int)nb_unlinks;
 479 }
 480
 481 static int
 482 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 483                          const uint8_t queues[], const uint8_t priorities[],
 484                         uint16_t nb_links)
 485 {
 486         struct dpaa2_eventdev *priv = dev->data->dev_private;
 487         struct dpaa2_io_portal_t *dpaa2_portal = port;
 488         struct evq_info_t *evq_info;
 489         uint8_t channel_index;
 490         int ret, i, n;
 491
 492         EVENTDEV_INIT_FUNC_TRACE();
 493
 494         for (i = 0; i < nb_links; i++) {
 495                 evq_info = &priv->evq_info[queues[i]];
 496                 if (evq_info->link)
 497                         continue;
 498
 499                 ret = dpio_add_static_dequeue_channel(
 500                         dpaa2_portal->dpio_dev->dpio,
 501                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 502                         evq_info->dpcon->dpcon_id, &channel_index);
 503                 if (ret < 0) {
 504                         DPAA2_EVENTDEV_ERR("Static dequeue cfg failed with ret: %d\n",
 505                                     ret);
 506                         goto err;
 507                 }
 508
 509                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 510                                    channel_index, 1);
 511                 evq_info->dpcon->channel_index = channel_index;
 512                 evq_info->link = 1;
 513         }
 514
 515         RTE_SET_USED(priorities);
 516
 517         return (int)nb_links;
 518 err:
 519         for (n = 0; n < i; n++) {
 520                 evq_info = &priv->evq_info[queues[n]];
 521                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 522                                    evq_info->dpcon->channel_index, 0);
 523                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 524                                         0, dpaa2_portal->dpio_dev->token,
 525                         evq_info->dpcon->dpcon_id);
 526                 evq_info->link = 0;
 527         }
 528         return ret;
 529 }
 530
 531 static int
 532 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 533                              uint64_t *timeout_ticks)
 534 {
 535         uint32_t scale = 1;
 536
 537         EVENTDEV_INIT_FUNC_TRACE();
 538
 539         RTE_SET_USED(dev);
 540         *timeout_ticks = ns * scale;
 541
 542         return 0;
 543 }
 544
 545 static void
 546 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 547 {
 548         EVENTDEV_INIT_FUNC_TRACE();
 549
 550         RTE_SET_USED(dev);
 551         RTE_SET_USED(f);
 552 }
 553
 554 static int
 555 dpaa2_eventdev_eth_caps_get(const struct rte_eventdev *dev,
 556                             const struct rte_eth_dev *eth_dev,
 557                             uint32_t *caps)
 558 {
 559         const char *ethdev_driver = eth_dev->device->driver->name;
 560
 561         EVENTDEV_INIT_FUNC_TRACE();
 562
 563         RTE_SET_USED(dev);
 564
 565         if (!strcmp(ethdev_driver, "net_dpaa2"))
 566                 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP;
 567         else
 568                 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
 569
 570         return 0;
 571 }
 572
 573 static int
 574 dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
 575                 const struct rte_eth_dev *eth_dev,
 576                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 577 {
 578         struct dpaa2_eventdev *priv = dev->data->dev_private;
 579         uint8_t ev_qid = queue_conf->ev.queue_id;
 580         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 581         int i, ret;
 582
 583         EVENTDEV_INIT_FUNC_TRACE();
 584
 585         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 586                 ret = dpaa2_eth_eventq_attach(eth_dev, i,
 587                                 dpcon_id, queue_conf);
 588                 if (ret) {
 589                         DPAA2_EVENTDEV_ERR("dpaa2_eth_eventq_attach failed: ret %d\n",
 590                                     ret);
 591                         goto fail;
 592                 }
 593         }
 594         return 0;
 595 fail:
 596         for (i = (i - 1); i >= 0 ; i--)
 597                 dpaa2_eth_eventq_detach(eth_dev, i);
 598
 599         return ret;
 600 }
 601
 602 static int
 603 dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
 604                 const struct rte_eth_dev *eth_dev,
 605                 int32_t rx_queue_id,
 606                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 607 {
 608         struct dpaa2_eventdev *priv = dev->data->dev_private;
 609         uint8_t ev_qid = queue_conf->ev.queue_id;
 610         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 611         int ret;
 612
 613         EVENTDEV_INIT_FUNC_TRACE();
 614
 615         if (rx_queue_id == -1)
 616                 return dpaa2_eventdev_eth_queue_add_all(dev,
 617                                 eth_dev, queue_conf);
 618
 619         ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
 620                         dpcon_id, queue_conf);
 621         if (ret) {
 622                 DPAA2_EVENTDEV_ERR("dpaa2_eth_eventq_attach failed: ret: %d\n", ret);
 623                 return ret;
 624         }
 625         return 0;
 626 }
 627
 628 static int
 629 dpaa2_eventdev_eth_queue_del_all(const struct rte_eventdev *dev,
 630                              const struct rte_eth_dev *eth_dev)
 631 {
 632         int i, ret;
 633
 634         EVENTDEV_INIT_FUNC_TRACE();
 635
 636         RTE_SET_USED(dev);
 637
 638         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 639                 ret = dpaa2_eth_eventq_detach(eth_dev, i);
 640                 if (ret) {
 641                         DPAA2_EVENTDEV_ERR("dpaa2_eth_eventq_detach failed: ret %d\n",
 642                                     ret);
 643                         return ret;
 644                 }
 645         }
 646
 647         return 0;
 648 }
 649
 650 static int
 651 dpaa2_eventdev_eth_queue_del(const struct rte_eventdev *dev,
 652                              const struct rte_eth_dev *eth_dev,
 653                              int32_t rx_queue_id)
 654 {
 655         int ret;
 656
 657         EVENTDEV_INIT_FUNC_TRACE();
 658
 659         if (rx_queue_id == -1)
 660                 return dpaa2_eventdev_eth_queue_del_all(dev, eth_dev);
 661
 662         ret = dpaa2_eth_eventq_detach(eth_dev, rx_queue_id);
 663         if (ret) {
 664                 DPAA2_EVENTDEV_ERR("dpaa2_eth_eventq_detach failed: ret: %d\n", ret);
 665                 return ret;
 666         }
 667
 668         return 0;
 669 }
 670
 671 static int
 672 dpaa2_eventdev_eth_start(const struct rte_eventdev *dev,
 673                          const struct rte_eth_dev *eth_dev)
 674 {
 675         EVENTDEV_INIT_FUNC_TRACE();
 676
 677         RTE_SET_USED(dev);
 678         RTE_SET_USED(eth_dev);
 679
 680         return 0;
 681 }
 682
 683 static int
 684 dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
 685                         const struct rte_eth_dev *eth_dev)
 686 {
 687         EVENTDEV_INIT_FUNC_TRACE();
 688
 689         RTE_SET_USED(dev);
 690         RTE_SET_USED(eth_dev);
 691
 692         return 0;
 693 }
 694
 695 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
 696         .dev_infos_get    = dpaa2_eventdev_info_get,
 697         .dev_configure    = dpaa2_eventdev_configure,
 698         .dev_start        = dpaa2_eventdev_start,
 699         .dev_stop         = dpaa2_eventdev_stop,
 700         .dev_close        = dpaa2_eventdev_close,
 701         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 702         .queue_setup      = dpaa2_eventdev_queue_setup,
 703         .queue_release    = dpaa2_eventdev_queue_release,
 704         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 705         .port_setup       = dpaa2_eventdev_port_setup,
 706         .port_release     = dpaa2_eventdev_port_release,
 707         .port_link        = dpaa2_eventdev_port_link,
 708         .port_unlink      = dpaa2_eventdev_port_unlink,
 709         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 710         .dump             = dpaa2_eventdev_dump,
 711         .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get,
 712         .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add,
 713         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
 714         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
 715         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
 716 };
 717
 718 static int
 719 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 720                           struct dpaa2_dpcon_dev *dpcon_dev)
 721 {
 722         struct dpci_rx_queue_cfg rx_queue_cfg;
 723         int ret, i;
 724
 725         /*Do settings to get the frame on a DPCON object*/
 726         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 727                   DPCI_QUEUE_OPT_USER_CTX;
 728         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 729         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 730         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 731
 732         dpci_dev->queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 733                 dpaa2_eventdev_process_parallel;
 734         dpci_dev->queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 735                 dpaa2_eventdev_process_atomic;
 736
 737         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 738                 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
 739                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 740                                         CMD_PRI_LOW,
 741                                         dpci_dev->token, i,
 742                                         &rx_queue_cfg);
 743                 if (ret) {
 744                         DPAA2_EVENTDEV_ERR(
 745                                     "set_rx_q failed with err code: %d", ret);
 746                         return ret;
 747                 }
 748         }
 749         return 0;
 750 }
 751
 752 static int
 753 dpaa2_eventdev_create(const char *name)
 754 {
 755         struct rte_eventdev *eventdev;
 756         struct dpaa2_eventdev *priv;
 757         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 758         struct dpaa2_dpci_dev *dpci_dev = NULL;
 759         int ret;
 760
 761         eventdev = rte_event_pmd_vdev_init(name,
 762                                            sizeof(struct dpaa2_eventdev),
 763                                            rte_socket_id());
 764         if (eventdev == NULL) {
 765                 DPAA2_EVENTDEV_ERR("Failed to create eventdev vdev %s", name);
 766                 goto fail;
 767         }
 768
 769         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 770         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 771         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 772         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 773         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 774         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 775         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 776
 777         /* For secondary processes, the primary has done all the work */
 778         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 779                 return 0;
 780
 781         priv = eventdev->data->dev_private;
 782         priv->max_event_queues = 0;
 783
 784         do {
 785                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 786                 if (!dpcon_dev)
 787                         break;
 788                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 789
 790                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 791                 if (!dpci_dev) {
 792                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 793                         break;
 794                 }
 795                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 796
 797                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 798                 if (ret) {
 799                         DPAA2_EVENTDEV_ERR(
 800                                     "dpci setup failed with err code: %d", ret);
 801                         return ret;
 802                 }
 803                 priv->max_event_queues++;
 804         } while (dpcon_dev && dpci_dev);
 805
 806         return 0;
 807 fail:
 808         return -EFAULT;
 809 }
 810
 811 static int
 812 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 813 {
 814         const char *name;
 815
 816         name = rte_vdev_device_name(vdev);
 817         DPAA2_EVENTDEV_INFO("Initializing %s", name);
 818         return dpaa2_eventdev_create(name);
 819 }
 820
 821 static int
 822 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 823 {
 824         const char *name;
 825
 826         name = rte_vdev_device_name(vdev);
 827         DPAA2_EVENTDEV_INFO("Closing %s", name);
 828
 829         return rte_event_pmd_vdev_uninit(name);
 830 }
 831
 832 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 833         .probe = dpaa2_eventdev_probe,
 834         .remove = dpaa2_eventdev_remove
 835 };
 836
 837 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);