drivers/event/dpaa2/dpaa2_eventdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2017 NXP
   4  *
   5  */
   6
   7 #include <assert.h>
   8 #include <stdio.h>
   9 #include <stdbool.h>
  10 #include <errno.h>
  11 #include <stdint.h>
  12 #include <string.h>
  13 #include <sys/epoll.h>
  14
  15 #include <rte_atomic.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_common.h>
  18 #include <rte_debug.h>
  19 #include <rte_dev.h>
  20 #include <rte_eal.h>
  21 #include <rte_fslmc.h>
  22 #include <rte_lcore.h>
  23 #include <rte_log.h>
  24 #include <rte_malloc.h>
  25 #include <rte_memcpy.h>
  26 #include <rte_memory.h>
  27 #include <rte_pci.h>
  28 #include <rte_bus_vdev.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_event_eth_rx_adapter.h>
  31
  32 #include <fslmc_vfio.h>
  33 #include <dpaa2_hw_pvt.h>
  34 #include <dpaa2_hw_mempool.h>
  35 #include <dpaa2_hw_dpio.h>
  36 #include <dpaa2_ethdev.h>
  37 #include "dpaa2_eventdev.h"
  38 #include "dpaa2_eventdev_logs.h"
  39 #include <portal/dpaa2_hw_pvt.h>
  40 #include <mc/fsl_dpci.h>
  41
  42 /* Clarifications
  43  * Evendev = SoC Instance
  44  * Eventport = DPIO Instance
  45  * Eventqueue = DPCON Instance
  46  * 1 Eventdev can have N Eventqueue
  47  * Soft Event Flow is DPCI Instance
  48  */
  49
  50 /* Dynamic logging identified for mempool */
  51 int dpaa2_logtype_event;
  52
  53 static uint16_t
  54 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  55                              uint16_t nb_events)
  56 {
  57         struct rte_eventdev *ev_dev =
  58                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  59         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  60         uint32_t queue_id = ev[0].queue_id;
  61         struct dpaa2_eventq *evq_info = &priv->evq_info[queue_id];
  62         uint32_t fqid;
  63         struct qbman_swp *swp;
  64         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  65         uint32_t loop, frames_to_send;
  66         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  67         uint16_t num_tx = 0;
  68         int ret;
  69
  70         RTE_SET_USED(port);
  71
  72         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  73                 ret = dpaa2_affine_qbman_swp();
  74                 if (ret) {
  75                         DPAA2_EVENTDEV_ERR("Failure in affining portal");
  76                         return 0;
  77                 }
  78         }
  79
  80         swp = DPAA2_PER_LCORE_PORTAL;
  81
  82         while (nb_events) {
  83                 frames_to_send = (nb_events >> 3) ?
  84                         MAX_TX_RING_SLOTS : nb_events;
  85
  86                 for (loop = 0; loop < frames_to_send; loop++) {
  87                         const struct rte_event *event = &ev[num_tx + loop];
  88
  89                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
  90                                 fqid = evq_info->dpci->rx_queue[
  91                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
  92                         else
  93                                 fqid = evq_info->dpci->rx_queue[
  94                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
  95
  96                         /* Prepare enqueue descriptor */
  97                         qbman_eq_desc_clear(&eqdesc[loop]);
  98                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
  99                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 100                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 101
 102                         if (event->mbuf->seqn) {
 103                                 uint8_t dqrr_index = event->mbuf->seqn - 1;
 104
 105                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 106                                                       dqrr_index, 0);
 107                                 DPAA2_PER_LCORE_DQRR_SIZE--;
 108                                 DPAA2_PER_LCORE_DQRR_HELD &=
 109                                         ~(1 << dqrr_index);
 110                         }
 111
 112                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 113
 114                         /*
 115                          * todo - need to align with hw context data
 116                          * to avoid copy
 117                          */
 118                         struct rte_event *ev_temp = rte_malloc(NULL,
 119                                 sizeof(struct rte_event), 0);
 120
 121                         if (!ev_temp) {
 122                                 if (!loop)
 123                                         return num_tx;
 124                                 frames_to_send = loop;
 125                                 DPAA2_EVENTDEV_ERR(
 126                                         "Unable to allocate event object");
 127                                 goto send_partial;
 128                         }
 129                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 130                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), (size_t)ev_temp);
 131                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 132                                          sizeof(struct rte_event));
 133                 }
 134 send_partial:
 135                 loop = 0;
 136                 while (loop < frames_to_send) {
 137                         loop += qbman_swp_enqueue_multiple_desc(swp,
 138                                         &eqdesc[loop], &fd_arr[loop],
 139                                         frames_to_send - loop);
 140                 }
 141                 num_tx += frames_to_send;
 142                 nb_events -= frames_to_send;
 143         }
 144
 145         return num_tx;
 146 }
 147
 148 static uint16_t
 149 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 150 {
 151         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 152 }
 153
 154 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 155 {
 156         struct epoll_event epoll_ev;
 157
 158         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 159                                          QBMAN_SWP_INTERRUPT_DQRI);
 160
 161         epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 162                          &epoll_ev, 1, timeout_ticks);
 163 }
 164
 165 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 166                                             const struct qbman_fd *fd,
 167                                             const struct qbman_result *dq,
 168                                             struct dpaa2_queue *rxq,
 169                                             struct rte_event *ev)
 170 {
 171         struct rte_event *ev_temp =
 172                 (struct rte_event *)(size_t)DPAA2_GET_FD_ADDR(fd);
 173
 174         RTE_SET_USED(rxq);
 175
 176         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 177         rte_free(ev_temp);
 178
 179         qbman_swp_dqrr_consume(swp, dq);
 180 }
 181
 182 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 183                                           const struct qbman_fd *fd,
 184                                           const struct qbman_result *dq,
 185                                           struct dpaa2_queue *rxq,
 186                                           struct rte_event *ev)
 187 {
 188         struct rte_event *ev_temp =
 189                 (struct rte_event *)(size_t)DPAA2_GET_FD_ADDR(fd);
 190         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 191
 192         RTE_SET_USED(swp);
 193         RTE_SET_USED(rxq);
 194
 195         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 196         rte_free(ev_temp);
 197         ev->mbuf->seqn = dqrr_index + 1;
 198         DPAA2_PER_LCORE_DQRR_SIZE++;
 199         DPAA2_PER_LCORE_DQRR_HELD |= 1 << dqrr_index;
 200         DPAA2_PER_LCORE_DQRR_MBUF(dqrr_index) = ev->mbuf;
 201 }
 202
 203 static uint16_t
 204 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 205                              uint16_t nb_events, uint64_t timeout_ticks)
 206 {
 207         const struct qbman_result *dq;
 208         struct qbman_swp *swp;
 209         const struct qbman_fd *fd;
 210         struct dpaa2_queue *rxq;
 211         int num_pkts = 0, ret, i = 0;
 212
 213         RTE_SET_USED(port);
 214
 215         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 216                 ret = dpaa2_affine_qbman_swp();
 217                 if (ret) {
 218                         DPAA2_EVENTDEV_ERR("Failure in affining portal");
 219                         return 0;
 220                 }
 221         }
 222         swp = DPAA2_PER_LCORE_PORTAL;
 223
 224         /* Check if there are atomic contexts to be released */
 225         while (DPAA2_PER_LCORE_DQRR_SIZE) {
 226                 if (DPAA2_PER_LCORE_DQRR_HELD & (1 << i)) {
 227                         qbman_swp_dqrr_idx_consume(swp, i);
 228                         DPAA2_PER_LCORE_DQRR_SIZE--;
 229                         DPAA2_PER_LCORE_DQRR_MBUF(i)->seqn =
 230                                 DPAA2_INVALID_MBUF_SEQN;
 231                 }
 232                 i++;
 233         }
 234         DPAA2_PER_LCORE_DQRR_HELD = 0;
 235
 236         do {
 237                 dq = qbman_swp_dqrr_next(swp);
 238                 if (!dq) {
 239                         if (!num_pkts && timeout_ticks) {
 240                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 241                                 timeout_ticks = 0;
 242                                 continue;
 243                         }
 244                         return num_pkts;
 245                 }
 246                 qbman_swp_prefetch_dqrr_next(swp);
 247
 248                 fd = qbman_result_DQ_fd(dq);
 249                 rxq = (struct dpaa2_queue *)(size_t)qbman_result_DQ_fqd_ctx(dq);
 250                 if (rxq) {
 251                         rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
 252                 } else {
 253                         qbman_swp_dqrr_consume(swp, dq);
 254                         DPAA2_EVENTDEV_ERR("Null Return VQ received");
 255                         return 0;
 256                 }
 257
 258                 num_pkts++;
 259         } while (num_pkts < nb_events);
 260
 261         return num_pkts;
 262 }
 263
 264 static uint16_t
 265 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 266                        uint64_t timeout_ticks)
 267 {
 268         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 269 }
 270
 271 static void
 272 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 273                         struct rte_event_dev_info *dev_info)
 274 {
 275         struct dpaa2_eventdev *priv = dev->data->dev_private;
 276
 277         EVENTDEV_INIT_FUNC_TRACE();
 278
 279         RTE_SET_USED(dev);
 280
 281         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 282         dev_info->min_dequeue_timeout_ns =
 283                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 284         dev_info->max_dequeue_timeout_ns =
 285                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 286         dev_info->dequeue_timeout_ns =
 287                 DPAA2_EVENT_PORT_DEQUEUE_TIMEOUT_NS;
 288         dev_info->max_event_queues = priv->max_event_queues;
 289         dev_info->max_event_queue_flows =
 290                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 291         dev_info->max_event_queue_priority_levels =
 292                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 293         dev_info->max_event_priority_levels =
 294                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 295         dev_info->max_event_ports = rte_fslmc_get_device_count(DPAA2_IO);
 296         /* we only support dpio upto number of cores*/
 297         if (dev_info->max_event_ports > rte_lcore_count())
 298                 dev_info->max_event_ports = rte_lcore_count();
 299         dev_info->max_event_port_dequeue_depth =
 300                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 301         dev_info->max_event_port_enqueue_depth =
 302                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 303         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 304         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
 305                 RTE_EVENT_DEV_CAP_BURST_MODE|
 306                 RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
 307                 RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
 308                 RTE_EVENT_DEV_CAP_NONSEQ_MODE;
 309
 310 }
 311
 312 static int
 313 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 314 {
 315         struct dpaa2_eventdev *priv = dev->data->dev_private;
 316         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 317
 318         EVENTDEV_INIT_FUNC_TRACE();
 319
 320         priv->nb_event_queues = conf->nb_event_queues;
 321         priv->nb_event_ports = conf->nb_event_ports;
 322         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 323         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 324         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 325         priv->event_dev_cfg = conf->event_dev_cfg;
 326
 327         /* Check dequeue timeout method is per dequeue or global */
 328         if (priv->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
 329                 /*
 330                  * Use timeout value as given in dequeue operation.
 331                  * So invalidating this timeout value.
 332                  */
 333                 priv->dequeue_timeout_ns = 0;
 334
 335         } else if (conf->dequeue_timeout_ns == 0) {
 336                 priv->dequeue_timeout_ns = DPAA2_EVENT_PORT_DEQUEUE_TIMEOUT_NS;
 337         } else {
 338                 priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 339         }
 340
 341         DPAA2_EVENTDEV_DEBUG("Configured eventdev devid=%d",
 342                              dev->data->dev_id);
 343         return 0;
 344 }
 345
 346 static int
 347 dpaa2_eventdev_start(struct rte_eventdev *dev)
 348 {
 349         EVENTDEV_INIT_FUNC_TRACE();
 350
 351         RTE_SET_USED(dev);
 352
 353         return 0;
 354 }
 355
 356 static void
 357 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 358 {
 359         EVENTDEV_INIT_FUNC_TRACE();
 360
 361         RTE_SET_USED(dev);
 362 }
 363
 364 static int
 365 dpaa2_eventdev_close(struct rte_eventdev *dev)
 366 {
 367         EVENTDEV_INIT_FUNC_TRACE();
 368
 369         RTE_SET_USED(dev);
 370
 371         return 0;
 372 }
 373
 374 static void
 375 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 376                               struct rte_event_queue_conf *queue_conf)
 377 {
 378         EVENTDEV_INIT_FUNC_TRACE();
 379
 380         RTE_SET_USED(dev);
 381         RTE_SET_USED(queue_id);
 382         RTE_SET_USED(queue_conf);
 383
 384         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 385         queue_conf->schedule_type = RTE_SCHED_TYPE_ATOMIC |
 386                                       RTE_SCHED_TYPE_PARALLEL;
 387         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 388 }
 389
 390 static void
 391 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 392 {
 393         EVENTDEV_INIT_FUNC_TRACE();
 394
 395         RTE_SET_USED(dev);
 396         RTE_SET_USED(queue_id);
 397 }
 398
 399 static int
 400 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 401                            const struct rte_event_queue_conf *queue_conf)
 402 {
 403         struct dpaa2_eventdev *priv = dev->data->dev_private;
 404         struct dpaa2_eventq *evq_info =
 405                 &priv->evq_info[queue_id];
 406
 407         EVENTDEV_INIT_FUNC_TRACE();
 408
 409         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 410
 411         return 0;
 412 }
 413
 414 static void
 415 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 416                              struct rte_event_port_conf *port_conf)
 417 {
 418         EVENTDEV_INIT_FUNC_TRACE();
 419
 420         RTE_SET_USED(dev);
 421         RTE_SET_USED(port_id);
 422         RTE_SET_USED(port_conf);
 423
 424         port_conf->new_event_threshold =
 425                 DPAA2_EVENT_MAX_NUM_EVENTS;
 426         port_conf->dequeue_depth =
 427                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 428         port_conf->enqueue_depth =
 429                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 430         port_conf->disable_implicit_release = 0;
 431 }
 432
 433 static void
 434 dpaa2_eventdev_port_release(void *port)
 435 {
 436         EVENTDEV_INIT_FUNC_TRACE();
 437
 438         RTE_SET_USED(port);
 439 }
 440
 441 static int
 442 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 443                           const struct rte_event_port_conf *port_conf)
 444 {
 445         EVENTDEV_INIT_FUNC_TRACE();
 446
 447         RTE_SET_USED(port_conf);
 448
 449         if (!dpaa2_io_portal[port_id].dpio_dev) {
 450                 dpaa2_io_portal[port_id].dpio_dev =
 451                                 dpaa2_get_qbman_swp(port_id);
 452                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 453                 if (!dpaa2_io_portal[port_id].dpio_dev)
 454                         return -1;
 455         }
 456
 457         dpaa2_io_portal[port_id].eventdev = dev;
 458         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 459         return 0;
 460 }
 461
 462 static int
 463 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 464                            uint8_t queues[], uint16_t nb_unlinks)
 465 {
 466         struct dpaa2_eventdev *priv = dev->data->dev_private;
 467         struct dpaa2_io_portal_t *dpaa2_portal = port;
 468         struct dpaa2_eventq *evq_info;
 469         int i;
 470
 471         EVENTDEV_INIT_FUNC_TRACE();
 472
 473         for (i = 0; i < nb_unlinks; i++) {
 474                 evq_info = &priv->evq_info[queues[i]];
 475                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 476                                    evq_info->dpcon->channel_index, 0);
 477                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 478                                         0, dpaa2_portal->dpio_dev->token,
 479                         evq_info->dpcon->dpcon_id);
 480         }
 481
 482         return (int)nb_unlinks;
 483 }
 484
 485 static int
 486 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 487                          const uint8_t queues[], const uint8_t priorities[],
 488                         uint16_t nb_links)
 489 {
 490         struct dpaa2_eventdev *priv = dev->data->dev_private;
 491         struct dpaa2_io_portal_t *dpaa2_portal = port;
 492         struct dpaa2_eventq *evq_info;
 493         uint8_t channel_index;
 494         int ret, i, n;
 495
 496         EVENTDEV_INIT_FUNC_TRACE();
 497
 498         for (i = 0; i < nb_links; i++) {
 499                 evq_info = &priv->evq_info[queues[i]];
 500
 501                 ret = dpio_add_static_dequeue_channel(
 502                         dpaa2_portal->dpio_dev->dpio,
 503                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 504                         evq_info->dpcon->dpcon_id, &channel_index);
 505                 if (ret < 0) {
 506                         DPAA2_EVENTDEV_ERR(
 507                                 "Static dequeue config failed: err(%d)", ret);
 508                         goto err;
 509                 }
 510
 511                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 512                                    channel_index, 1);
 513                 evq_info->dpcon->channel_index = channel_index;
 514         }
 515
 516         RTE_SET_USED(priorities);
 517
 518         return (int)nb_links;
 519 err:
 520         for (n = 0; n < i; n++) {
 521                 evq_info = &priv->evq_info[queues[n]];
 522                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 523                                    evq_info->dpcon->channel_index, 0);
 524                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 525                                         0, dpaa2_portal->dpio_dev->token,
 526                         evq_info->dpcon->dpcon_id);
 527         }
 528         return ret;
 529 }
 530
 531 static int
 532 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 533                              uint64_t *timeout_ticks)
 534 {
 535         uint32_t scale = 1000*1000;
 536
 537         EVENTDEV_INIT_FUNC_TRACE();
 538
 539         RTE_SET_USED(dev);
 540         *timeout_ticks = ns * scale;
 541
 542         return 0;
 543 }
 544
 545 static void
 546 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 547 {
 548         EVENTDEV_INIT_FUNC_TRACE();
 549
 550         RTE_SET_USED(dev);
 551         RTE_SET_USED(f);
 552 }
 553
 554 static int
 555 dpaa2_eventdev_eth_caps_get(const struct rte_eventdev *dev,
 556                             const struct rte_eth_dev *eth_dev,
 557                             uint32_t *caps)
 558 {
 559         const char *ethdev_driver = eth_dev->device->driver->name;
 560
 561         EVENTDEV_INIT_FUNC_TRACE();
 562
 563         RTE_SET_USED(dev);
 564
 565         if (!strcmp(ethdev_driver, "net_dpaa2"))
 566                 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP;
 567         else
 568                 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
 569
 570         return 0;
 571 }
 572
 573 static int
 574 dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
 575                 const struct rte_eth_dev *eth_dev,
 576                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 577 {
 578         struct dpaa2_eventdev *priv = dev->data->dev_private;
 579         uint8_t ev_qid = queue_conf->ev.queue_id;
 580         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 581         int i, ret;
 582
 583         EVENTDEV_INIT_FUNC_TRACE();
 584
 585         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 586                 ret = dpaa2_eth_eventq_attach(eth_dev, i,
 587                                 dpcon_id, queue_conf);
 588                 if (ret) {
 589                         DPAA2_EVENTDEV_ERR(
 590                                 "Event queue attach failed: err(%d)", ret);
 591                         goto fail;
 592                 }
 593         }
 594         return 0;
 595 fail:
 596         for (i = (i - 1); i >= 0 ; i--)
 597                 dpaa2_eth_eventq_detach(eth_dev, i);
 598
 599         return ret;
 600 }
 601
 602 static int
 603 dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
 604                 const struct rte_eth_dev *eth_dev,
 605                 int32_t rx_queue_id,
 606                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 607 {
 608         struct dpaa2_eventdev *priv = dev->data->dev_private;
 609         uint8_t ev_qid = queue_conf->ev.queue_id;
 610         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 611         int ret;
 612
 613         EVENTDEV_INIT_FUNC_TRACE();
 614
 615         if (rx_queue_id == -1)
 616                 return dpaa2_eventdev_eth_queue_add_all(dev,
 617                                 eth_dev, queue_conf);
 618
 619         ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
 620                         dpcon_id, queue_conf);
 621         if (ret) {
 622                 DPAA2_EVENTDEV_ERR(
 623                         "Event queue attach failed: err(%d)", ret);
 624                 return ret;
 625         }
 626         return 0;
 627 }
 628
 629 static int
 630 dpaa2_eventdev_eth_queue_del_all(const struct rte_eventdev *dev,
 631                              const struct rte_eth_dev *eth_dev)
 632 {
 633         int i, ret;
 634
 635         EVENTDEV_INIT_FUNC_TRACE();
 636
 637         RTE_SET_USED(dev);
 638
 639         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 640                 ret = dpaa2_eth_eventq_detach(eth_dev, i);
 641                 if (ret) {
 642                         DPAA2_EVENTDEV_ERR(
 643                                 "Event queue detach failed: err(%d)", ret);
 644                         return ret;
 645                 }
 646         }
 647
 648         return 0;
 649 }
 650
 651 static int
 652 dpaa2_eventdev_eth_queue_del(const struct rte_eventdev *dev,
 653                              const struct rte_eth_dev *eth_dev,
 654                              int32_t rx_queue_id)
 655 {
 656         int ret;
 657
 658         EVENTDEV_INIT_FUNC_TRACE();
 659
 660         if (rx_queue_id == -1)
 661                 return dpaa2_eventdev_eth_queue_del_all(dev, eth_dev);
 662
 663         ret = dpaa2_eth_eventq_detach(eth_dev, rx_queue_id);
 664         if (ret) {
 665                 DPAA2_EVENTDEV_ERR(
 666                         "Event queue detach failed: err(%d)", ret);
 667                 return ret;
 668         }
 669
 670         return 0;
 671 }
 672
 673 static int
 674 dpaa2_eventdev_eth_start(const struct rte_eventdev *dev,
 675                          const struct rte_eth_dev *eth_dev)
 676 {
 677         EVENTDEV_INIT_FUNC_TRACE();
 678
 679         RTE_SET_USED(dev);
 680         RTE_SET_USED(eth_dev);
 681
 682         return 0;
 683 }
 684
 685 static int
 686 dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
 687                         const struct rte_eth_dev *eth_dev)
 688 {
 689         EVENTDEV_INIT_FUNC_TRACE();
 690
 691         RTE_SET_USED(dev);
 692         RTE_SET_USED(eth_dev);
 693
 694         return 0;
 695 }
 696
 697 static struct rte_eventdev_ops dpaa2_eventdev_ops = {
 698         .dev_infos_get    = dpaa2_eventdev_info_get,
 699         .dev_configure    = dpaa2_eventdev_configure,
 700         .dev_start        = dpaa2_eventdev_start,
 701         .dev_stop         = dpaa2_eventdev_stop,
 702         .dev_close        = dpaa2_eventdev_close,
 703         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 704         .queue_setup      = dpaa2_eventdev_queue_setup,
 705         .queue_release    = dpaa2_eventdev_queue_release,
 706         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 707         .port_setup       = dpaa2_eventdev_port_setup,
 708         .port_release     = dpaa2_eventdev_port_release,
 709         .port_link        = dpaa2_eventdev_port_link,
 710         .port_unlink      = dpaa2_eventdev_port_unlink,
 711         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 712         .dump             = dpaa2_eventdev_dump,
 713         .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get,
 714         .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add,
 715         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
 716         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
 717         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
 718 };
 719
 720 static int
 721 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 722                           struct dpaa2_dpcon_dev *dpcon_dev)
 723 {
 724         struct dpci_rx_queue_cfg rx_queue_cfg;
 725         int ret, i;
 726
 727         /*Do settings to get the frame on a DPCON object*/
 728         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 729                   DPCI_QUEUE_OPT_USER_CTX;
 730         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 731         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 732         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 733
 734         dpci_dev->rx_queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 735                 dpaa2_eventdev_process_parallel;
 736         dpci_dev->rx_queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 737                 dpaa2_eventdev_process_atomic;
 738
 739         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 740                 rx_queue_cfg.user_ctx = (size_t)(&dpci_dev->rx_queue[i]);
 741                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 742                                         CMD_PRI_LOW,
 743                                         dpci_dev->token, i,
 744                                         &rx_queue_cfg);
 745                 if (ret) {
 746                         DPAA2_EVENTDEV_ERR(
 747                                 "DPCI Rx queue setup failed: err(%d)",
 748                                 ret);
 749                         return ret;
 750                 }
 751         }
 752         return 0;
 753 }
 754
 755 static int
 756 dpaa2_eventdev_create(const char *name)
 757 {
 758         struct rte_eventdev *eventdev;
 759         struct dpaa2_eventdev *priv;
 760         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 761         struct dpaa2_dpci_dev *dpci_dev = NULL;
 762         int ret;
 763
 764         eventdev = rte_event_pmd_vdev_init(name,
 765                                            sizeof(struct dpaa2_eventdev),
 766                                            rte_socket_id());
 767         if (eventdev == NULL) {
 768                 DPAA2_EVENTDEV_ERR("Failed to create Event device %s", name);
 769                 goto fail;
 770         }
 771
 772         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 773         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 774         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 775         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 776         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 777         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 778         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 779
 780         /* For secondary processes, the primary has done all the work */
 781         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 782                 return 0;
 783
 784         priv = eventdev->data->dev_private;
 785         priv->max_event_queues = 0;
 786
 787         do {
 788                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 789                 if (!dpcon_dev)
 790                         break;
 791                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 792
 793                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 794                 if (!dpci_dev) {
 795                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 796                         break;
 797                 }
 798                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 799
 800                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 801                 if (ret) {
 802                         DPAA2_EVENTDEV_ERR(
 803                                     "DPCI setup failed: err(%d)", ret);
 804                         return ret;
 805                 }
 806                 priv->max_event_queues++;
 807         } while (dpcon_dev && dpci_dev);
 808
 809         return 0;
 810 fail:
 811         return -EFAULT;
 812 }
 813
 814 static int
 815 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 816 {
 817         const char *name;
 818
 819         name = rte_vdev_device_name(vdev);
 820         DPAA2_EVENTDEV_INFO("Initializing %s", name);
 821         return dpaa2_eventdev_create(name);
 822 }
 823
 824 static int
 825 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 826 {
 827         const char *name;
 828
 829         name = rte_vdev_device_name(vdev);
 830         DPAA2_EVENTDEV_INFO("Closing %s", name);
 831
 832         return rte_event_pmd_vdev_uninit(name);
 833 }
 834
 835 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 836         .probe = dpaa2_eventdev_probe,
 837         .remove = dpaa2_eventdev_remove
 838 };
 839
 840 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);
 841
 842 RTE_INIT(dpaa2_eventdev_init_log)
 843 {
 844         dpaa2_logtype_event = rte_log_register("pmd.event.dpaa2");
 845         if (dpaa2_logtype_event >= 0)
 846                 rte_log_set_level(dpaa2_logtype_event, RTE_LOG_NOTICE);
 847 }