4 * Copyright (C) Cavium networks Ltd. 2017.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
16 * * Neither the name of Cavium networks nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <rte_common.h>
36 #include <rte_debug.h>
39 #include <rte_lcore.h>
41 #include <rte_malloc.h>
42 #include <rte_memory.h>
43 #include <rte_memzone.h>
46 #include "ssovf_evdev.h"
48 /* SSOPF Mailbox messages */
50 struct ssovf_mbox_dev_info {
51 uint64_t min_deq_timeout_ns;
52 uint64_t max_deq_timeout_ns;
53 uint32_t max_num_events;
57 ssovf_mbox_dev_info(struct ssovf_mbox_dev_info *info)
59 struct octeontx_mbox_hdr hdr = {0};
60 uint16_t len = sizeof(struct ssovf_mbox_dev_info);
62 hdr.coproc = SSO_COPROC;
63 hdr.msg = SSO_GET_DEV_INFO;
67 return octeontx_ssovf_mbox_send(&hdr, NULL, 0, info, len);
70 struct ssovf_mbox_getwork_wait {
75 ssovf_mbox_getwork_tmo_set(uint32_t timeout_ns)
77 struct octeontx_mbox_hdr hdr = {0};
78 struct ssovf_mbox_getwork_wait tmo_set;
79 uint16_t len = sizeof(struct ssovf_mbox_getwork_wait);
82 hdr.coproc = SSO_COPROC;
83 hdr.msg = SSO_SET_GETWORK_WAIT;
86 tmo_set.wait_ns = timeout_ns;
87 ret = octeontx_ssovf_mbox_send(&hdr, &tmo_set, len, NULL, 0);
89 ssovf_log_err("Failed to set getwork timeout(%d)", ret);
94 struct ssovf_mbox_grp_pri {
95 uint8_t wgt_left; /* Read only */
102 ssovf_mbox_priority_set(uint8_t queue, uint8_t prio)
104 struct octeontx_mbox_hdr hdr = {0};
105 struct ssovf_mbox_grp_pri grp;
106 uint16_t len = sizeof(struct ssovf_mbox_grp_pri);
109 hdr.coproc = SSO_COPROC;
110 hdr.msg = SSO_GRP_SET_PRIORITY;
115 grp.priority = prio / 32; /* Normalize to 0 to 7 */
117 ret = octeontx_ssovf_mbox_send(&hdr, &grp, len, NULL, 0);
119 ssovf_log_err("Failed to set grp=%d prio=%d", queue, prio);
124 struct ssovf_mbox_convert_ns_getworks_iter {
126 uint32_t getwork_iter;/* Get_work iterations for the given wait_ns */
130 ssovf_mbox_timeout_ticks(uint64_t ns, uint64_t *tmo_ticks)
132 struct octeontx_mbox_hdr hdr = {0};
133 struct ssovf_mbox_convert_ns_getworks_iter ns2iter;
134 uint16_t len = sizeof(ns2iter);
137 hdr.coproc = SSO_COPROC;
138 hdr.msg = SSO_CONVERT_NS_GETWORK_ITER;
141 memset(&ns2iter, 0, len);
142 ns2iter.wait_ns = ns;
143 ret = octeontx_ssovf_mbox_send(&hdr, &ns2iter, len, &ns2iter, len);
144 if (ret < 0 || (ret != len)) {
145 ssovf_log_err("Failed to get tmo ticks ns=%"PRId64"", ns);
149 *tmo_ticks = ns2iter.getwork_iter;
154 ssovf_fastpath_fns_set(struct rte_eventdev *dev)
156 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
158 dev->schedule = NULL;
159 dev->enqueue = ssows_enq;
160 dev->enqueue_burst = ssows_enq_burst;
161 dev->dequeue = ssows_deq;
162 dev->dequeue_burst = ssows_deq_burst;
164 if (edev->is_timeout_deq) {
165 dev->dequeue = ssows_deq_timeout;
166 dev->dequeue_burst = ssows_deq_timeout_burst;
171 ssovf_info_get(struct rte_eventdev *dev, struct rte_event_dev_info *dev_info)
173 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
175 dev_info->driver_name = RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD);
176 dev_info->min_dequeue_timeout_ns = edev->min_deq_timeout_ns;
177 dev_info->max_dequeue_timeout_ns = edev->max_deq_timeout_ns;
178 dev_info->max_event_queues = edev->max_event_queues;
179 dev_info->max_event_queue_flows = (1ULL << 20);
180 dev_info->max_event_queue_priority_levels = 8;
181 dev_info->max_event_priority_levels = 1;
182 dev_info->max_event_ports = edev->max_event_ports;
183 dev_info->max_event_port_dequeue_depth = 1;
184 dev_info->max_event_port_enqueue_depth = 1;
185 dev_info->max_num_events = edev->max_num_events;
186 dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
187 RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
188 RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES;
192 ssovf_configure(const struct rte_eventdev *dev)
194 struct rte_event_dev_config *conf = &dev->data->dev_conf;
195 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
199 deq_tmo_ns = conf->dequeue_timeout_ns;
201 deq_tmo_ns = edev->min_deq_timeout_ns;
203 if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT) {
204 edev->is_timeout_deq = 1;
205 deq_tmo_ns = edev->min_deq_timeout_ns;
207 edev->nb_event_queues = conf->nb_event_queues;
208 edev->nb_event_ports = conf->nb_event_ports;
210 return ssovf_mbox_getwork_tmo_set(deq_tmo_ns);
214 ssovf_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
215 struct rte_event_queue_conf *queue_conf)
218 RTE_SET_USED(queue_id);
220 queue_conf->nb_atomic_flows = (1ULL << 20);
221 queue_conf->nb_atomic_order_sequences = (1ULL << 20);
222 queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
223 queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
227 ssovf_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
230 RTE_SET_USED(queue_id);
234 ssovf_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
235 const struct rte_event_queue_conf *queue_conf)
238 ssovf_func_trace("queue=%d prio=%d", queue_id, queue_conf->priority);
240 return ssovf_mbox_priority_set(queue_id, queue_conf->priority);
244 ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
245 struct rte_event_port_conf *port_conf)
247 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
249 RTE_SET_USED(port_id);
250 port_conf->new_event_threshold = edev->max_num_events;
251 port_conf->dequeue_depth = 1;
252 port_conf->enqueue_depth = 1;
256 ssovf_port_release(void *port)
262 ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
263 const struct rte_event_port_conf *port_conf)
268 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
270 ssovf_func_trace("port=%d", port_id);
271 RTE_SET_USED(port_conf);
273 /* Free memory prior to re-allocation if needed */
274 if (dev->data->ports[port_id] != NULL) {
275 ssovf_port_release(dev->data->ports[port_id]);
276 dev->data->ports[port_id] = NULL;
279 /* Allocate event port memory */
280 ws = rte_zmalloc_socket("eventdev ssows",
281 sizeof(struct ssows), RTE_CACHE_LINE_SIZE,
282 dev->data->socket_id);
284 ssovf_log_err("Failed to alloc memory for port=%d", port_id);
288 ws->base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, port_id, 0);
289 if (ws->base == NULL) {
291 ssovf_log_err("Failed to get hws base addr port=%d", port_id);
295 reg_off = SSOW_VHWS_OP_GET_WORK0;
296 reg_off |= 1 << 4; /* Index_ggrp_mask (Use maskset zero) */
297 reg_off |= 1 << 16; /* Wait */
298 ws->getwork = ws->base + reg_off;
301 for (q = 0; q < edev->nb_event_queues; q++) {
302 ws->grps[q] = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, q, 2);
303 if (ws->grps[q] == NULL) {
305 ssovf_log_err("Failed to get grp%d base addr", q);
310 dev->data->ports[port_id] = ws;
311 ssovf_log_dbg("port=%d ws=%p", port_id, ws);
316 ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
317 const uint8_t priorities[], uint16_t nb_links)
321 struct ssows *ws = port;
323 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
325 RTE_SET_USED(priorities);
327 for (link = 0; link < nb_links; link++) {
329 val |= (1ULL << 24); /* Set membership */
330 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
332 return (int)nb_links;
336 ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
341 struct ssows *ws = port;
343 ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
346 for (unlink = 0; unlink < nb_unlinks; unlink++) {
347 val = queues[unlink];
348 val &= ~(1ULL << 24); /* Clear membership */
349 ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
351 return (int)nb_unlinks;
355 ssovf_timeout_ticks(struct rte_eventdev *dev, uint64_t ns, uint64_t *tmo_ticks)
359 return ssovf_mbox_timeout_ticks(ns, tmo_ticks);
363 ssows_dump(struct ssows *ws, FILE *f)
365 uint8_t *base = ws->base;
368 fprintf(f, "\t---------------port%d---------------\n", ws->port);
369 val = ssovf_read64(base + SSOW_VHWS_TAG);
370 fprintf(f, "\ttag=0x%x tt=%d head=%d tail=%d grp=%d index=%d tail=%d\n",
371 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
372 (int)(val >> 34) & 0x1, (int)(val >> 35) & 0x1,
373 (int)(val >> 36) & 0x3ff, (int)(val >> 48) & 0x3ff,
374 (int)(val >> 63) & 0x1);
376 val = ssovf_read64(base + SSOW_VHWS_WQP);
377 fprintf(f, "\twqp=0x%"PRIx64"\n", val);
379 val = ssovf_read64(base + SSOW_VHWS_LINKS);
380 fprintf(f, "\tindex=%d valid=%d revlink=%d tail=%d head=%d grp=%d\n",
381 (int)(val & 0x3ff), (int)(val >> 10) & 0x1,
382 (int)(val >> 11) & 0x3ff, (int)(val >> 26) & 0x1,
383 (int)(val >> 27) & 0x1, (int)(val >> 28) & 0x3ff);
385 val = ssovf_read64(base + SSOW_VHWS_PENDTAG);
386 fprintf(f, "\tptag=0x%x ptt=%d pgwi=%d pdesc=%d pgw=%d pgww=%d ps=%d\n",
387 (uint32_t)(val & 0xffffffff), (int)(val >> 32) & 0x3,
388 (int)(val >> 56) & 0x1, (int)(val >> 58) & 0x1,
389 (int)(val >> 61) & 0x1, (int)(val >> 62) & 0x1,
390 (int)(val >> 63) & 0x1);
392 val = ssovf_read64(base + SSOW_VHWS_PENDWQP);
393 fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
397 ssovf_dump(struct rte_eventdev *dev, FILE *f)
399 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
402 /* Dump SSOWVF debug registers */
403 for (port = 0; port < edev->nb_event_ports; port++)
404 ssows_dump(dev->data->ports[port], f);
408 ssovf_start(struct rte_eventdev *dev)
410 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
416 for (i = 0; i < edev->nb_event_ports; i++) {
417 ws = dev->data->ports[i];
422 for (i = 0; i < edev->nb_event_queues; i++) {
423 /* Consume all the events through HWS0 */
424 ssows_flush_events(dev->data->ports[0], i);
426 base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
427 base += SSO_VHGRP_QCTL;
428 ssovf_write64(1, base); /* Enable SSO group */
431 ssovf_fastpath_fns_set(dev);
436 ssovf_stop(struct rte_eventdev *dev)
438 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
444 for (i = 0; i < edev->nb_event_ports; i++) {
445 ws = dev->data->ports[i];
450 for (i = 0; i < edev->nb_event_queues; i++) {
451 /* Consume all the events through HWS0 */
452 ssows_flush_events(dev->data->ports[0], i);
454 base = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, i, 0);
455 base += SSO_VHGRP_QCTL;
456 ssovf_write64(0, base); /* Disable SSO group */
461 ssovf_close(struct rte_eventdev *dev)
463 struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
464 uint8_t all_queues[RTE_EVENT_MAX_QUEUES_PER_DEV];
467 for (i = 0; i < edev->nb_event_queues; i++)
470 for (i = 0; i < edev->nb_event_ports; i++)
471 ssovf_port_unlink(dev, dev->data->ports[i], all_queues,
472 edev->nb_event_queues);
476 /* Initialize and register event driver with DPDK Application */
477 static const struct rte_eventdev_ops ssovf_ops = {
478 .dev_infos_get = ssovf_info_get,
479 .dev_configure = ssovf_configure,
480 .queue_def_conf = ssovf_queue_def_conf,
481 .queue_setup = ssovf_queue_setup,
482 .queue_release = ssovf_queue_release,
483 .port_def_conf = ssovf_port_def_conf,
484 .port_setup = ssovf_port_setup,
485 .port_release = ssovf_port_release,
486 .port_link = ssovf_port_link,
487 .port_unlink = ssovf_port_unlink,
488 .timeout_ticks = ssovf_timeout_ticks,
490 .dev_start = ssovf_start,
491 .dev_stop = ssovf_stop,
492 .dev_close = ssovf_close
496 ssovf_vdev_probe(struct rte_vdev_device *vdev)
498 struct octeontx_ssovf_info oinfo;
499 struct ssovf_mbox_dev_info info;
500 struct ssovf_evdev *edev;
501 struct rte_eventdev *eventdev;
502 static int ssovf_init_once;
506 name = rte_vdev_device_name(vdev);
507 /* More than one instance is not supported */
508 if (ssovf_init_once) {
509 ssovf_log_err("Request to create >1 %s instance", name);
513 eventdev = rte_event_pmd_vdev_init(name, sizeof(struct ssovf_evdev),
515 if (eventdev == NULL) {
516 ssovf_log_err("Failed to create eventdev vdev %s", name);
519 eventdev->dev_ops = &ssovf_ops;
521 /* For secondary processes, the primary has done all the work */
522 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
523 ssovf_fastpath_fns_set(eventdev);
527 ret = octeontx_ssovf_info(&oinfo);
529 ssovf_log_err("Failed to probe and validate ssovfs %d", ret);
533 edev = ssovf_pmd_priv(eventdev);
534 edev->max_event_ports = oinfo.total_ssowvfs;
535 edev->max_event_queues = oinfo.total_ssovfs;
536 edev->is_timeout_deq = 0;
538 ret = ssovf_mbox_dev_info(&info);
539 if (ret < 0 || ret != sizeof(struct ssovf_mbox_dev_info)) {
540 ssovf_log_err("Failed to get mbox devinfo %d", ret);
544 edev->min_deq_timeout_ns = info.min_deq_timeout_ns;
545 edev->max_deq_timeout_ns = info.max_deq_timeout_ns;
546 edev->max_num_events = info.max_num_events;
547 ssovf_log_dbg("min_deq_tmo=%"PRId64" max_deq_tmo=%"PRId64" max_evts=%d",
548 info.min_deq_timeout_ns, info.max_deq_timeout_ns,
549 info.max_num_events);
551 if (!edev->max_event_ports || !edev->max_event_queues) {
552 ssovf_log_err("Not enough eventdev resource queues=%d ports=%d",
553 edev->max_event_queues, edev->max_event_ports);
558 ssovf_log_info("Initializing %s domain=%d max_queues=%d max_ports=%d",
559 name, oinfo.domain, edev->max_event_queues,
560 edev->max_event_ports);
566 rte_event_pmd_vdev_uninit(name);
571 ssovf_vdev_remove(struct rte_vdev_device *vdev)
575 name = rte_vdev_device_name(vdev);
576 ssovf_log_info("Closing %s", name);
577 return rte_event_pmd_vdev_uninit(name);
580 static struct rte_vdev_driver vdev_ssovf_pmd = {
581 .probe = ssovf_vdev_probe,
582 .remove = ssovf_vdev_remove
585 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_OCTEONTX_PMD, vdev_ssovf_pmd);