839a5ccaabac6a55efd544f5dc7c2d2f702d2cc1
[dpdk.git] / drivers / event / octeontx2 / otx2_evdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2019 Marvell International Ltd.
3  */
4
5 #include <inttypes.h>
6
7 #include <rte_bus_pci.h>
8 #include <rte_common.h>
9 #include <rte_eal.h>
10 #include <rte_eventdev_pmd_pci.h>
11 #include <rte_pci.h>
12
13 #include "otx2_evdev.h"
14
15 static void
16 otx2_sso_info_get(struct rte_eventdev *event_dev,
17                   struct rte_event_dev_info *dev_info)
18 {
19         struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
20
21         dev_info->driver_name = RTE_STR(EVENTDEV_NAME_OCTEONTX2_PMD);
22         dev_info->min_dequeue_timeout_ns = dev->min_dequeue_timeout_ns;
23         dev_info->max_dequeue_timeout_ns = dev->max_dequeue_timeout_ns;
24         dev_info->max_event_queues = dev->max_event_queues;
25         dev_info->max_event_queue_flows = (1ULL << 20);
26         dev_info->max_event_queue_priority_levels = 8;
27         dev_info->max_event_priority_levels = 1;
28         dev_info->max_event_ports = dev->max_event_ports;
29         dev_info->max_event_port_dequeue_depth = 1;
30         dev_info->max_event_port_enqueue_depth = 1;
31         dev_info->max_num_events =  dev->max_num_events;
32         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_QUEUE_QOS |
33                                         RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
34                                         RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES |
35                                         RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
36                                         RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
37                                         RTE_EVENT_DEV_CAP_NONSEQ_MODE;
38 }
39
40 /* Initialize and register event driver with DPDK Application */
41 static struct rte_eventdev_ops otx2_sso_ops = {
42         .dev_infos_get    = otx2_sso_info_get,
43 };
44
45 static int
46 otx2_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
47 {
48         return rte_event_pmd_pci_probe(pci_drv, pci_dev,
49                                        sizeof(struct otx2_sso_evdev),
50                                        otx2_sso_init);
51 }
52
53 static int
54 otx2_sso_remove(struct rte_pci_device *pci_dev)
55 {
56         return rte_event_pmd_pci_remove(pci_dev, otx2_sso_fini);
57 }
58
59 static const struct rte_pci_id pci_sso_map[] = {
60         {
61                 RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
62                                PCI_DEVID_OCTEONTX2_RVU_SSO_TIM_PF)
63         },
64         {
65                 .vendor_id = 0,
66         },
67 };
68
69 static struct rte_pci_driver pci_sso = {
70         .id_table = pci_sso_map,
71         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
72         .probe = otx2_sso_probe,
73         .remove = otx2_sso_remove,
74 };
75
76 int
77 otx2_sso_init(struct rte_eventdev *event_dev)
78 {
79         struct free_rsrcs_rsp *rsrc_cnt;
80         struct rte_pci_device *pci_dev;
81         struct otx2_sso_evdev *dev;
82         int rc;
83
84         event_dev->dev_ops = &otx2_sso_ops;
85         /* For secondary processes, the primary has done all the work */
86         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
87                 return 0;
88
89         dev = sso_pmd_priv(event_dev);
90
91         pci_dev = container_of(event_dev->dev, struct rte_pci_device, device);
92
93         /* Initialize the base otx2_dev object */
94         rc = otx2_dev_init(pci_dev, dev);
95         if (rc < 0) {
96                 otx2_err("Failed to initialize otx2_dev rc=%d", rc);
97                 goto error;
98         }
99
100         /* Get SSO and SSOW MSIX rsrc cnt */
101         otx2_mbox_alloc_msg_free_rsrc_cnt(dev->mbox);
102         rc = otx2_mbox_process_msg(dev->mbox, (void *)&rsrc_cnt);
103         if (rc < 0) {
104                 otx2_err("Unable to get free rsrc count");
105                 goto otx2_dev_uninit;
106         }
107         otx2_sso_dbg("SSO %d SSOW %d NPA %d provisioned", rsrc_cnt->sso,
108                      rsrc_cnt->ssow, rsrc_cnt->npa);
109
110         dev->max_event_ports = RTE_MIN(rsrc_cnt->ssow, OTX2_SSO_MAX_VHWS);
111         dev->max_event_queues = RTE_MIN(rsrc_cnt->sso, OTX2_SSO_MAX_VHGRP);
112         /* Grab the NPA LF if required */
113         rc = otx2_npa_lf_init(pci_dev, dev);
114         if (rc < 0) {
115                 otx2_err("Unable to init NPA lf. It might not be provisioned");
116                 goto otx2_dev_uninit;
117         }
118
119         dev->drv_inited = true;
120         dev->is_timeout_deq = 0;
121         dev->min_dequeue_timeout_ns = USEC2NSEC(1);
122         dev->max_dequeue_timeout_ns = USEC2NSEC(0x3FF);
123         dev->max_num_events = -1;
124         dev->nb_event_queues = 0;
125         dev->nb_event_ports = 0;
126
127         if (!dev->max_event_ports || !dev->max_event_queues) {
128                 otx2_err("Not enough eventdev resource queues=%d ports=%d",
129                          dev->max_event_queues, dev->max_event_ports);
130                 rc = -ENODEV;
131                 goto otx2_npa_lf_uninit;
132         }
133
134         otx2_sso_pf_func_set(dev->pf_func);
135         otx2_sso_dbg("Initializing %s max_queues=%d max_ports=%d",
136                      event_dev->data->name, dev->max_event_queues,
137                      dev->max_event_ports);
138
139
140         return 0;
141
142 otx2_npa_lf_uninit:
143         otx2_npa_lf_fini();
144 otx2_dev_uninit:
145         otx2_dev_fini(pci_dev, dev);
146 error:
147         return rc;
148 }
149
150 int
151 otx2_sso_fini(struct rte_eventdev *event_dev)
152 {
153         struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
154         struct rte_pci_device *pci_dev;
155
156         /* For secondary processes, nothing to be done */
157         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
158                 return 0;
159
160         pci_dev = container_of(event_dev->dev, struct rte_pci_device, device);
161
162         if (!dev->drv_inited)
163                 goto dev_fini;
164
165         dev->drv_inited = false;
166         otx2_npa_lf_fini();
167
168 dev_fini:
169         if (otx2_npa_lf_active(dev)) {
170                 otx2_info("Common resource in use by other devices");
171                 return -EAGAIN;
172         }
173
174         otx2_dev_fini(pci_dev, dev);
175
176         return 0;
177 }
178
179 RTE_PMD_REGISTER_PCI(event_octeontx2, pci_sso);
180 RTE_PMD_REGISTER_PCI_TABLE(event_octeontx2, pci_sso_map);
181 RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, "vfio-pci");