drivers/event/octeontx2/otx2_evdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(C) 2019 Marvell International Ltd.
   3  */
   4
   5 #ifndef __OTX2_EVDEV_H__
   6 #define __OTX2_EVDEV_H__
   7
   8 #include <rte_eventdev.h>
   9 #include <rte_eventdev_pmd.h>
  10 #include <rte_event_eth_rx_adapter.h>
  11 #include <rte_event_eth_tx_adapter.h>
  12
  13 #include "otx2_common.h"
  14 #include "otx2_dev.h"
  15 #include "otx2_ethdev.h"
  16 #include "otx2_mempool.h"
  17 #include "otx2_tim_evdev.h"
  18
  19 #define EVENTDEV_NAME_OCTEONTX2_PMD event_octeontx2
  20
  21 #define sso_func_trace otx2_sso_dbg
  22
  23 #define OTX2_SSO_MAX_VHGRP                  RTE_EVENT_MAX_QUEUES_PER_DEV
  24 #define OTX2_SSO_MAX_VHWS                   (UINT8_MAX)
  25 #define OTX2_SSO_FC_NAME                    "otx2_evdev_xaq_fc"
  26 #define OTX2_SSO_SQB_LIMIT                  (0x180)
  27 #define OTX2_SSO_XAQ_SLACK                  (8)
  28 #define OTX2_SSO_XAQ_CACHE_CNT              (0x7)
  29 #define OTX2_SSO_WQE_SG_PTR                 (9)
  30
  31 /* SSO LF register offsets (BAR2) */
  32 #define SSO_LF_GGRP_OP_ADD_WORK0            (0x0ull)
  33 #define SSO_LF_GGRP_OP_ADD_WORK1            (0x8ull)
  34
  35 #define SSO_LF_GGRP_QCTL                    (0x20ull)
  36 #define SSO_LF_GGRP_EXE_DIS                 (0x80ull)
  37 #define SSO_LF_GGRP_INT                     (0x100ull)
  38 #define SSO_LF_GGRP_INT_W1S                 (0x108ull)
  39 #define SSO_LF_GGRP_INT_ENA_W1S             (0x110ull)
  40 #define SSO_LF_GGRP_INT_ENA_W1C             (0x118ull)
  41 #define SSO_LF_GGRP_INT_THR                 (0x140ull)
  42 #define SSO_LF_GGRP_INT_CNT                 (0x180ull)
  43 #define SSO_LF_GGRP_XAQ_CNT                 (0x1b0ull)
  44 #define SSO_LF_GGRP_AQ_CNT                  (0x1c0ull)
  45 #define SSO_LF_GGRP_AQ_THR                  (0x1e0ull)
  46 #define SSO_LF_GGRP_MISC_CNT                (0x200ull)
  47
  48 /* SSOW LF register offsets (BAR2) */
  49 #define SSOW_LF_GWS_LINKS                   (0x10ull)
  50 #define SSOW_LF_GWS_PENDWQP                 (0x40ull)
  51 #define SSOW_LF_GWS_PENDSTATE               (0x50ull)
  52 #define SSOW_LF_GWS_NW_TIM                  (0x70ull)
  53 #define SSOW_LF_GWS_GRPMSK_CHG              (0x80ull)
  54 #define SSOW_LF_GWS_INT                     (0x100ull)
  55 #define SSOW_LF_GWS_INT_W1S                 (0x108ull)
  56 #define SSOW_LF_GWS_INT_ENA_W1S             (0x110ull)
  57 #define SSOW_LF_GWS_INT_ENA_W1C             (0x118ull)
  58 #define SSOW_LF_GWS_TAG                     (0x200ull)
  59 #define SSOW_LF_GWS_WQP                     (0x210ull)
  60 #define SSOW_LF_GWS_SWTP                    (0x220ull)
  61 #define SSOW_LF_GWS_PENDTAG                 (0x230ull)
  62 #define SSOW_LF_GWS_OP_ALLOC_WE             (0x400ull)
  63 #define SSOW_LF_GWS_OP_GET_WORK             (0x600ull)
  64 #define SSOW_LF_GWS_OP_SWTAG_FLUSH          (0x800ull)
  65 #define SSOW_LF_GWS_OP_SWTAG_UNTAG          (0x810ull)
  66 #define SSOW_LF_GWS_OP_SWTP_CLR             (0x820ull)
  67 #define SSOW_LF_GWS_OP_UPD_WQP_GRP0         (0x830ull)
  68 #define SSOW_LF_GWS_OP_UPD_WQP_GRP1         (0x838ull)
  69 #define SSOW_LF_GWS_OP_DESCHED              (0x880ull)
  70 #define SSOW_LF_GWS_OP_DESCHED_NOSCH        (0x8c0ull)
  71 #define SSOW_LF_GWS_OP_SWTAG_DESCHED        (0x980ull)
  72 #define SSOW_LF_GWS_OP_SWTAG_NOSCHED        (0x9c0ull)
  73 #define SSOW_LF_GWS_OP_CLR_NSCHED0          (0xa00ull)
  74 #define SSOW_LF_GWS_OP_CLR_NSCHED1          (0xa08ull)
  75 #define SSOW_LF_GWS_OP_SWTP_SET             (0xc00ull)
  76 #define SSOW_LF_GWS_OP_SWTAG_NORM           (0xc10ull)
  77 #define SSOW_LF_GWS_OP_SWTAG_FULL0          (0xc20ull)
  78 #define SSOW_LF_GWS_OP_SWTAG_FULL1          (0xc28ull)
  79 #define SSOW_LF_GWS_OP_GWC_INVAL            (0xe00ull)
  80
  81 #define OTX2_SSOW_GET_BASE_ADDR(_GW)        ((_GW) - SSOW_LF_GWS_OP_GET_WORK)
  82
  83 #define NSEC2USEC(__ns)                 ((__ns) / 1E3)
  84 #define USEC2NSEC(__us)                 ((__us) * 1E3)
  85 #define NSEC2TICK(__ns, __freq)         (((__ns) * (__freq)) / 1E9)
  86 #define TICK2NSEC(__tck, __freq)        (((__tck) * 1E9) / (__freq))
  87
  88 enum otx2_sso_lf_type {
  89         SSO_LF_GGRP,
  90         SSO_LF_GWS
  91 };
  92
  93 union otx2_sso_event {
  94         uint64_t get_work0;
  95         struct {
  96                 uint32_t flow_id:20;
  97                 uint32_t sub_event_type:8;
  98                 uint32_t event_type:4;
  99                 uint8_t op:2;
 100                 uint8_t rsvd:4;
 101                 uint8_t sched_type:2;
 102                 uint8_t queue_id;
 103                 uint8_t priority;
 104                 uint8_t impl_opaque;
 105         };
 106 } __rte_aligned(64);
 107
 108 enum {
 109         SSO_SYNC_ORDERED,
 110         SSO_SYNC_ATOMIC,
 111         SSO_SYNC_UNTAGGED,
 112         SSO_SYNC_EMPTY
 113 };
 114
 115 struct otx2_sso_qos {
 116         uint8_t queue;
 117         uint8_t xaq_prcnt;
 118         uint8_t taq_prcnt;
 119         uint8_t iaq_prcnt;
 120 };
 121
 122 struct otx2_sso_evdev {
 123         OTX2_DEV; /* Base class */
 124         uint8_t max_event_queues;
 125         uint8_t max_event_ports;
 126         uint8_t is_timeout_deq;
 127         uint8_t nb_event_queues;
 128         uint8_t nb_event_ports;
 129         uint8_t configured;
 130         uint32_t deq_tmo_ns;
 131         uint32_t min_dequeue_timeout_ns;
 132         uint32_t max_dequeue_timeout_ns;
 133         int32_t max_num_events;
 134         uint64_t *fc_mem;
 135         uint64_t xaq_lmt;
 136         uint64_t nb_xaq_cfg;
 137         rte_iova_t fc_iova;
 138         struct rte_mempool *xaq_pool;
 139         uint64_t rx_offloads;
 140         uint64_t tx_offloads;
 141         uint64_t adptr_xae_cnt;
 142         uint16_t rx_adptr_pool_cnt;
 143         uint64_t *rx_adptr_pools;
 144         uint16_t max_port_id;
 145         uint16_t tim_adptr_ring_cnt;
 146         uint16_t *timer_adptr_rings;
 147         uint64_t *timer_adptr_sz;
 148         /* Dev args */
 149         uint8_t dual_ws;
 150         uint32_t xae_cnt;
 151         uint8_t qos_queue_cnt;
 152         struct otx2_sso_qos *qos_parse_data;
 153         /* HW const */
 154         uint32_t xae_waes;
 155         uint32_t xaq_buf_size;
 156         uint32_t iue;
 157         /* MSIX offsets */
 158         uint16_t sso_msixoff[OTX2_SSO_MAX_VHGRP];
 159         uint16_t ssow_msixoff[OTX2_SSO_MAX_VHWS];
 160         /* PTP timestamp */
 161         struct otx2_timesync_info *tstamp;
 162 } __rte_cache_aligned;
 163
 164 #define OTX2_SSOGWS_OPS                                                        \
 165         /* WS ops */                                                           \
 166         uintptr_t getwrk_op;                                                   \
 167         uintptr_t tag_op;                                                      \
 168         uintptr_t wqp_op;                                                      \
 169         uintptr_t swtag_flush_op;                                              \
 170         uintptr_t swtag_norm_op;                                               \
 171         uintptr_t swtag_desched_op;                                            \
 172         uint8_t cur_tt;                                                        \
 173         uint8_t cur_grp
 174
 175 /* Event port aka GWS */
 176 struct otx2_ssogws {
 177         /* Get Work Fastpath data */
 178         OTX2_SSOGWS_OPS;
 179         uint8_t swtag_req;
 180         void *lookup_mem;
 181         uint8_t port;
 182         /* Add Work Fastpath data */
 183         uint64_t xaq_lmt __rte_cache_aligned;
 184         uint64_t *fc_mem;
 185         uintptr_t grps_base[OTX2_SSO_MAX_VHGRP];
 186         /* PTP timestamp */
 187         struct otx2_timesync_info *tstamp;
 188         /* Tx Fastpath data */
 189         uint8_t tx_adptr_data[] __rte_cache_aligned;
 190 } __rte_cache_aligned;
 191
 192 struct otx2_ssogws_state {
 193         OTX2_SSOGWS_OPS;
 194 };
 195
 196 struct otx2_ssogws_dual {
 197         /* Get Work Fastpath data */
 198         struct otx2_ssogws_state ws_state[2]; /* Ping and Pong */
 199         uint8_t swtag_req;
 200         uint8_t vws; /* Ping pong bit */
 201         void *lookup_mem;
 202         uint8_t port;
 203         /* Add Work Fastpath data */
 204         uint64_t xaq_lmt __rte_cache_aligned;
 205         uint64_t *fc_mem;
 206         uintptr_t grps_base[OTX2_SSO_MAX_VHGRP];
 207         /* PTP timestamp */
 208         struct otx2_timesync_info *tstamp;
 209         /* Tx Fastpath data */
 210         uint8_t tx_adptr_data[] __rte_cache_aligned;
 211 } __rte_cache_aligned;
 212
 213 static inline struct otx2_sso_evdev *
 214 sso_pmd_priv(const struct rte_eventdev *event_dev)
 215 {
 216         return event_dev->data->dev_private;
 217 }
 218
 219 static const union mbuf_initializer mbuf_init = {
 220         .fields = {
 221                 .data_off = RTE_PKTMBUF_HEADROOM,
 222                 .refcnt = 1,
 223                 .nb_segs = 1,
 224                 .port = 0
 225         }
 226 };
 227
 228 static __rte_always_inline void
 229 otx2_wqe_to_mbuf(uint64_t get_work1, const uint64_t mbuf, uint8_t port_id,
 230                  const uint32_t tag, const uint32_t flags,
 231                  const void * const lookup_mem)
 232 {
 233         struct nix_wqe_hdr_s *wqe = (struct nix_wqe_hdr_s *)get_work1;
 234         uint64_t val = mbuf_init.value | (uint64_t)port_id << 48;
 235
 236         if (flags & NIX_RX_OFFLOAD_TSTAMP_F)
 237                 val |= NIX_TIMESYNC_RX_OFFSET;
 238
 239         otx2_nix_cqe_to_mbuf((struct nix_cqe_hdr_s *)wqe, tag,
 240                              (struct rte_mbuf *)mbuf, lookup_mem,
 241                               val, flags);
 242
 243 }
 244
 245 static inline int
 246 parse_kvargs_flag(const char *key, const char *value, void *opaque)
 247 {
 248         RTE_SET_USED(key);
 249
 250         *(uint8_t *)opaque = !!atoi(value);
 251         return 0;
 252 }
 253
 254 static inline int
 255 parse_kvargs_value(const char *key, const char *value, void *opaque)
 256 {
 257         RTE_SET_USED(key);
 258
 259         *(uint32_t *)opaque = (uint32_t)atoi(value);
 260         return 0;
 261 }
 262
 263 #define SSO_RX_ADPTR_ENQ_FASTPATH_FUNC  NIX_RX_FASTPATH_MODES
 264 #define SSO_TX_ADPTR_ENQ_FASTPATH_FUNC  NIX_TX_FASTPATH_MODES
 265
 266 /* Single WS API's */
 267 uint16_t otx2_ssogws_enq(void *port, const struct rte_event *ev);
 268 uint16_t otx2_ssogws_enq_burst(void *port, const struct rte_event ev[],
 269                                uint16_t nb_events);
 270 uint16_t otx2_ssogws_enq_new_burst(void *port, const struct rte_event ev[],
 271                                    uint16_t nb_events);
 272 uint16_t otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],
 273                                    uint16_t nb_events);
 274
 275 /* Dual WS API's */
 276 uint16_t otx2_ssogws_dual_enq(void *port, const struct rte_event *ev);
 277 uint16_t otx2_ssogws_dual_enq_burst(void *port, const struct rte_event ev[],
 278                                     uint16_t nb_events);
 279 uint16_t otx2_ssogws_dual_enq_new_burst(void *port, const struct rte_event ev[],
 280                                         uint16_t nb_events);
 281 uint16_t otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
 282                                         uint16_t nb_events);
 283
 284 /* Auto generated API's */
 285 #define R(name, f6, f5, f4, f3, f2, f1, f0, flags)                             \
 286 uint16_t otx2_ssogws_deq_ ##name(void *port, struct rte_event *ev,             \
 287                                  uint64_t timeout_ticks);                      \
 288 uint16_t otx2_ssogws_deq_burst_ ##name(void *port, struct rte_event ev[],      \
 289                                        uint16_t nb_events,                     \
 290                                        uint64_t timeout_ticks);                \
 291 uint16_t otx2_ssogws_deq_timeout_ ##name(void *port,                           \
 292                                          struct rte_event *ev,                 \
 293                                          uint64_t timeout_ticks);              \
 294 uint16_t otx2_ssogws_deq_timeout_burst_ ##name(void *port,                     \
 295                                                struct rte_event ev[],          \
 296                                                uint16_t nb_events,             \
 297                                                uint64_t timeout_ticks);        \
 298 uint16_t otx2_ssogws_deq_seg_ ##name(void *port, struct rte_event *ev,         \
 299                                      uint64_t timeout_ticks);                  \
 300 uint16_t otx2_ssogws_deq_seg_burst_ ##name(void *port,                         \
 301                                            struct rte_event ev[],              \
 302                                            uint16_t nb_events,                 \
 303                                            uint64_t timeout_ticks);            \
 304 uint16_t otx2_ssogws_deq_seg_timeout_ ##name(void *port,                       \
 305                                              struct rte_event *ev,             \
 306                                              uint64_t timeout_ticks);          \
 307 uint16_t otx2_ssogws_deq_seg_timeout_burst_ ##name(void *port,                 \
 308                                                    struct rte_event ev[],      \
 309                                                    uint16_t nb_events,         \
 310                                                    uint64_t timeout_ticks);    \
 311                                                                                \
 312 uint16_t otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev,        \
 313                                       uint64_t timeout_ticks);                 \
 314 uint16_t otx2_ssogws_dual_deq_burst_ ##name(void *port,                        \
 315                                             struct rte_event ev[],             \
 316                                             uint16_t nb_events,                \
 317                                             uint64_t timeout_ticks);           \
 318 uint16_t otx2_ssogws_dual_deq_timeout_ ##name(void *port,                      \
 319                                               struct rte_event *ev,            \
 320                                               uint64_t timeout_ticks);         \
 321 uint16_t otx2_ssogws_dual_deq_timeout_burst_ ##name(void *port,                \
 322                                                     struct rte_event ev[],     \
 323                                                     uint16_t nb_events,        \
 324                                                     uint64_t timeout_ticks);   \
 325 uint16_t otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev,    \
 326                                           uint64_t timeout_ticks);             \
 327 uint16_t otx2_ssogws_dual_deq_seg_burst_ ##name(void *port,                    \
 328                                                 struct rte_event ev[],         \
 329                                                 uint16_t nb_events,            \
 330                                                 uint64_t timeout_ticks);       \
 331 uint16_t otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port,                  \
 332                                                   struct rte_event *ev,        \
 333                                                   uint64_t timeout_ticks);     \
 334 uint16_t otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port,            \
 335                                                         struct rte_event ev[], \
 336                                                         uint16_t nb_events,    \
 337                                                        uint64_t timeout_ticks);\
 338
 339 SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
 340 #undef R
 341
 342 #define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)                       \
 343 uint16_t otx2_ssogws_tx_adptr_enq_ ## name(void *port, struct rte_event ev[],\
 344                                            uint16_t nb_events);              \
 345 uint16_t otx2_ssogws_tx_adptr_enq_seg_ ## name(void *port,                   \
 346                                                struct rte_event ev[],        \
 347                                                uint16_t nb_events);          \
 348 uint16_t otx2_ssogws_dual_tx_adptr_enq_ ## name(void *port,                  \
 349                                                 struct rte_event ev[],       \
 350                                                 uint16_t nb_events);         \
 351 uint16_t otx2_ssogws_dual_tx_adptr_enq_seg_ ## name(void *port,              \
 352                                                     struct rte_event ev[],   \
 353                                                     uint16_t nb_events);     \
 354
 355 SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
 356 #undef T
 357
 358 void sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data,
 359                       uint32_t event_type);
 360 int sso_xae_reconfigure(struct rte_eventdev *event_dev);
 361 void sso_fastpath_fns_set(struct rte_eventdev *event_dev);
 362
 363 int otx2_sso_rx_adapter_caps_get(const struct rte_eventdev *event_dev,
 364                                  const struct rte_eth_dev *eth_dev,
 365                                  uint32_t *caps);
 366 int otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,
 367                                   const struct rte_eth_dev *eth_dev,
 368                                   int32_t rx_queue_id,
 369                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
 370 int otx2_sso_rx_adapter_queue_del(const struct rte_eventdev *event_dev,
 371                                   const struct rte_eth_dev *eth_dev,
 372                                   int32_t rx_queue_id);
 373 int otx2_sso_rx_adapter_start(const struct rte_eventdev *event_dev,
 374                               const struct rte_eth_dev *eth_dev);
 375 int otx2_sso_rx_adapter_stop(const struct rte_eventdev *event_dev,
 376                              const struct rte_eth_dev *eth_dev);
 377 int otx2_sso_tx_adapter_caps_get(const struct rte_eventdev *dev,
 378                                  const struct rte_eth_dev *eth_dev,
 379                                  uint32_t *caps);
 380 int otx2_sso_tx_adapter_queue_add(uint8_t id,
 381                                   const struct rte_eventdev *event_dev,
 382                                   const struct rte_eth_dev *eth_dev,
 383                                   int32_t tx_queue_id);
 384
 385 int otx2_sso_tx_adapter_queue_del(uint8_t id,
 386                                   const struct rte_eventdev *event_dev,
 387                                   const struct rte_eth_dev *eth_dev,
 388                                   int32_t tx_queue_id);
 389
 390 /* Event crypto adapter API's */
 391 int otx2_ca_caps_get(const struct rte_eventdev *dev,
 392                      const struct rte_cryptodev *cdev, uint32_t *caps);
 393
 394 int otx2_ca_qp_add(const struct rte_eventdev *dev,
 395                    const struct rte_cryptodev *cdev, int32_t queue_pair_id,
 396                    const struct rte_event *event);
 397
 398 int otx2_ca_qp_del(const struct rte_eventdev *dev,
 399                    const struct rte_cryptodev *cdev, int32_t queue_pair_id);
 400
 401 /* Clean up API's */
 402 typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);
 403 void ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id,
 404                          uintptr_t base, otx2_handle_event_t fn, void *arg);
 405 void ssogws_reset(struct otx2_ssogws *ws);
 406 /* Selftest */
 407 int otx2_sso_selftest(void);
 408 /* Init and Fini API's */
 409 int otx2_sso_init(struct rte_eventdev *event_dev);
 410 int otx2_sso_fini(struct rte_eventdev *event_dev);
 411 /* IRQ handlers */
 412 int sso_register_irqs(const struct rte_eventdev *event_dev);
 413 void sso_unregister_irqs(const struct rte_eventdev *event_dev);
 414
 415 #endif /* __OTX2_EVDEV_H__ */