drivers/net/bnx2x/debug.c

   1 /*-
   2  * Copyright (c) 2007-2013 QLogic Corporation. All rights reserved.
   3  *
   4  * Eric Davis        <edavis@broadcom.com>
   5  * David Christensen <davidch@broadcom.com>
   6  * Gary Zambrano     <zambrano@broadcom.com>
   7  *
   8  * Copyright (c) 2013-2015 Brocade Communications Systems, Inc.
   9  * Copyright (c) 2015 QLogic Corporation.
  10  * All rights reserved.
  11  * www.qlogic.com
  12  *
  13  * See LICENSE.bnx2x_pmd for copyright and licensing details.
  14  */
  15
  16 #include "bnx2x.h"
  17
  18
  19 /*
  20  * Debug versions of the 8/16/32 bit OS register read/write functions to
  21  * capture/display values read/written from/to the controller.
  22  */
  23 void
  24 bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
  25 {
  26         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
  27         *((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
  28 }
  29
  30 void
  31 bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
  32 {
  33         if ((offset % 2) != 0) {
  34                 PMD_DRV_LOG(NOTICE, "Unaligned 16-bit write to 0x%08lx",
  35                             (unsigned long)offset);
  36         }
  37
  38         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x", (unsigned long)offset, val);
  39         *((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
  40 }
  41
  42 void
  43 bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
  44 {
  45         if ((offset % 4) != 0) {
  46                 PMD_DRV_LOG(NOTICE, "Unaligned 32-bit write to 0x%08lx",
  47                             (unsigned long)offset);
  48         }
  49
  50         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
  51         *((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
  52 }
  53
  54 uint8_t
  55 bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset)
  56 {
  57         uint8_t val;
  58
  59         val = (uint8_t)(*((volatile uint8_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
  60         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x", (unsigned long)offset, val);
  61
  62         return val;
  63 }
  64
  65 uint16_t
  66 bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset)
  67 {
  68         uint16_t val;
  69
  70         if ((offset % 2) != 0) {
  71                 PMD_DRV_LOG(NOTICE, "Unaligned 16-bit read from 0x%08lx",
  72                             (unsigned long)offset);
  73         }
  74
  75         val = (uint16_t)(*((volatile uint16_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
  76         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
  77
  78         return val;
  79 }
  80
  81 uint32_t
  82 bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
  83 {
  84         uint32_t val;
  85
  86         if ((offset % 4) != 0) {
  87                 PMD_DRV_LOG(NOTICE, "Unaligned 32-bit read from 0x%08lx",
  88                             (unsigned long)offset);
  89                 return 0;
  90         }
  91
  92         val = (uint32_t)(*((volatile uint32_t*)((uintptr_t)sc->bar[BAR0].base_addr + offset)));
  93         PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x", (unsigned long)offset, val);
  94
  95         return val;
  96 }