drivers/net/bnxt/bnxt.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_H_
   7 #define _BNXT_H_
   8
   9 #include <inttypes.h>
  10 #include <stdbool.h>
  11 #include <sys/queue.h>
  12
  13 #include <rte_pci.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_memory.h>
  17 #include <rte_lcore.h>
  18 #include <rte_spinlock.h>
  19 #include <rte_time.h>
  20
  21 #include "bnxt_cpr.h"
  22
  23 #define BNXT_MAX_MTU            9500
  24 #define VLAN_TAG_SIZE           4
  25 #define BNXT_MAX_LED            4
  26 #define BNXT_NUM_VLANS          2
  27 #define BNXT_MIN_RING_DESC      16
  28 #define BNXT_MAX_TX_RING_DESC   4096
  29 #define BNXT_MAX_RX_RING_DESC   8192
  30 #define BNXT_DB_SIZE            0x80
  31
  32 #define BNXT_INT_LAT_TMR_MIN                    75
  33 #define BNXT_INT_LAT_TMR_MAX                    150
  34 #define BNXT_NUM_CMPL_AGGR_INT                  36
  35 #define BNXT_CMPL_AGGR_DMA_TMR                  37
  36 #define BNXT_NUM_CMPL_DMA_AGGR                  36
  37 #define BNXT_CMPL_AGGR_DMA_TMR_DURING_INT       50
  38 #define BNXT_NUM_CMPL_DMA_AGGR_DURING_INT       12
  39
  40 struct bnxt_led_info {
  41         uint8_t      led_id;
  42         uint8_t      led_type;
  43         uint8_t      led_group_id;
  44         uint8_t      unused;
  45         uint16_t  led_state_caps;
  46 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
  47         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
  48
  49         uint16_t  led_color_caps;
  50 };
  51
  52 struct bnxt_led_cfg {
  53         uint8_t led_id;
  54         uint8_t led_state;
  55         uint8_t led_color;
  56         uint8_t unused;
  57         uint16_t led_blink_on;
  58         uint16_t led_blink_off;
  59         uint8_t led_group_id;
  60         uint8_t rsvd;
  61 };
  62
  63 #define BNXT_LED_DFLT_ENA                               \
  64         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
  65          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
  66          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
  67          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
  68          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
  69
  70 #define BNXT_LED_DFLT_ENA_SHIFT         6
  71
  72 #define BNXT_LED_DFLT_ENABLES(x)                        \
  73         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
  74
  75 enum bnxt_hw_context {
  76         HW_CONTEXT_NONE     = 0,
  77         HW_CONTEXT_IS_RSS   = 1,
  78         HW_CONTEXT_IS_COS   = 2,
  79         HW_CONTEXT_IS_LB    = 3,
  80 };
  81
  82 struct bnxt_vlan_table_entry {
  83         uint16_t                tpid;
  84         uint16_t                vid;
  85 } __attribute__((packed));
  86
  87 struct bnxt_vlan_antispoof_table_entry {
  88         uint16_t                tpid;
  89         uint16_t                vid;
  90         uint16_t                mask;
  91 } __attribute__((packed));
  92
  93 struct bnxt_child_vf_info {
  94         void                    *req_buf;
  95         struct bnxt_vlan_table_entry    *vlan_table;
  96         struct bnxt_vlan_antispoof_table_entry  *vlan_as_table;
  97         STAILQ_HEAD(, bnxt_filter_info) filter;
  98         uint32_t                func_cfg_flags;
  99         uint32_t                l2_rx_mask;
 100         uint16_t                fid;
 101         uint16_t                max_tx_rate;
 102         uint16_t                dflt_vlan;
 103         uint16_t                vlan_count;
 104         uint8_t                 mac_spoof_en;
 105         uint8_t                 vlan_spoof_en;
 106         bool                    random_mac;
 107         bool                    persist_stats;
 108 };
 109
 110 struct bnxt_pf_info {
 111 #define BNXT_FIRST_PF_FID       1
 112 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
 113 #define BNXT_TOTAL_VFS(bp)      ((bp)->pf.total_vfs)
 114 #define BNXT_FIRST_VF_FID       128
 115 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
 116 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
 117         uint16_t                port_id;
 118         uint16_t                first_vf_id;
 119         uint16_t                active_vfs;
 120         uint16_t                max_vfs;
 121         uint16_t                total_vfs; /* Total VFs possible.
 122                                             * Not necessarily enabled.
 123                                             */
 124         uint32_t                func_cfg_flags;
 125         void                    *vf_req_buf;
 126         rte_iova_t              vf_req_buf_dma_addr;
 127         uint32_t                vf_req_fwd[8];
 128         uint16_t                total_vnics;
 129         struct bnxt_child_vf_info       *vf_info;
 130 #define BNXT_EVB_MODE_NONE      0
 131 #define BNXT_EVB_MODE_VEB       1
 132 #define BNXT_EVB_MODE_VEPA      2
 133         uint8_t                 evb_mode;
 134 };
 135
 136 /* Max wait time is 10 * 100ms = 1s */
 137 #define BNXT_LINK_WAIT_CNT      10
 138 #define BNXT_LINK_WAIT_INTERVAL 100
 139 struct bnxt_link_info {
 140         uint32_t                phy_flags;
 141         uint8_t                 mac_type;
 142         uint8_t                 phy_link_status;
 143         uint8_t                 loop_back;
 144         uint8_t                 link_up;
 145         uint8_t                 duplex;
 146         uint8_t                 pause;
 147         uint8_t                 force_pause;
 148         uint8_t                 auto_pause;
 149         uint8_t                 auto_mode;
 150 #define PHY_VER_LEN             3
 151         uint8_t                 phy_ver[PHY_VER_LEN];
 152         uint16_t                link_speed;
 153         uint16_t                support_speeds;
 154         uint16_t                auto_link_speed;
 155         uint16_t                force_link_speed;
 156         uint16_t                auto_link_speed_mask;
 157         uint32_t                preemphasis;
 158         uint8_t                 phy_type;
 159         uint8_t                 media_type;
 160 };
 161
 162 #define BNXT_COS_QUEUE_COUNT    8
 163 struct bnxt_cos_queue_info {
 164         uint8_t id;
 165         uint8_t profile;
 166 };
 167
 168 struct rte_flow {
 169         STAILQ_ENTRY(rte_flow) next;
 170         struct bnxt_filter_info *filter;
 171         struct bnxt_vnic_info   *vnic;
 172 };
 173
 174 struct bnxt_ptp_cfg {
 175 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT  0x400
 176 #define BNXT_GRCPF_REG_SYNC_TIME        0x480
 177 #define BNXT_CYCLECOUNTER_MASK   0xffffffffffffffffULL
 178         struct rte_timecounter      tc;
 179         struct rte_timecounter      tx_tstamp_tc;
 180         struct rte_timecounter      rx_tstamp_tc;
 181         struct bnxt             *bp;
 182 #define BNXT_MAX_TX_TS  1
 183         uint16_t                        rxctl;
 184 #define BNXT_PTP_MSG_SYNC                       (1 << 0)
 185 #define BNXT_PTP_MSG_DELAY_REQ                  (1 << 1)
 186 #define BNXT_PTP_MSG_PDELAY_REQ                 (1 << 2)
 187 #define BNXT_PTP_MSG_PDELAY_RESP                (1 << 3)
 188 #define BNXT_PTP_MSG_FOLLOW_UP                  (1 << 8)
 189 #define BNXT_PTP_MSG_DELAY_RESP                 (1 << 9)
 190 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP      (1 << 10)
 191 #define BNXT_PTP_MSG_ANNOUNCE                   (1 << 11)
 192 #define BNXT_PTP_MSG_SIGNALING                  (1 << 12)
 193 #define BNXT_PTP_MSG_MANAGEMENT                 (1 << 13)
 194 #define BNXT_PTP_MSG_EVENTS             (BNXT_PTP_MSG_SYNC |            \
 195                                          BNXT_PTP_MSG_DELAY_REQ |       \
 196                                          BNXT_PTP_MSG_PDELAY_REQ |      \
 197                                          BNXT_PTP_MSG_PDELAY_RESP)
 198         uint8_t                 tx_tstamp_en:1;
 199         int                     rx_filter;
 200
 201 #define BNXT_PTP_RX_TS_L        0
 202 #define BNXT_PTP_RX_TS_H        1
 203 #define BNXT_PTP_RX_SEQ         2
 204 #define BNXT_PTP_RX_FIFO        3
 205 #define BNXT_PTP_RX_FIFO_PENDING 0x1
 206 #define BNXT_PTP_RX_FIFO_ADV    4
 207 #define BNXT_PTP_RX_REGS        5
 208
 209 #define BNXT_PTP_TX_TS_L        0
 210 #define BNXT_PTP_TX_TS_H        1
 211 #define BNXT_PTP_TX_SEQ         2
 212 #define BNXT_PTP_TX_FIFO        3
 213 #define BNXT_PTP_TX_FIFO_EMPTY   0x2
 214 #define BNXT_PTP_TX_REGS        4
 215         uint32_t                        rx_regs[BNXT_PTP_RX_REGS];
 216         uint32_t                        rx_mapped_regs[BNXT_PTP_RX_REGS];
 217         uint32_t                        tx_regs[BNXT_PTP_TX_REGS];
 218         uint32_t                        tx_mapped_regs[BNXT_PTP_TX_REGS];
 219 };
 220
 221 struct bnxt_coal {
 222         uint16_t                        num_cmpl_aggr_int;
 223         uint16_t                        num_cmpl_dma_aggr;
 224         uint16_t                        num_cmpl_dma_aggr_during_int;
 225         uint16_t                        int_lat_tmr_max;
 226         uint16_t                        int_lat_tmr_min;
 227         uint16_t                        cmpl_aggr_dma_tmr;
 228         uint16_t                        cmpl_aggr_dma_tmr_during_int;
 229 };
 230
 231 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
 232 struct bnxt {
 233         void                            *bar0;
 234
 235         struct rte_eth_dev              *eth_dev;
 236         struct rte_eth_rss_conf         rss_conf;
 237         struct rte_pci_device           *pdev;
 238         void                            *doorbell_base;
 239
 240         uint32_t                flags;
 241 #define BNXT_FLAG_REGISTERED    (1 << 0)
 242 #define BNXT_FLAG_VF            (1 << 1)
 243 #define BNXT_FLAG_PORT_STATS    (1 << 2)
 244 #define BNXT_FLAG_JUMBO         (1 << 3)
 245 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
 246 #define BNXT_FLAG_UPDATE_HASH   (1 << 5)
 247 #define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
 248 #define BNXT_FLAG_MULTI_HOST    (1 << 7)
 249 #define BNXT_FLAG_NEW_RM        (1 << 30)
 250 #define BNXT_FLAG_INIT_DONE     (1 << 31)
 251 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
 252 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
 253 #define BNXT_NPAR(bp)           ((bp)->port_partition_type)
 254 #define BNXT_MH(bp)             ((bp)->flags & BNXT_FLAG_MULTI_HOST)
 255 #define BNXT_SINGLE_PF(bp)      (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
 256
 257         unsigned int            rx_nr_rings;
 258         unsigned int            rx_cp_nr_rings;
 259         struct bnxt_rx_queue **rx_queues;
 260         const void              *rx_mem_zone;
 261         struct rx_port_stats    *hw_rx_port_stats;
 262         rte_iova_t              hw_rx_port_stats_map;
 263
 264         unsigned int            tx_nr_rings;
 265         unsigned int            tx_cp_nr_rings;
 266         struct bnxt_tx_queue **tx_queues;
 267         const void              *tx_mem_zone;
 268         struct tx_port_stats    *hw_tx_port_stats;
 269         rte_iova_t              hw_tx_port_stats_map;
 270
 271         /* Default completion ring */
 272         struct bnxt_cp_ring_info        *def_cp_ring;
 273         uint32_t                max_ring_grps;
 274         struct bnxt_ring_grp_info       *grp_info;
 275
 276         unsigned int            nr_vnics;
 277
 278         struct bnxt_vnic_info   *vnic_info;
 279         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
 280
 281         struct bnxt_filter_info *filter_info;
 282         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
 283
 284         /* VNIC pointer for flow filter (VMDq) pools */
 285 #define MAX_FF_POOLS    256
 286         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
 287
 288         struct bnxt_irq         *irq_tbl;
 289
 290 #define MAX_NUM_MAC_ADDR        32
 291         uint8_t                 mac_addr[ETHER_ADDR_LEN];
 292
 293         uint16_t                        hwrm_cmd_seq;
 294         void                            *hwrm_cmd_resp_addr;
 295         rte_iova_t                      hwrm_cmd_resp_dma_addr;
 296         void                            *hwrm_short_cmd_req_addr;
 297         rte_iova_t                      hwrm_short_cmd_req_dma_addr;
 298         rte_spinlock_t                  hwrm_lock;
 299         uint16_t                        max_req_len;
 300         uint16_t                        max_resp_len;
 301
 302         struct bnxt_link_info   link_info;
 303         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
 304         uint8_t                 tx_cosq_id;
 305
 306         uint16_t                fw_fid;
 307         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
 308         uint16_t                max_rsscos_ctx;
 309         uint16_t                max_cp_rings;
 310         uint16_t                max_tx_rings;
 311         uint16_t                max_rx_rings;
 312         uint16_t                max_l2_ctx;
 313         uint16_t                max_vnics;
 314         uint16_t                max_stat_ctx;
 315         uint16_t                vlan;
 316         struct bnxt_pf_info             pf;
 317         uint8_t                 port_partition_type;
 318         uint8_t                 dev_stopped;
 319         uint8_t                 vxlan_port_cnt;
 320         uint8_t                 geneve_port_cnt;
 321         uint16_t                vxlan_port;
 322         uint16_t                geneve_port;
 323         uint16_t                vxlan_fw_dst_port_id;
 324         uint16_t                geneve_fw_dst_port_id;
 325         uint32_t                fw_ver;
 326         uint32_t                hwrm_spec_code;
 327
 328         struct bnxt_led_info    leds[BNXT_MAX_LED];
 329         uint8_t                 num_leds;
 330         struct bnxt_ptp_cfg     *ptp_cfg;
 331 };
 332
 333 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
 334 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 335
 336 bool is_bnxt_supported(struct rte_eth_dev *dev);
 337 bool bnxt_stratus_device(struct bnxt *bp);
 338 extern const struct rte_flow_ops bnxt_flow_ops;
 339
 340 extern int bnxt_logtype_driver;
 341 #define PMD_DRV_LOG_RAW(level, fmt, args...) \
 342         rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
 343                 __func__, ## args)
 344
 345 #define PMD_DRV_LOG(level, fmt, args...) \
 346         PMD_DRV_LOG_RAW(level, fmt, ## args)
 347 #endif