drivers/net/bnxt/bnxt.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_H_
   7 #define _BNXT_H_
   8
   9 #include <inttypes.h>
  10 #include <stdbool.h>
  11 #include <sys/queue.h>
  12
  13 #include <rte_pci.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_memory.h>
  17 #include <rte_lcore.h>
  18 #include <rte_spinlock.h>
  19 #include <rte_time.h>
  20
  21 #include "bnxt_cpr.h"
  22
  23 #define BNXT_MAX_MTU            9500
  24 #define VLAN_TAG_SIZE           4
  25 #define BNXT_MAX_LED            4
  26 #define BNXT_NUM_VLANS          2
  27 #define BNXT_MIN_RING_DESC      16
  28 #define BNXT_MAX_TX_RING_DESC   4096
  29 #define BNXT_MAX_RX_RING_DESC   8192
  30
  31 struct bnxt_led_info {
  32         uint8_t      led_id;
  33         uint8_t      led_type;
  34         uint8_t      led_group_id;
  35         uint8_t      unused;
  36         uint16_t  led_state_caps;
  37 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
  38         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
  39
  40         uint16_t  led_color_caps;
  41 };
  42
  43 struct bnxt_led_cfg {
  44         uint8_t led_id;
  45         uint8_t led_state;
  46         uint8_t led_color;
  47         uint8_t unused;
  48         uint16_t led_blink_on;
  49         uint16_t led_blink_off;
  50         uint8_t led_group_id;
  51         uint8_t rsvd;
  52 };
  53
  54 #define BNXT_LED_DFLT_ENA                               \
  55         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
  56          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
  57          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
  58          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
  59          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
  60
  61 #define BNXT_LED_DFLT_ENA_SHIFT         6
  62
  63 #define BNXT_LED_DFLT_ENABLES(x)                        \
  64         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
  65
  66 enum bnxt_hw_context {
  67         HW_CONTEXT_NONE     = 0,
  68         HW_CONTEXT_IS_RSS   = 1,
  69         HW_CONTEXT_IS_COS   = 2,
  70         HW_CONTEXT_IS_LB    = 3,
  71 };
  72
  73 struct bnxt_vlan_table_entry {
  74         uint16_t                tpid;
  75         uint16_t                vid;
  76 } __attribute__((packed));
  77
  78 struct bnxt_vlan_antispoof_table_entry {
  79         uint16_t                tpid;
  80         uint16_t                vid;
  81         uint16_t                mask;
  82 } __attribute__((packed));
  83
  84 struct bnxt_child_vf_info {
  85         void                    *req_buf;
  86         struct bnxt_vlan_table_entry    *vlan_table;
  87         struct bnxt_vlan_antispoof_table_entry  *vlan_as_table;
  88         STAILQ_HEAD(, bnxt_filter_info) filter;
  89         uint32_t                func_cfg_flags;
  90         uint32_t                l2_rx_mask;
  91         uint16_t                fid;
  92         uint16_t                max_tx_rate;
  93         uint16_t                dflt_vlan;
  94         uint16_t                vlan_count;
  95         uint8_t                 mac_spoof_en;
  96         uint8_t                 vlan_spoof_en;
  97         bool                    random_mac;
  98         bool                    persist_stats;
  99 };
 100
 101 struct bnxt_pf_info {
 102 #define BNXT_FIRST_PF_FID       1
 103 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
 104 #define BNXT_TOTAL_VFS(bp)      ((bp)->pf.total_vfs)
 105 #define BNXT_FIRST_VF_FID       128
 106 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
 107 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
 108         uint16_t                port_id;
 109         uint16_t                first_vf_id;
 110         uint16_t                active_vfs;
 111         uint16_t                max_vfs;
 112         uint16_t                total_vfs; /* Total VFs possible.
 113                                             * Not necessarily enabled.
 114                                             */
 115         uint32_t                func_cfg_flags;
 116         void                    *vf_req_buf;
 117         rte_iova_t              vf_req_buf_dma_addr;
 118         uint32_t                vf_req_fwd[8];
 119         uint16_t                total_vnics;
 120         struct bnxt_child_vf_info       *vf_info;
 121 #define BNXT_EVB_MODE_NONE      0
 122 #define BNXT_EVB_MODE_VEB       1
 123 #define BNXT_EVB_MODE_VEPA      2
 124         uint8_t                 evb_mode;
 125 };
 126
 127 /* Max wait time is 10 * 100ms = 1s */
 128 #define BNXT_LINK_WAIT_CNT      10
 129 #define BNXT_LINK_WAIT_INTERVAL 100
 130 struct bnxt_link_info {
 131         uint32_t                phy_flags;
 132         uint8_t                 mac_type;
 133         uint8_t                 phy_link_status;
 134         uint8_t                 loop_back;
 135         uint8_t                 link_up;
 136         uint8_t                 duplex;
 137         uint8_t                 pause;
 138         uint8_t                 force_pause;
 139         uint8_t                 auto_pause;
 140         uint8_t                 auto_mode;
 141 #define PHY_VER_LEN             3
 142         uint8_t                 phy_ver[PHY_VER_LEN];
 143         uint16_t                link_speed;
 144         uint16_t                support_speeds;
 145         uint16_t                auto_link_speed;
 146         uint16_t                force_link_speed;
 147         uint16_t                auto_link_speed_mask;
 148         uint32_t                preemphasis;
 149         uint8_t                 phy_type;
 150         uint8_t                 media_type;
 151 };
 152
 153 #define BNXT_COS_QUEUE_COUNT    8
 154 struct bnxt_cos_queue_info {
 155         uint8_t id;
 156         uint8_t profile;
 157 };
 158
 159 struct rte_flow {
 160         STAILQ_ENTRY(rte_flow) next;
 161         struct bnxt_filter_info *filter;
 162         struct bnxt_vnic_info   *vnic;
 163 };
 164
 165 struct bnxt_ptp_cfg {
 166 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT  0x400
 167 #define BNXT_GRCPF_REG_SYNC_TIME        0x480
 168 #define BNXT_CYCLECOUNTER_MASK   0xffffffffffffffffULL
 169         struct rte_timecounter      tc;
 170         struct rte_timecounter      tx_tstamp_tc;
 171         struct rte_timecounter      rx_tstamp_tc;
 172         struct bnxt             *bp;
 173 #define BNXT_MAX_TX_TS  1
 174         uint16_t                        rxctl;
 175 #define BNXT_PTP_MSG_SYNC                       (1 << 0)
 176 #define BNXT_PTP_MSG_DELAY_REQ                  (1 << 1)
 177 #define BNXT_PTP_MSG_PDELAY_REQ                 (1 << 2)
 178 #define BNXT_PTP_MSG_PDELAY_RESP                (1 << 3)
 179 #define BNXT_PTP_MSG_FOLLOW_UP                  (1 << 8)
 180 #define BNXT_PTP_MSG_DELAY_RESP                 (1 << 9)
 181 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP      (1 << 10)
 182 #define BNXT_PTP_MSG_ANNOUNCE                   (1 << 11)
 183 #define BNXT_PTP_MSG_SIGNALING                  (1 << 12)
 184 #define BNXT_PTP_MSG_MANAGEMENT                 (1 << 13)
 185 #define BNXT_PTP_MSG_EVENTS             (BNXT_PTP_MSG_SYNC |            \
 186                                          BNXT_PTP_MSG_DELAY_REQ |       \
 187                                          BNXT_PTP_MSG_PDELAY_REQ |      \
 188                                          BNXT_PTP_MSG_PDELAY_RESP)
 189         uint8_t                 tx_tstamp_en:1;
 190         int                     rx_filter;
 191
 192 #define BNXT_PTP_RX_TS_L        0
 193 #define BNXT_PTP_RX_TS_H        1
 194 #define BNXT_PTP_RX_SEQ         2
 195 #define BNXT_PTP_RX_FIFO        3
 196 #define BNXT_PTP_RX_FIFO_PENDING 0x1
 197 #define BNXT_PTP_RX_FIFO_ADV    4
 198 #define BNXT_PTP_RX_REGS        5
 199
 200 #define BNXT_PTP_TX_TS_L        0
 201 #define BNXT_PTP_TX_TS_H        1
 202 #define BNXT_PTP_TX_SEQ         2
 203 #define BNXT_PTP_TX_FIFO        3
 204 #define BNXT_PTP_TX_FIFO_EMPTY   0x2
 205 #define BNXT_PTP_TX_REGS        4
 206         uint32_t                        rx_regs[BNXT_PTP_RX_REGS];
 207         uint32_t                        rx_mapped_regs[BNXT_PTP_RX_REGS];
 208         uint32_t                        tx_regs[BNXT_PTP_TX_REGS];
 209         uint32_t                        tx_mapped_regs[BNXT_PTP_TX_REGS];
 210 };
 211
 212 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
 213 struct bnxt {
 214         void                            *bar0;
 215
 216         struct rte_eth_dev              *eth_dev;
 217         struct rte_eth_rss_conf         rss_conf;
 218         struct rte_pci_device           *pdev;
 219         void                            *doorbell_base;
 220
 221         uint32_t                flags;
 222 #define BNXT_FLAG_REGISTERED    (1 << 0)
 223 #define BNXT_FLAG_VF            (1 << 1)
 224 #define BNXT_FLAG_PORT_STATS    (1 << 2)
 225 #define BNXT_FLAG_JUMBO         (1 << 3)
 226 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
 227 #define BNXT_FLAG_UPDATE_HASH   (1 << 5)
 228 #define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
 229 #define BNXT_FLAG_MULTI_HOST    (1 << 7)
 230 #define BNXT_FLAG_NEW_RM        (1 << 30)
 231 #define BNXT_FLAG_INIT_DONE     (1 << 31)
 232 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
 233 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
 234 #define BNXT_NPAR(bp)           ((bp)->port_partition_type)
 235 #define BNXT_MH(bp)             ((bp)->flags & BNXT_FLAG_MULTI_HOST)
 236 #define BNXT_SINGLE_PF(bp)      (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
 237
 238         unsigned int            rx_nr_rings;
 239         unsigned int            rx_cp_nr_rings;
 240         struct bnxt_rx_queue **rx_queues;
 241         const void              *rx_mem_zone;
 242         struct rx_port_stats    *hw_rx_port_stats;
 243         rte_iova_t              hw_rx_port_stats_map;
 244
 245         unsigned int            tx_nr_rings;
 246         unsigned int            tx_cp_nr_rings;
 247         struct bnxt_tx_queue **tx_queues;
 248         const void              *tx_mem_zone;
 249         struct tx_port_stats    *hw_tx_port_stats;
 250         rte_iova_t              hw_tx_port_stats_map;
 251
 252         /* Default completion ring */
 253         struct bnxt_cp_ring_info        *def_cp_ring;
 254         uint32_t                max_ring_grps;
 255         struct bnxt_ring_grp_info       *grp_info;
 256
 257         unsigned int            nr_vnics;
 258
 259         struct bnxt_vnic_info   *vnic_info;
 260         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
 261
 262         struct bnxt_filter_info *filter_info;
 263         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
 264
 265         /* VNIC pointer for flow filter (VMDq) pools */
 266 #define MAX_FF_POOLS    256
 267         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
 268
 269         struct bnxt_irq         *irq_tbl;
 270
 271 #define MAX_NUM_MAC_ADDR        32
 272         uint8_t                 mac_addr[ETHER_ADDR_LEN];
 273
 274         uint16_t                        hwrm_cmd_seq;
 275         void                            *hwrm_cmd_resp_addr;
 276         rte_iova_t                      hwrm_cmd_resp_dma_addr;
 277         void                            *hwrm_short_cmd_req_addr;
 278         rte_iova_t                      hwrm_short_cmd_req_dma_addr;
 279         rte_spinlock_t                  hwrm_lock;
 280         uint16_t                        max_req_len;
 281         uint16_t                        max_resp_len;
 282
 283         struct bnxt_link_info   link_info;
 284         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
 285         uint8_t                 tx_cosq_id;
 286
 287         uint16_t                fw_fid;
 288         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
 289         uint16_t                max_rsscos_ctx;
 290         uint16_t                max_cp_rings;
 291         uint16_t                max_tx_rings;
 292         uint16_t                max_rx_rings;
 293         uint16_t                max_l2_ctx;
 294         uint16_t                max_vnics;
 295         uint16_t                max_stat_ctx;
 296         uint16_t                vlan;
 297         struct bnxt_pf_info             pf;
 298         uint8_t                 port_partition_type;
 299         uint8_t                 dev_stopped;
 300         uint8_t                 vxlan_port_cnt;
 301         uint8_t                 geneve_port_cnt;
 302         uint16_t                vxlan_port;
 303         uint16_t                geneve_port;
 304         uint16_t                vxlan_fw_dst_port_id;
 305         uint16_t                geneve_fw_dst_port_id;
 306         uint32_t                fw_ver;
 307         uint32_t                hwrm_spec_code;
 308
 309         struct bnxt_led_info    leds[BNXT_MAX_LED];
 310         uint8_t                 num_leds;
 311         struct bnxt_ptp_cfg     *ptp_cfg;
 312 };
 313
 314 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
 315 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 316
 317 bool is_bnxt_supported(struct rte_eth_dev *dev);
 318 extern const struct rte_flow_ops bnxt_flow_ops;
 319
 320 extern int bnxt_logtype_driver;
 321 #define PMD_DRV_LOG_RAW(level, fmt, args...) \
 322         rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
 323                 __func__, ## args)
 324
 325 #define PMD_DRV_LOG(level, fmt, args...) \
 326         PMD_DRV_LOG_RAW(level, fmt, ## args)
 327 #endif