drivers/net/bnxt/bnxt.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #ifndef _BNXT_H_
   7 #define _BNXT_H_
   8
   9 #include <inttypes.h>
  10 #include <stdbool.h>
  11 #include <sys/queue.h>
  12
  13 #include <rte_pci.h>
  14 #include <rte_bus_pci.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_memory.h>
  17 #include <rte_lcore.h>
  18 #include <rte_spinlock.h>
  19 #include <rte_time.h>
  20
  21 #include "bnxt_cpr.h"
  22
  23 #define BNXT_MAX_MTU            9500
  24 #define VLAN_TAG_SIZE           4
  25 #define BNXT_MAX_LED            4
  26 #define BNXT_NUM_VLANS          2
  27
  28 struct bnxt_led_info {
  29         uint8_t      led_id;
  30         uint8_t      led_type;
  31         uint8_t      led_group_id;
  32         uint8_t      unused;
  33         uint16_t  led_state_caps;
  34 #define BNXT_LED_ALT_BLINK_CAP(x)       ((x) &  \
  35         rte_cpu_to_le_16(HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT))
  36
  37         uint16_t  led_color_caps;
  38 };
  39
  40 struct bnxt_led_cfg {
  41         uint8_t led_id;
  42         uint8_t led_state;
  43         uint8_t led_color;
  44         uint8_t unused;
  45         uint16_t led_blink_on;
  46         uint16_t led_blink_off;
  47         uint8_t led_group_id;
  48         uint8_t rsvd;
  49 };
  50
  51 #define BNXT_LED_DFLT_ENA                               \
  52         (HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID |             \
  53          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE |          \
  54          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON |       \
  55          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF |      \
  56          HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID)
  57
  58 #define BNXT_LED_DFLT_ENA_SHIFT         6
  59
  60 #define BNXT_LED_DFLT_ENABLES(x)                        \
  61         rte_cpu_to_le_32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x)))
  62
  63 enum bnxt_hw_context {
  64         HW_CONTEXT_NONE     = 0,
  65         HW_CONTEXT_IS_RSS   = 1,
  66         HW_CONTEXT_IS_COS   = 2,
  67         HW_CONTEXT_IS_LB    = 3,
  68 };
  69
  70 struct bnxt_vlan_table_entry {
  71         uint16_t                tpid;
  72         uint16_t                vid;
  73 } __attribute__((packed));
  74
  75 struct bnxt_vlan_antispoof_table_entry {
  76         uint16_t                tpid;
  77         uint16_t                vid;
  78         uint16_t                mask;
  79 } __attribute__((packed));
  80
  81 struct bnxt_child_vf_info {
  82         void                    *req_buf;
  83         struct bnxt_vlan_table_entry    *vlan_table;
  84         struct bnxt_vlan_antispoof_table_entry  *vlan_as_table;
  85         STAILQ_HEAD(, bnxt_filter_info) filter;
  86         uint32_t                func_cfg_flags;
  87         uint32_t                l2_rx_mask;
  88         uint16_t                fid;
  89         uint16_t                max_tx_rate;
  90         uint16_t                dflt_vlan;
  91         uint16_t                vlan_count;
  92         uint8_t                 mac_spoof_en;
  93         uint8_t                 vlan_spoof_en;
  94         bool                    random_mac;
  95         bool                    persist_stats;
  96 };
  97
  98 struct bnxt_pf_info {
  99 #define BNXT_FIRST_PF_FID       1
 100 #define BNXT_MAX_VFS(bp)        (bp->pf.max_vfs)
 101 #define BNXT_FIRST_VF_FID       128
 102 #define BNXT_PF_RINGS_USED(bp)  bnxt_get_num_queues(bp)
 103 #define BNXT_PF_RINGS_AVAIL(bp) (bp->pf.max_cp_rings - BNXT_PF_RINGS_USED(bp))
 104         uint16_t                port_id;
 105         uint16_t                first_vf_id;
 106         uint16_t                active_vfs;
 107         uint16_t                max_vfs;
 108         uint32_t                func_cfg_flags;
 109         void                    *vf_req_buf;
 110         rte_iova_t              vf_req_buf_dma_addr;
 111         uint32_t                vf_req_fwd[8];
 112         uint16_t                total_vnics;
 113         struct bnxt_child_vf_info       *vf_info;
 114 #define BNXT_EVB_MODE_NONE      0
 115 #define BNXT_EVB_MODE_VEB       1
 116 #define BNXT_EVB_MODE_VEPA      2
 117         uint8_t                 evb_mode;
 118 };
 119
 120 /* Max wait time is 10 * 100ms = 1s */
 121 #define BNXT_LINK_WAIT_CNT      10
 122 #define BNXT_LINK_WAIT_INTERVAL 100
 123 struct bnxt_link_info {
 124         uint32_t                phy_flags;
 125         uint8_t                 mac_type;
 126         uint8_t                 phy_link_status;
 127         uint8_t                 loop_back;
 128         uint8_t                 link_up;
 129         uint8_t                 duplex;
 130         uint8_t                 pause;
 131         uint8_t                 force_pause;
 132         uint8_t                 auto_pause;
 133         uint8_t                 auto_mode;
 134 #define PHY_VER_LEN             3
 135         uint8_t                 phy_ver[PHY_VER_LEN];
 136         uint16_t                link_speed;
 137         uint16_t                support_speeds;
 138         uint16_t                auto_link_speed;
 139         uint16_t                force_link_speed;
 140         uint16_t                auto_link_speed_mask;
 141         uint32_t                preemphasis;
 142         uint8_t                 phy_type;
 143         uint8_t                 media_type;
 144 };
 145
 146 #define BNXT_COS_QUEUE_COUNT    8
 147 struct bnxt_cos_queue_info {
 148         uint8_t id;
 149         uint8_t profile;
 150 };
 151
 152 struct rte_flow {
 153         STAILQ_ENTRY(rte_flow) next;
 154         struct bnxt_filter_info *filter;
 155         struct bnxt_vnic_info   *vnic;
 156 };
 157
 158 struct bnxt_ptp_cfg {
 159 #define BNXT_GRCPF_REG_WINDOW_BASE_OUT  0x400
 160 #define BNXT_GRCPF_REG_SYNC_TIME        0x480
 161 #define BNXT_CYCLECOUNTER_MASK   0xffffffffffffffffULL
 162         struct rte_timecounter      tc;
 163         struct rte_timecounter      tx_tstamp_tc;
 164         struct rte_timecounter      rx_tstamp_tc;
 165         struct bnxt             *bp;
 166 #define BNXT_MAX_TX_TS  1
 167         uint16_t                        rxctl;
 168 #define BNXT_PTP_MSG_SYNC                       (1 << 0)
 169 #define BNXT_PTP_MSG_DELAY_REQ                  (1 << 1)
 170 #define BNXT_PTP_MSG_PDELAY_REQ                 (1 << 2)
 171 #define BNXT_PTP_MSG_PDELAY_RESP                (1 << 3)
 172 #define BNXT_PTP_MSG_FOLLOW_UP                  (1 << 8)
 173 #define BNXT_PTP_MSG_DELAY_RESP                 (1 << 9)
 174 #define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP      (1 << 10)
 175 #define BNXT_PTP_MSG_ANNOUNCE                   (1 << 11)
 176 #define BNXT_PTP_MSG_SIGNALING                  (1 << 12)
 177 #define BNXT_PTP_MSG_MANAGEMENT                 (1 << 13)
 178 #define BNXT_PTP_MSG_EVENTS             (BNXT_PTP_MSG_SYNC |            \
 179                                          BNXT_PTP_MSG_DELAY_REQ |       \
 180                                          BNXT_PTP_MSG_PDELAY_REQ |      \
 181                                          BNXT_PTP_MSG_PDELAY_RESP)
 182         uint8_t                 tx_tstamp_en:1;
 183         int                     rx_filter;
 184
 185 #define BNXT_PTP_RX_TS_L        0
 186 #define BNXT_PTP_RX_TS_H        1
 187 #define BNXT_PTP_RX_SEQ         2
 188 #define BNXT_PTP_RX_FIFO        3
 189 #define BNXT_PTP_RX_FIFO_PENDING 0x1
 190 #define BNXT_PTP_RX_FIFO_ADV    4
 191 #define BNXT_PTP_RX_REGS        5
 192
 193 #define BNXT_PTP_TX_TS_L        0
 194 #define BNXT_PTP_TX_TS_H        1
 195 #define BNXT_PTP_TX_SEQ         2
 196 #define BNXT_PTP_TX_FIFO        3
 197 #define BNXT_PTP_TX_FIFO_EMPTY   0x2
 198 #define BNXT_PTP_TX_REGS        4
 199         uint32_t                        rx_regs[BNXT_PTP_RX_REGS];
 200         uint32_t                        rx_mapped_regs[BNXT_PTP_RX_REGS];
 201         uint32_t                        tx_regs[BNXT_PTP_TX_REGS];
 202         uint32_t                        tx_mapped_regs[BNXT_PTP_TX_REGS];
 203 };
 204
 205 #define BNXT_HWRM_SHORT_REQ_LEN         sizeof(struct hwrm_short_input)
 206 struct bnxt {
 207         void                            *bar0;
 208
 209         struct rte_eth_dev              *eth_dev;
 210         struct rte_eth_rss_conf         rss_conf;
 211         struct rte_pci_device           *pdev;
 212         void                            *doorbell_base;
 213
 214         uint32_t                flags;
 215 #define BNXT_FLAG_REGISTERED    (1 << 0)
 216 #define BNXT_FLAG_VF            (1 << 1)
 217 #define BNXT_FLAG_PORT_STATS    (1 << 2)
 218 #define BNXT_FLAG_JUMBO         (1 << 3)
 219 #define BNXT_FLAG_SHORT_CMD     (1 << 4)
 220 #define BNXT_FLAG_UPDATE_HASH   (1 << 5)
 221 #define BNXT_FLAG_PTP_SUPPORTED (1 << 6)
 222 #define BNXT_FLAG_MULTI_HOST    (1 << 7)
 223 #define BNXT_FLAG_INIT_DONE     (1 << 31)
 224 #define BNXT_PF(bp)             (!((bp)->flags & BNXT_FLAG_VF))
 225 #define BNXT_VF(bp)             ((bp)->flags & BNXT_FLAG_VF)
 226 #define BNXT_NPAR(bp)           ((bp)->port_partition_type)
 227 #define BNXT_MH(bp)             ((bp)->flags & BNXT_FLAG_MULTI_HOST)
 228 #define BNXT_SINGLE_PF(bp)      (BNXT_PF(bp) && !BNXT_NPAR(bp) && !BNXT_MH(bp))
 229
 230         unsigned int            rx_nr_rings;
 231         unsigned int            rx_cp_nr_rings;
 232         struct bnxt_rx_queue **rx_queues;
 233         const void              *rx_mem_zone;
 234         struct rx_port_stats    *hw_rx_port_stats;
 235         rte_iova_t              hw_rx_port_stats_map;
 236
 237         unsigned int            tx_nr_rings;
 238         unsigned int            tx_cp_nr_rings;
 239         struct bnxt_tx_queue **tx_queues;
 240         const void              *tx_mem_zone;
 241         struct tx_port_stats    *hw_tx_port_stats;
 242         rte_iova_t              hw_tx_port_stats_map;
 243
 244         /* Default completion ring */
 245         struct bnxt_cp_ring_info        *def_cp_ring;
 246         uint32_t                max_ring_grps;
 247         struct bnxt_ring_grp_info       *grp_info;
 248
 249         unsigned int            nr_vnics;
 250
 251         struct bnxt_vnic_info   *vnic_info;
 252         STAILQ_HEAD(, bnxt_vnic_info)   free_vnic_list;
 253
 254         struct bnxt_filter_info *filter_info;
 255         STAILQ_HEAD(, bnxt_filter_info) free_filter_list;
 256
 257         /* VNIC pointer for flow filter (VMDq) pools */
 258 #define MAX_FF_POOLS    256
 259         STAILQ_HEAD(, bnxt_vnic_info)   ff_pool[MAX_FF_POOLS];
 260
 261         struct bnxt_irq         *irq_tbl;
 262
 263 #define MAX_NUM_MAC_ADDR        32
 264         uint8_t                 mac_addr[ETHER_ADDR_LEN];
 265
 266         uint16_t                        hwrm_cmd_seq;
 267         void                            *hwrm_cmd_resp_addr;
 268         rte_iova_t                      hwrm_cmd_resp_dma_addr;
 269         void                            *hwrm_short_cmd_req_addr;
 270         rte_iova_t                      hwrm_short_cmd_req_dma_addr;
 271         rte_spinlock_t                  hwrm_lock;
 272         uint16_t                        max_req_len;
 273         uint16_t                        max_resp_len;
 274
 275         struct bnxt_link_info   link_info;
 276         struct bnxt_cos_queue_info      cos_queue[BNXT_COS_QUEUE_COUNT];
 277         uint8_t                 tx_cosq_id;
 278
 279         uint16_t                fw_fid;
 280         uint8_t                 dflt_mac_addr[ETHER_ADDR_LEN];
 281         uint16_t                max_rsscos_ctx;
 282         uint16_t                max_cp_rings;
 283         uint16_t                max_tx_rings;
 284         uint16_t                max_rx_rings;
 285         uint16_t                max_l2_ctx;
 286         uint16_t                max_vnics;
 287         uint16_t                max_stat_ctx;
 288         uint16_t                vlan;
 289         struct bnxt_pf_info             pf;
 290         uint8_t                 port_partition_type;
 291         uint8_t                 dev_stopped;
 292         uint8_t                 vxlan_port_cnt;
 293         uint8_t                 geneve_port_cnt;
 294         uint16_t                vxlan_port;
 295         uint16_t                geneve_port;
 296         uint16_t                vxlan_fw_dst_port_id;
 297         uint16_t                geneve_fw_dst_port_id;
 298         uint32_t                fw_ver;
 299         uint32_t                hwrm_spec_code;
 300
 301         struct bnxt_led_info    leds[BNXT_MAX_LED];
 302         uint8_t                 num_leds;
 303         struct bnxt_ptp_cfg     *ptp_cfg;
 304 };
 305
 306 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete);
 307 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg);
 308
 309 #define RX_PROD_AGG_BD_TYPE_RX_PROD_AGG         0x6
 310
 311 bool is_bnxt_supported(struct rte_eth_dev *dev);
 312 extern const struct rte_flow_ops bnxt_flow_ops;
 313
 314 extern int bnxt_logtype_driver;
 315 #define PMD_DRV_LOG_RAW(level, fmt, args...) \
 316         rte_log(RTE_LOG_ ## level, bnxt_logtype_driver, "%s(): " fmt, \
 317                 __func__, ## args)
 318
 319 #define PMD_DRV_LOG(level, fmt, args...) \
 320         PMD_DRV_LOG_RAW(level, fmt, ## args)
 321 #endif