drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  64 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  65 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  66 #define BROADCOM_DEV_ID_57301 0x16c8
  67 #define BROADCOM_DEV_ID_57302 0x16c9
  68 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  69 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  70 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  71 #define BROADCOM_DEV_ID_NS2 0x16cd
  72 #define BROADCOM_DEV_ID_57311 0x16ce
  73 #define BROADCOM_DEV_ID_57312 0x16cf
  74 #define BROADCOM_DEV_ID_57402 0x16d0
  75 #define BROADCOM_DEV_ID_57404 0x16d1
  76 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  77 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  78 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  79 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  80 #define BROADCOM_DEV_ID_57412 0x16d6
  81 #define BROADCOM_DEV_ID_57414 0x16d7
  82 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  83 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  84 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  85 #define BROADCOM_DEV_ID_57412_MF 0x16de
  86 #define BROADCOM_DEV_ID_57314 0x16df
  87 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  88 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  89 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  90 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  91 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  92 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  93 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  94 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  95 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  96 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  97 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  98
  99 static const struct rte_pci_id bnxt_pci_id_map[] = {
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 101                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 136         { .vendor_id = 0, /* sentinel */ },
 137 };
 138
 139 #define BNXT_ETH_RSS_SUPPORT (  \
 140         ETH_RSS_IPV4 |          \
 141         ETH_RSS_NONFRAG_IPV4_TCP |      \
 142         ETH_RSS_NONFRAG_IPV4_UDP |      \
 143         ETH_RSS_IPV6 |          \
 144         ETH_RSS_NONFRAG_IPV6_TCP |      \
 145         ETH_RSS_NONFRAG_IPV6_UDP)
 146
 147 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 148
 149 /***********************/
 150
 151 /*
 152  * High level utility functions
 153  */
 154
 155 static void bnxt_free_mem(struct bnxt *bp)
 156 {
 157         bnxt_free_filter_mem(bp);
 158         bnxt_free_vnic_attributes(bp);
 159         bnxt_free_vnic_mem(bp);
 160
 161         bnxt_free_stats(bp);
 162         bnxt_free_tx_rings(bp);
 163         bnxt_free_rx_rings(bp);
 164         bnxt_free_def_cp_ring(bp);
 165 }
 166
 167 static int bnxt_alloc_mem(struct bnxt *bp)
 168 {
 169         int rc;
 170
 171         /* Default completion ring */
 172         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 177                               bp->def_cp_ring, "def_cp");
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         unsigned int i, rss_idx, fw_idx;
 203         struct rte_eth_link new;
 204         int rc;
 205
 206         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 208                 bp->flags |= BNXT_FLAG_JUMBO;
 209         } else {
 210                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 211                 bp->flags &= ~BNXT_FLAG_JUMBO;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_alloc_hwrm_rings(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_mq_rx_configure(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         /* VNIC configuration */
 239         for (i = 0; i < bp->nr_vnics; i++) {
 240                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 241
 242                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 243                 if (rc) {
 244                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 245                                 i, rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD,
 252                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 253                                 i, rc);
 254                         goto err_out;
 255                 }
 256
 257                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 265                 if (rc) {
 266                         RTE_LOG(ERR, PMD,
 267                                 "HWRM vnic %d filter failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271                 if (vnic->rss_table && vnic->hash_type) {
 272                         /*
 273                          * Fill the RSS hash & redirection table with
 274                          * ring group ids for all VNICs
 275                          */
 276                         for (rss_idx = 0, fw_idx = 0;
 277                              rss_idx < HW_HASH_INDEX_SIZE;
 278                              rss_idx++, fw_idx++) {
 279                                 if (vnic->fw_grp_ids[fw_idx] ==
 280                                     INVALID_HW_RING_ID)
 281                                         fw_idx = 0;
 282                                 vnic->rss_table[rss_idx] =
 283                                                 vnic->fw_grp_ids[fw_idx];
 284                         }
 285                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 286                         if (rc) {
 287                                 RTE_LOG(ERR, PMD,
 288                                         "HWRM vnic %d set RSS failure rc: %x\n",
 289                                         i, rc);
 290                                 goto err_out;
 291                         }
 292                 }
 293
 294                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 295
 296                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 297                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 298                 else
 299                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 300         }
 301         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 302         if (rc) {
 303                 RTE_LOG(ERR, PMD,
 304                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 305                 goto err_out;
 306         }
 307
 308         rc = bnxt_get_hwrm_link_config(bp, &new);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 311                 goto err_out;
 312         }
 313
 314         if (!bp->link_info.link_up) {
 315                 rc = bnxt_set_hwrm_link_config(bp, true);
 316                 if (rc) {
 317                         RTE_LOG(ERR, PMD,
 318                                 "HWRM link config failure rc: %x\n", rc);
 319                         goto err_out;
 320                 }
 321         }
 322
 323         return 0;
 324
 325 err_out:
 326         bnxt_free_all_hwrm_resources(bp);
 327
 328         return rc;
 329 }
 330
 331 static int bnxt_shutdown_nic(struct bnxt *bp)
 332 {
 333         bnxt_free_all_hwrm_resources(bp);
 334         bnxt_free_all_filters(bp);
 335         bnxt_free_all_vnics(bp);
 336         return 0;
 337 }
 338
 339 static int bnxt_init_nic(struct bnxt *bp)
 340 {
 341         int rc;
 342
 343         bnxt_init_ring_grps(bp);
 344         bnxt_init_vnics(bp);
 345         bnxt_init_filters(bp);
 346
 347         rc = bnxt_init_chip(bp);
 348         if (rc)
 349                 return rc;
 350
 351         return 0;
 352 }
 353
 354 /*
 355  * Device configuration and status function
 356  */
 357
 358 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 359                                   struct rte_eth_dev_info *dev_info)
 360 {
 361         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 362         uint16_t max_vnics, i, j, vpool, vrxq;
 363         unsigned int max_rx_rings;
 364
 365         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 366
 367         /* MAC Specifics */
 368         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 369         dev_info->max_hash_mac_addrs = 0;
 370
 371         /* PF/VF specifics */
 372         if (BNXT_PF(bp))
 373                 dev_info->max_vfs = bp->pdev->max_vfs;
 374         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 375                                                 RTE_MIN(bp->max_rsscos_ctx,
 376                                                 bp->max_stat_ctx)));
 377         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 378         dev_info->max_rx_queues = max_rx_rings;
 379         dev_info->max_tx_queues = max_rx_rings;
 380         dev_info->reta_size = bp->max_rsscos_ctx;
 381         dev_info->hash_key_size = 40;
 382         max_vnics = bp->max_vnics;
 383
 384         /* Fast path specifics */
 385         dev_info->min_rx_bufsize = 1;
 386         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 387                                   + VLAN_TAG_SIZE;
 388         dev_info->rx_offload_capa = 0;
 389         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 390                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 391                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 392                                         DEV_TX_OFFLOAD_TCP_TSO |
 393                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 394                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 395                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 396                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 397                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 398
 399         /* *INDENT-OFF* */
 400         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 401                 .rx_thresh = {
 402                         .pthresh = 8,
 403                         .hthresh = 8,
 404                         .wthresh = 0,
 405                 },
 406                 .rx_free_thresh = 32,
 407                 .rx_drop_en = 0,
 408         };
 409
 410         dev_info->default_txconf = (struct rte_eth_txconf) {
 411                 .tx_thresh = {
 412                         .pthresh = 32,
 413                         .hthresh = 0,
 414                         .wthresh = 0,
 415                 },
 416                 .tx_free_thresh = 32,
 417                 .tx_rs_thresh = 32,
 418                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 419                              ETH_TXQ_FLAGS_NOOFFLOADS,
 420         };
 421         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 422
 423         /* *INDENT-ON* */
 424
 425         /*
 426          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 427          *       need further investigation.
 428          */
 429
 430         /* VMDq resources */
 431         vpool = 64; /* ETH_64_POOLS */
 432         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 433         for (i = 0; i < 4; vpool >>= 1, i++) {
 434                 if (max_vnics > vpool) {
 435                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 436                                 if (dev_info->max_rx_queues > vrxq) {
 437                                         if (vpool > vrxq)
 438                                                 vpool = vrxq;
 439                                         goto found;
 440                                 }
 441                         }
 442                         /* Not enough resources to support VMDq */
 443                         break;
 444                 }
 445         }
 446         /* Not enough resources to support VMDq */
 447         vpool = 0;
 448         vrxq = 0;
 449 found:
 450         dev_info->max_vmdq_pools = vpool;
 451         dev_info->vmdq_queue_num = vrxq;
 452
 453         dev_info->vmdq_pool_base = 0;
 454         dev_info->vmdq_queue_base = 0;
 455 }
 456
 457 /* Configure the device based on the configuration provided */
 458 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 459 {
 460         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 461
 462         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 463         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 464
 465         /* Inherit new configurations */
 466         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 467         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 468         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 469         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 470
 471         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 472                 eth_dev->data->mtu =
 473                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 474                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 475         return 0;
 476 }
 477
 478 static inline int
 479 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 480                                 struct rte_eth_link *link)
 481 {
 482         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 483         struct rte_eth_link *src = link;
 484
 485         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 486                                         *(uint64_t *)src) == 0)
 487                 return 1;
 488
 489         return 0;
 490 }
 491
 492 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 493 {
 494         struct rte_eth_link *link = &eth_dev->data->dev_link;
 495
 496         if (link->link_status)
 497                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 498                         (uint8_t)(eth_dev->data->port_id),
 499                         (uint32_t)link->link_speed,
 500                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 501                         ("full-duplex") : ("half-duplex\n"));
 502         else
 503                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 504                         (uint8_t)(eth_dev->data->port_id));
 505 }
 506
 507 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 508 {
 509         bnxt_print_link_info(eth_dev);
 510         return 0;
 511 }
 512
 513 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 514 {
 515         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 516         int vlan_mask = 0;
 517         int rc;
 518
 519         bp->dev_stopped = 0;
 520
 521         rc = bnxt_init_nic(bp);
 522         if (rc)
 523                 goto error;
 524
 525         bnxt_link_update_op(eth_dev, 0);
 526
 527         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 528                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 529         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 530                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 531         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 532
 533         return 0;
 534
 535 error:
 536         bnxt_shutdown_nic(bp);
 537         bnxt_free_tx_mbufs(bp);
 538         bnxt_free_rx_mbufs(bp);
 539         return rc;
 540 }
 541
 542 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 543 {
 544         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 545
 546         eth_dev->data->dev_link.link_status = 1;
 547         bnxt_set_hwrm_link_config(bp, true);
 548         return 0;
 549 }
 550
 551 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 552 {
 553         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 554
 555         eth_dev->data->dev_link.link_status = 0;
 556         bnxt_set_hwrm_link_config(bp, false);
 557         return 0;
 558 }
 559
 560 /* Unload the driver, release resources */
 561 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 562 {
 563         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 564
 565         if (bp->eth_dev->data->dev_started) {
 566                 /* TBD: STOP HW queues DMA */
 567                 eth_dev->data->dev_link.link_status = 0;
 568         }
 569         bnxt_set_hwrm_link_config(bp, false);
 570         bnxt_hwrm_port_clr_stats(bp);
 571         bnxt_shutdown_nic(bp);
 572         bp->dev_stopped = 1;
 573 }
 574
 575 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 576 {
 577         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 578
 579         if (bp->dev_stopped == 0)
 580                 bnxt_dev_stop_op(eth_dev);
 581
 582         bnxt_free_tx_mbufs(bp);
 583         bnxt_free_rx_mbufs(bp);
 584         bnxt_free_mem(bp);
 585         if (eth_dev->data->mac_addrs != NULL) {
 586                 rte_free(eth_dev->data->mac_addrs);
 587                 eth_dev->data->mac_addrs = NULL;
 588         }
 589         if (bp->grp_info != NULL) {
 590                 rte_free(bp->grp_info);
 591                 bp->grp_info = NULL;
 592         }
 593 }
 594
 595 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 596                                     uint32_t index)
 597 {
 598         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 599         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 600         struct bnxt_vnic_info *vnic;
 601         struct bnxt_filter_info *filter, *temp_filter;
 602         int i;
 603
 604         /*
 605          * Loop through all VNICs from the specified filter flow pools to
 606          * remove the corresponding MAC addr filter
 607          */
 608         for (i = 0; i < MAX_FF_POOLS; i++) {
 609                 if (!(pool_mask & (1ULL << i)))
 610                         continue;
 611
 612                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 613                         filter = STAILQ_FIRST(&vnic->filter);
 614                         while (filter) {
 615                                 temp_filter = STAILQ_NEXT(filter, next);
 616                                 if (filter->mac_index == index) {
 617                                         STAILQ_REMOVE(&vnic->filter, filter,
 618                                                       bnxt_filter_info, next);
 619                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 620                                         filter->mac_index = INVALID_MAC_INDEX;
 621                                         memset(&filter->l2_addr, 0,
 622                                                ETHER_ADDR_LEN);
 623                                         STAILQ_INSERT_TAIL(
 624                                                         &bp->free_filter_list,
 625                                                         filter, next);
 626                                 }
 627                                 filter = temp_filter;
 628                         }
 629                 }
 630         }
 631 }
 632
 633 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 634                                 struct ether_addr *mac_addr,
 635                                 uint32_t index, uint32_t pool)
 636 {
 637         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 638         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 639         struct bnxt_filter_info *filter;
 640
 641         if (BNXT_VF(bp)) {
 642                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 643                 return -ENOTSUP;
 644         }
 645
 646         if (!vnic) {
 647                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 648                 return -EINVAL;
 649         }
 650         /* Attach requested MAC address to the new l2_filter */
 651         STAILQ_FOREACH(filter, &vnic->filter, next) {
 652                 if (filter->mac_index == index) {
 653                         RTE_LOG(ERR, PMD,
 654                                 "MAC addr already existed for pool %d\n", pool);
 655                         return -EINVAL;
 656                 }
 657         }
 658         filter = bnxt_alloc_filter(bp);
 659         if (!filter) {
 660                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 661                 return -ENODEV;
 662         }
 663         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 664         filter->mac_index = index;
 665         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 666         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 667 }
 668
 669 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 670 {
 671         int rc = 0;
 672         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 673         struct rte_eth_link new;
 674         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 675
 676         memset(&new, 0, sizeof(new));
 677         do {
 678                 /* Retrieve link info from hardware */
 679                 rc = bnxt_get_hwrm_link_config(bp, &new);
 680                 if (rc) {
 681                         new.link_speed = ETH_LINK_SPEED_100M;
 682                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 683                         RTE_LOG(ERR, PMD,
 684                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 685                         goto out;
 686                 }
 687                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 688
 689                 if (!wait_to_complete)
 690                         break;
 691         } while (!new.link_status && cnt--);
 692
 693 out:
 694         /* Timed out or success */
 695         if (new.link_status != eth_dev->data->dev_link.link_status ||
 696         new.link_speed != eth_dev->data->dev_link.link_speed) {
 697                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 698                 bnxt_print_link_info(eth_dev);
 699         }
 700
 701         return rc;
 702 }
 703
 704 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 705 {
 706         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 707         struct bnxt_vnic_info *vnic;
 708
 709         if (bp->vnic_info == NULL)
 710                 return;
 711
 712         vnic = &bp->vnic_info[0];
 713
 714         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 715         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 716 }
 717
 718 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 719 {
 720         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 721         struct bnxt_vnic_info *vnic;
 722
 723         if (bp->vnic_info == NULL)
 724                 return;
 725
 726         vnic = &bp->vnic_info[0];
 727
 728         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 729         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 730 }
 731
 732 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 733 {
 734         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 735         struct bnxt_vnic_info *vnic;
 736
 737         if (bp->vnic_info == NULL)
 738                 return;
 739
 740         vnic = &bp->vnic_info[0];
 741
 742         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 743         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 744 }
 745
 746 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 747 {
 748         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 749         struct bnxt_vnic_info *vnic;
 750
 751         if (bp->vnic_info == NULL)
 752                 return;
 753
 754         vnic = &bp->vnic_info[0];
 755
 756         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 757         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 758 }
 759
 760 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 761                             struct rte_eth_rss_reta_entry64 *reta_conf,
 762                             uint16_t reta_size)
 763 {
 764         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 765         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 766         struct bnxt_vnic_info *vnic;
 767         int i;
 768
 769         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 770                 return -EINVAL;
 771
 772         if (reta_size != HW_HASH_INDEX_SIZE) {
 773                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 774                         "(%d) must equal the size supported by the hardware "
 775                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 776                 return -EINVAL;
 777         }
 778         /* Update the RSS VNIC(s) */
 779         for (i = 0; i < MAX_FF_POOLS; i++) {
 780                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 781                         memcpy(vnic->rss_table, reta_conf, reta_size);
 782
 783                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 784                 }
 785         }
 786         return 0;
 787 }
 788
 789 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 790                               struct rte_eth_rss_reta_entry64 *reta_conf,
 791                               uint16_t reta_size)
 792 {
 793         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 794         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 795         struct rte_intr_handle *intr_handle
 796                 = &bp->pdev->intr_handle;
 797
 798         /* Retrieve from the default VNIC */
 799         if (!vnic)
 800                 return -EINVAL;
 801         if (!vnic->rss_table)
 802                 return -EINVAL;
 803
 804         if (reta_size != HW_HASH_INDEX_SIZE) {
 805                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 806                         "(%d) must equal the size supported by the hardware "
 807                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 808                 return -EINVAL;
 809         }
 810         /* EW - need to revisit here copying from u64 to u16 */
 811         memcpy(reta_conf, vnic->rss_table, reta_size);
 812
 813         if (rte_intr_allow_others(intr_handle)) {
 814                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 815                         bnxt_dev_lsc_intr_setup(eth_dev);
 816         }
 817
 818         return 0;
 819 }
 820
 821 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 822                                    struct rte_eth_rss_conf *rss_conf)
 823 {
 824         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 825         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 826         struct bnxt_vnic_info *vnic;
 827         uint16_t hash_type = 0;
 828         int i;
 829
 830         /*
 831          * If RSS enablement were different than dev_configure,
 832          * then return -EINVAL
 833          */
 834         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 835                 if (!rss_conf->rss_hf)
 836                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 837         } else {
 838                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 839                         return -EINVAL;
 840         }
 841
 842         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 843         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 844
 845         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 846                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 847         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 848                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 849         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 850                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 851         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 852                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 853         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 854                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 855         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 856                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 857
 858         /* Update the RSS VNIC(s) */
 859         for (i = 0; i < MAX_FF_POOLS; i++) {
 860                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 861                         vnic->hash_type = hash_type;
 862
 863                         /*
 864                          * Use the supplied key if the key length is
 865                          * acceptable and the rss_key is not NULL
 866                          */
 867                         if (rss_conf->rss_key &&
 868                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 869                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 870                                        rss_conf->rss_key_len);
 871
 872                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 873                 }
 874         }
 875         return 0;
 876 }
 877
 878 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 879                                      struct rte_eth_rss_conf *rss_conf)
 880 {
 881         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 882         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 883         int len;
 884         uint32_t hash_types;
 885
 886         /* RSS configuration is the same for all VNICs */
 887         if (vnic && vnic->rss_hash_key) {
 888                 if (rss_conf->rss_key) {
 889                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 890                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 891                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 892                 }
 893
 894                 hash_types = vnic->hash_type;
 895                 rss_conf->rss_hf = 0;
 896                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 897                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 898                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 904                 }
 905                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 906                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 907                         hash_types &=
 908                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 909                 }
 910                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 911                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 912                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 913                 }
 914                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 915                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 916                         hash_types &=
 917                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 918                 }
 919                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 920                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 921                         hash_types &=
 922                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 923                 }
 924                 if (hash_types) {
 925                         RTE_LOG(ERR, PMD,
 926                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 927                                 vnic->hash_type);
 928                         return -ENOTSUP;
 929                 }
 930         } else {
 931                 rss_conf->rss_hf = 0;
 932         }
 933         return 0;
 934 }
 935
 936 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 937                                struct rte_eth_fc_conf *fc_conf)
 938 {
 939         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 940         struct rte_eth_link link_info;
 941         int rc;
 942
 943         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 944         if (rc)
 945                 return rc;
 946
 947         memset(fc_conf, 0, sizeof(*fc_conf));
 948         if (bp->link_info.auto_pause)
 949                 fc_conf->autoneg = 1;
 950         switch (bp->link_info.pause) {
 951         case 0:
 952                 fc_conf->mode = RTE_FC_NONE;
 953                 break;
 954         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 955                 fc_conf->mode = RTE_FC_TX_PAUSE;
 956                 break;
 957         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 958                 fc_conf->mode = RTE_FC_RX_PAUSE;
 959                 break;
 960         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 961                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 962                 fc_conf->mode = RTE_FC_FULL;
 963                 break;
 964         }
 965         return 0;
 966 }
 967
 968 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 969                                struct rte_eth_fc_conf *fc_conf)
 970 {
 971         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 972
 973         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 974                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 975                 return -ENOTSUP;
 976         }
 977
 978         switch (fc_conf->mode) {
 979         case RTE_FC_NONE:
 980                 bp->link_info.auto_pause = 0;
 981                 bp->link_info.force_pause = 0;
 982                 break;
 983         case RTE_FC_RX_PAUSE:
 984                 if (fc_conf->autoneg) {
 985                         bp->link_info.auto_pause =
 986                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 987                         bp->link_info.force_pause = 0;
 988                 } else {
 989                         bp->link_info.auto_pause = 0;
 990                         bp->link_info.force_pause =
 991                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 992                 }
 993                 break;
 994         case RTE_FC_TX_PAUSE:
 995                 if (fc_conf->autoneg) {
 996                         bp->link_info.auto_pause =
 997                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 998                         bp->link_info.force_pause = 0;
 999                 } else {
1000                         bp->link_info.auto_pause = 0;
1001                         bp->link_info.force_pause =
1002                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1003                 }
1004                 break;
1005         case RTE_FC_FULL:
1006                 if (fc_conf->autoneg) {
1007                         bp->link_info.auto_pause =
1008                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1009                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1010                         bp->link_info.force_pause = 0;
1011                 } else {
1012                         bp->link_info.auto_pause = 0;
1013                         bp->link_info.force_pause =
1014                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1015                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1016                 }
1017                 break;
1018         }
1019         return bnxt_set_hwrm_link_config(bp, true);
1020 }
1021
1022 /* Add UDP tunneling port */
1023 static int
1024 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1025                          struct rte_eth_udp_tunnel *udp_tunnel)
1026 {
1027         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1028         uint16_t tunnel_type = 0;
1029         int rc = 0;
1030
1031         switch (udp_tunnel->prot_type) {
1032         case RTE_TUNNEL_TYPE_VXLAN:
1033                 if (bp->vxlan_port_cnt) {
1034                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1035                                 udp_tunnel->udp_port);
1036                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1037                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1038                                 return -ENOSPC;
1039                         }
1040                         bp->vxlan_port_cnt++;
1041                         return 0;
1042                 }
1043                 tunnel_type =
1044                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1045                 bp->vxlan_port_cnt++;
1046                 break;
1047         case RTE_TUNNEL_TYPE_GENEVE:
1048                 if (bp->geneve_port_cnt) {
1049                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1050                                 udp_tunnel->udp_port);
1051                         if (bp->geneve_port != udp_tunnel->udp_port) {
1052                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1053                                 return -ENOSPC;
1054                         }
1055                         bp->geneve_port_cnt++;
1056                         return 0;
1057                 }
1058                 tunnel_type =
1059                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1060                 bp->geneve_port_cnt++;
1061                 break;
1062         default:
1063                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1064                 return -ENOTSUP;
1065         }
1066         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1067                                              tunnel_type);
1068         return rc;
1069 }
1070
1071 static int
1072 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1073                          struct rte_eth_udp_tunnel *udp_tunnel)
1074 {
1075         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1076         uint16_t tunnel_type = 0;
1077         uint16_t port = 0;
1078         int rc = 0;
1079
1080         switch (udp_tunnel->prot_type) {
1081         case RTE_TUNNEL_TYPE_VXLAN:
1082                 if (!bp->vxlan_port_cnt) {
1083                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1084                         return -EINVAL;
1085                 }
1086                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1087                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1088                                 udp_tunnel->udp_port, bp->vxlan_port);
1089                         return -EINVAL;
1090                 }
1091                 if (--bp->vxlan_port_cnt)
1092                         return 0;
1093
1094                 tunnel_type =
1095                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1096                 port = bp->vxlan_fw_dst_port_id;
1097                 break;
1098         case RTE_TUNNEL_TYPE_GENEVE:
1099                 if (!bp->geneve_port_cnt) {
1100                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1101                         return -EINVAL;
1102                 }
1103                 if (bp->geneve_port != udp_tunnel->udp_port) {
1104                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1105                                 udp_tunnel->udp_port, bp->geneve_port);
1106                         return -EINVAL;
1107                 }
1108                 if (--bp->geneve_port_cnt)
1109                         return 0;
1110
1111                 tunnel_type =
1112                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1113                 port = bp->geneve_fw_dst_port_id;
1114                 break;
1115         default:
1116                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1117                 return -ENOTSUP;
1118         }
1119
1120         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1121         if (!rc) {
1122                 if (tunnel_type ==
1123                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1124                         bp->vxlan_port = 0;
1125                 if (tunnel_type ==
1126                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1127                         bp->geneve_port = 0;
1128         }
1129         return rc;
1130 }
1131
1132 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1133 {
1134         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1135         struct bnxt_vnic_info *vnic;
1136         unsigned int i;
1137         int rc = 0;
1138         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1139
1140         /* Cycle through all VNICs */
1141         for (i = 0; i < bp->nr_vnics; i++) {
1142                 /*
1143                  * For each VNIC and each associated filter(s)
1144                  * if VLAN exists && VLAN matches vlan_id
1145                  *      remove the MAC+VLAN filter
1146                  *      add a new MAC only filter
1147                  * else
1148                  *      VLAN filter doesn't exist, just skip and continue
1149                  */
1150                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1151                         filter = STAILQ_FIRST(&vnic->filter);
1152                         while (filter) {
1153                                 temp_filter = STAILQ_NEXT(filter, next);
1154
1155                                 if (filter->enables & chk &&
1156                                     filter->l2_ovlan == vlan_id) {
1157                                         /* Must delete the filter */
1158                                         STAILQ_REMOVE(&vnic->filter, filter,
1159                                                       bnxt_filter_info, next);
1160                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1161                                         STAILQ_INSERT_TAIL(
1162                                                         &bp->free_filter_list,
1163                                                         filter, next);
1164
1165                                         /*
1166                                          * Need to examine to see if the MAC
1167                                          * filter already existed or not before
1168                                          * allocating a new one
1169                                          */
1170
1171                                         new_filter = bnxt_alloc_filter(bp);
1172                                         if (!new_filter) {
1173                                                 RTE_LOG(ERR, PMD,
1174                                                         "MAC/VLAN filter alloc failed\n");
1175                                                 rc = -ENOMEM;
1176                                                 goto exit;
1177                                         }
1178                                         STAILQ_INSERT_TAIL(&vnic->filter,
1179                                                            new_filter, next);
1180                                         /* Inherit MAC from previous filter */
1181                                         new_filter->mac_index =
1182                                                         filter->mac_index;
1183                                         memcpy(new_filter->l2_addr,
1184                                                filter->l2_addr, ETHER_ADDR_LEN);
1185                                         /* MAC only filter */
1186                                         rc = bnxt_hwrm_set_l2_filter(bp,
1187                                                         vnic->fw_vnic_id,
1188                                                         new_filter);
1189                                         if (rc)
1190                                                 goto exit;
1191                                         RTE_LOG(INFO, PMD,
1192                                                 "Del Vlan filter for %d\n",
1193                                                 vlan_id);
1194                                 }
1195                                 filter = temp_filter;
1196                         }
1197                 }
1198         }
1199 exit:
1200         return rc;
1201 }
1202
1203 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1204 {
1205         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1206         struct bnxt_vnic_info *vnic;
1207         unsigned int i;
1208         int rc = 0;
1209         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1210                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1211         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1212
1213         /* Cycle through all VNICs */
1214         for (i = 0; i < bp->nr_vnics; i++) {
1215                 /*
1216                  * For each VNIC and each associated filter(s)
1217                  * if VLAN exists:
1218                  *   if VLAN matches vlan_id
1219                  *      VLAN filter already exists, just skip and continue
1220                  *   else
1221                  *      add a new MAC+VLAN filter
1222                  * else
1223                  *   Remove the old MAC only filter
1224                  *    Add a new MAC+VLAN filter
1225                  */
1226                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1227                         filter = STAILQ_FIRST(&vnic->filter);
1228                         while (filter) {
1229                                 temp_filter = STAILQ_NEXT(filter, next);
1230
1231                                 if (filter->enables & chk) {
1232                                         if (filter->l2_ovlan == vlan_id)
1233                                                 goto cont;
1234                                 } else {
1235                                         /* Must delete the MAC filter */
1236                                         STAILQ_REMOVE(&vnic->filter, filter,
1237                                                       bnxt_filter_info, next);
1238                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1239                                         filter->l2_ovlan = 0;
1240                                         STAILQ_INSERT_TAIL(
1241                                                         &bp->free_filter_list,
1242                                                         filter, next);
1243                                 }
1244                                 new_filter = bnxt_alloc_filter(bp);
1245                                 if (!new_filter) {
1246                                         RTE_LOG(ERR, PMD,
1247                                                 "MAC/VLAN filter alloc failed\n");
1248                                         rc = -ENOMEM;
1249                                         goto exit;
1250                                 }
1251                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1252                                                    next);
1253                                 /* Inherit MAC from the previous filter */
1254                                 new_filter->mac_index = filter->mac_index;
1255                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1256                                        ETHER_ADDR_LEN);
1257                                 /* MAC + VLAN ID filter */
1258                                 new_filter->l2_ovlan = vlan_id;
1259                                 new_filter->l2_ovlan_mask = 0xF000;
1260                                 new_filter->enables |= en;
1261                                 rc = bnxt_hwrm_set_l2_filter(bp,
1262                                                              vnic->fw_vnic_id,
1263                                                              new_filter);
1264                                 if (rc)
1265                                         goto exit;
1266                                 RTE_LOG(INFO, PMD,
1267                                         "Added Vlan filter for %d\n", vlan_id);
1268 cont:
1269                                 filter = temp_filter;
1270                         }
1271                 }
1272         }
1273 exit:
1274         return rc;
1275 }
1276
1277 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1278                                    uint16_t vlan_id, int on)
1279 {
1280         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1281
1282         /* These operations apply to ALL existing MAC/VLAN filters */
1283         if (on)
1284                 return bnxt_add_vlan_filter(bp, vlan_id);
1285         else
1286                 return bnxt_del_vlan_filter(bp, vlan_id);
1287 }
1288
1289 static void
1290 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1291 {
1292         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1293         unsigned int i;
1294
1295         if (mask & ETH_VLAN_FILTER_MASK) {
1296                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1297                         /* Remove any VLAN filters programmed */
1298                         for (i = 0; i < 4095; i++)
1299                                 bnxt_del_vlan_filter(bp, i);
1300                 }
1301                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1302                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1303         }
1304
1305         if (mask & ETH_VLAN_STRIP_MASK) {
1306                 /* Enable or disable VLAN stripping */
1307                 for (i = 0; i < bp->nr_vnics; i++) {
1308                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1309                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1310                                 vnic->vlan_strip = true;
1311                         else
1312                                 vnic->vlan_strip = false;
1313                         bnxt_hwrm_vnic_cfg(bp, vnic);
1314                 }
1315                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1316                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1317         }
1318
1319         if (mask & ETH_VLAN_EXTEND_MASK)
1320                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1321 }
1322
1323 static void
1324 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1325 {
1326         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1327         /* Default Filter is tied to VNIC 0 */
1328         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1329         struct bnxt_filter_info *filter;
1330         int rc;
1331
1332         if (BNXT_VF(bp))
1333                 return;
1334
1335         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1336         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1337
1338         STAILQ_FOREACH(filter, &vnic->filter, next) {
1339                 /* Default Filter is at Index 0 */
1340                 if (filter->mac_index != 0)
1341                         continue;
1342                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1343                 if (rc)
1344                         break;
1345                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1346                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1347                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1348                 filter->enables |=
1349                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1350                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1351                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1352                 if (rc)
1353                         break;
1354                 filter->mac_index = 0;
1355                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1356         }
1357 }
1358
1359 static int
1360 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1361                           struct ether_addr *mc_addr_set,
1362                           uint32_t nb_mc_addr)
1363 {
1364         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1365         char *mc_addr_list = (char *)mc_addr_set;
1366         struct bnxt_vnic_info *vnic;
1367         uint32_t off = 0, i = 0;
1368
1369         vnic = &bp->vnic_info[0];
1370
1371         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1372                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1373                 goto allmulti;
1374         }
1375
1376         /* TODO Check for Duplicate mcast addresses */
1377         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1378         for (i = 0; i < nb_mc_addr; i++) {
1379                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1380                 off += ETHER_ADDR_LEN;
1381         }
1382
1383         vnic->mc_addr_cnt = i;
1384
1385 allmulti:
1386         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1387 }
1388
1389 static int
1390 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1391 {
1392         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1393         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1394         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1395         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1396         int ret;
1397
1398         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1399                         fw_major, fw_minor, fw_updt);
1400
1401         ret += 1; /* add the size of '\0' */
1402         if (fw_size < (uint32_t)ret)
1403                 return ret;
1404         else
1405                 return 0;
1406 }
1407
1408 static void
1409 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1410         struct rte_eth_rxq_info *qinfo)
1411 {
1412         struct bnxt_rx_queue *rxq;
1413
1414         rxq = dev->data->rx_queues[queue_id];
1415
1416         qinfo->mp = rxq->mb_pool;
1417         qinfo->scattered_rx = dev->data->scattered_rx;
1418         qinfo->nb_desc = rxq->nb_rx_desc;
1419
1420         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1421         qinfo->conf.rx_drop_en = 0;
1422         qinfo->conf.rx_deferred_start = 0;
1423 }
1424
1425 static void
1426 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1427         struct rte_eth_txq_info *qinfo)
1428 {
1429         struct bnxt_tx_queue *txq;
1430
1431         txq = dev->data->tx_queues[queue_id];
1432
1433         qinfo->nb_desc = txq->nb_tx_desc;
1434
1435         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1436         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1437         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1438
1439         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1440         qinfo->conf.tx_rs_thresh = 0;
1441         qinfo->conf.txq_flags = txq->txq_flags;
1442         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1443 }
1444
1445 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1446 {
1447         struct bnxt *bp = eth_dev->data->dev_private;
1448         struct rte_eth_dev_info dev_info;
1449         uint32_t max_dev_mtu;
1450         uint32_t rc = 0;
1451         uint32_t i;
1452
1453         bnxt_dev_info_get_op(eth_dev, &dev_info);
1454         max_dev_mtu = dev_info.max_rx_pktlen -
1455                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1456
1457         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1458                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1459                         ETHER_MIN_MTU, max_dev_mtu);
1460                 return -EINVAL;
1461         }
1462
1463
1464         if (new_mtu > ETHER_MTU) {
1465                 bp->flags |= BNXT_FLAG_JUMBO;
1466                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1467         } else {
1468                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1469                 bp->flags &= ~BNXT_FLAG_JUMBO;
1470         }
1471
1472         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1473                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1474
1475         eth_dev->data->mtu = new_mtu;
1476         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1477
1478         for (i = 0; i < bp->nr_vnics; i++) {
1479                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1480
1481                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1482                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1483                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1484                 if (rc)
1485                         break;
1486
1487                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1488                 if (rc)
1489                         return rc;
1490         }
1491
1492         return rc;
1493 }
1494
1495 static int
1496 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1497 {
1498         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1499         uint16_t vlan = bp->vlan;
1500         int rc;
1501
1502         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1503                 RTE_LOG(ERR, PMD,
1504                         "PVID cannot be modified for this function\n");
1505                 return -ENOTSUP;
1506         }
1507         bp->vlan = on ? pvid : 0;
1508
1509         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1510         if (rc)
1511                 bp->vlan = vlan;
1512         return rc;
1513 }
1514
1515 static int
1516 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1517 {
1518         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1519
1520         return bnxt_hwrm_port_led_cfg(bp, true);
1521 }
1522
1523 static int
1524 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1525 {
1526         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1527
1528         return bnxt_hwrm_port_led_cfg(bp, false);
1529 }
1530
1531 static uint32_t
1532 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1533 {
1534         uint32_t desc = 0, raw_cons = 0, cons;
1535         struct bnxt_cp_ring_info *cpr;
1536         struct bnxt_rx_queue *rxq;
1537         struct rx_pkt_cmpl *rxcmp;
1538         uint16_t cmp_type;
1539         uint8_t cmp = 1;
1540         bool valid;
1541
1542         rxq = dev->data->rx_queues[rx_queue_id];
1543         cpr = rxq->cp_ring;
1544         valid = cpr->valid;
1545
1546         while (raw_cons < rxq->nb_rx_desc) {
1547                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1548                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1549
1550                 if (!CMPL_VALID(rxcmp, valid))
1551                         goto nothing_to_do;
1552                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1553                 cmp_type = CMP_TYPE(rxcmp);
1554                 if (cmp_type == RX_PKT_CMPL_TYPE_RX_L2_TPA_END) {
1555                         cmp = (rte_le_to_cpu_32(
1556                                         ((struct rx_tpa_end_cmpl *)
1557                                          (rxcmp))->agg_bufs_v1) &
1558                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1559                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1560                         desc++;
1561                 } else if (cmp_type == 0x11) {
1562                         desc++;
1563                         cmp = (rxcmp->agg_bufs_v1 &
1564                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1565                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1566                 } else {
1567                         cmp = 1;
1568                 }
1569 nothing_to_do:
1570                 raw_cons += cmp ? cmp : 2;
1571         }
1572
1573         return desc;
1574 }
1575
1576 static int
1577 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1578 {
1579         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1580         struct bnxt_rx_ring_info *rxr;
1581         struct bnxt_cp_ring_info *cpr;
1582         struct bnxt_sw_rx_bd *rx_buf;
1583         struct rx_pkt_cmpl *rxcmp;
1584         uint32_t cons, cp_cons;
1585
1586         if (!rxq)
1587                 return -EINVAL;
1588
1589         cpr = rxq->cp_ring;
1590         rxr = rxq->rx_ring;
1591
1592         if (offset >= rxq->nb_rx_desc)
1593                 return -EINVAL;
1594
1595         cons = RING_CMP(cpr->cp_ring_struct, offset);
1596         cp_cons = cpr->cp_raw_cons;
1597         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1598
1599         if (cons > cp_cons) {
1600                 if (CMPL_VALID(rxcmp, cpr->valid))
1601                         return RTE_ETH_RX_DESC_DONE;
1602         } else {
1603                 if (CMPL_VALID(rxcmp, !cpr->valid))
1604                         return RTE_ETH_RX_DESC_DONE;
1605         }
1606         rx_buf = &rxr->rx_buf_ring[cons];
1607         if (rx_buf->mbuf == NULL)
1608                 return RTE_ETH_RX_DESC_UNAVAIL;
1609
1610
1611         return RTE_ETH_RX_DESC_AVAIL;
1612 }
1613
1614 static int
1615 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1616 {
1617         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1618         struct bnxt_tx_ring_info *txr;
1619         struct bnxt_cp_ring_info *cpr;
1620         struct bnxt_sw_tx_bd *tx_buf;
1621         struct tx_pkt_cmpl *txcmp;
1622         uint32_t cons, cp_cons;
1623
1624         if (!txq)
1625                 return -EINVAL;
1626
1627         cpr = txq->cp_ring;
1628         txr = txq->tx_ring;
1629
1630         if (offset >= txq->nb_tx_desc)
1631                 return -EINVAL;
1632
1633         cons = RING_CMP(cpr->cp_ring_struct, offset);
1634         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1635         cp_cons = cpr->cp_raw_cons;
1636
1637         if (cons > cp_cons) {
1638                 if (CMPL_VALID(txcmp, cpr->valid))
1639                         return RTE_ETH_TX_DESC_UNAVAIL;
1640         } else {
1641                 if (CMPL_VALID(txcmp, !cpr->valid))
1642                         return RTE_ETH_TX_DESC_UNAVAIL;
1643         }
1644         tx_buf = &txr->tx_buf_ring[cons];
1645         if (tx_buf->mbuf == NULL)
1646                 return RTE_ETH_TX_DESC_DONE;
1647
1648         return RTE_ETH_TX_DESC_FULL;
1649 }
1650
1651 static struct bnxt_filter_info *
1652 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1653                                 struct rte_eth_ethertype_filter *efilter,
1654                                 struct bnxt_vnic_info *vnic0,
1655                                 struct bnxt_vnic_info *vnic,
1656                                 int *ret)
1657 {
1658         struct bnxt_filter_info *mfilter = NULL;
1659         int match = 0;
1660         *ret = 0;
1661
1662         if (efilter->ether_type != ETHER_TYPE_IPv4 &&
1663                 efilter->ether_type != ETHER_TYPE_IPv6) {
1664                 RTE_LOG(ERR, PMD, "unsupported ether_type(0x%04x) in"
1665                         " ethertype filter.", efilter->ether_type);
1666                 *ret = -EINVAL;
1667         }
1668         if (efilter->queue >= bp->rx_nr_rings) {
1669                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1670                 *ret = -EINVAL;
1671         }
1672
1673         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1674         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1675         if (vnic == NULL) {
1676                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1677                 *ret = -EINVAL;
1678         }
1679
1680         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1681                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1682                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1683                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1684                              mfilter->flags ==
1685                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1686                              mfilter->ethertype == efilter->ether_type)) {
1687                                 match = 1;
1688                                 break;
1689                         }
1690                 }
1691         } else {
1692                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1693                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1694                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1695                              mfilter->ethertype == efilter->ether_type &&
1696                              mfilter->flags ==
1697                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1698                                 match = 1;
1699                                 break;
1700                         }
1701         }
1702
1703         if (match)
1704                 *ret = -EEXIST;
1705
1706         return mfilter;
1707 }
1708
1709 static int
1710 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1711                         enum rte_filter_op filter_op,
1712                         void *arg)
1713 {
1714         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1715         struct rte_eth_ethertype_filter *efilter =
1716                         (struct rte_eth_ethertype_filter *)arg;
1717         struct bnxt_filter_info *bfilter, *filter1;
1718         struct bnxt_vnic_info *vnic, *vnic0;
1719         int ret;
1720
1721         if (filter_op == RTE_ETH_FILTER_NOP)
1722                 return 0;
1723
1724         if (arg == NULL) {
1725                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1726                             filter_op);
1727                 return -EINVAL;
1728         }
1729
1730         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1731         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1732
1733         switch (filter_op) {
1734         case RTE_ETH_FILTER_ADD:
1735                 bnxt_match_and_validate_ether_filter(bp, efilter,
1736                                                         vnic0, vnic, &ret);
1737                 if (ret < 0)
1738                         return ret;
1739
1740                 bfilter = bnxt_get_unused_filter(bp);
1741                 if (bfilter == NULL) {
1742                         RTE_LOG(ERR, PMD,
1743                                 "Not enough resources for a new filter.\n");
1744                         return -ENOMEM;
1745                 }
1746                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1747                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1748                        ETHER_ADDR_LEN);
1749                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1750                        ETHER_ADDR_LEN);
1751                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1752                 bfilter->ethertype = efilter->ether_type;
1753                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1754
1755                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1756                 if (filter1 == NULL) {
1757                         ret = -1;
1758                         goto cleanup;
1759                 }
1760                 bfilter->enables |=
1761                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1762                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1763
1764                 bfilter->dst_id = vnic->fw_vnic_id;
1765
1766                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1767                         bfilter->flags =
1768                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1769                 }
1770
1771                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1772                 if (ret)
1773                         goto cleanup;
1774                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1775                 break;
1776         case RTE_ETH_FILTER_DELETE:
1777                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1778                                                         vnic0, vnic, &ret);
1779                 if (ret == -EEXIST) {
1780                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1781
1782                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1783                                       next);
1784                         bnxt_free_filter(bp, filter1);
1785                 } else if (ret == 0) {
1786                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1787                 }
1788                 break;
1789         default:
1790                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1791                 ret = -EINVAL;
1792                 goto error;
1793         }
1794         return ret;
1795 cleanup:
1796         bnxt_free_filter(bp, bfilter);
1797 error:
1798         return ret;
1799 }
1800
1801 static int
1802 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
1803                     enum rte_filter_type filter_type,
1804                     enum rte_filter_op filter_op, void *arg)
1805 {
1806         int ret = 0;
1807
1808         switch (filter_type) {
1809         case RTE_ETH_FILTER_NTUPLE:
1810         case RTE_ETH_FILTER_FDIR:
1811         case RTE_ETH_FILTER_TUNNEL:
1812                 /* FALLTHROUGH */
1813                 RTE_LOG(ERR, PMD,
1814                         "filter type: %d: To be implemented\n", filter_type);
1815                 break;
1816         case RTE_ETH_FILTER_ETHERTYPE:
1817                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
1818                 break;
1819         case RTE_ETH_FILTER_GENERIC:
1820                 if (filter_op != RTE_ETH_FILTER_GET)
1821                         return -EINVAL;
1822                 *(const void **)arg = &bnxt_flow_ops;
1823                 break;
1824         default:
1825                 RTE_LOG(ERR, PMD,
1826                         "Filter type (%d) not supported", filter_type);
1827                 ret = -EINVAL;
1828                 break;
1829         }
1830         return ret;
1831 }
1832
1833 static const uint32_t *
1834 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
1835 {
1836         static const uint32_t ptypes[] = {
1837                 RTE_PTYPE_L2_ETHER_VLAN,
1838                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
1839                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
1840                 RTE_PTYPE_L4_ICMP,
1841                 RTE_PTYPE_L4_TCP,
1842                 RTE_PTYPE_L4_UDP,
1843                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
1844                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
1845                 RTE_PTYPE_INNER_L4_ICMP,
1846                 RTE_PTYPE_INNER_L4_TCP,
1847                 RTE_PTYPE_INNER_L4_UDP,
1848                 RTE_PTYPE_UNKNOWN
1849         };
1850
1851         if (dev->rx_pkt_burst == bnxt_recv_pkts)
1852                 return ptypes;
1853         return NULL;
1854 }
1855
1856
1857 /*
1858  * Initialization
1859  */
1860
1861 static const struct eth_dev_ops bnxt_dev_ops = {
1862         .dev_infos_get = bnxt_dev_info_get_op,
1863         .dev_close = bnxt_dev_close_op,
1864         .dev_configure = bnxt_dev_configure_op,
1865         .dev_start = bnxt_dev_start_op,
1866         .dev_stop = bnxt_dev_stop_op,
1867         .dev_set_link_up = bnxt_dev_set_link_up_op,
1868         .dev_set_link_down = bnxt_dev_set_link_down_op,
1869         .stats_get = bnxt_stats_get_op,
1870         .stats_reset = bnxt_stats_reset_op,
1871         .rx_queue_setup = bnxt_rx_queue_setup_op,
1872         .rx_queue_release = bnxt_rx_queue_release_op,
1873         .tx_queue_setup = bnxt_tx_queue_setup_op,
1874         .tx_queue_release = bnxt_tx_queue_release_op,
1875         .reta_update = bnxt_reta_update_op,
1876         .reta_query = bnxt_reta_query_op,
1877         .rss_hash_update = bnxt_rss_hash_update_op,
1878         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1879         .link_update = bnxt_link_update_op,
1880         .promiscuous_enable = bnxt_promiscuous_enable_op,
1881         .promiscuous_disable = bnxt_promiscuous_disable_op,
1882         .allmulticast_enable = bnxt_allmulticast_enable_op,
1883         .allmulticast_disable = bnxt_allmulticast_disable_op,
1884         .mac_addr_add = bnxt_mac_addr_add_op,
1885         .mac_addr_remove = bnxt_mac_addr_remove_op,
1886         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1887         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1888         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1889         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1890         .vlan_filter_set = bnxt_vlan_filter_set_op,
1891         .vlan_offload_set = bnxt_vlan_offload_set_op,
1892         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1893         .mtu_set = bnxt_mtu_set_op,
1894         .mac_addr_set = bnxt_set_default_mac_addr_op,
1895         .xstats_get = bnxt_dev_xstats_get_op,
1896         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1897         .xstats_reset = bnxt_dev_xstats_reset_op,
1898         .fw_version_get = bnxt_fw_version_get,
1899         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1900         .rxq_info_get = bnxt_rxq_info_get_op,
1901         .txq_info_get = bnxt_txq_info_get_op,
1902         .dev_led_on = bnxt_dev_led_on_op,
1903         .dev_led_off = bnxt_dev_led_off_op,
1904         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
1905         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
1906         .rx_queue_count = bnxt_rx_queue_count_op,
1907         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
1908         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
1909         .filter_ctrl = bnxt_filter_ctrl_op,
1910         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
1911 };
1912
1913 static bool bnxt_vf_pciid(uint16_t id)
1914 {
1915         if (id == BROADCOM_DEV_ID_57304_VF ||
1916             id == BROADCOM_DEV_ID_57406_VF ||
1917             id == BROADCOM_DEV_ID_5731X_VF ||
1918             id == BROADCOM_DEV_ID_5741X_VF ||
1919             id == BROADCOM_DEV_ID_57414_VF ||
1920             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
1921                 return true;
1922         return false;
1923 }
1924
1925 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1926 {
1927         struct bnxt *bp = eth_dev->data->dev_private;
1928         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1929         int rc;
1930
1931         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1932         if (!pci_dev->mem_resource[0].addr) {
1933                 RTE_LOG(ERR, PMD,
1934                         "Cannot find PCI device base address, aborting\n");
1935                 rc = -ENODEV;
1936                 goto init_err_disable;
1937         }
1938
1939         bp->eth_dev = eth_dev;
1940         bp->pdev = pci_dev;
1941
1942         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1943         if (!bp->bar0) {
1944                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1945                 rc = -ENOMEM;
1946                 goto init_err_release;
1947         }
1948         return 0;
1949
1950 init_err_release:
1951         if (bp->bar0)
1952                 bp->bar0 = NULL;
1953
1954 init_err_disable:
1955
1956         return rc;
1957 }
1958
1959 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1960
1961 #define ALLOW_FUNC(x)   \
1962         { \
1963                 typeof(x) arg = (x); \
1964                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1965                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1966         }
1967 static int
1968 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1969 {
1970         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1971         char mz_name[RTE_MEMZONE_NAMESIZE];
1972         const struct rte_memzone *mz = NULL;
1973         static int version_printed;
1974         uint32_t total_alloc_len;
1975         phys_addr_t mz_phys_addr;
1976         struct bnxt *bp;
1977         int rc;
1978
1979         if (version_printed++ == 0)
1980                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1981
1982         rte_eth_copy_pci_info(eth_dev, pci_dev);
1983         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1984
1985         bp = eth_dev->data->dev_private;
1986
1987         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1988         bp->dev_stopped = 1;
1989
1990         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1991                 goto skip_init;
1992
1993         if (bnxt_vf_pciid(pci_dev->id.device_id))
1994                 bp->flags |= BNXT_FLAG_VF;
1995
1996         rc = bnxt_init_board(eth_dev);
1997         if (rc) {
1998                 RTE_LOG(ERR, PMD,
1999                         "Board initialization failed rc: %x\n", rc);
2000                 goto error;
2001         }
2002 skip_init:
2003         eth_dev->dev_ops = &bnxt_dev_ops;
2004         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2005                 return 0;
2006         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
2007         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
2008
2009         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
2010                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2011                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2012                          pci_dev->addr.bus, pci_dev->addr.devid,
2013                          pci_dev->addr.function, "rx_port_stats");
2014                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2015                 mz = rte_memzone_lookup(mz_name);
2016                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2017                                 sizeof(struct rx_port_stats) + 512);
2018                 if (!mz) {
2019                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2020                                                  SOCKET_ID_ANY,
2021                                                  RTE_MEMZONE_2MB |
2022                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2023                         if (mz == NULL)
2024                                 return -ENOMEM;
2025                 }
2026                 memset(mz->addr, 0, mz->len);
2027                 mz_phys_addr = mz->phys_addr;
2028                 if ((unsigned long)mz->addr == mz_phys_addr) {
2029                         RTE_LOG(WARNING, PMD,
2030                                 "Memzone physical address same as virtual.\n");
2031                         RTE_LOG(WARNING, PMD,
2032                                 "Using rte_mem_virt2phy()\n");
2033                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2034                         if (mz_phys_addr == 0) {
2035                                 RTE_LOG(ERR, PMD,
2036                                 "unable to map address to physical memory\n");
2037                                 return -ENOMEM;
2038                         }
2039                 }
2040
2041                 bp->rx_mem_zone = (const void *)mz;
2042                 bp->hw_rx_port_stats = mz->addr;
2043                 bp->hw_rx_port_stats_map = mz_phys_addr;
2044
2045                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2046                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2047                          pci_dev->addr.bus, pci_dev->addr.devid,
2048                          pci_dev->addr.function, "tx_port_stats");
2049                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2050                 mz = rte_memzone_lookup(mz_name);
2051                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2052                                 sizeof(struct tx_port_stats) + 512);
2053                 if (!mz) {
2054                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2055                                                  SOCKET_ID_ANY,
2056                                                  RTE_MEMZONE_2MB |
2057                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2058                         if (mz == NULL)
2059                                 return -ENOMEM;
2060                 }
2061                 memset(mz->addr, 0, mz->len);
2062                 mz_phys_addr = mz->phys_addr;
2063                 if ((unsigned long)mz->addr == mz_phys_addr) {
2064                         RTE_LOG(WARNING, PMD,
2065                                 "Memzone physical address same as virtual.\n");
2066                         RTE_LOG(WARNING, PMD,
2067                                 "Using rte_mem_virt2phy()\n");
2068                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2069                         if (mz_phys_addr == 0) {
2070                                 RTE_LOG(ERR, PMD,
2071                                 "unable to map address to physical memory\n");
2072                                 return -ENOMEM;
2073                         }
2074                 }
2075
2076                 bp->tx_mem_zone = (const void *)mz;
2077                 bp->hw_tx_port_stats = mz->addr;
2078                 bp->hw_tx_port_stats_map = mz_phys_addr;
2079
2080                 bp->flags |= BNXT_FLAG_PORT_STATS;
2081         }
2082
2083         rc = bnxt_alloc_hwrm_resources(bp);
2084         if (rc) {
2085                 RTE_LOG(ERR, PMD,
2086                         "hwrm resource allocation failure rc: %x\n", rc);
2087                 goto error_free;
2088         }
2089         rc = bnxt_hwrm_ver_get(bp);
2090         if (rc)
2091                 goto error_free;
2092         bnxt_hwrm_queue_qportcfg(bp);
2093
2094         bnxt_hwrm_func_qcfg(bp);
2095
2096         /* Get the MAX capabilities for this function */
2097         rc = bnxt_hwrm_func_qcaps(bp);
2098         if (rc) {
2099                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
2100                 goto error_free;
2101         }
2102         if (bp->max_tx_rings == 0) {
2103                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
2104                 rc = -EBUSY;
2105                 goto error_free;
2106         }
2107         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
2108                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
2109         if (eth_dev->data->mac_addrs == NULL) {
2110                 RTE_LOG(ERR, PMD,
2111                         "Failed to alloc %u bytes needed to store MAC addr tbl",
2112                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
2113                 rc = -ENOMEM;
2114                 goto error_free;
2115         }
2116         /* Copy the permanent MAC from the qcap response address now. */
2117         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
2118         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
2119         bp->grp_info = rte_zmalloc("bnxt_grp_info",
2120                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
2121         if (!bp->grp_info) {
2122                 RTE_LOG(ERR, PMD,
2123                         "Failed to alloc %zu bytes needed to store group info table\n",
2124                         sizeof(*bp->grp_info) * bp->max_ring_grps);
2125                 rc = -ENOMEM;
2126                 goto error_free;
2127         }
2128
2129         /* Forward all requests if firmware is new enough */
2130         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
2131             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
2132             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
2133                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
2134         } else {
2135                 RTE_LOG(WARNING, PMD,
2136                         "Firmware too old for VF mailbox functionality\n");
2137                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
2138         }
2139
2140         /*
2141          * The following are used for driver cleanup.  If we disallow these,
2142          * VF drivers can't clean up cleanly.
2143          */
2144         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
2145         ALLOW_FUNC(HWRM_VNIC_FREE);
2146         ALLOW_FUNC(HWRM_RING_FREE);
2147         ALLOW_FUNC(HWRM_RING_GRP_FREE);
2148         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
2149         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
2150         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
2151         rc = bnxt_hwrm_func_driver_register(bp);
2152         if (rc) {
2153                 RTE_LOG(ERR, PMD,
2154                         "Failed to register driver");
2155                 rc = -EBUSY;
2156                 goto error_free;
2157         }
2158
2159         RTE_LOG(INFO, PMD,
2160                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
2161                 pci_dev->mem_resource[0].phys_addr,
2162                 pci_dev->mem_resource[0].addr);
2163
2164         rc = bnxt_hwrm_func_reset(bp);
2165         if (rc) {
2166                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
2167                 rc = -1;
2168                 goto error_free;
2169         }
2170
2171         if (BNXT_PF(bp)) {
2172                 //if (bp->pf.active_vfs) {
2173                         // TODO: Deallocate VF resources?
2174                 //}
2175                 if (bp->pdev->max_vfs) {
2176                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
2177                         if (rc) {
2178                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
2179                                 goto error_free;
2180                         }
2181                 } else {
2182                         rc = bnxt_hwrm_allocate_pf_only(bp);
2183                         if (rc) {
2184                                 RTE_LOG(ERR, PMD,
2185                                         "Failed to allocate PF resources\n");
2186                                 goto error_free;
2187                         }
2188                 }
2189         }
2190
2191         bnxt_hwrm_port_led_qcaps(bp);
2192
2193         rc = bnxt_setup_int(bp);
2194         if (rc)
2195                 goto error_free;
2196
2197         rc = bnxt_alloc_mem(bp);
2198         if (rc)
2199                 goto error_free_int;
2200
2201         rc = bnxt_request_int(bp);
2202         if (rc)
2203                 goto error_free_int;
2204
2205         rc = bnxt_alloc_def_cp_ring(bp);
2206         if (rc)
2207                 goto error_free_int;
2208
2209         bnxt_enable_int(bp);
2210
2211         return 0;
2212
2213 error_free_int:
2214         bnxt_disable_int(bp);
2215         bnxt_free_def_cp_ring(bp);
2216         bnxt_hwrm_func_buf_unrgtr(bp);
2217         bnxt_free_int(bp);
2218         bnxt_free_mem(bp);
2219 error_free:
2220         bnxt_dev_uninit(eth_dev);
2221 error:
2222         return rc;
2223 }
2224
2225 static int
2226 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
2227         struct bnxt *bp = eth_dev->data->dev_private;
2228         int rc;
2229
2230         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2231                 return -EPERM;
2232
2233         bnxt_disable_int(bp);
2234         bnxt_free_int(bp);
2235         bnxt_free_mem(bp);
2236         if (eth_dev->data->mac_addrs != NULL) {
2237                 rte_free(eth_dev->data->mac_addrs);
2238                 eth_dev->data->mac_addrs = NULL;
2239         }
2240         if (bp->grp_info != NULL) {
2241                 rte_free(bp->grp_info);
2242                 bp->grp_info = NULL;
2243         }
2244         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
2245         bnxt_free_hwrm_resources(bp);
2246         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
2247         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
2248         if (bp->dev_stopped == 0)
2249                 bnxt_dev_close_op(eth_dev);
2250         if (bp->pf.vf_info)
2251                 rte_free(bp->pf.vf_info);
2252         eth_dev->dev_ops = NULL;
2253         eth_dev->rx_pkt_burst = NULL;
2254         eth_dev->tx_pkt_burst = NULL;
2255
2256         return rc;
2257 }
2258
2259 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2260         struct rte_pci_device *pci_dev)
2261 {
2262         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
2263                 bnxt_dev_init);
2264 }
2265
2266 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
2267 {
2268         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
2269 }
2270
2271 static struct rte_pci_driver bnxt_rte_pmd = {
2272         .id_table = bnxt_pci_id_map,
2273         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
2274                 RTE_PCI_DRV_INTR_LSC,
2275         .probe = bnxt_pci_probe,
2276         .remove = bnxt_pci_remove,
2277 };
2278
2279 static bool
2280 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
2281 {
2282         if (strcmp(dev->device->driver->name, drv->driver.name))
2283                 return false;
2284
2285         return true;
2286 }
2287
2288 bool is_bnxt_supported(struct rte_eth_dev *dev)
2289 {
2290         return is_device_supported(dev, &bnxt_rte_pmd);
2291 }
2292
2293 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
2294 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
2295 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");