net/bnxt: add initial Rx code
[dpdk.git] / drivers / net / bnxt / bnxt_ethdev.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) Broadcom Limited.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Broadcom Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <inttypes.h>
35 #include <stdbool.h>
36
37 #include <rte_dev.h>
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_cycles.h>
41
42 #include "bnxt.h"
43 #include "bnxt_hwrm.h"
44 #include "bnxt_rxq.h"
45 #include "bnxt_rxr.h"
46 #include "bnxt_stats.h"
47 #include "bnxt_txq.h"
48 #include "bnxt_txr.h"
49
50 #define DRV_MODULE_NAME         "bnxt"
51 static const char bnxt_version[] =
52         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
53
54 static struct rte_pci_id bnxt_pci_id_map[] = {
55 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
56 #include "rte_pci_dev_ids.h"
57         {.device_id = 0},
58 };
59
60 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
61 {
62         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
63
64         rte_free(eth_dev->data->mac_addrs);
65         bnxt_free_hwrm_resources(bp);
66 }
67
68 /*
69  * Device configuration and status function
70  */
71
72 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
73                                   struct rte_eth_dev_info *dev_info)
74 {
75         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
76         uint16_t max_vnics, i, j, vpool, vrxq;
77
78         /* MAC Specifics */
79         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
80         dev_info->max_hash_mac_addrs = 0;
81
82         /* PF/VF specifics */
83         if (BNXT_PF(bp)) {
84                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
85                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
86                 dev_info->max_vfs = bp->pf.active_vfs;
87                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
88                 max_vnics = bp->pf.max_vnics;
89         } else {
90                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
91                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
92                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
93                 max_vnics = bp->vf.max_vnics;
94         }
95
96         /* Fast path specifics */
97         dev_info->min_rx_bufsize = 1;
98         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
99                                   + VLAN_TAG_SIZE;
100         dev_info->rx_offload_capa = 0;
101         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
102                                         DEV_TX_OFFLOAD_TCP_CKSUM |
103                                         DEV_TX_OFFLOAD_UDP_CKSUM |
104                                         DEV_TX_OFFLOAD_TCP_TSO;
105
106         /* *INDENT-OFF* */
107         dev_info->default_rxconf = (struct rte_eth_rxconf) {
108                 .rx_thresh = {
109                         .pthresh = 8,
110                         .hthresh = 8,
111                         .wthresh = 0,
112                 },
113                 .rx_free_thresh = 32,
114                 .rx_drop_en = 0,
115         };
116
117         dev_info->default_txconf = (struct rte_eth_txconf) {
118                 .tx_thresh = {
119                         .pthresh = 32,
120                         .hthresh = 0,
121                         .wthresh = 0,
122                 },
123                 .tx_free_thresh = 32,
124                 .tx_rs_thresh = 32,
125                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
126                              ETH_TXQ_FLAGS_NOOFFLOADS,
127         };
128         /* *INDENT-ON* */
129
130         /*
131          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
132          *       need further investigation.
133          */
134
135         /* VMDq resources */
136         vpool = 64; /* ETH_64_POOLS */
137         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
138         for (i = 0; i < 4; vpool >>= 1, i++) {
139                 if (max_vnics > vpool) {
140                         for (j = 0; j < 5; vrxq >>= 1, j++) {
141                                 if (dev_info->max_rx_queues > vrxq) {
142                                         if (vpool > vrxq)
143                                                 vpool = vrxq;
144                                         goto found;
145                                 }
146                         }
147                         /* Not enough resources to support VMDq */
148                         break;
149                 }
150         }
151         /* Not enough resources to support VMDq */
152         vpool = 0;
153         vrxq = 0;
154 found:
155         dev_info->max_vmdq_pools = vpool;
156         dev_info->vmdq_queue_num = vrxq;
157
158         dev_info->vmdq_pool_base = 0;
159         dev_info->vmdq_queue_base = 0;
160 }
161
162 /* Configure the device based on the configuration provided */
163 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
164 {
165         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
166         int rc;
167
168         bp->rx_queues = (void *)eth_dev->data->rx_queues;
169         bp->tx_queues = (void *)eth_dev->data->tx_queues;
170
171         /* Inherit new configurations */
172         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
173         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
174         bp->rx_cp_nr_rings = bp->rx_nr_rings;
175         bp->tx_cp_nr_rings = bp->tx_nr_rings;
176
177         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
178                 eth_dev->data->mtu =
179                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
180                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
181         rc = bnxt_set_hwrm_link_config(bp, true);
182         return rc;
183 }
184
185 /*
186  * Initialization
187  */
188
189 static struct eth_dev_ops bnxt_dev_ops = {
190         .dev_infos_get = bnxt_dev_info_get_op,
191         .dev_close = bnxt_dev_close_op,
192         .dev_configure = bnxt_dev_configure_op,
193         .stats_get = bnxt_stats_get_op,
194         .stats_reset = bnxt_stats_reset_op,
195         .rx_queue_setup = bnxt_rx_queue_setup_op,
196         .rx_queue_release = bnxt_rx_queue_release_op,
197         .tx_queue_setup = bnxt_tx_queue_setup_op,
198         .tx_queue_release = bnxt_tx_queue_release_op,
199 };
200
201 static bool bnxt_vf_pciid(uint16_t id)
202 {
203         if (id == BROADCOM_DEV_ID_57304_VF ||
204             id == BROADCOM_DEV_ID_57406_VF)
205                 return true;
206         return false;
207 }
208
209 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
210 {
211         int rc;
212         struct bnxt *bp = eth_dev->data->dev_private;
213
214         /* enable device (incl. PCI PM wakeup), and bus-mastering */
215         if (!eth_dev->pci_dev->mem_resource[0].addr) {
216                 RTE_LOG(ERR, PMD,
217                         "Cannot find PCI device base address, aborting\n");
218                 rc = -ENODEV;
219                 goto init_err_disable;
220         }
221
222         bp->eth_dev = eth_dev;
223         bp->pdev = eth_dev->pci_dev;
224
225         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
226         if (!bp->bar0) {
227                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
228                 rc = -ENOMEM;
229                 goto init_err_release;
230         }
231         return 0;
232
233 init_err_release:
234         if (bp->bar0)
235                 bp->bar0 = NULL;
236
237 init_err_disable:
238
239         return rc;
240 }
241
242 static int
243 bnxt_dev_init(struct rte_eth_dev *eth_dev)
244 {
245         static int version_printed;
246         struct bnxt *bp;
247         int rc;
248
249         if (version_printed++ == 0)
250                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
251
252         if (eth_dev->pci_dev->addr.function >= 2 &&
253                         eth_dev->pci_dev->addr.function < 4) {
254                 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
255                         eth_dev->pci_dev->addr.function);
256                 rc = -ENOMEM;
257                 goto error;
258         }
259
260         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
261         bp = eth_dev->data->dev_private;
262
263         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
264                 bp->flags |= BNXT_FLAG_VF;
265
266         rc = bnxt_init_board(eth_dev);
267         if (rc) {
268                 RTE_LOG(ERR, PMD,
269                         "Board initialization failed rc: %x\n", rc);
270                 goto error;
271         }
272         eth_dev->dev_ops = &bnxt_dev_ops;
273         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
274         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
275
276         rc = bnxt_alloc_hwrm_resources(bp);
277         if (rc) {
278                 RTE_LOG(ERR, PMD,
279                         "hwrm resource allocation failure rc: %x\n", rc);
280                 goto error_free;
281         }
282         rc = bnxt_hwrm_ver_get(bp);
283         if (rc)
284                 goto error_free;
285         bnxt_hwrm_queue_qportcfg(bp);
286
287         /* Get the MAX capabilities for this function */
288         rc = bnxt_hwrm_func_qcaps(bp);
289         if (rc) {
290                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
291                 goto error_free;
292         }
293         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
294                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
295         if (eth_dev->data->mac_addrs == NULL) {
296                 RTE_LOG(ERR, PMD,
297                         "Failed to alloc %u bytes needed to store MAC addr tbl",
298                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
299                 rc = -ENOMEM;
300                 goto error_free;
301         }
302         /* Copy the permanent MAC from the qcap response address now. */
303         if (BNXT_PF(bp))
304                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
305         else
306                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
307         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
308
309         rc = bnxt_hwrm_func_driver_register(bp, 0,
310                                             bp->pf.vf_req_fwd);
311         if (rc) {
312                 RTE_LOG(ERR, PMD,
313                         "Failed to register driver");
314                 rc = -EBUSY;
315                 goto error_free;
316         }
317
318         RTE_LOG(INFO, PMD,
319                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
320                 eth_dev->pci_dev->mem_resource[0].phys_addr,
321                 eth_dev->pci_dev->mem_resource[0].addr);
322
323         return 0;
324
325 error_free:
326         eth_dev->driver->eth_dev_uninit(eth_dev);
327 error:
328         return rc;
329 }
330
331 static int
332 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
333         struct bnxt *bp = eth_dev->data->dev_private;
334         int rc;
335
336         if (eth_dev->data->mac_addrs)
337                 rte_free(eth_dev->data->mac_addrs);
338         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
339         bnxt_free_hwrm_resources(bp);
340         return rc;
341 }
342
343 static struct eth_driver bnxt_rte_pmd = {
344         .pci_drv = {
345                     .name = "rte_" DRV_MODULE_NAME "_pmd",
346                     .id_table = bnxt_pci_id_map,
347                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
348                     },
349         .eth_dev_init = bnxt_dev_init,
350         .eth_dev_uninit = bnxt_dev_uninit,
351         .dev_private_size = sizeof(struct bnxt),
352 };
353
354 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
355 {
356         RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
357         rte_eth_driver_register(&bnxt_rte_pmd);
358         return 0;
359 }
360
361 static struct rte_driver bnxt_pmd_drv = {
362         .name = "eth_bnxt",
363         .type = PMD_PDEV,
364         .init = bnxt_rte_pmd_init,
365 };
366
367 PMD_REGISTER_DRIVER(bnxt_pmd_drv);