drivers/net/bnxt/bnxt_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_ethdev_driver.h>
  11 #include <rte_ethdev_pci.h>
  12 #include <rte_malloc.h>
  13 #include <rte_cycles.h>
  14
  15 #include "bnxt.h"
  16 #include "bnxt_cpr.h"
  17 #include "bnxt_filter.h"
  18 #include "bnxt_hwrm.h"
  19 #include "bnxt_irq.h"
  20 #include "bnxt_ring.h"
  21 #include "bnxt_rxq.h"
  22 #include "bnxt_rxr.h"
  23 #include "bnxt_stats.h"
  24 #include "bnxt_txq.h"
  25 #include "bnxt_txr.h"
  26 #include "bnxt_vnic.h"
  27 #include "hsi_struct_def_dpdk.h"
  28 #include "bnxt_nvm_defs.h"
  29 #include "bnxt_util.h"
  30
  31 #define DRV_MODULE_NAME         "bnxt"
  32 static const char bnxt_version[] =
  33         "Broadcom NetXtreme driver " DRV_MODULE_NAME;
  34 int bnxt_logtype_driver;
  35
  36 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  37
  38 #define BROADCOM_DEV_ID_STRATUS_NIC_VF1 0x1606
  39 #define BROADCOM_DEV_ID_STRATUS_NIC_VF2 0x1609
  40 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  41 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  42 #define BROADCOM_DEV_ID_57301 0x16c8
  43 #define BROADCOM_DEV_ID_57302 0x16c9
  44 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  45 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  46 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  47 #define BROADCOM_DEV_ID_NS2 0x16cd
  48 #define BROADCOM_DEV_ID_57311 0x16ce
  49 #define BROADCOM_DEV_ID_57312 0x16cf
  50 #define BROADCOM_DEV_ID_57402 0x16d0
  51 #define BROADCOM_DEV_ID_57404 0x16d1
  52 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  53 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  54 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  55 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  56 #define BROADCOM_DEV_ID_57412 0x16d6
  57 #define BROADCOM_DEV_ID_57414 0x16d7
  58 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  59 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  60 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  61 #define BROADCOM_DEV_ID_57412_MF 0x16de
  62 #define BROADCOM_DEV_ID_57314 0x16df
  63 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  64 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  65 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  66 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  67 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  68 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  69 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  70 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  71 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  72 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  73 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  74 #define BROADCOM_DEV_ID_58802 0xd802
  75 #define BROADCOM_DEV_ID_58804 0xd804
  76 #define BROADCOM_DEV_ID_58808 0x16f0
  77 #define BROADCOM_DEV_ID_58802_VF 0xd800
  78
  79 static const struct rte_pci_id bnxt_pci_id_map[] = {
  80         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  81                          BROADCOM_DEV_ID_STRATUS_NIC_VF1) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  83                          BROADCOM_DEV_ID_STRATUS_NIC_VF2) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58804) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58808) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802_VF) },
 122         { .vendor_id = 0, /* sentinel */ },
 123 };
 124
 125 #define BNXT_ETH_RSS_SUPPORT (  \
 126         ETH_RSS_IPV4 |          \
 127         ETH_RSS_NONFRAG_IPV4_TCP |      \
 128         ETH_RSS_NONFRAG_IPV4_UDP |      \
 129         ETH_RSS_IPV6 |          \
 130         ETH_RSS_NONFRAG_IPV6_TCP |      \
 131         ETH_RSS_NONFRAG_IPV6_UDP)
 132
 133 #define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
 134                                      DEV_TX_OFFLOAD_IPV4_CKSUM | \
 135                                      DEV_TX_OFFLOAD_TCP_CKSUM | \
 136                                      DEV_TX_OFFLOAD_UDP_CKSUM | \
 137                                      DEV_TX_OFFLOAD_TCP_TSO | \
 138                                      DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
 139                                      DEV_TX_OFFLOAD_VXLAN_TNL_TSO | \
 140                                      DEV_TX_OFFLOAD_GRE_TNL_TSO | \
 141                                      DEV_TX_OFFLOAD_IPIP_TNL_TSO | \
 142                                      DEV_TX_OFFLOAD_GENEVE_TNL_TSO | \
 143                                      DEV_TX_OFFLOAD_MULTI_SEGS)
 144
 145 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
 146                                      DEV_RX_OFFLOAD_VLAN_STRIP | \
 147                                      DEV_RX_OFFLOAD_IPV4_CKSUM | \
 148                                      DEV_RX_OFFLOAD_UDP_CKSUM | \
 149                                      DEV_RX_OFFLOAD_TCP_CKSUM | \
 150                                      DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
 151                                      DEV_RX_OFFLOAD_JUMBO_FRAME | \
 152                                      DEV_RX_OFFLOAD_KEEP_CRC | \
 153                                      DEV_RX_OFFLOAD_TCP_LRO)
 154
 155 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 156 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 157 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
 158 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
 159
 160 /***********************/
 161
 162 /*
 163  * High level utility functions
 164  */
 165
 166 static void bnxt_free_mem(struct bnxt *bp)
 167 {
 168         bnxt_free_filter_mem(bp);
 169         bnxt_free_vnic_attributes(bp);
 170         bnxt_free_vnic_mem(bp);
 171
 172         bnxt_free_stats(bp);
 173         bnxt_free_tx_rings(bp);
 174         bnxt_free_rx_rings(bp);
 175 }
 176
 177 static int bnxt_alloc_mem(struct bnxt *bp)
 178 {
 179         int rc;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         struct bnxt_rx_queue *rxq;
 203         struct rte_eth_link new;
 204         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 205         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 206         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 207         uint64_t rx_offloads = dev_conf->rxmode.offloads;
 208         uint32_t intr_vector = 0;
 209         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 210         uint32_t vec = BNXT_MISC_VEC_ID;
 211         unsigned int i, j;
 212         int rc;
 213
 214         /* disable uio/vfio intr/eventfd mapping */
 215         rte_intr_disable(intr_handle);
 216
 217         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 218                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
 219                         DEV_RX_OFFLOAD_JUMBO_FRAME;
 220                 bp->flags |= BNXT_FLAG_JUMBO;
 221         } else {
 222                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
 223                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 224                 bp->flags &= ~BNXT_FLAG_JUMBO;
 225         }
 226
 227         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 228         if (rc) {
 229                 PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
 230                 goto err_out;
 231         }
 232
 233         rc = bnxt_alloc_hwrm_rings(bp);
 234         if (rc) {
 235                 PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
 236                 goto err_out;
 237         }
 238
 239         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 240         if (rc) {
 241                 PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
 242                 goto err_out;
 243         }
 244
 245         rc = bnxt_mq_rx_configure(bp);
 246         if (rc) {
 247                 PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
 248                 goto err_out;
 249         }
 250
 251         /* VNIC configuration */
 252         for (i = 0; i < bp->nr_vnics; i++) {
 253                 struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 254                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 255                 uint32_t size = sizeof(*vnic->fw_grp_ids) * bp->max_ring_grps;
 256
 257                 vnic->fw_grp_ids = rte_zmalloc("vnic_fw_grp_ids", size, 0);
 258                 if (!vnic->fw_grp_ids) {
 259                         PMD_DRV_LOG(ERR,
 260                                     "Failed to alloc %d bytes for group ids\n",
 261                                     size);
 262                         rc = -ENOMEM;
 263                         goto err_out;
 264                 }
 265                 memset(vnic->fw_grp_ids, -1, size);
 266
 267                 PMD_DRV_LOG(DEBUG, "vnic[%d] = %p vnic->fw_grp_ids = %p\n",
 268                             i, vnic, vnic->fw_grp_ids);
 269
 270                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 271                 if (rc) {
 272                         PMD_DRV_LOG(ERR, "HWRM vnic %d alloc failure rc: %x\n",
 273                                 i, rc);
 274                         goto err_out;
 275                 }
 276
 277                 /* Alloc RSS context only if RSS mode is enabled */
 278                 if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS) {
 279                         rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 280                         if (rc) {
 281                                 PMD_DRV_LOG(ERR,
 282                                         "HWRM vnic %d ctx alloc failure rc: %x\n",
 283                                         i, rc);
 284                                 goto err_out;
 285                         }
 286                 }
 287
 288                 /*
 289                  * Firmware sets pf pair in default vnic cfg. If the VLAN strip
 290                  * setting is not available at this time, it will not be
 291                  * configured correctly in the CFA.
 292                  */
 293                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 294                         vnic->vlan_strip = true;
 295                 else
 296                         vnic->vlan_strip = false;
 297
 298                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 299                 if (rc) {
 300                         PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
 301                                 i, rc);
 302                         goto err_out;
 303                 }
 304
 305                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 306                 if (rc) {
 307                         PMD_DRV_LOG(ERR,
 308                                 "HWRM vnic %d filter failure rc: %x\n",
 309                                 i, rc);
 310                         goto err_out;
 311                 }
 312
 313                 for (j = 0; j < bp->rx_nr_rings; j++) {
 314                         rxq = bp->eth_dev->data->rx_queues[j];
 315
 316                         PMD_DRV_LOG(DEBUG,
 317                                     "rxq[%d]->vnic=%p vnic->fw_grp_ids=%p\n",
 318                                     j, rxq->vnic, rxq->vnic->fw_grp_ids);
 319
 320                         if (rxq->rx_deferred_start)
 321                                 rxq->vnic->fw_grp_ids[j] = INVALID_HW_RING_ID;
 322                 }
 323
 324                 rc = bnxt_vnic_rss_configure(bp, vnic);
 325                 if (rc) {
 326                         PMD_DRV_LOG(ERR,
 327                                     "HWRM vnic set RSS failure rc: %x\n", rc);
 328                         goto err_out;
 329                 }
 330
 331                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 332
 333                 if (bp->eth_dev->data->dev_conf.rxmode.offloads &
 334                     DEV_RX_OFFLOAD_TCP_LRO)
 335                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 336                 else
 337                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 338         }
 339         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 340         if (rc) {
 341                 PMD_DRV_LOG(ERR,
 342                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 343                 goto err_out;
 344         }
 345
 346         /* check and configure queue intr-vector mapping */
 347         if ((rte_intr_cap_multiple(intr_handle) ||
 348              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 349             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 350                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 351                 PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
 352                 if (intr_vector > bp->rx_cp_nr_rings) {
 353                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
 354                                         bp->rx_cp_nr_rings);
 355                         return -ENOTSUP;
 356                 }
 357                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 358                         return -1;
 359         }
 360
 361         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 362                 intr_handle->intr_vec =
 363                         rte_zmalloc("intr_vec",
 364                                     bp->eth_dev->data->nb_rx_queues *
 365                                     sizeof(int), 0);
 366                 if (intr_handle->intr_vec == NULL) {
 367                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
 368                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 369                         return -ENOMEM;
 370                 }
 371                 PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
 372                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 373                          intr_handle->intr_vec, intr_handle->nb_efd,
 374                         intr_handle->max_intr);
 375         }
 376
 377         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 378              queue_id++) {
 379                 intr_handle->intr_vec[queue_id] = vec;
 380                 if (vec < base + intr_handle->nb_efd - 1)
 381                         vec++;
 382         }
 383
 384         /* enable uio/vfio intr/eventfd mapping */
 385         rte_intr_enable(intr_handle);
 386
 387         rc = bnxt_get_hwrm_link_config(bp, &new);
 388         if (rc) {
 389                 PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
 390                 goto err_out;
 391         }
 392
 393         if (!bp->link_info.link_up) {
 394                 rc = bnxt_set_hwrm_link_config(bp, true);
 395                 if (rc) {
 396                         PMD_DRV_LOG(ERR,
 397                                 "HWRM link config failure rc: %x\n", rc);
 398                         goto err_out;
 399                 }
 400         }
 401         bnxt_print_link_info(bp->eth_dev);
 402
 403         return 0;
 404
 405 err_out:
 406         bnxt_free_all_hwrm_resources(bp);
 407
 408         /* Some of the error status returned by FW may not be from errno.h */
 409         if (rc > 0)
 410                 rc = -EIO;
 411
 412         return rc;
 413 }
 414
 415 static int bnxt_shutdown_nic(struct bnxt *bp)
 416 {
 417         bnxt_free_all_hwrm_resources(bp);
 418         bnxt_free_all_filters(bp);
 419         bnxt_free_all_vnics(bp);
 420         return 0;
 421 }
 422
 423 static int bnxt_init_nic(struct bnxt *bp)
 424 {
 425         int rc;
 426
 427         rc = bnxt_init_ring_grps(bp);
 428         if (rc)
 429                 return rc;
 430
 431         bnxt_init_vnics(bp);
 432         bnxt_init_filters(bp);
 433
 434         return 0;
 435 }
 436
 437 /*
 438  * Device configuration and status function
 439  */
 440
 441 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 442                                   struct rte_eth_dev_info *dev_info)
 443 {
 444         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 445         uint16_t max_vnics, i, j, vpool, vrxq;
 446         unsigned int max_rx_rings;
 447
 448         /* MAC Specifics */
 449         dev_info->max_mac_addrs = bp->max_l2_ctx;
 450         dev_info->max_hash_mac_addrs = 0;
 451
 452         /* PF/VF specifics */
 453         if (BNXT_PF(bp))
 454                 dev_info->max_vfs = bp->pdev->max_vfs;
 455         max_rx_rings = RTE_MIN(bp->max_vnics, bp->max_stat_ctx);
 456         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 457         dev_info->max_rx_queues = max_rx_rings;
 458         dev_info->max_tx_queues = max_rx_rings;
 459         dev_info->reta_size = HW_HASH_INDEX_SIZE;
 460         dev_info->hash_key_size = 40;
 461         max_vnics = bp->max_vnics;
 462
 463         /* Fast path specifics */
 464         dev_info->min_rx_bufsize = 1;
 465         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 466                                   + VLAN_TAG_SIZE * 2;
 467
 468         dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
 469         if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
 470                 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
 471         dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT;
 472         dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
 473
 474         /* *INDENT-OFF* */
 475         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 476                 .rx_thresh = {
 477                         .pthresh = 8,
 478                         .hthresh = 8,
 479                         .wthresh = 0,
 480                 },
 481                 .rx_free_thresh = 32,
 482                 /* If no descriptors available, pkts are dropped by default */
 483                 .rx_drop_en = 1,
 484         };
 485
 486         dev_info->default_txconf = (struct rte_eth_txconf) {
 487                 .tx_thresh = {
 488                         .pthresh = 32,
 489                         .hthresh = 0,
 490                         .wthresh = 0,
 491                 },
 492                 .tx_free_thresh = 32,
 493                 .tx_rs_thresh = 32,
 494         };
 495         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 496
 497         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 498         dev_info->rx_desc_lim.nb_min = BNXT_MIN_RING_DESC;
 499         dev_info->rx_desc_lim.nb_max = BNXT_MAX_RX_RING_DESC;
 500         dev_info->tx_desc_lim.nb_min = BNXT_MIN_RING_DESC;
 501         dev_info->tx_desc_lim.nb_max = BNXT_MAX_TX_RING_DESC;
 502
 503         /* *INDENT-ON* */
 504
 505         /*
 506          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 507          *       need further investigation.
 508          */
 509
 510         /* VMDq resources */
 511         vpool = 64; /* ETH_64_POOLS */
 512         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 513         for (i = 0; i < 4; vpool >>= 1, i++) {
 514                 if (max_vnics > vpool) {
 515                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 516                                 if (dev_info->max_rx_queues > vrxq) {
 517                                         if (vpool > vrxq)
 518                                                 vpool = vrxq;
 519                                         goto found;
 520                                 }
 521                         }
 522                         /* Not enough resources to support VMDq */
 523                         break;
 524                 }
 525         }
 526         /* Not enough resources to support VMDq */
 527         vpool = 0;
 528         vrxq = 0;
 529 found:
 530         dev_info->max_vmdq_pools = vpool;
 531         dev_info->vmdq_queue_num = vrxq;
 532
 533         dev_info->vmdq_pool_base = 0;
 534         dev_info->vmdq_queue_base = 0;
 535 }
 536
 537 /* Configure the device based on the configuration provided */
 538 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 539 {
 540         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 541         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 542         int rc;
 543
 544         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 545         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 546         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 547         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 548
 549         if (BNXT_VF(bp) && (bp->flags & BNXT_FLAG_NEW_RM)) {
 550                 rc = bnxt_hwrm_check_vf_rings(bp);
 551                 if (rc) {
 552                         PMD_DRV_LOG(ERR, "HWRM insufficient resources\n");
 553                         return -ENOSPC;
 554                 }
 555
 556                 rc = bnxt_hwrm_func_reserve_vf_resc(bp, false);
 557                 if (rc) {
 558                         PMD_DRV_LOG(ERR, "HWRM resource alloc fail:%x\n", rc);
 559                         return -ENOSPC;
 560                 }
 561         } else {
 562                 /* legacy driver needs to get updated values */
 563                 rc = bnxt_hwrm_func_qcaps(bp);
 564                 if (rc) {
 565                         PMD_DRV_LOG(ERR, "hwrm func qcaps fail:%d\n", rc);
 566                         return rc;
 567                 }
 568         }
 569
 570         /* Inherit new configurations */
 571         if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
 572             eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
 573             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 574             bp->max_cp_rings ||
 575             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 576             bp->max_stat_ctx ||
 577             (uint32_t)(eth_dev->data->nb_rx_queues) > bp->max_ring_grps ||
 578             (!(eth_dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS) &&
 579              bp->max_vnics < eth_dev->data->nb_rx_queues)) {
 580                 PMD_DRV_LOG(ERR,
 581                         "Insufficient resources to support requested config\n");
 582                 PMD_DRV_LOG(ERR,
 583                         "Num Queues Requested: Tx %d, Rx %d\n",
 584                         eth_dev->data->nb_tx_queues,
 585                         eth_dev->data->nb_rx_queues);
 586                 PMD_DRV_LOG(ERR,
 587                         "MAX: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d, Vnic %d\n",
 588                         bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
 589                         bp->max_stat_ctx, bp->max_ring_grps, bp->max_vnics);
 590                 return -ENOSPC;
 591         }
 592
 593         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 594         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 595
 596         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 597                 eth_dev->data->mtu =
 598                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 599                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE *
 600                                 BNXT_NUM_VLANS;
 601                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 602         }
 603         return 0;
 604 }
 605
 606 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 607 {
 608         struct rte_eth_link *link = &eth_dev->data->dev_link;
 609
 610         if (link->link_status)
 611                 PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
 612                         eth_dev->data->port_id,
 613                         (uint32_t)link->link_speed,
 614                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 615                         ("full-duplex") : ("half-duplex\n"));
 616         else
 617                 PMD_DRV_LOG(INFO, "Port %d Link Down\n",
 618                         eth_dev->data->port_id);
 619 }
 620
 621 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 622 {
 623         bnxt_print_link_info(eth_dev);
 624         return 0;
 625 }
 626
 627 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 628 {
 629         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 630         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 631         int vlan_mask = 0;
 632         int rc;
 633
 634         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 635                 PMD_DRV_LOG(ERR,
 636                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 637                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 638         }
 639         bp->dev_stopped = 0;
 640
 641         rc = bnxt_init_chip(bp);
 642         if (rc)
 643                 goto error;
 644
 645         bnxt_link_update_op(eth_dev, 1);
 646
 647         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 648                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 649         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 650                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 651         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 652         if (rc)
 653                 goto error;
 654
 655         bp->flags |= BNXT_FLAG_INIT_DONE;
 656         return 0;
 657
 658 error:
 659         bnxt_shutdown_nic(bp);
 660         bnxt_free_tx_mbufs(bp);
 661         bnxt_free_rx_mbufs(bp);
 662         return rc;
 663 }
 664
 665 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 666 {
 667         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 668         int rc = 0;
 669
 670         if (!bp->link_info.link_up)
 671                 rc = bnxt_set_hwrm_link_config(bp, true);
 672         if (!rc)
 673                 eth_dev->data->dev_link.link_status = 1;
 674
 675         bnxt_print_link_info(eth_dev);
 676         return 0;
 677 }
 678
 679 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 680 {
 681         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 682
 683         eth_dev->data->dev_link.link_status = 0;
 684         bnxt_set_hwrm_link_config(bp, false);
 685         bp->link_info.link_up = 0;
 686
 687         return 0;
 688 }
 689
 690 /* Unload the driver, release resources */
 691 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 692 {
 693         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 694
 695         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 696         if (bp->eth_dev->data->dev_started) {
 697                 /* TBD: STOP HW queues DMA */
 698                 eth_dev->data->dev_link.link_status = 0;
 699         }
 700         bnxt_set_hwrm_link_config(bp, false);
 701         bnxt_hwrm_port_clr_stats(bp);
 702         bnxt_free_tx_mbufs(bp);
 703         bnxt_free_rx_mbufs(bp);
 704         bnxt_shutdown_nic(bp);
 705         bp->dev_stopped = 1;
 706 }
 707
 708 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 709 {
 710         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 711
 712         if (bp->dev_stopped == 0)
 713                 bnxt_dev_stop_op(eth_dev);
 714
 715         if (eth_dev->data->mac_addrs != NULL) {
 716                 rte_free(eth_dev->data->mac_addrs);
 717                 eth_dev->data->mac_addrs = NULL;
 718         }
 719         if (bp->grp_info != NULL) {
 720                 rte_free(bp->grp_info);
 721                 bp->grp_info = NULL;
 722         }
 723
 724         bnxt_dev_uninit(eth_dev);
 725 }
 726
 727 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 728                                     uint32_t index)
 729 {
 730         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 731         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 732         struct bnxt_vnic_info *vnic;
 733         struct bnxt_filter_info *filter, *temp_filter;
 734         uint32_t i;
 735
 736         /*
 737          * Loop through all VNICs from the specified filter flow pools to
 738          * remove the corresponding MAC addr filter
 739          */
 740         for (i = 0; i < bp->nr_vnics; i++) {
 741                 if (!(pool_mask & (1ULL << i)))
 742                         continue;
 743
 744                 vnic = &bp->vnic_info[i];
 745                 filter = STAILQ_FIRST(&vnic->filter);
 746                 while (filter) {
 747                         temp_filter = STAILQ_NEXT(filter, next);
 748                         if (filter->mac_index == index) {
 749                                 STAILQ_REMOVE(&vnic->filter, filter,
 750                                                 bnxt_filter_info, next);
 751                                 bnxt_hwrm_clear_l2_filter(bp, filter);
 752                                 filter->mac_index = INVALID_MAC_INDEX;
 753                                 memset(&filter->l2_addr, 0, ETHER_ADDR_LEN);
 754                                 STAILQ_INSERT_TAIL(&bp->free_filter_list,
 755                                                    filter, next);
 756                         }
 757                         filter = temp_filter;
 758                 }
 759         }
 760 }
 761
 762 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 763                                 struct rte_ether_addr *mac_addr,
 764                                 uint32_t index, uint32_t pool)
 765 {
 766         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 767         struct bnxt_vnic_info *vnic = &bp->vnic_info[pool];
 768         struct bnxt_filter_info *filter;
 769
 770         if (BNXT_VF(bp) & !BNXT_VF_IS_TRUSTED(bp)) {
 771                 PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
 772                 return -ENOTSUP;
 773         }
 774
 775         if (!vnic) {
 776                 PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
 777                 return -EINVAL;
 778         }
 779         /* Attach requested MAC address to the new l2_filter */
 780         STAILQ_FOREACH(filter, &vnic->filter, next) {
 781                 if (filter->mac_index == index) {
 782                         PMD_DRV_LOG(ERR,
 783                                 "MAC addr already existed for pool %d\n", pool);
 784                         return 0;
 785                 }
 786         }
 787         filter = bnxt_alloc_filter(bp);
 788         if (!filter) {
 789                 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 790                 return -ENODEV;
 791         }
 792         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 793         filter->mac_index = index;
 794         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 795         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 796 }
 797
 798 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 799 {
 800         int rc = 0;
 801         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 802         struct rte_eth_link new;
 803         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 804
 805         memset(&new, 0, sizeof(new));
 806         do {
 807                 /* Retrieve link info from hardware */
 808                 rc = bnxt_get_hwrm_link_config(bp, &new);
 809                 if (rc) {
 810                         new.link_speed = ETH_LINK_SPEED_100M;
 811                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 812                         PMD_DRV_LOG(ERR,
 813                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 814                         goto out;
 815                 }
 816                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 817
 818                 if (!wait_to_complete)
 819                         break;
 820         } while (!new.link_status && cnt--);
 821
 822 out:
 823         /* Timed out or success */
 824         if (new.link_status != eth_dev->data->dev_link.link_status ||
 825         new.link_speed != eth_dev->data->dev_link.link_speed) {
 826                 memcpy(&eth_dev->data->dev_link, &new,
 827                         sizeof(struct rte_eth_link));
 828
 829                 _rte_eth_dev_callback_process(eth_dev,
 830                                               RTE_ETH_EVENT_INTR_LSC,
 831                                               NULL);
 832
 833                 bnxt_print_link_info(eth_dev);
 834         }
 835
 836         return rc;
 837 }
 838
 839 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 840 {
 841         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 842         struct bnxt_vnic_info *vnic;
 843
 844         if (bp->vnic_info == NULL)
 845                 return;
 846
 847         vnic = &bp->vnic_info[0];
 848
 849         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 850         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 851 }
 852
 853 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 854 {
 855         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 856         struct bnxt_vnic_info *vnic;
 857
 858         if (bp->vnic_info == NULL)
 859                 return;
 860
 861         vnic = &bp->vnic_info[0];
 862
 863         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 864         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 865 }
 866
 867 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 868 {
 869         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 870         struct bnxt_vnic_info *vnic;
 871
 872         if (bp->vnic_info == NULL)
 873                 return;
 874
 875         vnic = &bp->vnic_info[0];
 876
 877         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 878         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 879 }
 880
 881 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 882 {
 883         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 884         struct bnxt_vnic_info *vnic;
 885
 886         if (bp->vnic_info == NULL)
 887                 return;
 888
 889         vnic = &bp->vnic_info[0];
 890
 891         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 892         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 893 }
 894
 895 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 896                             struct rte_eth_rss_reta_entry64 *reta_conf,
 897                             uint16_t reta_size)
 898 {
 899         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 900         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 901         struct bnxt_vnic_info *vnic;
 902         int i;
 903
 904         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 905                 return -EINVAL;
 906
 907         if (reta_size != HW_HASH_INDEX_SIZE) {
 908                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 909                         "(%d) must equal the size supported by the hardware "
 910                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 911                 return -EINVAL;
 912         }
 913         /* Update the RSS VNIC(s) */
 914         for (i = 0; i < bp->max_vnics; i++) {
 915                 vnic = &bp->vnic_info[i];
 916                 memcpy(vnic->rss_table, reta_conf, reta_size);
 917                 bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 918         }
 919         return 0;
 920 }
 921
 922 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 923                               struct rte_eth_rss_reta_entry64 *reta_conf,
 924                               uint16_t reta_size)
 925 {
 926         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 927         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 928         struct rte_intr_handle *intr_handle
 929                 = &bp->pdev->intr_handle;
 930
 931         /* Retrieve from the default VNIC */
 932         if (!vnic)
 933                 return -EINVAL;
 934         if (!vnic->rss_table)
 935                 return -EINVAL;
 936
 937         if (reta_size != HW_HASH_INDEX_SIZE) {
 938                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 939                         "(%d) must equal the size supported by the hardware "
 940                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 941                 return -EINVAL;
 942         }
 943         /* EW - need to revisit here copying from uint64_t to uint16_t */
 944         memcpy(reta_conf, vnic->rss_table, reta_size);
 945
 946         if (rte_intr_allow_others(intr_handle)) {
 947                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 948                         bnxt_dev_lsc_intr_setup(eth_dev);
 949         }
 950
 951         return 0;
 952 }
 953
 954 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 955                                    struct rte_eth_rss_conf *rss_conf)
 956 {
 957         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 958         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 959         struct bnxt_vnic_info *vnic;
 960         uint16_t hash_type = 0;
 961         unsigned int i;
 962
 963         /*
 964          * If RSS enablement were different than dev_configure,
 965          * then return -EINVAL
 966          */
 967         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 968                 if (!rss_conf->rss_hf)
 969                         PMD_DRV_LOG(ERR, "Hash type NONE\n");
 970         } else {
 971                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 972                         return -EINVAL;
 973         }
 974
 975         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 976         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 977
 978         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 979                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 980         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 981                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 982         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 983                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 984         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 985                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 986         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 987                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 988         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 989                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 990
 991         /* Update the RSS VNIC(s) */
 992         for (i = 0; i < bp->nr_vnics; i++) {
 993                 vnic = &bp->vnic_info[i];
 994                 vnic->hash_type = hash_type;
 995
 996                 /*
 997                  * Use the supplied key if the key length is
 998                  * acceptable and the rss_key is not NULL
 999                  */
1000                 if (rss_conf->rss_key &&
1001                     rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
1002                         memcpy(vnic->rss_hash_key, rss_conf->rss_key,
1003                                rss_conf->rss_key_len);
1004
1005                 bnxt_hwrm_vnic_rss_cfg(bp, vnic);
1006         }
1007         return 0;
1008 }
1009
1010 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
1011                                      struct rte_eth_rss_conf *rss_conf)
1012 {
1013         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1014         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1015         int len;
1016         uint32_t hash_types;
1017
1018         /* RSS configuration is the same for all VNICs */
1019         if (vnic && vnic->rss_hash_key) {
1020                 if (rss_conf->rss_key) {
1021                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
1022                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
1023                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
1024                 }
1025
1026                 hash_types = vnic->hash_type;
1027                 rss_conf->rss_hf = 0;
1028                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
1029                         rss_conf->rss_hf |= ETH_RSS_IPV4;
1030                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
1031                 }
1032                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
1033                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
1034                         hash_types &=
1035                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
1036                 }
1037                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
1038                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
1039                         hash_types &=
1040                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
1041                 }
1042                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
1043                         rss_conf->rss_hf |= ETH_RSS_IPV6;
1044                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
1045                 }
1046                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
1047                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
1048                         hash_types &=
1049                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
1050                 }
1051                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
1052                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
1053                         hash_types &=
1054                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
1055                 }
1056                 if (hash_types) {
1057                         PMD_DRV_LOG(ERR,
1058                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
1059                                 vnic->hash_type);
1060                         return -ENOTSUP;
1061                 }
1062         } else {
1063                 rss_conf->rss_hf = 0;
1064         }
1065         return 0;
1066 }
1067
1068 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1069                                struct rte_eth_fc_conf *fc_conf)
1070 {
1071         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1072         struct rte_eth_link link_info;
1073         int rc;
1074
1075         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1076         if (rc)
1077                 return rc;
1078
1079         memset(fc_conf, 0, sizeof(*fc_conf));
1080         if (bp->link_info.auto_pause)
1081                 fc_conf->autoneg = 1;
1082         switch (bp->link_info.pause) {
1083         case 0:
1084                 fc_conf->mode = RTE_FC_NONE;
1085                 break;
1086         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1087                 fc_conf->mode = RTE_FC_TX_PAUSE;
1088                 break;
1089         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1090                 fc_conf->mode = RTE_FC_RX_PAUSE;
1091                 break;
1092         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1093                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1094                 fc_conf->mode = RTE_FC_FULL;
1095                 break;
1096         }
1097         return 0;
1098 }
1099
1100 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1101                                struct rte_eth_fc_conf *fc_conf)
1102 {
1103         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1104
1105         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1106                 PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
1107                 return -ENOTSUP;
1108         }
1109
1110         switch (fc_conf->mode) {
1111         case RTE_FC_NONE:
1112                 bp->link_info.auto_pause = 0;
1113                 bp->link_info.force_pause = 0;
1114                 break;
1115         case RTE_FC_RX_PAUSE:
1116                 if (fc_conf->autoneg) {
1117                         bp->link_info.auto_pause =
1118                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1119                         bp->link_info.force_pause = 0;
1120                 } else {
1121                         bp->link_info.auto_pause = 0;
1122                         bp->link_info.force_pause =
1123                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1124                 }
1125                 break;
1126         case RTE_FC_TX_PAUSE:
1127                 if (fc_conf->autoneg) {
1128                         bp->link_info.auto_pause =
1129                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1130                         bp->link_info.force_pause = 0;
1131                 } else {
1132                         bp->link_info.auto_pause = 0;
1133                         bp->link_info.force_pause =
1134                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1135                 }
1136                 break;
1137         case RTE_FC_FULL:
1138                 if (fc_conf->autoneg) {
1139                         bp->link_info.auto_pause =
1140                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1141                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1142                         bp->link_info.force_pause = 0;
1143                 } else {
1144                         bp->link_info.auto_pause = 0;
1145                         bp->link_info.force_pause =
1146                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1147                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1148                 }
1149                 break;
1150         }
1151         return bnxt_set_hwrm_link_config(bp, true);
1152 }
1153
1154 /* Add UDP tunneling port */
1155 static int
1156 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1157                          struct rte_eth_udp_tunnel *udp_tunnel)
1158 {
1159         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1160         uint16_t tunnel_type = 0;
1161         int rc = 0;
1162
1163         switch (udp_tunnel->prot_type) {
1164         case RTE_TUNNEL_TYPE_VXLAN:
1165                 if (bp->vxlan_port_cnt) {
1166                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1167                                 udp_tunnel->udp_port);
1168                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1169                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1170                                 return -ENOSPC;
1171                         }
1172                         bp->vxlan_port_cnt++;
1173                         return 0;
1174                 }
1175                 tunnel_type =
1176                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1177                 bp->vxlan_port_cnt++;
1178                 break;
1179         case RTE_TUNNEL_TYPE_GENEVE:
1180                 if (bp->geneve_port_cnt) {
1181                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1182                                 udp_tunnel->udp_port);
1183                         if (bp->geneve_port != udp_tunnel->udp_port) {
1184                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1185                                 return -ENOSPC;
1186                         }
1187                         bp->geneve_port_cnt++;
1188                         return 0;
1189                 }
1190                 tunnel_type =
1191                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1192                 bp->geneve_port_cnt++;
1193                 break;
1194         default:
1195                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1196                 return -ENOTSUP;
1197         }
1198         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1199                                              tunnel_type);
1200         return rc;
1201 }
1202
1203 static int
1204 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1205                          struct rte_eth_udp_tunnel *udp_tunnel)
1206 {
1207         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1208         uint16_t tunnel_type = 0;
1209         uint16_t port = 0;
1210         int rc = 0;
1211
1212         switch (udp_tunnel->prot_type) {
1213         case RTE_TUNNEL_TYPE_VXLAN:
1214                 if (!bp->vxlan_port_cnt) {
1215                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1216                         return -EINVAL;
1217                 }
1218                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1219                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1220                                 udp_tunnel->udp_port, bp->vxlan_port);
1221                         return -EINVAL;
1222                 }
1223                 if (--bp->vxlan_port_cnt)
1224                         return 0;
1225
1226                 tunnel_type =
1227                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1228                 port = bp->vxlan_fw_dst_port_id;
1229                 break;
1230         case RTE_TUNNEL_TYPE_GENEVE:
1231                 if (!bp->geneve_port_cnt) {
1232                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1233                         return -EINVAL;
1234                 }
1235                 if (bp->geneve_port != udp_tunnel->udp_port) {
1236                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1237                                 udp_tunnel->udp_port, bp->geneve_port);
1238                         return -EINVAL;
1239                 }
1240                 if (--bp->geneve_port_cnt)
1241                         return 0;
1242
1243                 tunnel_type =
1244                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1245                 port = bp->geneve_fw_dst_port_id;
1246                 break;
1247         default:
1248                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1249                 return -ENOTSUP;
1250         }
1251
1252         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1253         if (!rc) {
1254                 if (tunnel_type ==
1255                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1256                         bp->vxlan_port = 0;
1257                 if (tunnel_type ==
1258                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1259                         bp->geneve_port = 0;
1260         }
1261         return rc;
1262 }
1263
1264 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1265 {
1266         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1267         struct bnxt_vnic_info *vnic;
1268         unsigned int i;
1269         int rc = 0;
1270         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1271
1272         /* Cycle through all VNICs */
1273         for (i = 0; i < bp->nr_vnics; i++) {
1274                 /*
1275                  * For each VNIC and each associated filter(s)
1276                  * if VLAN exists && VLAN matches vlan_id
1277                  *      remove the MAC+VLAN filter
1278                  *      add a new MAC only filter
1279                  * else
1280                  *      VLAN filter doesn't exist, just skip and continue
1281                  */
1282                 vnic = &bp->vnic_info[i];
1283                 filter = STAILQ_FIRST(&vnic->filter);
1284                 while (filter) {
1285                         temp_filter = STAILQ_NEXT(filter, next);
1286
1287                         if (filter->enables & chk &&
1288                             filter->l2_ovlan == vlan_id) {
1289                                 /* Must delete the filter */
1290                                 STAILQ_REMOVE(&vnic->filter, filter,
1291                                               bnxt_filter_info, next);
1292                                 bnxt_hwrm_clear_l2_filter(bp, filter);
1293                                 STAILQ_INSERT_TAIL(&bp->free_filter_list,
1294                                                    filter, next);
1295
1296                                 /*
1297                                  * Need to examine to see if the MAC
1298                                  * filter already existed or not before
1299                                  * allocating a new one
1300                                  */
1301
1302                                 new_filter = bnxt_alloc_filter(bp);
1303                                 if (!new_filter) {
1304                                         PMD_DRV_LOG(ERR,
1305                                                         "MAC/VLAN filter alloc failed\n");
1306                                         rc = -ENOMEM;
1307                                         goto exit;
1308                                 }
1309                                 STAILQ_INSERT_TAIL(&vnic->filter,
1310                                                 new_filter, next);
1311                                 /* Inherit MAC from previous filter */
1312                                 new_filter->mac_index =
1313                                         filter->mac_index;
1314                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1315                                        ETHER_ADDR_LEN);
1316                                 /* MAC only filter */
1317                                 rc = bnxt_hwrm_set_l2_filter(bp,
1318                                                              vnic->fw_vnic_id,
1319                                                              new_filter);
1320                                 if (rc)
1321                                         goto exit;
1322                                 PMD_DRV_LOG(INFO,
1323                                             "Del Vlan filter for %d\n",
1324                                             vlan_id);
1325                         }
1326                         filter = temp_filter;
1327                 }
1328         }
1329 exit:
1330         return rc;
1331 }
1332
1333 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1334 {
1335         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1336         struct bnxt_vnic_info *vnic;
1337         unsigned int i;
1338         int rc = 0;
1339         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN |
1340                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK;
1341         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN;
1342
1343         /* Cycle through all VNICs */
1344         for (i = 0; i < bp->nr_vnics; i++) {
1345                 /*
1346                  * For each VNIC and each associated filter(s)
1347                  * if VLAN exists:
1348                  *   if VLAN matches vlan_id
1349                  *      VLAN filter already exists, just skip and continue
1350                  *   else
1351                  *      add a new MAC+VLAN filter
1352                  * else
1353                  *   Remove the old MAC only filter
1354                  *    Add a new MAC+VLAN filter
1355                  */
1356                 vnic = &bp->vnic_info[i];
1357                 filter = STAILQ_FIRST(&vnic->filter);
1358                 while (filter) {
1359                         temp_filter = STAILQ_NEXT(filter, next);
1360
1361                         if (filter->enables & chk) {
1362                                 if (filter->l2_ivlan == vlan_id)
1363                                         goto cont;
1364                         } else {
1365                                 /* Must delete the MAC filter */
1366                                 STAILQ_REMOVE(&vnic->filter, filter,
1367                                                 bnxt_filter_info, next);
1368                                 bnxt_hwrm_clear_l2_filter(bp, filter);
1369                                 filter->l2_ovlan = 0;
1370                                 STAILQ_INSERT_TAIL(&bp->free_filter_list,
1371                                                    filter, next);
1372                         }
1373                         new_filter = bnxt_alloc_filter(bp);
1374                         if (!new_filter) {
1375                                 PMD_DRV_LOG(ERR,
1376                                                 "MAC/VLAN filter alloc failed\n");
1377                                 rc = -ENOMEM;
1378                                 goto exit;
1379                         }
1380                         STAILQ_INSERT_TAIL(&vnic->filter, new_filter, next);
1381                         /* Inherit MAC from the previous filter */
1382                         new_filter->mac_index = filter->mac_index;
1383                         memcpy(new_filter->l2_addr, filter->l2_addr,
1384                                ETHER_ADDR_LEN);
1385                         /* MAC + VLAN ID filter */
1386                         new_filter->l2_ivlan = vlan_id;
1387                         new_filter->l2_ivlan_mask = 0xF000;
1388                         new_filter->enables |= en;
1389                         rc = bnxt_hwrm_set_l2_filter(bp,
1390                                         vnic->fw_vnic_id,
1391                                         new_filter);
1392                         if (rc)
1393                                 goto exit;
1394                         PMD_DRV_LOG(INFO,
1395                                     "Added Vlan filter for %d\n", vlan_id);
1396 cont:
1397                         filter = temp_filter;
1398                 }
1399         }
1400 exit:
1401         return rc;
1402 }
1403
1404 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1405                 uint16_t vlan_id, int on)
1406 {
1407         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1408
1409         /* These operations apply to ALL existing MAC/VLAN filters */
1410         if (on)
1411                 return bnxt_add_vlan_filter(bp, vlan_id);
1412         else
1413                 return bnxt_del_vlan_filter(bp, vlan_id);
1414 }
1415
1416 static int
1417 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1418 {
1419         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1420         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1421         unsigned int i;
1422
1423         if (mask & ETH_VLAN_FILTER_MASK) {
1424                 if (!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
1425                         /* Remove any VLAN filters programmed */
1426                         for (i = 0; i < 4095; i++)
1427                                 bnxt_del_vlan_filter(bp, i);
1428                 }
1429                 PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
1430                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER));
1431         }
1432
1433         if (mask & ETH_VLAN_STRIP_MASK) {
1434                 /* Enable or disable VLAN stripping */
1435                 for (i = 0; i < bp->nr_vnics; i++) {
1436                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1437                         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1438                                 vnic->vlan_strip = true;
1439                         else
1440                                 vnic->vlan_strip = false;
1441                         bnxt_hwrm_vnic_cfg(bp, vnic);
1442                 }
1443                 PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
1444                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP));
1445         }
1446
1447         if (mask & ETH_VLAN_EXTEND_MASK)
1448                 PMD_DRV_LOG(ERR, "Extend VLAN Not supported\n");
1449
1450         return 0;
1451 }
1452
1453 static int
1454 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev,
1455                         struct rte_ether_addr *addr)
1456 {
1457         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1458         /* Default Filter is tied to VNIC 0 */
1459         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1460         struct bnxt_filter_info *filter;
1461         int rc;
1462
1463         if (BNXT_VF(bp) && !BNXT_VF_IS_TRUSTED(bp))
1464                 return -EPERM;
1465
1466         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1467
1468         STAILQ_FOREACH(filter, &vnic->filter, next) {
1469                 /* Default Filter is at Index 0 */
1470                 if (filter->mac_index != 0)
1471                         continue;
1472                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1473                 if (rc)
1474                         return rc;
1475                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1476                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1477                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1478                 filter->enables |=
1479                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1480                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1481                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1482                 if (rc)
1483                         return rc;
1484                 filter->mac_index = 0;
1485                 PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
1486         }
1487
1488         return 0;
1489 }
1490
1491 static int
1492 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1493                           struct rte_ether_addr *mc_addr_set,
1494                           uint32_t nb_mc_addr)
1495 {
1496         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1497         char *mc_addr_list = (char *)mc_addr_set;
1498         struct bnxt_vnic_info *vnic;
1499         uint32_t off = 0, i = 0;
1500
1501         vnic = &bp->vnic_info[0];
1502
1503         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1504                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1505                 goto allmulti;
1506         }
1507
1508         /* TODO Check for Duplicate mcast addresses */
1509         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1510         for (i = 0; i < nb_mc_addr; i++) {
1511                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1512                 off += ETHER_ADDR_LEN;
1513         }
1514
1515         vnic->mc_addr_cnt = i;
1516
1517 allmulti:
1518         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1519 }
1520
1521 static int
1522 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1523 {
1524         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1525         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1526         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1527         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1528         int ret;
1529
1530         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1531                         fw_major, fw_minor, fw_updt);
1532
1533         ret += 1; /* add the size of '\0' */
1534         if (fw_size < (uint32_t)ret)
1535                 return ret;
1536         else
1537                 return 0;
1538 }
1539
1540 static void
1541 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1542         struct rte_eth_rxq_info *qinfo)
1543 {
1544         struct bnxt_rx_queue *rxq;
1545
1546         rxq = dev->data->rx_queues[queue_id];
1547
1548         qinfo->mp = rxq->mb_pool;
1549         qinfo->scattered_rx = dev->data->scattered_rx;
1550         qinfo->nb_desc = rxq->nb_rx_desc;
1551
1552         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1553         qinfo->conf.rx_drop_en = 0;
1554         qinfo->conf.rx_deferred_start = 0;
1555 }
1556
1557 static void
1558 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1559         struct rte_eth_txq_info *qinfo)
1560 {
1561         struct bnxt_tx_queue *txq;
1562
1563         txq = dev->data->tx_queues[queue_id];
1564
1565         qinfo->nb_desc = txq->nb_tx_desc;
1566
1567         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1568         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1569         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1570
1571         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1572         qinfo->conf.tx_rs_thresh = 0;
1573         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1574 }
1575
1576 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1577 {
1578         struct bnxt *bp = eth_dev->data->dev_private;
1579         struct rte_eth_dev_info dev_info;
1580         uint32_t rc = 0;
1581         uint32_t i;
1582
1583         bnxt_dev_info_get_op(eth_dev, &dev_info);
1584
1585         if (new_mtu < ETHER_MIN_MTU || new_mtu > BNXT_MAX_MTU) {
1586                 PMD_DRV_LOG(ERR, "MTU requested must be within (%d, %d)\n",
1587                         ETHER_MIN_MTU, BNXT_MAX_MTU);
1588                 return -EINVAL;
1589         }
1590
1591         if (new_mtu > ETHER_MTU) {
1592                 bp->flags |= BNXT_FLAG_JUMBO;
1593                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
1594                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1595         } else {
1596                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
1597                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1598                 bp->flags &= ~BNXT_FLAG_JUMBO;
1599         }
1600
1601         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1602                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1603
1604         eth_dev->data->mtu = new_mtu;
1605         PMD_DRV_LOG(INFO, "New MTU is %d\n", eth_dev->data->mtu);
1606
1607         for (i = 0; i < bp->nr_vnics; i++) {
1608                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1609                 uint16_t size = 0;
1610
1611                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1612                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1613                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1614                 if (rc)
1615                         break;
1616
1617                 size = rte_pktmbuf_data_room_size(bp->rx_queues[0]->mb_pool);
1618                 size -= RTE_PKTMBUF_HEADROOM;
1619
1620                 if (size < new_mtu) {
1621                         rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1622                         if (rc)
1623                                 return rc;
1624                 }
1625         }
1626
1627         return rc;
1628 }
1629
1630 static int
1631 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1632 {
1633         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1634         uint16_t vlan = bp->vlan;
1635         int rc;
1636
1637         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1638                 PMD_DRV_LOG(ERR,
1639                         "PVID cannot be modified for this function\n");
1640                 return -ENOTSUP;
1641         }
1642         bp->vlan = on ? pvid : 0;
1643
1644         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1645         if (rc)
1646                 bp->vlan = vlan;
1647         return rc;
1648 }
1649
1650 static int
1651 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1652 {
1653         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1654
1655         return bnxt_hwrm_port_led_cfg(bp, true);
1656 }
1657
1658 static int
1659 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1660 {
1661         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1662
1663         return bnxt_hwrm_port_led_cfg(bp, false);
1664 }
1665
1666 static uint32_t
1667 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1668 {
1669         uint32_t desc = 0, raw_cons = 0, cons;
1670         struct bnxt_cp_ring_info *cpr;
1671         struct bnxt_rx_queue *rxq;
1672         struct rx_pkt_cmpl *rxcmp;
1673         uint16_t cmp_type;
1674         uint8_t cmp = 1;
1675         bool valid;
1676
1677         rxq = dev->data->rx_queues[rx_queue_id];
1678         cpr = rxq->cp_ring;
1679         valid = cpr->valid;
1680
1681         while (raw_cons < rxq->nb_rx_desc) {
1682                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1683                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1684
1685                 if (!CMPL_VALID(rxcmp, valid))
1686                         goto nothing_to_do;
1687                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1688                 cmp_type = CMP_TYPE(rxcmp);
1689                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1690                         cmp = (rte_le_to_cpu_32(
1691                                         ((struct rx_tpa_end_cmpl *)
1692                                          (rxcmp))->agg_bufs_v1) &
1693                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1694                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1695                         desc++;
1696                 } else if (cmp_type == 0x11) {
1697                         desc++;
1698                         cmp = (rxcmp->agg_bufs_v1 &
1699                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1700                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1701                 } else {
1702                         cmp = 1;
1703                 }
1704 nothing_to_do:
1705                 raw_cons += cmp ? cmp : 2;
1706         }
1707
1708         return desc;
1709 }
1710
1711 static int
1712 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1713 {
1714         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1715         struct bnxt_rx_ring_info *rxr;
1716         struct bnxt_cp_ring_info *cpr;
1717         struct bnxt_sw_rx_bd *rx_buf;
1718         struct rx_pkt_cmpl *rxcmp;
1719         uint32_t cons, cp_cons;
1720
1721         if (!rxq)
1722                 return -EINVAL;
1723
1724         cpr = rxq->cp_ring;
1725         rxr = rxq->rx_ring;
1726
1727         if (offset >= rxq->nb_rx_desc)
1728                 return -EINVAL;
1729
1730         cons = RING_CMP(cpr->cp_ring_struct, offset);
1731         cp_cons = cpr->cp_raw_cons;
1732         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1733
1734         if (cons > cp_cons) {
1735                 if (CMPL_VALID(rxcmp, cpr->valid))
1736                         return RTE_ETH_RX_DESC_DONE;
1737         } else {
1738                 if (CMPL_VALID(rxcmp, !cpr->valid))
1739                         return RTE_ETH_RX_DESC_DONE;
1740         }
1741         rx_buf = &rxr->rx_buf_ring[cons];
1742         if (rx_buf->mbuf == NULL)
1743                 return RTE_ETH_RX_DESC_UNAVAIL;
1744
1745
1746         return RTE_ETH_RX_DESC_AVAIL;
1747 }
1748
1749 static int
1750 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1751 {
1752         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1753         struct bnxt_tx_ring_info *txr;
1754         struct bnxt_cp_ring_info *cpr;
1755         struct bnxt_sw_tx_bd *tx_buf;
1756         struct tx_pkt_cmpl *txcmp;
1757         uint32_t cons, cp_cons;
1758
1759         if (!txq)
1760                 return -EINVAL;
1761
1762         cpr = txq->cp_ring;
1763         txr = txq->tx_ring;
1764
1765         if (offset >= txq->nb_tx_desc)
1766                 return -EINVAL;
1767
1768         cons = RING_CMP(cpr->cp_ring_struct, offset);
1769         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1770         cp_cons = cpr->cp_raw_cons;
1771
1772         if (cons > cp_cons) {
1773                 if (CMPL_VALID(txcmp, cpr->valid))
1774                         return RTE_ETH_TX_DESC_UNAVAIL;
1775         } else {
1776                 if (CMPL_VALID(txcmp, !cpr->valid))
1777                         return RTE_ETH_TX_DESC_UNAVAIL;
1778         }
1779         tx_buf = &txr->tx_buf_ring[cons];
1780         if (tx_buf->mbuf == NULL)
1781                 return RTE_ETH_TX_DESC_DONE;
1782
1783         return RTE_ETH_TX_DESC_FULL;
1784 }
1785
1786 static struct bnxt_filter_info *
1787 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1788                                 struct rte_eth_ethertype_filter *efilter,
1789                                 struct bnxt_vnic_info *vnic0,
1790                                 struct bnxt_vnic_info *vnic,
1791                                 int *ret)
1792 {
1793         struct bnxt_filter_info *mfilter = NULL;
1794         int match = 0;
1795         *ret = 0;
1796
1797         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1798                 efilter->ether_type == ETHER_TYPE_IPv6) {
1799                 PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
1800                         " ethertype filter.", efilter->ether_type);
1801                 *ret = -EINVAL;
1802                 goto exit;
1803         }
1804         if (efilter->queue >= bp->rx_nr_rings) {
1805                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1806                 *ret = -EINVAL;
1807                 goto exit;
1808         }
1809
1810         vnic0 = &bp->vnic_info[0];
1811         vnic = &bp->vnic_info[efilter->queue];
1812         if (vnic == NULL) {
1813                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1814                 *ret = -EINVAL;
1815                 goto exit;
1816         }
1817
1818         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1819                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1820                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1821                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1822                              mfilter->flags ==
1823                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1824                              mfilter->ethertype == efilter->ether_type)) {
1825                                 match = 1;
1826                                 break;
1827                         }
1828                 }
1829         } else {
1830                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1831                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1832                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1833                              mfilter->ethertype == efilter->ether_type &&
1834                              mfilter->flags ==
1835                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1836                                 match = 1;
1837                                 break;
1838                         }
1839         }
1840
1841         if (match)
1842                 *ret = -EEXIST;
1843
1844 exit:
1845         return mfilter;
1846 }
1847
1848 static int
1849 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1850                         enum rte_filter_op filter_op,
1851                         void *arg)
1852 {
1853         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1854         struct rte_eth_ethertype_filter *efilter =
1855                         (struct rte_eth_ethertype_filter *)arg;
1856         struct bnxt_filter_info *bfilter, *filter1;
1857         struct bnxt_vnic_info *vnic, *vnic0;
1858         int ret;
1859
1860         if (filter_op == RTE_ETH_FILTER_NOP)
1861                 return 0;
1862
1863         if (arg == NULL) {
1864                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
1865                             filter_op);
1866                 return -EINVAL;
1867         }
1868
1869         vnic0 = &bp->vnic_info[0];
1870         vnic = &bp->vnic_info[efilter->queue];
1871
1872         switch (filter_op) {
1873         case RTE_ETH_FILTER_ADD:
1874                 bnxt_match_and_validate_ether_filter(bp, efilter,
1875                                                         vnic0, vnic, &ret);
1876                 if (ret < 0)
1877                         return ret;
1878
1879                 bfilter = bnxt_get_unused_filter(bp);
1880                 if (bfilter == NULL) {
1881                         PMD_DRV_LOG(ERR,
1882                                 "Not enough resources for a new filter.\n");
1883                         return -ENOMEM;
1884                 }
1885                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1886                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1887                        ETHER_ADDR_LEN);
1888                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1889                        ETHER_ADDR_LEN);
1890                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1891                 bfilter->ethertype = efilter->ether_type;
1892                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1893
1894                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1895                 if (filter1 == NULL) {
1896                         ret = -1;
1897                         goto cleanup;
1898                 }
1899                 bfilter->enables |=
1900                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1901                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1902
1903                 bfilter->dst_id = vnic->fw_vnic_id;
1904
1905                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1906                         bfilter->flags =
1907                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1908                 }
1909
1910                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1911                 if (ret)
1912                         goto cleanup;
1913                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1914                 break;
1915         case RTE_ETH_FILTER_DELETE:
1916                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1917                                                         vnic0, vnic, &ret);
1918                 if (ret == -EEXIST) {
1919                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1920
1921                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1922                                       next);
1923                         bnxt_free_filter(bp, filter1);
1924                 } else if (ret == 0) {
1925                         PMD_DRV_LOG(ERR, "No matching filter found\n");
1926                 }
1927                 break;
1928         default:
1929                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
1930                 ret = -EINVAL;
1931                 goto error;
1932         }
1933         return ret;
1934 cleanup:
1935         bnxt_free_filter(bp, bfilter);
1936 error:
1937         return ret;
1938 }
1939
1940 static inline int
1941 parse_ntuple_filter(struct bnxt *bp,
1942                     struct rte_eth_ntuple_filter *nfilter,
1943                     struct bnxt_filter_info *bfilter)
1944 {
1945         uint32_t en = 0;
1946
1947         if (nfilter->queue >= bp->rx_nr_rings) {
1948                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
1949                 return -EINVAL;
1950         }
1951
1952         switch (nfilter->dst_port_mask) {
1953         case UINT16_MAX:
1954                 bfilter->dst_port_mask = -1;
1955                 bfilter->dst_port = nfilter->dst_port;
1956                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1957                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1958                 break;
1959         default:
1960                 PMD_DRV_LOG(ERR, "invalid dst_port mask.");
1961                 return -EINVAL;
1962         }
1963
1964         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1965         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1966
1967         switch (nfilter->proto_mask) {
1968         case UINT8_MAX:
1969                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1970                         bfilter->ip_protocol = 17;
1971                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1972                         bfilter->ip_protocol = 6;
1973                 else
1974                         return -EINVAL;
1975                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1976                 break;
1977         default:
1978                 PMD_DRV_LOG(ERR, "invalid protocol mask.");
1979                 return -EINVAL;
1980         }
1981
1982         switch (nfilter->dst_ip_mask) {
1983         case UINT32_MAX:
1984                 bfilter->dst_ipaddr_mask[0] = -1;
1985                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1986                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1987                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1988                 break;
1989         default:
1990                 PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
1991                 return -EINVAL;
1992         }
1993
1994         switch (nfilter->src_ip_mask) {
1995         case UINT32_MAX:
1996                 bfilter->src_ipaddr_mask[0] = -1;
1997                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1998                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1999                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2000                 break;
2001         default:
2002                 PMD_DRV_LOG(ERR, "invalid src_ip mask.");
2003                 return -EINVAL;
2004         }
2005
2006         switch (nfilter->src_port_mask) {
2007         case UINT16_MAX:
2008                 bfilter->src_port_mask = -1;
2009                 bfilter->src_port = nfilter->src_port;
2010                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
2011                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2012                 break;
2013         default:
2014                 PMD_DRV_LOG(ERR, "invalid src_port mask.");
2015                 return -EINVAL;
2016         }
2017
2018         //TODO Priority
2019         //nfilter->priority = (uint8_t)filter->priority;
2020
2021         bfilter->enables = en;
2022         return 0;
2023 }
2024
2025 static struct bnxt_filter_info*
2026 bnxt_match_ntuple_filter(struct bnxt *bp,
2027                          struct bnxt_filter_info *bfilter,
2028                          struct bnxt_vnic_info **mvnic)
2029 {
2030         struct bnxt_filter_info *mfilter = NULL;
2031         int i;
2032
2033         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2034                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2035                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
2036                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
2037                             bfilter->src_ipaddr_mask[0] ==
2038                             mfilter->src_ipaddr_mask[0] &&
2039                             bfilter->src_port == mfilter->src_port &&
2040                             bfilter->src_port_mask == mfilter->src_port_mask &&
2041                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
2042                             bfilter->dst_ipaddr_mask[0] ==
2043                             mfilter->dst_ipaddr_mask[0] &&
2044                             bfilter->dst_port == mfilter->dst_port &&
2045                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
2046                             bfilter->flags == mfilter->flags &&
2047                             bfilter->enables == mfilter->enables) {
2048                                 if (mvnic)
2049                                         *mvnic = vnic;
2050                                 return mfilter;
2051                         }
2052                 }
2053         }
2054         return NULL;
2055 }
2056
2057 static int
2058 bnxt_cfg_ntuple_filter(struct bnxt *bp,
2059                        struct rte_eth_ntuple_filter *nfilter,
2060                        enum rte_filter_op filter_op)
2061 {
2062         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
2063         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2064         int ret;
2065
2066         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2067                 PMD_DRV_LOG(ERR, "only 5tuple is supported.");
2068                 return -EINVAL;
2069         }
2070
2071         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2072                 PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
2073                 return -EINVAL;
2074         }
2075
2076         bfilter = bnxt_get_unused_filter(bp);
2077         if (bfilter == NULL) {
2078                 PMD_DRV_LOG(ERR,
2079                         "Not enough resources for a new filter.\n");
2080                 return -ENOMEM;
2081         }
2082         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2083         if (ret < 0)
2084                 goto free_filter;
2085
2086         vnic = &bp->vnic_info[nfilter->queue];
2087         vnic0 = &bp->vnic_info[0];
2088         filter1 = STAILQ_FIRST(&vnic0->filter);
2089         if (filter1 == NULL) {
2090                 ret = -1;
2091                 goto free_filter;
2092         }
2093
2094         bfilter->dst_id = vnic->fw_vnic_id;
2095         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2096         bfilter->enables |=
2097                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2098         bfilter->ethertype = 0x800;
2099         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2100
2101         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2102
2103         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2104             bfilter->dst_id == mfilter->dst_id) {
2105                 PMD_DRV_LOG(ERR, "filter exists.\n");
2106                 ret = -EEXIST;
2107                 goto free_filter;
2108         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2109                    bfilter->dst_id != mfilter->dst_id) {
2110                 mfilter->dst_id = vnic->fw_vnic_id;
2111                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2112                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2113                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2114                 PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
2115                 PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
2116                 goto free_filter;
2117         }
2118         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2119                 PMD_DRV_LOG(ERR, "filter doesn't exist.");
2120                 ret = -ENOENT;
2121                 goto free_filter;
2122         }
2123
2124         if (filter_op == RTE_ETH_FILTER_ADD) {
2125                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2126                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2127                 if (ret)
2128                         goto free_filter;
2129                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2130         } else {
2131                 if (mfilter == NULL) {
2132                         /* This should not happen. But for Coverity! */
2133                         ret = -ENOENT;
2134                         goto free_filter;
2135                 }
2136                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2137
2138                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2139                 bnxt_free_filter(bp, mfilter);
2140                 mfilter->fw_l2_filter_id = -1;
2141                 bnxt_free_filter(bp, bfilter);
2142                 bfilter->fw_l2_filter_id = -1;
2143         }
2144
2145         return 0;
2146 free_filter:
2147         bfilter->fw_l2_filter_id = -1;
2148         bnxt_free_filter(bp, bfilter);
2149         return ret;
2150 }
2151
2152 static int
2153 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2154                         enum rte_filter_op filter_op,
2155                         void *arg)
2156 {
2157         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2158         int ret;
2159
2160         if (filter_op == RTE_ETH_FILTER_NOP)
2161                 return 0;
2162
2163         if (arg == NULL) {
2164                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
2165                             filter_op);
2166                 return -EINVAL;
2167         }
2168
2169         switch (filter_op) {
2170         case RTE_ETH_FILTER_ADD:
2171                 ret = bnxt_cfg_ntuple_filter(bp,
2172                         (struct rte_eth_ntuple_filter *)arg,
2173                         filter_op);
2174                 break;
2175         case RTE_ETH_FILTER_DELETE:
2176                 ret = bnxt_cfg_ntuple_filter(bp,
2177                         (struct rte_eth_ntuple_filter *)arg,
2178                         filter_op);
2179                 break;
2180         default:
2181                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
2182                 ret = -EINVAL;
2183                 break;
2184         }
2185         return ret;
2186 }
2187
2188 static int
2189 bnxt_parse_fdir_filter(struct bnxt *bp,
2190                        struct rte_eth_fdir_filter *fdir,
2191                        struct bnxt_filter_info *filter)
2192 {
2193         enum rte_fdir_mode fdir_mode =
2194                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2195         struct bnxt_vnic_info *vnic0, *vnic;
2196         struct bnxt_filter_info *filter1;
2197         uint32_t en = 0;
2198         int i;
2199
2200         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2201                 return -EINVAL;
2202
2203         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2204         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2205
2206         switch (fdir->input.flow_type) {
2207         case RTE_ETH_FLOW_IPV4:
2208         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2209                 /* FALLTHROUGH */
2210                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2211                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2212                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2213                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2214                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2215                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2216                 filter->ip_addr_type =
2217                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2218                 filter->src_ipaddr_mask[0] = 0xffffffff;
2219                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2220                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2221                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2222                 filter->ethertype = 0x800;
2223                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2224                 break;
2225         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2226                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2227                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2228                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2229                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2230                 filter->dst_port_mask = 0xffff;
2231                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2232                 filter->src_port_mask = 0xffff;
2233                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2234                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2235                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2236                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2237                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2238                 filter->ip_protocol = 6;
2239                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2240                 filter->ip_addr_type =
2241                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2242                 filter->src_ipaddr_mask[0] = 0xffffffff;
2243                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2244                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2245                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2246                 filter->ethertype = 0x800;
2247                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2248                 break;
2249         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2250                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2251                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2252                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2253                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2254                 filter->dst_port_mask = 0xffff;
2255                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2256                 filter->src_port_mask = 0xffff;
2257                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2258                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2259                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2260                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2261                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2262                 filter->ip_protocol = 17;
2263                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2264                 filter->ip_addr_type =
2265                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2266                 filter->src_ipaddr_mask[0] = 0xffffffff;
2267                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2268                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2269                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2270                 filter->ethertype = 0x800;
2271                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2272                 break;
2273         case RTE_ETH_FLOW_IPV6:
2274         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2275                 /* FALLTHROUGH */
2276                 filter->ip_addr_type =
2277                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2278                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2279                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2280                 rte_memcpy(filter->src_ipaddr,
2281                            fdir->input.flow.ipv6_flow.src_ip, 16);
2282                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2283                 rte_memcpy(filter->dst_ipaddr,
2284                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2285                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2286                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2287                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2288                 memset(filter->src_ipaddr_mask, 0xff, 16);
2289                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2290                 filter->ethertype = 0x86dd;
2291                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2292                 break;
2293         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2294                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2295                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2296                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2297                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2298                 filter->dst_port_mask = 0xffff;
2299                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2300                 filter->src_port_mask = 0xffff;
2301                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2302                 filter->ip_addr_type =
2303                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2304                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2305                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2306                 rte_memcpy(filter->src_ipaddr,
2307                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2308                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2309                 rte_memcpy(filter->dst_ipaddr,
2310                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2311                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2312                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2313                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2314                 memset(filter->src_ipaddr_mask, 0xff, 16);
2315                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2316                 filter->ethertype = 0x86dd;
2317                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2318                 break;
2319         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2320                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2321                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2322                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2323                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2324                 filter->dst_port_mask = 0xffff;
2325                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2326                 filter->src_port_mask = 0xffff;
2327                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2328                 filter->ip_addr_type =
2329                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2330                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2331                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2332                 rte_memcpy(filter->src_ipaddr,
2333                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2334                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2335                 rte_memcpy(filter->dst_ipaddr,
2336                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2337                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2338                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2339                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2340                 memset(filter->src_ipaddr_mask, 0xff, 16);
2341                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2342                 filter->ethertype = 0x86dd;
2343                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2344                 break;
2345         case RTE_ETH_FLOW_L2_PAYLOAD:
2346                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2347                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2348                 break;
2349         case RTE_ETH_FLOW_VXLAN:
2350                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2351                         return -EINVAL;
2352                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2353                 filter->tunnel_type =
2354                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2355                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2356                 break;
2357         case RTE_ETH_FLOW_NVGRE:
2358                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2359                         return -EINVAL;
2360                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2361                 filter->tunnel_type =
2362                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2363                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2364                 break;
2365         case RTE_ETH_FLOW_UNKNOWN:
2366         case RTE_ETH_FLOW_RAW:
2367         case RTE_ETH_FLOW_FRAG_IPV4:
2368         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2369         case RTE_ETH_FLOW_FRAG_IPV6:
2370         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2371         case RTE_ETH_FLOW_IPV6_EX:
2372         case RTE_ETH_FLOW_IPV6_TCP_EX:
2373         case RTE_ETH_FLOW_IPV6_UDP_EX:
2374         case RTE_ETH_FLOW_GENEVE:
2375                 /* FALLTHROUGH */
2376         default:
2377                 return -EINVAL;
2378         }
2379
2380         vnic0 = &bp->vnic_info[0];
2381         vnic = &bp->vnic_info[fdir->action.rx_queue];
2382         if (vnic == NULL) {
2383                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", fdir->action.rx_queue);
2384                 return -EINVAL;
2385         }
2386
2387
2388         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2389                 rte_memcpy(filter->dst_macaddr,
2390                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2391                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2392         }
2393
2394         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2395                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2396                 filter1 = STAILQ_FIRST(&vnic0->filter);
2397                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2398         } else {
2399                 filter->dst_id = vnic->fw_vnic_id;
2400                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2401                         if (filter->dst_macaddr[i] == 0x00)
2402                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2403                         else
2404                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2405         }
2406
2407         if (filter1 == NULL)
2408                 return -EINVAL;
2409
2410         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2411         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2412
2413         filter->enables = en;
2414
2415         return 0;
2416 }
2417
2418 static struct bnxt_filter_info *
2419 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf,
2420                 struct bnxt_vnic_info **mvnic)
2421 {
2422         struct bnxt_filter_info *mf = NULL;
2423         int i;
2424
2425         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2426                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2427
2428                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2429                         if (mf->filter_type == nf->filter_type &&
2430                             mf->flags == nf->flags &&
2431                             mf->src_port == nf->src_port &&
2432                             mf->src_port_mask == nf->src_port_mask &&
2433                             mf->dst_port == nf->dst_port &&
2434                             mf->dst_port_mask == nf->dst_port_mask &&
2435                             mf->ip_protocol == nf->ip_protocol &&
2436                             mf->ip_addr_type == nf->ip_addr_type &&
2437                             mf->ethertype == nf->ethertype &&
2438                             mf->vni == nf->vni &&
2439                             mf->tunnel_type == nf->tunnel_type &&
2440                             mf->l2_ovlan == nf->l2_ovlan &&
2441                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2442                             mf->l2_ivlan == nf->l2_ivlan &&
2443                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2444                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2445                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2446                                     ETHER_ADDR_LEN) &&
2447                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2448                                     ETHER_ADDR_LEN) &&
2449                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2450                                     ETHER_ADDR_LEN) &&
2451                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2452                                     sizeof(nf->src_ipaddr)) &&
2453                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2454                                     sizeof(nf->src_ipaddr_mask)) &&
2455                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2456                                     sizeof(nf->dst_ipaddr)) &&
2457                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2458                                     sizeof(nf->dst_ipaddr_mask))) {
2459                                 if (mvnic)
2460                                         *mvnic = vnic;
2461                                 return mf;
2462                         }
2463                 }
2464         }
2465         return NULL;
2466 }
2467
2468 static int
2469 bnxt_fdir_filter(struct rte_eth_dev *dev,
2470                  enum rte_filter_op filter_op,
2471                  void *arg)
2472 {
2473         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2474         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2475         struct bnxt_filter_info *filter, *match;
2476         struct bnxt_vnic_info *vnic, *mvnic;
2477         int ret = 0, i;
2478
2479         if (filter_op == RTE_ETH_FILTER_NOP)
2480                 return 0;
2481
2482         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2483                 return -EINVAL;
2484
2485         switch (filter_op) {
2486         case RTE_ETH_FILTER_ADD:
2487         case RTE_ETH_FILTER_DELETE:
2488                 /* FALLTHROUGH */
2489                 filter = bnxt_get_unused_filter(bp);
2490                 if (filter == NULL) {
2491                         PMD_DRV_LOG(ERR,
2492                                 "Not enough resources for a new flow.\n");
2493                         return -ENOMEM;
2494                 }
2495
2496                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2497                 if (ret != 0)
2498                         goto free_filter;
2499                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2500
2501                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2502                         vnic = &bp->vnic_info[0];
2503                 else
2504                         vnic = &bp->vnic_info[fdir->action.rx_queue];
2505
2506                 match = bnxt_match_fdir(bp, filter, &mvnic);
2507                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2508                         if (match->dst_id == vnic->fw_vnic_id) {
2509                                 PMD_DRV_LOG(ERR, "Flow already exists.\n");
2510                                 ret = -EEXIST;
2511                                 goto free_filter;
2512                         } else {
2513                                 match->dst_id = vnic->fw_vnic_id;
2514                                 ret = bnxt_hwrm_set_ntuple_filter(bp,
2515                                                                   match->dst_id,
2516                                                                   match);
2517                                 STAILQ_REMOVE(&mvnic->filter, match,
2518                                               bnxt_filter_info, next);
2519                                 STAILQ_INSERT_TAIL(&vnic->filter, match, next);
2520                                 PMD_DRV_LOG(ERR,
2521                                         "Filter with matching pattern exist\n");
2522                                 PMD_DRV_LOG(ERR,
2523                                         "Updated it to new destination q\n");
2524                                 goto free_filter;
2525                         }
2526                 }
2527                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2528                         PMD_DRV_LOG(ERR, "Flow does not exist.\n");
2529                         ret = -ENOENT;
2530                         goto free_filter;
2531                 }
2532
2533                 if (filter_op == RTE_ETH_FILTER_ADD) {
2534                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2535                                                           filter->dst_id,
2536                                                           filter);
2537                         if (ret)
2538                                 goto free_filter;
2539                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2540                 } else {
2541                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2542                         STAILQ_REMOVE(&vnic->filter, match,
2543                                       bnxt_filter_info, next);
2544                         bnxt_free_filter(bp, match);
2545                         filter->fw_l2_filter_id = -1;
2546                         bnxt_free_filter(bp, filter);
2547                 }
2548                 break;
2549         case RTE_ETH_FILTER_FLUSH:
2550                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2551                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2552
2553                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2554                                 if (filter->filter_type ==
2555                                     HWRM_CFA_NTUPLE_FILTER) {
2556                                         ret =
2557                                         bnxt_hwrm_clear_ntuple_filter(bp,
2558                                                                       filter);
2559                                         STAILQ_REMOVE(&vnic->filter, filter,
2560                                                       bnxt_filter_info, next);
2561                                 }
2562                         }
2563                 }
2564                 return ret;
2565         case RTE_ETH_FILTER_UPDATE:
2566         case RTE_ETH_FILTER_STATS:
2567         case RTE_ETH_FILTER_INFO:
2568                 PMD_DRV_LOG(ERR, "operation %u not implemented", filter_op);
2569                 break;
2570         default:
2571                 PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
2572                 ret = -EINVAL;
2573                 break;
2574         }
2575         return ret;
2576
2577 free_filter:
2578         filter->fw_l2_filter_id = -1;
2579         bnxt_free_filter(bp, filter);
2580         return ret;
2581 }
2582
2583 static int
2584 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2585                     enum rte_filter_type filter_type,
2586                     enum rte_filter_op filter_op, void *arg)
2587 {
2588         int ret = 0;
2589
2590         switch (filter_type) {
2591         case RTE_ETH_FILTER_TUNNEL:
2592                 PMD_DRV_LOG(ERR,
2593                         "filter type: %d: To be implemented\n", filter_type);
2594                 break;
2595         case RTE_ETH_FILTER_FDIR:
2596                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2597                 break;
2598         case RTE_ETH_FILTER_NTUPLE:
2599                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2600                 break;
2601         case RTE_ETH_FILTER_ETHERTYPE:
2602                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2603                 break;
2604         case RTE_ETH_FILTER_GENERIC:
2605                 if (filter_op != RTE_ETH_FILTER_GET)
2606                         return -EINVAL;
2607                 *(const void **)arg = &bnxt_flow_ops;
2608                 break;
2609         default:
2610                 PMD_DRV_LOG(ERR,
2611                         "Filter type (%d) not supported", filter_type);
2612                 ret = -EINVAL;
2613                 break;
2614         }
2615         return ret;
2616 }
2617
2618 static const uint32_t *
2619 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2620 {
2621         static const uint32_t ptypes[] = {
2622                 RTE_PTYPE_L2_ETHER_VLAN,
2623                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2624                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2625                 RTE_PTYPE_L4_ICMP,
2626                 RTE_PTYPE_L4_TCP,
2627                 RTE_PTYPE_L4_UDP,
2628                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2629                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2630                 RTE_PTYPE_INNER_L4_ICMP,
2631                 RTE_PTYPE_INNER_L4_TCP,
2632                 RTE_PTYPE_INNER_L4_UDP,
2633                 RTE_PTYPE_UNKNOWN
2634         };
2635
2636         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2637                 return ptypes;
2638         return NULL;
2639 }
2640
2641 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2642                          int reg_win)
2643 {
2644         uint32_t reg_base = *reg_arr & 0xfffff000;
2645         uint32_t win_off;
2646         int i;
2647
2648         for (i = 0; i < count; i++) {
2649                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2650                         return -ERANGE;
2651         }
2652         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2653         rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off);
2654         return 0;
2655 }
2656
2657 static int bnxt_map_ptp_regs(struct bnxt *bp)
2658 {
2659         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2660         uint32_t *reg_arr;
2661         int rc, i;
2662
2663         reg_arr = ptp->rx_regs;
2664         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2665         if (rc)
2666                 return rc;
2667
2668         reg_arr = ptp->tx_regs;
2669         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2670         if (rc)
2671                 return rc;
2672
2673         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2674                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2675
2676         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2677                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2678
2679         return 0;
2680 }
2681
2682 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2683 {
2684         rte_write32(0, (uint8_t *)bp->bar0 +
2685                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16);
2686         rte_write32(0, (uint8_t *)bp->bar0 +
2687                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20);
2688 }
2689
2690 static uint64_t bnxt_cc_read(struct bnxt *bp)
2691 {
2692         uint64_t ns;
2693
2694         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2695                               BNXT_GRCPF_REG_SYNC_TIME));
2696         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2697                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2698         return ns;
2699 }
2700
2701 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2702 {
2703         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2704         uint32_t fifo;
2705
2706         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2707                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2708         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2709                 return -EAGAIN;
2710
2711         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2712                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2713         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2714                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2715         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2716                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2717
2718         return 0;
2719 }
2720
2721 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2722 {
2723         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2724         struct bnxt_pf_info *pf = &bp->pf;
2725         uint16_t port_id;
2726         uint32_t fifo;
2727
2728         if (!ptp)
2729                 return -ENODEV;
2730
2731         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2732                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2733         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2734                 return -EAGAIN;
2735
2736         port_id = pf->port_id;
2737         rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2738                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]);
2739
2740         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2741                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2742         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2743 /*              bnxt_clr_rx_ts(bp);       TBD  */
2744                 return -EBUSY;
2745         }
2746
2747         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2748                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2749         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2750                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2751
2752         return 0;
2753 }
2754
2755 static int
2756 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2757 {
2758         uint64_t ns;
2759         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2760         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2761
2762         if (!ptp)
2763                 return 0;
2764
2765         ns = rte_timespec_to_ns(ts);
2766         /* Set the timecounters to a new value. */
2767         ptp->tc.nsec = ns;
2768
2769         return 0;
2770 }
2771
2772 static int
2773 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2774 {
2775         uint64_t ns, systime_cycles;
2776         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2777         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2778
2779         if (!ptp)
2780                 return 0;
2781
2782         systime_cycles = bnxt_cc_read(bp);
2783         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2784         *ts = rte_ns_to_timespec(ns);
2785
2786         return 0;
2787 }
2788 static int
2789 bnxt_timesync_enable(struct rte_eth_dev *dev)
2790 {
2791         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2792         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2793         uint32_t shift = 0;
2794
2795         if (!ptp)
2796                 return 0;
2797
2798         ptp->rx_filter = 1;
2799         ptp->tx_tstamp_en = 1;
2800         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2801
2802         if (!bnxt_hwrm_ptp_cfg(bp))
2803                 bnxt_map_ptp_regs(bp);
2804
2805         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2806         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2807         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2808
2809         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2810         ptp->tc.cc_shift = shift;
2811         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2812
2813         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2814         ptp->rx_tstamp_tc.cc_shift = shift;
2815         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2816
2817         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2818         ptp->tx_tstamp_tc.cc_shift = shift;
2819         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2820
2821         return 0;
2822 }
2823
2824 static int
2825 bnxt_timesync_disable(struct rte_eth_dev *dev)
2826 {
2827         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2828         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2829
2830         if (!ptp)
2831                 return 0;
2832
2833         ptp->rx_filter = 0;
2834         ptp->tx_tstamp_en = 0;
2835         ptp->rxctl = 0;
2836
2837         bnxt_hwrm_ptp_cfg(bp);
2838
2839         bnxt_unmap_ptp_regs(bp);
2840
2841         return 0;
2842 }
2843
2844 static int
2845 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2846                                  struct timespec *timestamp,
2847                                  uint32_t flags __rte_unused)
2848 {
2849         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2850         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2851         uint64_t rx_tstamp_cycles = 0;
2852         uint64_t ns;
2853
2854         if (!ptp)
2855                 return 0;
2856
2857         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2858         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2859         *timestamp = rte_ns_to_timespec(ns);
2860         return  0;
2861 }
2862
2863 static int
2864 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2865                                  struct timespec *timestamp)
2866 {
2867         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2868         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2869         uint64_t tx_tstamp_cycles = 0;
2870         uint64_t ns;
2871
2872         if (!ptp)
2873                 return 0;
2874
2875         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2876         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2877         *timestamp = rte_ns_to_timespec(ns);
2878
2879         return 0;
2880 }
2881
2882 static int
2883 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2884 {
2885         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2886         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2887
2888         if (!ptp)
2889                 return 0;
2890
2891         ptp->tc.nsec += delta;
2892
2893         return 0;
2894 }
2895
2896 static int
2897 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2898 {
2899         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2900         int rc;
2901         uint32_t dir_entries;
2902         uint32_t entry_length;
2903
2904         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x\n",
2905                 bp->pdev->addr.domain, bp->pdev->addr.bus,
2906                 bp->pdev->addr.devid, bp->pdev->addr.function);
2907
2908         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2909         if (rc != 0)
2910                 return rc;
2911
2912         return dir_entries * entry_length;
2913 }
2914
2915 static int
2916 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2917                 struct rte_dev_eeprom_info *in_eeprom)
2918 {
2919         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2920         uint32_t index;
2921         uint32_t offset;
2922
2923         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2924                 "len = %d\n", bp->pdev->addr.domain,
2925                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2926                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2927
2928         if (in_eeprom->offset == 0) /* special offset value to get directory */
2929                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2930                                                 in_eeprom->data);
2931
2932         index = in_eeprom->offset >> 24;
2933         offset = in_eeprom->offset & 0xffffff;
2934
2935         if (index != 0)
2936                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2937                                            in_eeprom->length, in_eeprom->data);
2938
2939         return 0;
2940 }
2941
2942 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2943 {
2944         switch (dir_type) {
2945         case BNX_DIR_TYPE_CHIMP_PATCH:
2946         case BNX_DIR_TYPE_BOOTCODE:
2947         case BNX_DIR_TYPE_BOOTCODE_2:
2948         case BNX_DIR_TYPE_APE_FW:
2949         case BNX_DIR_TYPE_APE_PATCH:
2950         case BNX_DIR_TYPE_KONG_FW:
2951         case BNX_DIR_TYPE_KONG_PATCH:
2952         case BNX_DIR_TYPE_BONO_FW:
2953         case BNX_DIR_TYPE_BONO_PATCH:
2954                 /* FALLTHROUGH */
2955                 return true;
2956         }
2957
2958         return false;
2959 }
2960
2961 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2962 {
2963         switch (dir_type) {
2964         case BNX_DIR_TYPE_AVS:
2965         case BNX_DIR_TYPE_EXP_ROM_MBA:
2966         case BNX_DIR_TYPE_PCIE:
2967         case BNX_DIR_TYPE_TSCF_UCODE:
2968         case BNX_DIR_TYPE_EXT_PHY:
2969         case BNX_DIR_TYPE_CCM:
2970         case BNX_DIR_TYPE_ISCSI_BOOT:
2971         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2972         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2973                 /* FALLTHROUGH */
2974                 return true;
2975         }
2976
2977         return false;
2978 }
2979
2980 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2981 {
2982         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2983                 bnxt_dir_type_is_other_exec_format(dir_type);
2984 }
2985
2986 static int
2987 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2988                 struct rte_dev_eeprom_info *in_eeprom)
2989 {
2990         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2991         uint8_t index, dir_op;
2992         uint16_t type, ext, ordinal, attr;
2993
2994         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2995                 "len = %d\n", bp->pdev->addr.domain,
2996                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2997                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2998
2999         if (!BNXT_PF(bp)) {
3000                 PMD_DRV_LOG(ERR, "NVM write not supported from a VF\n");
3001                 return -EINVAL;
3002         }
3003
3004         type = in_eeprom->magic >> 16;
3005
3006         if (type == 0xffff) { /* special value for directory operations */
3007                 index = in_eeprom->magic & 0xff;
3008                 dir_op = in_eeprom->magic >> 8;
3009                 if (index == 0)
3010                         return -EINVAL;
3011                 switch (dir_op) {
3012                 case 0x0e: /* erase */
3013                         if (in_eeprom->offset != ~in_eeprom->magic)
3014                                 return -EINVAL;
3015                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
3016                 default:
3017                         return -EINVAL;
3018                 }
3019         }
3020
3021         /* Create or re-write an NVM item: */
3022         if (bnxt_dir_type_is_executable(type) == true)
3023                 return -EOPNOTSUPP;
3024         ext = in_eeprom->magic & 0xffff;
3025         ordinal = in_eeprom->offset >> 16;
3026         attr = in_eeprom->offset & 0xffff;
3027
3028         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
3029                                      in_eeprom->data, in_eeprom->length);
3030         return 0;
3031 }
3032
3033 /*
3034  * Initialization
3035  */
3036
3037 static const struct eth_dev_ops bnxt_dev_ops = {
3038         .dev_infos_get = bnxt_dev_info_get_op,
3039         .dev_close = bnxt_dev_close_op,
3040         .dev_configure = bnxt_dev_configure_op,
3041         .dev_start = bnxt_dev_start_op,
3042         .dev_stop = bnxt_dev_stop_op,
3043         .dev_set_link_up = bnxt_dev_set_link_up_op,
3044         .dev_set_link_down = bnxt_dev_set_link_down_op,
3045         .stats_get = bnxt_stats_get_op,
3046         .stats_reset = bnxt_stats_reset_op,
3047         .rx_queue_setup = bnxt_rx_queue_setup_op,
3048         .rx_queue_release = bnxt_rx_queue_release_op,
3049         .tx_queue_setup = bnxt_tx_queue_setup_op,
3050         .tx_queue_release = bnxt_tx_queue_release_op,
3051         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
3052         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
3053         .reta_update = bnxt_reta_update_op,
3054         .reta_query = bnxt_reta_query_op,
3055         .rss_hash_update = bnxt_rss_hash_update_op,
3056         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
3057         .link_update = bnxt_link_update_op,
3058         .promiscuous_enable = bnxt_promiscuous_enable_op,
3059         .promiscuous_disable = bnxt_promiscuous_disable_op,
3060         .allmulticast_enable = bnxt_allmulticast_enable_op,
3061         .allmulticast_disable = bnxt_allmulticast_disable_op,
3062         .mac_addr_add = bnxt_mac_addr_add_op,
3063         .mac_addr_remove = bnxt_mac_addr_remove_op,
3064         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
3065         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
3066         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
3067         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
3068         .vlan_filter_set = bnxt_vlan_filter_set_op,
3069         .vlan_offload_set = bnxt_vlan_offload_set_op,
3070         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
3071         .mtu_set = bnxt_mtu_set_op,
3072         .mac_addr_set = bnxt_set_default_mac_addr_op,
3073         .xstats_get = bnxt_dev_xstats_get_op,
3074         .xstats_get_names = bnxt_dev_xstats_get_names_op,
3075         .xstats_reset = bnxt_dev_xstats_reset_op,
3076         .fw_version_get = bnxt_fw_version_get,
3077         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
3078         .rxq_info_get = bnxt_rxq_info_get_op,
3079         .txq_info_get = bnxt_txq_info_get_op,
3080         .dev_led_on = bnxt_dev_led_on_op,
3081         .dev_led_off = bnxt_dev_led_off_op,
3082         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
3083         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
3084         .rx_queue_count = bnxt_rx_queue_count_op,
3085         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
3086         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
3087         .rx_queue_start = bnxt_rx_queue_start,
3088         .rx_queue_stop = bnxt_rx_queue_stop,
3089         .tx_queue_start = bnxt_tx_queue_start,
3090         .tx_queue_stop = bnxt_tx_queue_stop,
3091         .filter_ctrl = bnxt_filter_ctrl_op,
3092         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3093         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3094         .get_eeprom           = bnxt_get_eeprom_op,
3095         .set_eeprom           = bnxt_set_eeprom_op,
3096         .timesync_enable      = bnxt_timesync_enable,
3097         .timesync_disable     = bnxt_timesync_disable,
3098         .timesync_read_time   = bnxt_timesync_read_time,
3099         .timesync_write_time   = bnxt_timesync_write_time,
3100         .timesync_adjust_time = bnxt_timesync_adjust_time,
3101         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3102         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3103 };
3104
3105 static bool bnxt_vf_pciid(uint16_t id)
3106 {
3107         if (id == BROADCOM_DEV_ID_57304_VF ||
3108             id == BROADCOM_DEV_ID_57406_VF ||
3109             id == BROADCOM_DEV_ID_5731X_VF ||
3110             id == BROADCOM_DEV_ID_5741X_VF ||
3111             id == BROADCOM_DEV_ID_57414_VF ||
3112             id == BROADCOM_DEV_ID_STRATUS_NIC_VF1 ||
3113             id == BROADCOM_DEV_ID_STRATUS_NIC_VF2 ||
3114             id == BROADCOM_DEV_ID_58802_VF)
3115                 return true;
3116         return false;
3117 }
3118
3119 bool bnxt_stratus_device(struct bnxt *bp)
3120 {
3121         uint16_t id = bp->pdev->id.device_id;
3122
3123         if (id == BROADCOM_DEV_ID_STRATUS_NIC ||
3124             id == BROADCOM_DEV_ID_STRATUS_NIC_VF1 ||
3125             id == BROADCOM_DEV_ID_STRATUS_NIC_VF2)
3126                 return true;
3127         return false;
3128 }
3129
3130 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3131 {
3132         struct bnxt *bp = eth_dev->data->dev_private;
3133         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3134         int rc;
3135
3136         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3137         if (!pci_dev->mem_resource[0].addr) {
3138                 PMD_DRV_LOG(ERR,
3139                         "Cannot find PCI device base address, aborting\n");
3140                 rc = -ENODEV;
3141                 goto init_err_disable;
3142         }
3143
3144         bp->eth_dev = eth_dev;
3145         bp->pdev = pci_dev;
3146
3147         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3148         if (!bp->bar0) {
3149                 PMD_DRV_LOG(ERR, "Cannot map device registers, aborting\n");
3150                 rc = -ENOMEM;
3151                 goto init_err_release;
3152         }
3153
3154         if (!pci_dev->mem_resource[2].addr) {
3155                 PMD_DRV_LOG(ERR,
3156                             "Cannot find PCI device BAR 2 address, aborting\n");
3157                 rc = -ENODEV;
3158                 goto init_err_release;
3159         } else {
3160                 bp->doorbell_base = (void *)pci_dev->mem_resource[2].addr;
3161         }
3162
3163         return 0;
3164
3165 init_err_release:
3166         if (bp->bar0)
3167                 bp->bar0 = NULL;
3168         if (bp->doorbell_base)
3169                 bp->doorbell_base = NULL;
3170
3171 init_err_disable:
3172
3173         return rc;
3174 }
3175
3176
3177 #define ALLOW_FUNC(x)   \
3178         { \
3179                 typeof(x) arg = (x); \
3180                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3181                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3182         }
3183 static int
3184 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3185 {
3186         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3187         char mz_name[RTE_MEMZONE_NAMESIZE];
3188         const struct rte_memzone *mz = NULL;
3189         static int version_printed;
3190         uint32_t total_alloc_len;
3191         rte_iova_t mz_phys_addr;
3192         struct bnxt *bp;
3193         int rc;
3194
3195         if (version_printed++ == 0)
3196                 PMD_DRV_LOG(INFO, "%s\n", bnxt_version);
3197
3198         rte_eth_copy_pci_info(eth_dev, pci_dev);
3199
3200         bp = eth_dev->data->dev_private;
3201
3202         bp->dev_stopped = 1;
3203
3204         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3205                 goto skip_init;
3206
3207         if (bnxt_vf_pciid(pci_dev->id.device_id))
3208                 bp->flags |= BNXT_FLAG_VF;
3209
3210         rc = bnxt_init_board(eth_dev);
3211         if (rc) {
3212                 PMD_DRV_LOG(ERR,
3213                         "Board initialization failed rc: %x\n", rc);
3214                 goto error;
3215         }
3216 skip_init:
3217         eth_dev->dev_ops = &bnxt_dev_ops;
3218         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3219         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3220         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3221                 return 0;
3222
3223         if (pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3224                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3225                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3226                          pci_dev->addr.bus, pci_dev->addr.devid,
3227                          pci_dev->addr.function, "rx_port_stats");
3228                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3229                 mz = rte_memzone_lookup(mz_name);
3230                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3231                                         sizeof(struct rx_port_stats) +
3232                                         sizeof(struct rx_port_stats_ext) +
3233                                         512);
3234                 if (!mz) {
3235                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3236                                         SOCKET_ID_ANY,
3237                                         RTE_MEMZONE_2MB |
3238                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3239                                         RTE_MEMZONE_IOVA_CONTIG);
3240                         if (mz == NULL)
3241                                 return -ENOMEM;
3242                 }
3243                 memset(mz->addr, 0, mz->len);
3244                 mz_phys_addr = mz->iova;
3245                 if ((unsigned long)mz->addr == mz_phys_addr) {
3246                         PMD_DRV_LOG(INFO,
3247                                 "Memzone physical address same as virtual using rte_mem_virt2iova()\n");
3248                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3249                         if (mz_phys_addr == 0) {
3250                                 PMD_DRV_LOG(ERR,
3251                                 "unable to map address to physical memory\n");
3252                                 return -ENOMEM;
3253                         }
3254                 }
3255
3256                 bp->rx_mem_zone = (const void *)mz;
3257                 bp->hw_rx_port_stats = mz->addr;
3258                 bp->hw_rx_port_stats_map = mz_phys_addr;
3259
3260                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3261                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3262                          pci_dev->addr.bus, pci_dev->addr.devid,
3263                          pci_dev->addr.function, "tx_port_stats");
3264                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3265                 mz = rte_memzone_lookup(mz_name);
3266                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3267                                         sizeof(struct tx_port_stats) +
3268                                         sizeof(struct tx_port_stats_ext) +
3269                                         512);
3270                 if (!mz) {
3271                         mz = rte_memzone_reserve(mz_name,
3272                                         total_alloc_len,
3273                                         SOCKET_ID_ANY,
3274                                         RTE_MEMZONE_2MB |
3275                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3276                                         RTE_MEMZONE_IOVA_CONTIG);
3277                         if (mz == NULL)
3278                                 return -ENOMEM;
3279                 }
3280                 memset(mz->addr, 0, mz->len);
3281                 mz_phys_addr = mz->iova;
3282                 if ((unsigned long)mz->addr == mz_phys_addr) {
3283                         PMD_DRV_LOG(WARNING,
3284                                 "Memzone physical address same as virtual.\n");
3285                         PMD_DRV_LOG(WARNING,
3286                                 "Using rte_mem_virt2iova()\n");
3287                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3288                         if (mz_phys_addr == 0) {
3289                                 PMD_DRV_LOG(ERR,
3290                                 "unable to map address to physical memory\n");
3291                                 return -ENOMEM;
3292                         }
3293                 }
3294
3295                 bp->tx_mem_zone = (const void *)mz;
3296                 bp->hw_tx_port_stats = mz->addr;
3297                 bp->hw_tx_port_stats_map = mz_phys_addr;
3298
3299                 bp->flags |= BNXT_FLAG_PORT_STATS;
3300
3301                 /* Display extended statistics if FW supports it */
3302                 if (bp->hwrm_spec_code < HWRM_SPEC_CODE_1_8_4 ||
3303                     bp->hwrm_spec_code == HWRM_SPEC_CODE_1_9_0)
3304                         goto skip_ext_stats;
3305
3306                 bp->hw_rx_port_stats_ext = (void *)
3307                         (bp->hw_rx_port_stats + sizeof(struct rx_port_stats));
3308                 bp->hw_rx_port_stats_ext_map = bp->hw_rx_port_stats_map +
3309                         sizeof(struct rx_port_stats);
3310                 bp->flags |= BNXT_FLAG_EXT_RX_PORT_STATS;
3311
3312
3313                 if (bp->hwrm_spec_code < HWRM_SPEC_CODE_1_9_2) {
3314                         bp->hw_tx_port_stats_ext = (void *)
3315                         (bp->hw_tx_port_stats + sizeof(struct tx_port_stats));
3316                         bp->hw_tx_port_stats_ext_map =
3317                                 bp->hw_tx_port_stats_map +
3318                                 sizeof(struct tx_port_stats);
3319                         bp->flags |= BNXT_FLAG_EXT_TX_PORT_STATS;
3320                 }
3321         }
3322
3323 skip_ext_stats:
3324         rc = bnxt_alloc_hwrm_resources(bp);
3325         if (rc) {
3326                 PMD_DRV_LOG(ERR,
3327                         "hwrm resource allocation failure rc: %x\n", rc);
3328                 goto error_free;
3329         }
3330         rc = bnxt_hwrm_ver_get(bp);
3331         if (rc)
3332                 goto error_free;
3333         rc = bnxt_hwrm_queue_qportcfg(bp);
3334         if (rc) {
3335                 PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
3336                 goto error_free;
3337         }
3338
3339         rc = bnxt_hwrm_func_qcfg(bp);
3340         if (rc) {
3341                 PMD_DRV_LOG(ERR, "hwrm func qcfg failed\n");
3342                 goto error_free;
3343         }
3344
3345         /* Get the MAX capabilities for this function */
3346         rc = bnxt_hwrm_func_qcaps(bp);
3347         if (rc) {
3348                 PMD_DRV_LOG(ERR, "hwrm query capability failure rc: %x\n", rc);
3349                 goto error_free;
3350         }
3351         if (bp->max_tx_rings == 0) {
3352                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
3353                 rc = -EBUSY;
3354                 goto error_free;
3355         }
3356         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3357                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3358         if (eth_dev->data->mac_addrs == NULL) {
3359                 PMD_DRV_LOG(ERR,
3360                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3361                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3362                 rc = -ENOMEM;
3363                 goto error_free;
3364         }
3365
3366         if (bnxt_check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
3367                 PMD_DRV_LOG(ERR,
3368                             "Invalid MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
3369                             bp->dflt_mac_addr[0], bp->dflt_mac_addr[1],
3370                             bp->dflt_mac_addr[2], bp->dflt_mac_addr[3],
3371                             bp->dflt_mac_addr[4], bp->dflt_mac_addr[5]);
3372                 rc = -EINVAL;
3373                 goto error_free;
3374         }
3375         /* Copy the permanent MAC from the qcap response address now. */
3376         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3377         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3378
3379         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3380                 /* 1 ring is for default completion ring */
3381                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
3382                 rc = -ENOSPC;
3383                 goto error_free;
3384         }
3385
3386         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3387                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3388         if (!bp->grp_info) {
3389                 PMD_DRV_LOG(ERR,
3390                         "Failed to alloc %zu bytes to store group info table\n",
3391                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3392                 rc = -ENOMEM;
3393                 goto error_free;
3394         }
3395
3396         /* Forward all requests if firmware is new enough */
3397         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3398             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3399             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3400                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3401         } else {
3402                 PMD_DRV_LOG(WARNING,
3403                         "Firmware too old for VF mailbox functionality\n");
3404                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3405         }
3406
3407         /*
3408          * The following are used for driver cleanup.  If we disallow these,
3409          * VF drivers can't clean up cleanly.
3410          */
3411         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3412         ALLOW_FUNC(HWRM_VNIC_FREE);
3413         ALLOW_FUNC(HWRM_RING_FREE);
3414         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3415         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3416         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3417         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3418         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3419         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3420         rc = bnxt_hwrm_func_driver_register(bp);
3421         if (rc) {
3422                 PMD_DRV_LOG(ERR,
3423                         "Failed to register driver");
3424                 rc = -EBUSY;
3425                 goto error_free;
3426         }
3427
3428         PMD_DRV_LOG(INFO,
3429                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3430                 pci_dev->mem_resource[0].phys_addr,
3431                 pci_dev->mem_resource[0].addr);
3432
3433         rc = bnxt_hwrm_func_reset(bp);
3434         if (rc) {
3435                 PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
3436                 rc = -EIO;
3437                 goto error_free;
3438         }
3439
3440         if (BNXT_PF(bp)) {
3441                 //if (bp->pf.active_vfs) {
3442                         // TODO: Deallocate VF resources?
3443                 //}
3444                 if (bp->pdev->max_vfs) {
3445                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3446                         if (rc) {
3447                                 PMD_DRV_LOG(ERR, "Failed to allocate VFs\n");
3448                                 goto error_free;
3449                         }
3450                 } else {
3451                         rc = bnxt_hwrm_allocate_pf_only(bp);
3452                         if (rc) {
3453                                 PMD_DRV_LOG(ERR,
3454                                         "Failed to allocate PF resources\n");
3455                                 goto error_free;
3456                         }
3457                 }
3458         }
3459
3460         bnxt_hwrm_port_led_qcaps(bp);
3461
3462         rc = bnxt_setup_int(bp);
3463         if (rc)
3464                 goto error_free;
3465
3466         rc = bnxt_alloc_mem(bp);
3467         if (rc)
3468                 goto error_free_int;
3469
3470         rc = bnxt_request_int(bp);
3471         if (rc)
3472                 goto error_free_int;
3473
3474         bnxt_enable_int(bp);
3475         bnxt_init_nic(bp);
3476
3477         return 0;
3478
3479 error_free_int:
3480         bnxt_disable_int(bp);
3481         bnxt_hwrm_func_buf_unrgtr(bp);
3482         bnxt_free_int(bp);
3483         bnxt_free_mem(bp);
3484 error_free:
3485         bnxt_dev_uninit(eth_dev);
3486 error:
3487         return rc;
3488 }
3489
3490 static int
3491 bnxt_dev_uninit(struct rte_eth_dev *eth_dev)
3492 {
3493         struct bnxt *bp = eth_dev->data->dev_private;
3494         int rc;
3495
3496         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3497                 return -EPERM;
3498
3499         PMD_DRV_LOG(DEBUG, "Calling Device uninit\n");
3500         bnxt_disable_int(bp);
3501         bnxt_free_int(bp);
3502         bnxt_free_mem(bp);
3503         if (bp->grp_info != NULL) {
3504                 rte_free(bp->grp_info);
3505                 bp->grp_info = NULL;
3506         }
3507         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3508         bnxt_free_hwrm_resources(bp);
3509
3510         if (bp->tx_mem_zone) {
3511                 rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3512                 bp->tx_mem_zone = NULL;
3513         }
3514
3515         if (bp->rx_mem_zone) {
3516                 rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3517                 bp->rx_mem_zone = NULL;
3518         }
3519
3520         if (bp->dev_stopped == 0)
3521                 bnxt_dev_close_op(eth_dev);
3522         if (bp->pf.vf_info)
3523                 rte_free(bp->pf.vf_info);
3524         eth_dev->dev_ops = NULL;
3525         eth_dev->rx_pkt_burst = NULL;
3526         eth_dev->tx_pkt_burst = NULL;
3527
3528         return rc;
3529 }
3530
3531 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3532         struct rte_pci_device *pci_dev)
3533 {
3534         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3535                 bnxt_dev_init);
3536 }
3537
3538 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3539 {
3540         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3541                 return rte_eth_dev_pci_generic_remove(pci_dev,
3542                                 bnxt_dev_uninit);
3543         else
3544                 return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
3545 }
3546
3547 static struct rte_pci_driver bnxt_rte_pmd = {
3548         .id_table = bnxt_pci_id_map,
3549         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3550                 RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_IOVA_AS_VA,
3551         .probe = bnxt_pci_probe,
3552         .remove = bnxt_pci_remove,
3553 };
3554
3555 static bool
3556 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3557 {
3558         if (strcmp(dev->device->driver->name, drv->driver.name))
3559                 return false;
3560
3561         return true;
3562 }
3563
3564 bool is_bnxt_supported(struct rte_eth_dev *dev)
3565 {
3566         return is_device_supported(dev, &bnxt_rte_pmd);
3567 }
3568
3569 RTE_INIT(bnxt_init_log)
3570 {
3571         bnxt_logtype_driver = rte_log_register("pmd.net.bnxt.driver");
3572         if (bnxt_logtype_driver >= 0)
3573                 rte_log_set_level(bnxt_logtype_driver, RTE_LOG_NOTICE);
3574 }
3575
3576 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3577 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3578 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");