drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56 #include "bnxt_nvm_defs.h"
  57
  58 #define DRV_MODULE_NAME         "bnxt"
  59 static const char bnxt_version[] =
  60         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  61
  62 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  63
  64 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  65 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  66 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  67 #define BROADCOM_DEV_ID_57301 0x16c8
  68 #define BROADCOM_DEV_ID_57302 0x16c9
  69 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  70 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  71 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  72 #define BROADCOM_DEV_ID_NS2 0x16cd
  73 #define BROADCOM_DEV_ID_57311 0x16ce
  74 #define BROADCOM_DEV_ID_57312 0x16cf
  75 #define BROADCOM_DEV_ID_57402 0x16d0
  76 #define BROADCOM_DEV_ID_57404 0x16d1
  77 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  78 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  79 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  80 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  81 #define BROADCOM_DEV_ID_57412 0x16d6
  82 #define BROADCOM_DEV_ID_57414 0x16d7
  83 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  84 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  85 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  86 #define BROADCOM_DEV_ID_57412_MF 0x16de
  87 #define BROADCOM_DEV_ID_57314 0x16df
  88 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  89 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  90 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  91 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  92 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  93 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  94 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  95 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  96 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  97 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  98 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  99
 100 static const struct rte_pci_id bnxt_pci_id_map[] = {
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 102                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 136         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 137         { .vendor_id = 0, /* sentinel */ },
 138 };
 139
 140 #define BNXT_ETH_RSS_SUPPORT (  \
 141         ETH_RSS_IPV4 |          \
 142         ETH_RSS_NONFRAG_IPV4_TCP |      \
 143         ETH_RSS_NONFRAG_IPV4_UDP |      \
 144         ETH_RSS_IPV6 |          \
 145         ETH_RSS_NONFRAG_IPV6_TCP |      \
 146         ETH_RSS_NONFRAG_IPV6_UDP)
 147
 148 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 149
 150 /***********************/
 151
 152 /*
 153  * High level utility functions
 154  */
 155
 156 static void bnxt_free_mem(struct bnxt *bp)
 157 {
 158         bnxt_free_filter_mem(bp);
 159         bnxt_free_vnic_attributes(bp);
 160         bnxt_free_vnic_mem(bp);
 161
 162         bnxt_free_stats(bp);
 163         bnxt_free_tx_rings(bp);
 164         bnxt_free_rx_rings(bp);
 165         bnxt_free_def_cp_ring(bp);
 166 }
 167
 168 static int bnxt_alloc_mem(struct bnxt *bp)
 169 {
 170         int rc;
 171
 172         /* Default completion ring */
 173         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 178                               bp->def_cp_ring, "def_cp");
 179         if (rc)
 180                 goto alloc_mem_err;
 181
 182         rc = bnxt_alloc_vnic_mem(bp);
 183         if (rc)
 184                 goto alloc_mem_err;
 185
 186         rc = bnxt_alloc_vnic_attributes(bp);
 187         if (rc)
 188                 goto alloc_mem_err;
 189
 190         rc = bnxt_alloc_filter_mem(bp);
 191         if (rc)
 192                 goto alloc_mem_err;
 193
 194         return 0;
 195
 196 alloc_mem_err:
 197         bnxt_free_mem(bp);
 198         return rc;
 199 }
 200
 201 static int bnxt_init_chip(struct bnxt *bp)
 202 {
 203         unsigned int i, rss_idx, fw_idx;
 204         struct rte_eth_link new;
 205         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 206         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 207         uint32_t intr_vector = 0;
 208         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 209         uint32_t vec = BNXT_MISC_VEC_ID;
 210         int rc;
 211
 212         /* disable uio/vfio intr/eventfd mapping */
 213         rte_intr_disable(intr_handle);
 214
 215         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 216                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 217                 bp->flags |= BNXT_FLAG_JUMBO;
 218         } else {
 219                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 220                 bp->flags &= ~BNXT_FLAG_JUMBO;
 221         }
 222
 223         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 224         if (rc) {
 225                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 226                 goto err_out;
 227         }
 228
 229         rc = bnxt_alloc_hwrm_rings(bp);
 230         if (rc) {
 231                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 232                 goto err_out;
 233         }
 234
 235         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 236         if (rc) {
 237                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 238                 goto err_out;
 239         }
 240
 241         rc = bnxt_mq_rx_configure(bp);
 242         if (rc) {
 243                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 244                 goto err_out;
 245         }
 246
 247         /* VNIC configuration */
 248         for (i = 0; i < bp->nr_vnics; i++) {
 249                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 250
 251                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 252                 if (rc) {
 253                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 254                                 i, rc);
 255                         goto err_out;
 256                 }
 257
 258                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 259                 if (rc) {
 260                         RTE_LOG(ERR, PMD,
 261                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 262                                 i, rc);
 263                         goto err_out;
 264                 }
 265
 266                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 267                 if (rc) {
 268                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 269                                 i, rc);
 270                         goto err_out;
 271                 }
 272
 273                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 274                 if (rc) {
 275                         RTE_LOG(ERR, PMD,
 276                                 "HWRM vnic %d filter failure rc: %x\n",
 277                                 i, rc);
 278                         goto err_out;
 279                 }
 280                 if (vnic->rss_table && vnic->hash_type) {
 281                         /*
 282                          * Fill the RSS hash & redirection table with
 283                          * ring group ids for all VNICs
 284                          */
 285                         for (rss_idx = 0, fw_idx = 0;
 286                              rss_idx < HW_HASH_INDEX_SIZE;
 287                              rss_idx++, fw_idx++) {
 288                                 if (vnic->fw_grp_ids[fw_idx] ==
 289                                     INVALID_HW_RING_ID)
 290                                         fw_idx = 0;
 291                                 vnic->rss_table[rss_idx] =
 292                                                 vnic->fw_grp_ids[fw_idx];
 293                         }
 294                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 295                         if (rc) {
 296                                 RTE_LOG(ERR, PMD,
 297                                         "HWRM vnic %d set RSS failure rc: %x\n",
 298                                         i, rc);
 299                                 goto err_out;
 300                         }
 301                 }
 302
 303                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 304
 305                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 306                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 307                 else
 308                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 309         }
 310         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 311         if (rc) {
 312                 RTE_LOG(ERR, PMD,
 313                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 314                 goto err_out;
 315         }
 316
 317         /* check and configure queue intr-vector mapping */
 318         if ((rte_intr_cap_multiple(intr_handle) ||
 319              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 320             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 321                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 322                 RTE_LOG(INFO, PMD, "%s(): intr_vector = %d\n", __func__,
 323                         intr_vector);
 324                 if (intr_vector > bp->rx_cp_nr_rings) {
 325                         RTE_LOG(ERR, PMD, "At most %d intr queues supported",
 326                                         bp->rx_cp_nr_rings);
 327                         return -ENOTSUP;
 328                 }
 329                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 330                         return -1;
 331         }
 332
 333         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 334                 intr_handle->intr_vec =
 335                         rte_zmalloc("intr_vec",
 336                                     bp->eth_dev->data->nb_rx_queues *
 337                                     sizeof(int), 0);
 338                 if (intr_handle->intr_vec == NULL) {
 339                         RTE_LOG(ERR, PMD, "Failed to allocate %d rx_queues"
 340                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 341                         return -ENOMEM;
 342                 }
 343                 RTE_LOG(DEBUG, PMD, "%s(): intr_handle->intr_vec = %p "
 344                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 345                          __func__, intr_handle->intr_vec, intr_handle->nb_efd,
 346                         intr_handle->max_intr);
 347         }
 348
 349         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 350              queue_id++) {
 351                 intr_handle->intr_vec[queue_id] = vec;
 352                 if (vec < base + intr_handle->nb_efd - 1)
 353                         vec++;
 354         }
 355
 356         /* enable uio/vfio intr/eventfd mapping */
 357         rte_intr_enable(intr_handle);
 358
 359         rc = bnxt_get_hwrm_link_config(bp, &new);
 360         if (rc) {
 361                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 362                 goto err_out;
 363         }
 364
 365         if (!bp->link_info.link_up) {
 366                 rc = bnxt_set_hwrm_link_config(bp, true);
 367                 if (rc) {
 368                         RTE_LOG(ERR, PMD,
 369                                 "HWRM link config failure rc: %x\n", rc);
 370                         goto err_out;
 371                 }
 372         }
 373
 374         return 0;
 375
 376 err_out:
 377         bnxt_free_all_hwrm_resources(bp);
 378
 379         return rc;
 380 }
 381
 382 static int bnxt_shutdown_nic(struct bnxt *bp)
 383 {
 384         bnxt_free_all_hwrm_resources(bp);
 385         bnxt_free_all_filters(bp);
 386         bnxt_free_all_vnics(bp);
 387         return 0;
 388 }
 389
 390 static int bnxt_init_nic(struct bnxt *bp)
 391 {
 392         int rc;
 393
 394         bnxt_init_ring_grps(bp);
 395         bnxt_init_vnics(bp);
 396         bnxt_init_filters(bp);
 397
 398         rc = bnxt_init_chip(bp);
 399         if (rc)
 400                 return rc;
 401
 402         return 0;
 403 }
 404
 405 /*
 406  * Device configuration and status function
 407  */
 408
 409 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 410                                   struct rte_eth_dev_info *dev_info)
 411 {
 412         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 413         uint16_t max_vnics, i, j, vpool, vrxq;
 414         unsigned int max_rx_rings;
 415
 416         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 417
 418         /* MAC Specifics */
 419         dev_info->max_mac_addrs = bp->max_l2_ctx;
 420         dev_info->max_hash_mac_addrs = 0;
 421
 422         /* PF/VF specifics */
 423         if (BNXT_PF(bp))
 424                 dev_info->max_vfs = bp->pdev->max_vfs;
 425         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 426                                                 RTE_MIN(bp->max_rsscos_ctx,
 427                                                 bp->max_stat_ctx)));
 428         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 429         dev_info->max_rx_queues = max_rx_rings;
 430         dev_info->max_tx_queues = max_rx_rings;
 431         dev_info->reta_size = bp->max_rsscos_ctx;
 432         dev_info->hash_key_size = 40;
 433         max_vnics = bp->max_vnics;
 434
 435         /* Fast path specifics */
 436         dev_info->min_rx_bufsize = 1;
 437         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 438                                   + VLAN_TAG_SIZE;
 439         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 440                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 441                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 442                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 443                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 444         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 445                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 446                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 447                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 448                                         DEV_TX_OFFLOAD_TCP_TSO |
 449                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 450                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 451                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 452                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 453                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 454
 455         /* *INDENT-OFF* */
 456         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 457                 .rx_thresh = {
 458                         .pthresh = 8,
 459                         .hthresh = 8,
 460                         .wthresh = 0,
 461                 },
 462                 .rx_free_thresh = 32,
 463                 .rx_drop_en = 0,
 464         };
 465
 466         dev_info->default_txconf = (struct rte_eth_txconf) {
 467                 .tx_thresh = {
 468                         .pthresh = 32,
 469                         .hthresh = 0,
 470                         .wthresh = 0,
 471                 },
 472                 .tx_free_thresh = 32,
 473                 .tx_rs_thresh = 32,
 474                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 475                              ETH_TXQ_FLAGS_NOOFFLOADS,
 476         };
 477         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 478
 479         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 480
 481         /* *INDENT-ON* */
 482
 483         /*
 484          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 485          *       need further investigation.
 486          */
 487
 488         /* VMDq resources */
 489         vpool = 64; /* ETH_64_POOLS */
 490         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 491         for (i = 0; i < 4; vpool >>= 1, i++) {
 492                 if (max_vnics > vpool) {
 493                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 494                                 if (dev_info->max_rx_queues > vrxq) {
 495                                         if (vpool > vrxq)
 496                                                 vpool = vrxq;
 497                                         goto found;
 498                                 }
 499                         }
 500                         /* Not enough resources to support VMDq */
 501                         break;
 502                 }
 503         }
 504         /* Not enough resources to support VMDq */
 505         vpool = 0;
 506         vrxq = 0;
 507 found:
 508         dev_info->max_vmdq_pools = vpool;
 509         dev_info->vmdq_queue_num = vrxq;
 510
 511         dev_info->vmdq_pool_base = 0;
 512         dev_info->vmdq_queue_base = 0;
 513 }
 514
 515 /* Configure the device based on the configuration provided */
 516 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 517 {
 518         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 519
 520         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 521         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 522
 523         /* Inherit new configurations */
 524         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 525         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 526         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 527         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 528
 529         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 530                 eth_dev->data->mtu =
 531                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 532                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 533         return 0;
 534 }
 535
 536 static inline int
 537 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 538                                 struct rte_eth_link *link)
 539 {
 540         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 541         struct rte_eth_link *src = link;
 542
 543         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 544                                         *(uint64_t *)src) == 0)
 545                 return 1;
 546
 547         return 0;
 548 }
 549
 550 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 551 {
 552         struct rte_eth_link *link = &eth_dev->data->dev_link;
 553
 554         if (link->link_status)
 555                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 556                         eth_dev->data->port_id,
 557                         (uint32_t)link->link_speed,
 558                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 559                         ("full-duplex") : ("half-duplex\n"));
 560         else
 561                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 562                         eth_dev->data->port_id);
 563 }
 564
 565 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 566 {
 567         bnxt_print_link_info(eth_dev);
 568         return 0;
 569 }
 570
 571 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 572 {
 573         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 574         int vlan_mask = 0;
 575         int rc;
 576
 577         bp->dev_stopped = 0;
 578
 579         rc = bnxt_init_nic(bp);
 580         if (rc)
 581                 goto error;
 582
 583         bnxt_link_update_op(eth_dev, 0);
 584
 585         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 586                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 587         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 588                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 589         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 590
 591         return 0;
 592
 593 error:
 594         bnxt_shutdown_nic(bp);
 595         bnxt_free_tx_mbufs(bp);
 596         bnxt_free_rx_mbufs(bp);
 597         return rc;
 598 }
 599
 600 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 601 {
 602         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 603
 604         eth_dev->data->dev_link.link_status = 1;
 605         bnxt_set_hwrm_link_config(bp, true);
 606         return 0;
 607 }
 608
 609 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 610 {
 611         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 612
 613         eth_dev->data->dev_link.link_status = 0;
 614         bnxt_set_hwrm_link_config(bp, false);
 615         return 0;
 616 }
 617
 618 /* Unload the driver, release resources */
 619 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 620 {
 621         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 622
 623         if (bp->eth_dev->data->dev_started) {
 624                 /* TBD: STOP HW queues DMA */
 625                 eth_dev->data->dev_link.link_status = 0;
 626         }
 627         bnxt_set_hwrm_link_config(bp, false);
 628         bnxt_hwrm_port_clr_stats(bp);
 629         bnxt_shutdown_nic(bp);
 630         bp->dev_stopped = 1;
 631 }
 632
 633 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 634 {
 635         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 636
 637         if (bp->dev_stopped == 0)
 638                 bnxt_dev_stop_op(eth_dev);
 639
 640         bnxt_free_tx_mbufs(bp);
 641         bnxt_free_rx_mbufs(bp);
 642         bnxt_free_mem(bp);
 643         if (eth_dev->data->mac_addrs != NULL) {
 644                 rte_free(eth_dev->data->mac_addrs);
 645                 eth_dev->data->mac_addrs = NULL;
 646         }
 647         if (bp->grp_info != NULL) {
 648                 rte_free(bp->grp_info);
 649                 bp->grp_info = NULL;
 650         }
 651 }
 652
 653 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 654                                     uint32_t index)
 655 {
 656         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 657         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 658         struct bnxt_vnic_info *vnic;
 659         struct bnxt_filter_info *filter, *temp_filter;
 660         int i;
 661
 662         /*
 663          * Loop through all VNICs from the specified filter flow pools to
 664          * remove the corresponding MAC addr filter
 665          */
 666         for (i = 0; i < MAX_FF_POOLS; i++) {
 667                 if (!(pool_mask & (1ULL << i)))
 668                         continue;
 669
 670                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 671                         filter = STAILQ_FIRST(&vnic->filter);
 672                         while (filter) {
 673                                 temp_filter = STAILQ_NEXT(filter, next);
 674                                 if (filter->mac_index == index) {
 675                                         STAILQ_REMOVE(&vnic->filter, filter,
 676                                                       bnxt_filter_info, next);
 677                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 678                                         filter->mac_index = INVALID_MAC_INDEX;
 679                                         memset(&filter->l2_addr, 0,
 680                                                ETHER_ADDR_LEN);
 681                                         STAILQ_INSERT_TAIL(
 682                                                         &bp->free_filter_list,
 683                                                         filter, next);
 684                                 }
 685                                 filter = temp_filter;
 686                         }
 687                 }
 688         }
 689 }
 690
 691 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 692                                 struct ether_addr *mac_addr,
 693                                 uint32_t index, uint32_t pool)
 694 {
 695         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 696         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 697         struct bnxt_filter_info *filter;
 698
 699         if (BNXT_VF(bp)) {
 700                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 701                 return -ENOTSUP;
 702         }
 703
 704         if (!vnic) {
 705                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 706                 return -EINVAL;
 707         }
 708         /* Attach requested MAC address to the new l2_filter */
 709         STAILQ_FOREACH(filter, &vnic->filter, next) {
 710                 if (filter->mac_index == index) {
 711                         RTE_LOG(ERR, PMD,
 712                                 "MAC addr already existed for pool %d\n", pool);
 713                         return -EINVAL;
 714                 }
 715         }
 716         filter = bnxt_alloc_filter(bp);
 717         if (!filter) {
 718                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 719                 return -ENODEV;
 720         }
 721         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 722         filter->mac_index = index;
 723         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 724         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 725 }
 726
 727 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 728 {
 729         int rc = 0;
 730         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 731         struct rte_eth_link new;
 732         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 733
 734         memset(&new, 0, sizeof(new));
 735         do {
 736                 /* Retrieve link info from hardware */
 737                 rc = bnxt_get_hwrm_link_config(bp, &new);
 738                 if (rc) {
 739                         new.link_speed = ETH_LINK_SPEED_100M;
 740                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 741                         RTE_LOG(ERR, PMD,
 742                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 743                         goto out;
 744                 }
 745                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 746
 747                 if (!wait_to_complete)
 748                         break;
 749         } while (!new.link_status && cnt--);
 750
 751 out:
 752         /* Timed out or success */
 753         if (new.link_status != eth_dev->data->dev_link.link_status ||
 754         new.link_speed != eth_dev->data->dev_link.link_speed) {
 755                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 756                 bnxt_print_link_info(eth_dev);
 757         }
 758
 759         return rc;
 760 }
 761
 762 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 763 {
 764         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 765         struct bnxt_vnic_info *vnic;
 766
 767         if (bp->vnic_info == NULL)
 768                 return;
 769
 770         vnic = &bp->vnic_info[0];
 771
 772         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 773         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 774 }
 775
 776 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 777 {
 778         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 779         struct bnxt_vnic_info *vnic;
 780
 781         if (bp->vnic_info == NULL)
 782                 return;
 783
 784         vnic = &bp->vnic_info[0];
 785
 786         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 787         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 788 }
 789
 790 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 791 {
 792         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 793         struct bnxt_vnic_info *vnic;
 794
 795         if (bp->vnic_info == NULL)
 796                 return;
 797
 798         vnic = &bp->vnic_info[0];
 799
 800         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 801         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 802 }
 803
 804 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 805 {
 806         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 807         struct bnxt_vnic_info *vnic;
 808
 809         if (bp->vnic_info == NULL)
 810                 return;
 811
 812         vnic = &bp->vnic_info[0];
 813
 814         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 815         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 816 }
 817
 818 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 819                             struct rte_eth_rss_reta_entry64 *reta_conf,
 820                             uint16_t reta_size)
 821 {
 822         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 823         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 824         struct bnxt_vnic_info *vnic;
 825         int i;
 826
 827         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 828                 return -EINVAL;
 829
 830         if (reta_size != HW_HASH_INDEX_SIZE) {
 831                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 832                         "(%d) must equal the size supported by the hardware "
 833                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 834                 return -EINVAL;
 835         }
 836         /* Update the RSS VNIC(s) */
 837         for (i = 0; i < MAX_FF_POOLS; i++) {
 838                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 839                         memcpy(vnic->rss_table, reta_conf, reta_size);
 840
 841                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 842                 }
 843         }
 844         return 0;
 845 }
 846
 847 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 848                               struct rte_eth_rss_reta_entry64 *reta_conf,
 849                               uint16_t reta_size)
 850 {
 851         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 852         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 853         struct rte_intr_handle *intr_handle
 854                 = &bp->pdev->intr_handle;
 855
 856         /* Retrieve from the default VNIC */
 857         if (!vnic)
 858                 return -EINVAL;
 859         if (!vnic->rss_table)
 860                 return -EINVAL;
 861
 862         if (reta_size != HW_HASH_INDEX_SIZE) {
 863                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 864                         "(%d) must equal the size supported by the hardware "
 865                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 866                 return -EINVAL;
 867         }
 868         /* EW - need to revisit here copying from u64 to u16 */
 869         memcpy(reta_conf, vnic->rss_table, reta_size);
 870
 871         if (rte_intr_allow_others(intr_handle)) {
 872                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 873                         bnxt_dev_lsc_intr_setup(eth_dev);
 874         }
 875
 876         return 0;
 877 }
 878
 879 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 880                                    struct rte_eth_rss_conf *rss_conf)
 881 {
 882         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 883         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 884         struct bnxt_vnic_info *vnic;
 885         uint16_t hash_type = 0;
 886         int i;
 887
 888         /*
 889          * If RSS enablement were different than dev_configure,
 890          * then return -EINVAL
 891          */
 892         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 893                 if (!rss_conf->rss_hf)
 894                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 895         } else {
 896                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 897                         return -EINVAL;
 898         }
 899
 900         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 901         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 902
 903         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 904                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 905         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 906                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 907         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 908                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 909         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 910                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 911         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 912                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 913         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 914                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 915
 916         /* Update the RSS VNIC(s) */
 917         for (i = 0; i < MAX_FF_POOLS; i++) {
 918                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 919                         vnic->hash_type = hash_type;
 920
 921                         /*
 922                          * Use the supplied key if the key length is
 923                          * acceptable and the rss_key is not NULL
 924                          */
 925                         if (rss_conf->rss_key &&
 926                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 927                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 928                                        rss_conf->rss_key_len);
 929
 930                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 931                 }
 932         }
 933         return 0;
 934 }
 935
 936 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 937                                      struct rte_eth_rss_conf *rss_conf)
 938 {
 939         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 940         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 941         int len;
 942         uint32_t hash_types;
 943
 944         /* RSS configuration is the same for all VNICs */
 945         if (vnic && vnic->rss_hash_key) {
 946                 if (rss_conf->rss_key) {
 947                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 948                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 949                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 950                 }
 951
 952                 hash_types = vnic->hash_type;
 953                 rss_conf->rss_hf = 0;
 954                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 955                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 956                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 957                 }
 958                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 959                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 960                         hash_types &=
 961                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 962                 }
 963                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 964                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 965                         hash_types &=
 966                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 967                 }
 968                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 969                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 970                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 971                 }
 972                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 973                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 974                         hash_types &=
 975                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 976                 }
 977                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 978                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 979                         hash_types &=
 980                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 981                 }
 982                 if (hash_types) {
 983                         RTE_LOG(ERR, PMD,
 984                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 985                                 vnic->hash_type);
 986                         return -ENOTSUP;
 987                 }
 988         } else {
 989                 rss_conf->rss_hf = 0;
 990         }
 991         return 0;
 992 }
 993
 994 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 995                                struct rte_eth_fc_conf *fc_conf)
 996 {
 997         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 998         struct rte_eth_link link_info;
 999         int rc;
1000
1001         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1002         if (rc)
1003                 return rc;
1004
1005         memset(fc_conf, 0, sizeof(*fc_conf));
1006         if (bp->link_info.auto_pause)
1007                 fc_conf->autoneg = 1;
1008         switch (bp->link_info.pause) {
1009         case 0:
1010                 fc_conf->mode = RTE_FC_NONE;
1011                 break;
1012         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1013                 fc_conf->mode = RTE_FC_TX_PAUSE;
1014                 break;
1015         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1016                 fc_conf->mode = RTE_FC_RX_PAUSE;
1017                 break;
1018         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1019                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1020                 fc_conf->mode = RTE_FC_FULL;
1021                 break;
1022         }
1023         return 0;
1024 }
1025
1026 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1027                                struct rte_eth_fc_conf *fc_conf)
1028 {
1029         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1030
1031         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1032                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
1033                 return -ENOTSUP;
1034         }
1035
1036         switch (fc_conf->mode) {
1037         case RTE_FC_NONE:
1038                 bp->link_info.auto_pause = 0;
1039                 bp->link_info.force_pause = 0;
1040                 break;
1041         case RTE_FC_RX_PAUSE:
1042                 if (fc_conf->autoneg) {
1043                         bp->link_info.auto_pause =
1044                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1045                         bp->link_info.force_pause = 0;
1046                 } else {
1047                         bp->link_info.auto_pause = 0;
1048                         bp->link_info.force_pause =
1049                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1050                 }
1051                 break;
1052         case RTE_FC_TX_PAUSE:
1053                 if (fc_conf->autoneg) {
1054                         bp->link_info.auto_pause =
1055                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1056                         bp->link_info.force_pause = 0;
1057                 } else {
1058                         bp->link_info.auto_pause = 0;
1059                         bp->link_info.force_pause =
1060                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1061                 }
1062                 break;
1063         case RTE_FC_FULL:
1064                 if (fc_conf->autoneg) {
1065                         bp->link_info.auto_pause =
1066                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1067                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1068                         bp->link_info.force_pause = 0;
1069                 } else {
1070                         bp->link_info.auto_pause = 0;
1071                         bp->link_info.force_pause =
1072                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1073                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1074                 }
1075                 break;
1076         }
1077         return bnxt_set_hwrm_link_config(bp, true);
1078 }
1079
1080 /* Add UDP tunneling port */
1081 static int
1082 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1083                          struct rte_eth_udp_tunnel *udp_tunnel)
1084 {
1085         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1086         uint16_t tunnel_type = 0;
1087         int rc = 0;
1088
1089         switch (udp_tunnel->prot_type) {
1090         case RTE_TUNNEL_TYPE_VXLAN:
1091                 if (bp->vxlan_port_cnt) {
1092                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1093                                 udp_tunnel->udp_port);
1094                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1095                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1096                                 return -ENOSPC;
1097                         }
1098                         bp->vxlan_port_cnt++;
1099                         return 0;
1100                 }
1101                 tunnel_type =
1102                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1103                 bp->vxlan_port_cnt++;
1104                 break;
1105         case RTE_TUNNEL_TYPE_GENEVE:
1106                 if (bp->geneve_port_cnt) {
1107                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1108                                 udp_tunnel->udp_port);
1109                         if (bp->geneve_port != udp_tunnel->udp_port) {
1110                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1111                                 return -ENOSPC;
1112                         }
1113                         bp->geneve_port_cnt++;
1114                         return 0;
1115                 }
1116                 tunnel_type =
1117                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1118                 bp->geneve_port_cnt++;
1119                 break;
1120         default:
1121                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1122                 return -ENOTSUP;
1123         }
1124         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1125                                              tunnel_type);
1126         return rc;
1127 }
1128
1129 static int
1130 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1131                          struct rte_eth_udp_tunnel *udp_tunnel)
1132 {
1133         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1134         uint16_t tunnel_type = 0;
1135         uint16_t port = 0;
1136         int rc = 0;
1137
1138         switch (udp_tunnel->prot_type) {
1139         case RTE_TUNNEL_TYPE_VXLAN:
1140                 if (!bp->vxlan_port_cnt) {
1141                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1142                         return -EINVAL;
1143                 }
1144                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1145                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1146                                 udp_tunnel->udp_port, bp->vxlan_port);
1147                         return -EINVAL;
1148                 }
1149                 if (--bp->vxlan_port_cnt)
1150                         return 0;
1151
1152                 tunnel_type =
1153                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1154                 port = bp->vxlan_fw_dst_port_id;
1155                 break;
1156         case RTE_TUNNEL_TYPE_GENEVE:
1157                 if (!bp->geneve_port_cnt) {
1158                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1159                         return -EINVAL;
1160                 }
1161                 if (bp->geneve_port != udp_tunnel->udp_port) {
1162                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1163                                 udp_tunnel->udp_port, bp->geneve_port);
1164                         return -EINVAL;
1165                 }
1166                 if (--bp->geneve_port_cnt)
1167                         return 0;
1168
1169                 tunnel_type =
1170                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1171                 port = bp->geneve_fw_dst_port_id;
1172                 break;
1173         default:
1174                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1175                 return -ENOTSUP;
1176         }
1177
1178         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1179         if (!rc) {
1180                 if (tunnel_type ==
1181                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1182                         bp->vxlan_port = 0;
1183                 if (tunnel_type ==
1184                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1185                         bp->geneve_port = 0;
1186         }
1187         return rc;
1188 }
1189
1190 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1191 {
1192         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1193         struct bnxt_vnic_info *vnic;
1194         unsigned int i;
1195         int rc = 0;
1196         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1197
1198         /* Cycle through all VNICs */
1199         for (i = 0; i < bp->nr_vnics; i++) {
1200                 /*
1201                  * For each VNIC and each associated filter(s)
1202                  * if VLAN exists && VLAN matches vlan_id
1203                  *      remove the MAC+VLAN filter
1204                  *      add a new MAC only filter
1205                  * else
1206                  *      VLAN filter doesn't exist, just skip and continue
1207                  */
1208                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1209                         filter = STAILQ_FIRST(&vnic->filter);
1210                         while (filter) {
1211                                 temp_filter = STAILQ_NEXT(filter, next);
1212
1213                                 if (filter->enables & chk &&
1214                                     filter->l2_ovlan == vlan_id) {
1215                                         /* Must delete the filter */
1216                                         STAILQ_REMOVE(&vnic->filter, filter,
1217                                                       bnxt_filter_info, next);
1218                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1219                                         STAILQ_INSERT_TAIL(
1220                                                         &bp->free_filter_list,
1221                                                         filter, next);
1222
1223                                         /*
1224                                          * Need to examine to see if the MAC
1225                                          * filter already existed or not before
1226                                          * allocating a new one
1227                                          */
1228
1229                                         new_filter = bnxt_alloc_filter(bp);
1230                                         if (!new_filter) {
1231                                                 RTE_LOG(ERR, PMD,
1232                                                         "MAC/VLAN filter alloc failed\n");
1233                                                 rc = -ENOMEM;
1234                                                 goto exit;
1235                                         }
1236                                         STAILQ_INSERT_TAIL(&vnic->filter,
1237                                                            new_filter, next);
1238                                         /* Inherit MAC from previous filter */
1239                                         new_filter->mac_index =
1240                                                         filter->mac_index;
1241                                         memcpy(new_filter->l2_addr,
1242                                                filter->l2_addr, ETHER_ADDR_LEN);
1243                                         /* MAC only filter */
1244                                         rc = bnxt_hwrm_set_l2_filter(bp,
1245                                                         vnic->fw_vnic_id,
1246                                                         new_filter);
1247                                         if (rc)
1248                                                 goto exit;
1249                                         RTE_LOG(INFO, PMD,
1250                                                 "Del Vlan filter for %d\n",
1251                                                 vlan_id);
1252                                 }
1253                                 filter = temp_filter;
1254                         }
1255                 }
1256         }
1257 exit:
1258         return rc;
1259 }
1260
1261 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1262 {
1263         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1264         struct bnxt_vnic_info *vnic;
1265         unsigned int i;
1266         int rc = 0;
1267         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1268                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1269         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1270
1271         /* Cycle through all VNICs */
1272         for (i = 0; i < bp->nr_vnics; i++) {
1273                 /*
1274                  * For each VNIC and each associated filter(s)
1275                  * if VLAN exists:
1276                  *   if VLAN matches vlan_id
1277                  *      VLAN filter already exists, just skip and continue
1278                  *   else
1279                  *      add a new MAC+VLAN filter
1280                  * else
1281                  *   Remove the old MAC only filter
1282                  *    Add a new MAC+VLAN filter
1283                  */
1284                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1285                         filter = STAILQ_FIRST(&vnic->filter);
1286                         while (filter) {
1287                                 temp_filter = STAILQ_NEXT(filter, next);
1288
1289                                 if (filter->enables & chk) {
1290                                         if (filter->l2_ovlan == vlan_id)
1291                                                 goto cont;
1292                                 } else {
1293                                         /* Must delete the MAC filter */
1294                                         STAILQ_REMOVE(&vnic->filter, filter,
1295                                                       bnxt_filter_info, next);
1296                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1297                                         filter->l2_ovlan = 0;
1298                                         STAILQ_INSERT_TAIL(
1299                                                         &bp->free_filter_list,
1300                                                         filter, next);
1301                                 }
1302                                 new_filter = bnxt_alloc_filter(bp);
1303                                 if (!new_filter) {
1304                                         RTE_LOG(ERR, PMD,
1305                                                 "MAC/VLAN filter alloc failed\n");
1306                                         rc = -ENOMEM;
1307                                         goto exit;
1308                                 }
1309                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1310                                                    next);
1311                                 /* Inherit MAC from the previous filter */
1312                                 new_filter->mac_index = filter->mac_index;
1313                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1314                                        ETHER_ADDR_LEN);
1315                                 /* MAC + VLAN ID filter */
1316                                 new_filter->l2_ovlan = vlan_id;
1317                                 new_filter->l2_ovlan_mask = 0xF000;
1318                                 new_filter->enables |= en;
1319                                 rc = bnxt_hwrm_set_l2_filter(bp,
1320                                                              vnic->fw_vnic_id,
1321                                                              new_filter);
1322                                 if (rc)
1323                                         goto exit;
1324                                 RTE_LOG(INFO, PMD,
1325                                         "Added Vlan filter for %d\n", vlan_id);
1326 cont:
1327                                 filter = temp_filter;
1328                         }
1329                 }
1330         }
1331 exit:
1332         return rc;
1333 }
1334
1335 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1336                                    uint16_t vlan_id, int on)
1337 {
1338         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1339
1340         /* These operations apply to ALL existing MAC/VLAN filters */
1341         if (on)
1342                 return bnxt_add_vlan_filter(bp, vlan_id);
1343         else
1344                 return bnxt_del_vlan_filter(bp, vlan_id);
1345 }
1346
1347 static void
1348 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1349 {
1350         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1351         unsigned int i;
1352
1353         if (mask & ETH_VLAN_FILTER_MASK) {
1354                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1355                         /* Remove any VLAN filters programmed */
1356                         for (i = 0; i < 4095; i++)
1357                                 bnxt_del_vlan_filter(bp, i);
1358                 }
1359                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1360                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1361         }
1362
1363         if (mask & ETH_VLAN_STRIP_MASK) {
1364                 /* Enable or disable VLAN stripping */
1365                 for (i = 0; i < bp->nr_vnics; i++) {
1366                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1367                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1368                                 vnic->vlan_strip = true;
1369                         else
1370                                 vnic->vlan_strip = false;
1371                         bnxt_hwrm_vnic_cfg(bp, vnic);
1372                 }
1373                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1374                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1375         }
1376
1377         if (mask & ETH_VLAN_EXTEND_MASK)
1378                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1379 }
1380
1381 static void
1382 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1383 {
1384         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1385         /* Default Filter is tied to VNIC 0 */
1386         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1387         struct bnxt_filter_info *filter;
1388         int rc;
1389
1390         if (BNXT_VF(bp))
1391                 return;
1392
1393         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1394         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1395
1396         STAILQ_FOREACH(filter, &vnic->filter, next) {
1397                 /* Default Filter is at Index 0 */
1398                 if (filter->mac_index != 0)
1399                         continue;
1400                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1401                 if (rc)
1402                         break;
1403                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1404                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1405                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1406                 filter->enables |=
1407                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1408                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1409                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1410                 if (rc)
1411                         break;
1412                 filter->mac_index = 0;
1413                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1414         }
1415 }
1416
1417 static int
1418 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1419                           struct ether_addr *mc_addr_set,
1420                           uint32_t nb_mc_addr)
1421 {
1422         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1423         char *mc_addr_list = (char *)mc_addr_set;
1424         struct bnxt_vnic_info *vnic;
1425         uint32_t off = 0, i = 0;
1426
1427         vnic = &bp->vnic_info[0];
1428
1429         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1430                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1431                 goto allmulti;
1432         }
1433
1434         /* TODO Check for Duplicate mcast addresses */
1435         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1436         for (i = 0; i < nb_mc_addr; i++) {
1437                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1438                 off += ETHER_ADDR_LEN;
1439         }
1440
1441         vnic->mc_addr_cnt = i;
1442
1443 allmulti:
1444         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1445 }
1446
1447 static int
1448 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1449 {
1450         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1451         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1452         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1453         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1454         int ret;
1455
1456         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1457                         fw_major, fw_minor, fw_updt);
1458
1459         ret += 1; /* add the size of '\0' */
1460         if (fw_size < (uint32_t)ret)
1461                 return ret;
1462         else
1463                 return 0;
1464 }
1465
1466 static void
1467 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1468         struct rte_eth_rxq_info *qinfo)
1469 {
1470         struct bnxt_rx_queue *rxq;
1471
1472         rxq = dev->data->rx_queues[queue_id];
1473
1474         qinfo->mp = rxq->mb_pool;
1475         qinfo->scattered_rx = dev->data->scattered_rx;
1476         qinfo->nb_desc = rxq->nb_rx_desc;
1477
1478         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1479         qinfo->conf.rx_drop_en = 0;
1480         qinfo->conf.rx_deferred_start = 0;
1481 }
1482
1483 static void
1484 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1485         struct rte_eth_txq_info *qinfo)
1486 {
1487         struct bnxt_tx_queue *txq;
1488
1489         txq = dev->data->tx_queues[queue_id];
1490
1491         qinfo->nb_desc = txq->nb_tx_desc;
1492
1493         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1494         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1495         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1496
1497         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1498         qinfo->conf.tx_rs_thresh = 0;
1499         qinfo->conf.txq_flags = txq->txq_flags;
1500         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1501 }
1502
1503 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1504 {
1505         struct bnxt *bp = eth_dev->data->dev_private;
1506         struct rte_eth_dev_info dev_info;
1507         uint32_t max_dev_mtu;
1508         uint32_t rc = 0;
1509         uint32_t i;
1510
1511         bnxt_dev_info_get_op(eth_dev, &dev_info);
1512         max_dev_mtu = dev_info.max_rx_pktlen -
1513                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1514
1515         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1516                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1517                         ETHER_MIN_MTU, max_dev_mtu);
1518                 return -EINVAL;
1519         }
1520
1521
1522         if (new_mtu > ETHER_MTU) {
1523                 bp->flags |= BNXT_FLAG_JUMBO;
1524                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1525         } else {
1526                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1527                 bp->flags &= ~BNXT_FLAG_JUMBO;
1528         }
1529
1530         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1531                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1532
1533         eth_dev->data->mtu = new_mtu;
1534         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1535
1536         for (i = 0; i < bp->nr_vnics; i++) {
1537                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1538
1539                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1540                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1541                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1542                 if (rc)
1543                         break;
1544
1545                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1546                 if (rc)
1547                         return rc;
1548         }
1549
1550         return rc;
1551 }
1552
1553 static int
1554 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1555 {
1556         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1557         uint16_t vlan = bp->vlan;
1558         int rc;
1559
1560         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1561                 RTE_LOG(ERR, PMD,
1562                         "PVID cannot be modified for this function\n");
1563                 return -ENOTSUP;
1564         }
1565         bp->vlan = on ? pvid : 0;
1566
1567         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1568         if (rc)
1569                 bp->vlan = vlan;
1570         return rc;
1571 }
1572
1573 static int
1574 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1575 {
1576         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1577
1578         return bnxt_hwrm_port_led_cfg(bp, true);
1579 }
1580
1581 static int
1582 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1583 {
1584         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1585
1586         return bnxt_hwrm_port_led_cfg(bp, false);
1587 }
1588
1589 static uint32_t
1590 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1591 {
1592         uint32_t desc = 0, raw_cons = 0, cons;
1593         struct bnxt_cp_ring_info *cpr;
1594         struct bnxt_rx_queue *rxq;
1595         struct rx_pkt_cmpl *rxcmp;
1596         uint16_t cmp_type;
1597         uint8_t cmp = 1;
1598         bool valid;
1599
1600         rxq = dev->data->rx_queues[rx_queue_id];
1601         cpr = rxq->cp_ring;
1602         valid = cpr->valid;
1603
1604         while (raw_cons < rxq->nb_rx_desc) {
1605                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1606                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1607
1608                 if (!CMPL_VALID(rxcmp, valid))
1609                         goto nothing_to_do;
1610                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1611                 cmp_type = CMP_TYPE(rxcmp);
1612                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1613                         cmp = (rte_le_to_cpu_32(
1614                                         ((struct rx_tpa_end_cmpl *)
1615                                          (rxcmp))->agg_bufs_v1) &
1616                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1617                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1618                         desc++;
1619                 } else if (cmp_type == 0x11) {
1620                         desc++;
1621                         cmp = (rxcmp->agg_bufs_v1 &
1622                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1623                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1624                 } else {
1625                         cmp = 1;
1626                 }
1627 nothing_to_do:
1628                 raw_cons += cmp ? cmp : 2;
1629         }
1630
1631         return desc;
1632 }
1633
1634 static int
1635 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1636 {
1637         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1638         struct bnxt_rx_ring_info *rxr;
1639         struct bnxt_cp_ring_info *cpr;
1640         struct bnxt_sw_rx_bd *rx_buf;
1641         struct rx_pkt_cmpl *rxcmp;
1642         uint32_t cons, cp_cons;
1643
1644         if (!rxq)
1645                 return -EINVAL;
1646
1647         cpr = rxq->cp_ring;
1648         rxr = rxq->rx_ring;
1649
1650         if (offset >= rxq->nb_rx_desc)
1651                 return -EINVAL;
1652
1653         cons = RING_CMP(cpr->cp_ring_struct, offset);
1654         cp_cons = cpr->cp_raw_cons;
1655         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1656
1657         if (cons > cp_cons) {
1658                 if (CMPL_VALID(rxcmp, cpr->valid))
1659                         return RTE_ETH_RX_DESC_DONE;
1660         } else {
1661                 if (CMPL_VALID(rxcmp, !cpr->valid))
1662                         return RTE_ETH_RX_DESC_DONE;
1663         }
1664         rx_buf = &rxr->rx_buf_ring[cons];
1665         if (rx_buf->mbuf == NULL)
1666                 return RTE_ETH_RX_DESC_UNAVAIL;
1667
1668
1669         return RTE_ETH_RX_DESC_AVAIL;
1670 }
1671
1672 static int
1673 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1674 {
1675         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1676         struct bnxt_tx_ring_info *txr;
1677         struct bnxt_cp_ring_info *cpr;
1678         struct bnxt_sw_tx_bd *tx_buf;
1679         struct tx_pkt_cmpl *txcmp;
1680         uint32_t cons, cp_cons;
1681
1682         if (!txq)
1683                 return -EINVAL;
1684
1685         cpr = txq->cp_ring;
1686         txr = txq->tx_ring;
1687
1688         if (offset >= txq->nb_tx_desc)
1689                 return -EINVAL;
1690
1691         cons = RING_CMP(cpr->cp_ring_struct, offset);
1692         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1693         cp_cons = cpr->cp_raw_cons;
1694
1695         if (cons > cp_cons) {
1696                 if (CMPL_VALID(txcmp, cpr->valid))
1697                         return RTE_ETH_TX_DESC_UNAVAIL;
1698         } else {
1699                 if (CMPL_VALID(txcmp, !cpr->valid))
1700                         return RTE_ETH_TX_DESC_UNAVAIL;
1701         }
1702         tx_buf = &txr->tx_buf_ring[cons];
1703         if (tx_buf->mbuf == NULL)
1704                 return RTE_ETH_TX_DESC_DONE;
1705
1706         return RTE_ETH_TX_DESC_FULL;
1707 }
1708
1709 static struct bnxt_filter_info *
1710 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1711                                 struct rte_eth_ethertype_filter *efilter,
1712                                 struct bnxt_vnic_info *vnic0,
1713                                 struct bnxt_vnic_info *vnic,
1714                                 int *ret)
1715 {
1716         struct bnxt_filter_info *mfilter = NULL;
1717         int match = 0;
1718         *ret = 0;
1719
1720         if (efilter->ether_type != ETHER_TYPE_IPv4 &&
1721                 efilter->ether_type != ETHER_TYPE_IPv6) {
1722                 RTE_LOG(ERR, PMD, "unsupported ether_type(0x%04x) in"
1723                         " ethertype filter.", efilter->ether_type);
1724                 *ret = -EINVAL;
1725         }
1726         if (efilter->queue >= bp->rx_nr_rings) {
1727                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1728                 *ret = -EINVAL;
1729         }
1730
1731         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1732         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1733         if (vnic == NULL) {
1734                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1735                 *ret = -EINVAL;
1736         }
1737
1738         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1739                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1740                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1741                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1742                              mfilter->flags ==
1743                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1744                              mfilter->ethertype == efilter->ether_type)) {
1745                                 match = 1;
1746                                 break;
1747                         }
1748                 }
1749         } else {
1750                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1751                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1752                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1753                              mfilter->ethertype == efilter->ether_type &&
1754                              mfilter->flags ==
1755                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1756                                 match = 1;
1757                                 break;
1758                         }
1759         }
1760
1761         if (match)
1762                 *ret = -EEXIST;
1763
1764         return mfilter;
1765 }
1766
1767 static int
1768 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1769                         enum rte_filter_op filter_op,
1770                         void *arg)
1771 {
1772         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1773         struct rte_eth_ethertype_filter *efilter =
1774                         (struct rte_eth_ethertype_filter *)arg;
1775         struct bnxt_filter_info *bfilter, *filter1;
1776         struct bnxt_vnic_info *vnic, *vnic0;
1777         int ret;
1778
1779         if (filter_op == RTE_ETH_FILTER_NOP)
1780                 return 0;
1781
1782         if (arg == NULL) {
1783                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1784                             filter_op);
1785                 return -EINVAL;
1786         }
1787
1788         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1789         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1790
1791         switch (filter_op) {
1792         case RTE_ETH_FILTER_ADD:
1793                 bnxt_match_and_validate_ether_filter(bp, efilter,
1794                                                         vnic0, vnic, &ret);
1795                 if (ret < 0)
1796                         return ret;
1797
1798                 bfilter = bnxt_get_unused_filter(bp);
1799                 if (bfilter == NULL) {
1800                         RTE_LOG(ERR, PMD,
1801                                 "Not enough resources for a new filter.\n");
1802                         return -ENOMEM;
1803                 }
1804                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1805                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1806                        ETHER_ADDR_LEN);
1807                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1808                        ETHER_ADDR_LEN);
1809                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1810                 bfilter->ethertype = efilter->ether_type;
1811                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1812
1813                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1814                 if (filter1 == NULL) {
1815                         ret = -1;
1816                         goto cleanup;
1817                 }
1818                 bfilter->enables |=
1819                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1820                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1821
1822                 bfilter->dst_id = vnic->fw_vnic_id;
1823
1824                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1825                         bfilter->flags =
1826                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1827                 }
1828
1829                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1830                 if (ret)
1831                         goto cleanup;
1832                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1833                 break;
1834         case RTE_ETH_FILTER_DELETE:
1835                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1836                                                         vnic0, vnic, &ret);
1837                 if (ret == -EEXIST) {
1838                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1839
1840                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1841                                       next);
1842                         bnxt_free_filter(bp, filter1);
1843                 } else if (ret == 0) {
1844                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1845                 }
1846                 break;
1847         default:
1848                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1849                 ret = -EINVAL;
1850                 goto error;
1851         }
1852         return ret;
1853 cleanup:
1854         bnxt_free_filter(bp, bfilter);
1855 error:
1856         return ret;
1857 }
1858
1859 static inline int
1860 parse_ntuple_filter(struct bnxt *bp,
1861                     struct rte_eth_ntuple_filter *nfilter,
1862                     struct bnxt_filter_info *bfilter)
1863 {
1864         uint32_t en = 0;
1865
1866         if (nfilter->queue >= bp->rx_nr_rings) {
1867                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", nfilter->queue);
1868                 return -EINVAL;
1869         }
1870
1871         switch (nfilter->dst_port_mask) {
1872         case UINT16_MAX:
1873                 bfilter->dst_port_mask = -1;
1874                 bfilter->dst_port = nfilter->dst_port;
1875                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1876                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1877                 break;
1878         default:
1879                 RTE_LOG(ERR, PMD, "invalid dst_port mask.");
1880                 return -EINVAL;
1881         }
1882
1883         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1884         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1885
1886         switch (nfilter->proto_mask) {
1887         case UINT8_MAX:
1888                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1889                         bfilter->ip_protocol = 17;
1890                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1891                         bfilter->ip_protocol = 6;
1892                 else
1893                         return -EINVAL;
1894                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1895                 break;
1896         default:
1897                 RTE_LOG(ERR, PMD, "invalid protocol mask.");
1898                 return -EINVAL;
1899         }
1900
1901         switch (nfilter->dst_ip_mask) {
1902         case UINT32_MAX:
1903                 bfilter->dst_ipaddr_mask[0] = -1;
1904                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1905                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1906                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1907                 break;
1908         default:
1909                 RTE_LOG(ERR, PMD, "invalid dst_ip mask.");
1910                 return -EINVAL;
1911         }
1912
1913         switch (nfilter->src_ip_mask) {
1914         case UINT32_MAX:
1915                 bfilter->src_ipaddr_mask[0] = -1;
1916                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1917                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1918                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1919                 break;
1920         default:
1921                 RTE_LOG(ERR, PMD, "invalid src_ip mask.");
1922                 return -EINVAL;
1923         }
1924
1925         switch (nfilter->src_port_mask) {
1926         case UINT16_MAX:
1927                 bfilter->src_port_mask = -1;
1928                 bfilter->src_port = nfilter->src_port;
1929                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1930                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1931                 break;
1932         default:
1933                 RTE_LOG(ERR, PMD, "invalid src_port mask.");
1934                 return -EINVAL;
1935         }
1936
1937         //TODO Priority
1938         //nfilter->priority = (uint8_t)filter->priority;
1939
1940         bfilter->enables = en;
1941         return 0;
1942 }
1943
1944 static struct bnxt_filter_info*
1945 bnxt_match_ntuple_filter(struct bnxt_vnic_info *vnic,
1946                          struct bnxt_filter_info *bfilter)
1947 {
1948         struct bnxt_filter_info *mfilter = NULL;
1949
1950         STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1951                 if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1952                     bfilter->src_ipaddr_mask[0] ==
1953                     mfilter->src_ipaddr_mask[0] &&
1954                     bfilter->src_port == mfilter->src_port &&
1955                     bfilter->src_port_mask == mfilter->src_port_mask &&
1956                     bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1957                     bfilter->dst_ipaddr_mask[0] ==
1958                     mfilter->dst_ipaddr_mask[0] &&
1959                     bfilter->dst_port == mfilter->dst_port &&
1960                     bfilter->dst_port_mask == mfilter->dst_port_mask &&
1961                     bfilter->flags == mfilter->flags &&
1962                     bfilter->enables == mfilter->enables)
1963                         return mfilter;
1964         }
1965         return NULL;
1966 }
1967
1968 static int
1969 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1970                        struct rte_eth_ntuple_filter *nfilter,
1971                        enum rte_filter_op filter_op)
1972 {
1973         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
1974         struct bnxt_vnic_info *vnic, *vnic0;
1975         int ret;
1976
1977         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
1978                 RTE_LOG(ERR, PMD, "only 5tuple is supported.");
1979                 return -EINVAL;
1980         }
1981
1982         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
1983                 RTE_LOG(ERR, PMD, "Ntuple filter: TCP flags not supported\n");
1984                 return -EINVAL;
1985         }
1986
1987         bfilter = bnxt_get_unused_filter(bp);
1988         if (bfilter == NULL) {
1989                 RTE_LOG(ERR, PMD,
1990                         "Not enough resources for a new filter.\n");
1991                 return -ENOMEM;
1992         }
1993         ret = parse_ntuple_filter(bp, nfilter, bfilter);
1994         if (ret < 0)
1995                 goto free_filter;
1996
1997         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
1998         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1999         filter1 = STAILQ_FIRST(&vnic0->filter);
2000         if (filter1 == NULL) {
2001                 ret = -1;
2002                 goto free_filter;
2003         }
2004
2005         bfilter->dst_id = vnic->fw_vnic_id;
2006         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2007         bfilter->enables |=
2008                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2009         bfilter->ethertype = 0x800;
2010         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2011
2012         mfilter = bnxt_match_ntuple_filter(vnic, bfilter);
2013
2014         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2015                 RTE_LOG(ERR, PMD, "filter exists.");
2016                 ret = -EEXIST;
2017                 goto free_filter;
2018         }
2019         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2020                 RTE_LOG(ERR, PMD, "filter doesn't exist.");
2021                 ret = -ENOENT;
2022                 goto free_filter;
2023         }
2024
2025         if (filter_op == RTE_ETH_FILTER_ADD) {
2026                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2027                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2028                 if (ret)
2029                         goto free_filter;
2030                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2031         } else {
2032                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2033
2034                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info,
2035                               next);
2036                 bnxt_free_filter(bp, mfilter);
2037                 bfilter->fw_l2_filter_id = -1;
2038                 bnxt_free_filter(bp, bfilter);
2039         }
2040
2041         return 0;
2042 free_filter:
2043         bfilter->fw_l2_filter_id = -1;
2044         bnxt_free_filter(bp, bfilter);
2045         return ret;
2046 }
2047
2048 static int
2049 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2050                         enum rte_filter_op filter_op,
2051                         void *arg)
2052 {
2053         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2054         int ret;
2055
2056         if (filter_op == RTE_ETH_FILTER_NOP)
2057                 return 0;
2058
2059         if (arg == NULL) {
2060                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
2061                             filter_op);
2062                 return -EINVAL;
2063         }
2064
2065         switch (filter_op) {
2066         case RTE_ETH_FILTER_ADD:
2067                 ret = bnxt_cfg_ntuple_filter(bp,
2068                         (struct rte_eth_ntuple_filter *)arg,
2069                         filter_op);
2070                 break;
2071         case RTE_ETH_FILTER_DELETE:
2072                 ret = bnxt_cfg_ntuple_filter(bp,
2073                         (struct rte_eth_ntuple_filter *)arg,
2074                         filter_op);
2075                 break;
2076         default:
2077                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
2078                 ret = -EINVAL;
2079                 break;
2080         }
2081         return ret;
2082 }
2083
2084 static int
2085 bnxt_parse_fdir_filter(struct bnxt *bp,
2086                        struct rte_eth_fdir_filter *fdir,
2087                        struct bnxt_filter_info *filter)
2088 {
2089         enum rte_fdir_mode fdir_mode =
2090                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2091         struct bnxt_vnic_info *vnic0, *vnic;
2092         struct bnxt_filter_info *filter1;
2093         uint32_t en = 0;
2094         int i;
2095
2096         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2097                 return -EINVAL;
2098
2099         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2100         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2101
2102         switch (fdir->input.flow_type) {
2103         case RTE_ETH_FLOW_IPV4:
2104         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2105                 /* FALLTHROUGH */
2106                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2107                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2108                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2109                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2110                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2111                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2112                 filter->ip_addr_type =
2113                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2114                 filter->src_ipaddr_mask[0] = 0xffffffff;
2115                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2116                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2117                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2118                 filter->ethertype = 0x800;
2119                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2120                 break;
2121         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2122                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2123                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2124                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2125                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2126                 filter->dst_port_mask = 0xffff;
2127                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2128                 filter->src_port_mask = 0xffff;
2129                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2130                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2131                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2132                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2133                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2134                 filter->ip_protocol = 6;
2135                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2136                 filter->ip_addr_type =
2137                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2138                 filter->src_ipaddr_mask[0] = 0xffffffff;
2139                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2140                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2141                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2142                 filter->ethertype = 0x800;
2143                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2144                 break;
2145         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2146                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2147                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2148                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2149                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2150                 filter->dst_port_mask = 0xffff;
2151                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2152                 filter->src_port_mask = 0xffff;
2153                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2154                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2155                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2156                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2157                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2158                 filter->ip_protocol = 17;
2159                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2160                 filter->ip_addr_type =
2161                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2162                 filter->src_ipaddr_mask[0] = 0xffffffff;
2163                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2164                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2165                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2166                 filter->ethertype = 0x800;
2167                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2168                 break;
2169         case RTE_ETH_FLOW_IPV6:
2170         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2171                 /* FALLTHROUGH */
2172                 filter->ip_addr_type =
2173                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2174                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2175                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2176                 rte_memcpy(filter->src_ipaddr,
2177                            fdir->input.flow.ipv6_flow.src_ip, 16);
2178                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2179                 rte_memcpy(filter->dst_ipaddr,
2180                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2181                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2182                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2183                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2184                 memset(filter->src_ipaddr_mask, 0xff, 16);
2185                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2186                 filter->ethertype = 0x86dd;
2187                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2188                 break;
2189         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2190                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2191                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2192                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2193                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2194                 filter->dst_port_mask = 0xffff;
2195                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2196                 filter->src_port_mask = 0xffff;
2197                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2198                 filter->ip_addr_type =
2199                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2200                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2201                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2202                 rte_memcpy(filter->src_ipaddr,
2203                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2204                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2205                 rte_memcpy(filter->dst_ipaddr,
2206                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2207                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2208                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2209                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2210                 memset(filter->src_ipaddr_mask, 0xff, 16);
2211                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2212                 filter->ethertype = 0x86dd;
2213                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2214                 break;
2215         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2216                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2217                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2218                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2219                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2220                 filter->dst_port_mask = 0xffff;
2221                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2222                 filter->src_port_mask = 0xffff;
2223                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2224                 filter->ip_addr_type =
2225                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2226                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2227                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2228                 rte_memcpy(filter->src_ipaddr,
2229                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2230                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2231                 rte_memcpy(filter->dst_ipaddr,
2232                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2233                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2234                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2235                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2236                 memset(filter->src_ipaddr_mask, 0xff, 16);
2237                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2238                 filter->ethertype = 0x86dd;
2239                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2240                 break;
2241         case RTE_ETH_FLOW_L2_PAYLOAD:
2242                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2243                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2244                 break;
2245         case RTE_ETH_FLOW_VXLAN:
2246                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2247                         return -EINVAL;
2248                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2249                 filter->tunnel_type =
2250                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2251                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2252                 break;
2253         case RTE_ETH_FLOW_NVGRE:
2254                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2255                         return -EINVAL;
2256                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2257                 filter->tunnel_type =
2258                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2259                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2260                 break;
2261         case RTE_ETH_FLOW_UNKNOWN:
2262         case RTE_ETH_FLOW_RAW:
2263         case RTE_ETH_FLOW_FRAG_IPV4:
2264         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2265         case RTE_ETH_FLOW_FRAG_IPV6:
2266         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2267         case RTE_ETH_FLOW_IPV6_EX:
2268         case RTE_ETH_FLOW_IPV6_TCP_EX:
2269         case RTE_ETH_FLOW_IPV6_UDP_EX:
2270         case RTE_ETH_FLOW_GENEVE:
2271                 /* FALLTHROUGH */
2272         default:
2273                 return -EINVAL;
2274         }
2275
2276         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2277         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2278         if (vnic == NULL) {
2279                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", fdir->action.rx_queue);
2280                 return -EINVAL;
2281         }
2282
2283
2284         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2285                 rte_memcpy(filter->dst_macaddr,
2286                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2287                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2288         }
2289
2290         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2291                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2292                 filter1 = STAILQ_FIRST(&vnic0->filter);
2293                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2294         } else {
2295                 filter->dst_id = vnic->fw_vnic_id;
2296                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2297                         if (filter->dst_macaddr[i] == 0x00)
2298                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2299                         else
2300                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2301         }
2302
2303         if (filter1 == NULL)
2304                 return -EINVAL;
2305
2306         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2307         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2308
2309         filter->enables = en;
2310
2311         return 0;
2312 }
2313
2314 static struct bnxt_filter_info *
2315 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf)
2316 {
2317         struct bnxt_filter_info *mf = NULL;
2318         int i;
2319
2320         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2321                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2322
2323                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2324                         if (mf->filter_type == nf->filter_type &&
2325                             mf->flags == nf->flags &&
2326                             mf->src_port == nf->src_port &&
2327                             mf->src_port_mask == nf->src_port_mask &&
2328                             mf->dst_port == nf->dst_port &&
2329                             mf->dst_port_mask == nf->dst_port_mask &&
2330                             mf->ip_protocol == nf->ip_protocol &&
2331                             mf->ip_addr_type == nf->ip_addr_type &&
2332                             mf->ethertype == nf->ethertype &&
2333                             mf->vni == nf->vni &&
2334                             mf->tunnel_type == nf->tunnel_type &&
2335                             mf->l2_ovlan == nf->l2_ovlan &&
2336                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2337                             mf->l2_ivlan == nf->l2_ivlan &&
2338                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2339                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2340                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2341                                     ETHER_ADDR_LEN) &&
2342                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2343                                     ETHER_ADDR_LEN) &&
2344                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2345                                     ETHER_ADDR_LEN) &&
2346                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2347                                     sizeof(nf->src_ipaddr)) &&
2348                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2349                                     sizeof(nf->src_ipaddr_mask)) &&
2350                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2351                                     sizeof(nf->dst_ipaddr)) &&
2352                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2353                                     sizeof(nf->dst_ipaddr_mask)))
2354                                 return mf;
2355                 }
2356         }
2357         return NULL;
2358 }
2359
2360 static int
2361 bnxt_fdir_filter(struct rte_eth_dev *dev,
2362                  enum rte_filter_op filter_op,
2363                  void *arg)
2364 {
2365         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2366         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2367         struct bnxt_filter_info *filter, *match;
2368         struct bnxt_vnic_info *vnic;
2369         int ret = 0, i;
2370
2371         if (filter_op == RTE_ETH_FILTER_NOP)
2372                 return 0;
2373
2374         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2375                 return -EINVAL;
2376
2377         switch (filter_op) {
2378         case RTE_ETH_FILTER_ADD:
2379         case RTE_ETH_FILTER_DELETE:
2380                 /* FALLTHROUGH */
2381                 filter = bnxt_get_unused_filter(bp);
2382                 if (filter == NULL) {
2383                         RTE_LOG(ERR, PMD,
2384                                 "Not enough resources for a new flow.\n");
2385                         return -ENOMEM;
2386                 }
2387
2388                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2389                 if (ret != 0)
2390                         goto free_filter;
2391
2392                 match = bnxt_match_fdir(bp, filter);
2393                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2394                         RTE_LOG(ERR, PMD, "Flow already exists.\n");
2395                         ret = -EEXIST;
2396                         goto free_filter;
2397                 }
2398                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2399                         RTE_LOG(ERR, PMD, "Flow does not exist.\n");
2400                         ret = -ENOENT;
2401                         goto free_filter;
2402                 }
2403
2404                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2405                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2406                 else
2407                         vnic =
2408                         STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2409
2410                 if (filter_op == RTE_ETH_FILTER_ADD) {
2411                         filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2412                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2413                                                           filter->dst_id,
2414                                                           filter);
2415                         if (ret)
2416                                 goto free_filter;
2417                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2418                 } else {
2419                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2420                         STAILQ_REMOVE(&vnic->filter, match,
2421                                       bnxt_filter_info, next);
2422                         bnxt_free_filter(bp, match);
2423                         filter->fw_l2_filter_id = -1;
2424                         bnxt_free_filter(bp, filter);
2425                 }
2426                 break;
2427         case RTE_ETH_FILTER_FLUSH:
2428                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2429                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2430
2431                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2432                                 if (filter->filter_type ==
2433                                     HWRM_CFA_NTUPLE_FILTER) {
2434                                         ret =
2435                                         bnxt_hwrm_clear_ntuple_filter(bp,
2436                                                                       filter);
2437                                         STAILQ_REMOVE(&vnic->filter, filter,
2438                                                       bnxt_filter_info, next);
2439                                 }
2440                         }
2441                 }
2442                 return ret;
2443         case RTE_ETH_FILTER_UPDATE:
2444         case RTE_ETH_FILTER_STATS:
2445         case RTE_ETH_FILTER_INFO:
2446                 /* FALLTHROUGH */
2447                 RTE_LOG(ERR, PMD, "operation %u not implemented", filter_op);
2448                 break;
2449         default:
2450                 RTE_LOG(ERR, PMD, "unknown operation %u", filter_op);
2451                 ret = -EINVAL;
2452                 break;
2453         }
2454         return ret;
2455
2456 free_filter:
2457         filter->fw_l2_filter_id = -1;
2458         bnxt_free_filter(bp, filter);
2459         return ret;
2460 }
2461
2462 static int
2463 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2464                     enum rte_filter_type filter_type,
2465                     enum rte_filter_op filter_op, void *arg)
2466 {
2467         int ret = 0;
2468
2469         switch (filter_type) {
2470         case RTE_ETH_FILTER_TUNNEL:
2471                 RTE_LOG(ERR, PMD,
2472                         "filter type: %d: To be implemented\n", filter_type);
2473                 break;
2474         case RTE_ETH_FILTER_FDIR:
2475                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2476                 break;
2477         case RTE_ETH_FILTER_NTUPLE:
2478                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2479                 break;
2480         case RTE_ETH_FILTER_ETHERTYPE:
2481                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2482                 break;
2483         case RTE_ETH_FILTER_GENERIC:
2484                 if (filter_op != RTE_ETH_FILTER_GET)
2485                         return -EINVAL;
2486                 *(const void **)arg = &bnxt_flow_ops;
2487                 break;
2488         default:
2489                 RTE_LOG(ERR, PMD,
2490                         "Filter type (%d) not supported", filter_type);
2491                 ret = -EINVAL;
2492                 break;
2493         }
2494         return ret;
2495 }
2496
2497 static const uint32_t *
2498 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2499 {
2500         static const uint32_t ptypes[] = {
2501                 RTE_PTYPE_L2_ETHER_VLAN,
2502                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2503                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2504                 RTE_PTYPE_L4_ICMP,
2505                 RTE_PTYPE_L4_TCP,
2506                 RTE_PTYPE_L4_UDP,
2507                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2508                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2509                 RTE_PTYPE_INNER_L4_ICMP,
2510                 RTE_PTYPE_INNER_L4_TCP,
2511                 RTE_PTYPE_INNER_L4_UDP,
2512                 RTE_PTYPE_UNKNOWN
2513         };
2514
2515         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2516                 return ptypes;
2517         return NULL;
2518 }
2519
2520
2521
2522 static int
2523 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2524 {
2525         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2526         int rc;
2527         uint32_t dir_entries;
2528         uint32_t entry_length;
2529
2530         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
2531                 __func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
2532                 bp->pdev->addr.devid, bp->pdev->addr.function);
2533
2534         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2535         if (rc != 0)
2536                 return rc;
2537
2538         return dir_entries * entry_length;
2539 }
2540
2541 static int
2542 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2543                 struct rte_dev_eeprom_info *in_eeprom)
2544 {
2545         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2546         uint32_t index;
2547         uint32_t offset;
2548
2549         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2550                 "len = %d\n", __func__, bp->pdev->addr.domain,
2551                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2552                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2553
2554         if (in_eeprom->offset == 0) /* special offset value to get directory */
2555                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2556                                                 in_eeprom->data);
2557
2558         index = in_eeprom->offset >> 24;
2559         offset = in_eeprom->offset & 0xffffff;
2560
2561         if (index != 0)
2562                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2563                                            in_eeprom->length, in_eeprom->data);
2564
2565         return 0;
2566 }
2567
2568 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2569 {
2570         switch (dir_type) {
2571         case BNX_DIR_TYPE_CHIMP_PATCH:
2572         case BNX_DIR_TYPE_BOOTCODE:
2573         case BNX_DIR_TYPE_BOOTCODE_2:
2574         case BNX_DIR_TYPE_APE_FW:
2575         case BNX_DIR_TYPE_APE_PATCH:
2576         case BNX_DIR_TYPE_KONG_FW:
2577         case BNX_DIR_TYPE_KONG_PATCH:
2578         case BNX_DIR_TYPE_BONO_FW:
2579         case BNX_DIR_TYPE_BONO_PATCH:
2580                 return true;
2581         }
2582
2583         return false;
2584 }
2585
2586 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2587 {
2588         switch (dir_type) {
2589         case BNX_DIR_TYPE_AVS:
2590         case BNX_DIR_TYPE_EXP_ROM_MBA:
2591         case BNX_DIR_TYPE_PCIE:
2592         case BNX_DIR_TYPE_TSCF_UCODE:
2593         case BNX_DIR_TYPE_EXT_PHY:
2594         case BNX_DIR_TYPE_CCM:
2595         case BNX_DIR_TYPE_ISCSI_BOOT:
2596         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2597         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2598                 return true;
2599         }
2600
2601         return false;
2602 }
2603
2604 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2605 {
2606         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2607                 bnxt_dir_type_is_other_exec_format(dir_type);
2608 }
2609
2610 static int
2611 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2612                 struct rte_dev_eeprom_info *in_eeprom)
2613 {
2614         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2615         uint8_t index, dir_op;
2616         uint16_t type, ext, ordinal, attr;
2617
2618         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2619                 "len = %d\n", __func__, bp->pdev->addr.domain,
2620                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2621                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2622
2623         if (!BNXT_PF(bp)) {
2624                 RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
2625                 return -EINVAL;
2626         }
2627
2628         type = in_eeprom->magic >> 16;
2629
2630         if (type == 0xffff) { /* special value for directory operations */
2631                 index = in_eeprom->magic & 0xff;
2632                 dir_op = in_eeprom->magic >> 8;
2633                 if (index == 0)
2634                         return -EINVAL;
2635                 switch (dir_op) {
2636                 case 0x0e: /* erase */
2637                         if (in_eeprom->offset != ~in_eeprom->magic)
2638                                 return -EINVAL;
2639                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2640                 default:
2641                         return -EINVAL;
2642                 }
2643         }
2644
2645         /* Create or re-write an NVM item: */
2646         if (bnxt_dir_type_is_executable(type) == true)
2647                 return -EOPNOTSUPP;
2648         ext = in_eeprom->magic & 0xffff;
2649         ordinal = in_eeprom->offset >> 16;
2650         attr = in_eeprom->offset & 0xffff;
2651
2652         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2653                                      in_eeprom->data, in_eeprom->length);
2654         return 0;
2655 }
2656
2657 /*
2658  * Initialization
2659  */
2660
2661 static const struct eth_dev_ops bnxt_dev_ops = {
2662         .dev_infos_get = bnxt_dev_info_get_op,
2663         .dev_close = bnxt_dev_close_op,
2664         .dev_configure = bnxt_dev_configure_op,
2665         .dev_start = bnxt_dev_start_op,
2666         .dev_stop = bnxt_dev_stop_op,
2667         .dev_set_link_up = bnxt_dev_set_link_up_op,
2668         .dev_set_link_down = bnxt_dev_set_link_down_op,
2669         .stats_get = bnxt_stats_get_op,
2670         .stats_reset = bnxt_stats_reset_op,
2671         .rx_queue_setup = bnxt_rx_queue_setup_op,
2672         .rx_queue_release = bnxt_rx_queue_release_op,
2673         .tx_queue_setup = bnxt_tx_queue_setup_op,
2674         .tx_queue_release = bnxt_tx_queue_release_op,
2675         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2676         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2677         .reta_update = bnxt_reta_update_op,
2678         .reta_query = bnxt_reta_query_op,
2679         .rss_hash_update = bnxt_rss_hash_update_op,
2680         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2681         .link_update = bnxt_link_update_op,
2682         .promiscuous_enable = bnxt_promiscuous_enable_op,
2683         .promiscuous_disable = bnxt_promiscuous_disable_op,
2684         .allmulticast_enable = bnxt_allmulticast_enable_op,
2685         .allmulticast_disable = bnxt_allmulticast_disable_op,
2686         .mac_addr_add = bnxt_mac_addr_add_op,
2687         .mac_addr_remove = bnxt_mac_addr_remove_op,
2688         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2689         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2690         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2691         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2692         .vlan_filter_set = bnxt_vlan_filter_set_op,
2693         .vlan_offload_set = bnxt_vlan_offload_set_op,
2694         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2695         .mtu_set = bnxt_mtu_set_op,
2696         .mac_addr_set = bnxt_set_default_mac_addr_op,
2697         .xstats_get = bnxt_dev_xstats_get_op,
2698         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2699         .xstats_reset = bnxt_dev_xstats_reset_op,
2700         .fw_version_get = bnxt_fw_version_get,
2701         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2702         .rxq_info_get = bnxt_rxq_info_get_op,
2703         .txq_info_get = bnxt_txq_info_get_op,
2704         .dev_led_on = bnxt_dev_led_on_op,
2705         .dev_led_off = bnxt_dev_led_off_op,
2706         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
2707         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
2708         .rx_queue_count = bnxt_rx_queue_count_op,
2709         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
2710         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
2711         .filter_ctrl = bnxt_filter_ctrl_op,
2712         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
2713         .get_eeprom_length    = bnxt_get_eeprom_length_op,
2714         .get_eeprom           = bnxt_get_eeprom_op,
2715         .set_eeprom           = bnxt_set_eeprom_op,
2716 };
2717
2718 static bool bnxt_vf_pciid(uint16_t id)
2719 {
2720         if (id == BROADCOM_DEV_ID_57304_VF ||
2721             id == BROADCOM_DEV_ID_57406_VF ||
2722             id == BROADCOM_DEV_ID_5731X_VF ||
2723             id == BROADCOM_DEV_ID_5741X_VF ||
2724             id == BROADCOM_DEV_ID_57414_VF ||
2725             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
2726                 return true;
2727         return false;
2728 }
2729
2730 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
2731 {
2732         struct bnxt *bp = eth_dev->data->dev_private;
2733         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2734         int rc;
2735
2736         /* enable device (incl. PCI PM wakeup), and bus-mastering */
2737         if (!pci_dev->mem_resource[0].addr) {
2738                 RTE_LOG(ERR, PMD,
2739                         "Cannot find PCI device base address, aborting\n");
2740                 rc = -ENODEV;
2741                 goto init_err_disable;
2742         }
2743
2744         bp->eth_dev = eth_dev;
2745         bp->pdev = pci_dev;
2746
2747         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
2748         if (!bp->bar0) {
2749                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
2750                 rc = -ENOMEM;
2751                 goto init_err_release;
2752         }
2753         return 0;
2754
2755 init_err_release:
2756         if (bp->bar0)
2757                 bp->bar0 = NULL;
2758
2759 init_err_disable:
2760
2761         return rc;
2762 }
2763
2764 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
2765
2766 #define ALLOW_FUNC(x)   \
2767         { \
2768                 typeof(x) arg = (x); \
2769                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
2770                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
2771         }
2772 static int
2773 bnxt_dev_init(struct rte_eth_dev *eth_dev)
2774 {
2775         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2776         char mz_name[RTE_MEMZONE_NAMESIZE];
2777         const struct rte_memzone *mz = NULL;
2778         static int version_printed;
2779         uint32_t total_alloc_len;
2780         phys_addr_t mz_phys_addr;
2781         struct bnxt *bp;
2782         int rc;
2783
2784         if (version_printed++ == 0)
2785                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
2786
2787         rte_eth_copy_pci_info(eth_dev, pci_dev);
2788         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
2789
2790         bp = eth_dev->data->dev_private;
2791
2792         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
2793         bp->dev_stopped = 1;
2794
2795         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2796                 goto skip_init;
2797
2798         if (bnxt_vf_pciid(pci_dev->id.device_id))
2799                 bp->flags |= BNXT_FLAG_VF;
2800
2801         rc = bnxt_init_board(eth_dev);
2802         if (rc) {
2803                 RTE_LOG(ERR, PMD,
2804                         "Board initialization failed rc: %x\n", rc);
2805                 goto error;
2806         }
2807 skip_init:
2808         eth_dev->dev_ops = &bnxt_dev_ops;
2809         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2810                 return 0;
2811         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
2812         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
2813
2814         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
2815                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2816                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2817                          pci_dev->addr.bus, pci_dev->addr.devid,
2818                          pci_dev->addr.function, "rx_port_stats");
2819                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2820                 mz = rte_memzone_lookup(mz_name);
2821                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2822                                 sizeof(struct rx_port_stats) + 512);
2823                 if (!mz) {
2824                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2825                                                  SOCKET_ID_ANY,
2826                                                  RTE_MEMZONE_2MB |
2827                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2828                         if (mz == NULL)
2829                                 return -ENOMEM;
2830                 }
2831                 memset(mz->addr, 0, mz->len);
2832                 mz_phys_addr = mz->phys_addr;
2833                 if ((unsigned long)mz->addr == mz_phys_addr) {
2834                         RTE_LOG(WARNING, PMD,
2835                                 "Memzone physical address same as virtual.\n");
2836                         RTE_LOG(WARNING, PMD,
2837                                 "Using rte_mem_virt2phy()\n");
2838                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2839                         if (mz_phys_addr == 0) {
2840                                 RTE_LOG(ERR, PMD,
2841                                 "unable to map address to physical memory\n");
2842                                 return -ENOMEM;
2843                         }
2844                 }
2845
2846                 bp->rx_mem_zone = (const void *)mz;
2847                 bp->hw_rx_port_stats = mz->addr;
2848                 bp->hw_rx_port_stats_map = mz_phys_addr;
2849
2850                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2851                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2852                          pci_dev->addr.bus, pci_dev->addr.devid,
2853                          pci_dev->addr.function, "tx_port_stats");
2854                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2855                 mz = rte_memzone_lookup(mz_name);
2856                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2857                                 sizeof(struct tx_port_stats) + 512);
2858                 if (!mz) {
2859                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2860                                                  SOCKET_ID_ANY,
2861                                                  RTE_MEMZONE_2MB |
2862                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2863                         if (mz == NULL)
2864                                 return -ENOMEM;
2865                 }
2866                 memset(mz->addr, 0, mz->len);
2867                 mz_phys_addr = mz->phys_addr;
2868                 if ((unsigned long)mz->addr == mz_phys_addr) {
2869                         RTE_LOG(WARNING, PMD,
2870                                 "Memzone physical address same as virtual.\n");
2871                         RTE_LOG(WARNING, PMD,
2872                                 "Using rte_mem_virt2phy()\n");
2873                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2874                         if (mz_phys_addr == 0) {
2875                                 RTE_LOG(ERR, PMD,
2876                                 "unable to map address to physical memory\n");
2877                                 return -ENOMEM;
2878                         }
2879                 }
2880
2881                 bp->tx_mem_zone = (const void *)mz;
2882                 bp->hw_tx_port_stats = mz->addr;
2883                 bp->hw_tx_port_stats_map = mz_phys_addr;
2884
2885                 bp->flags |= BNXT_FLAG_PORT_STATS;
2886         }
2887
2888         rc = bnxt_alloc_hwrm_resources(bp);
2889         if (rc) {
2890                 RTE_LOG(ERR, PMD,
2891                         "hwrm resource allocation failure rc: %x\n", rc);
2892                 goto error_free;
2893         }
2894         rc = bnxt_hwrm_ver_get(bp);
2895         if (rc)
2896                 goto error_free;
2897         bnxt_hwrm_queue_qportcfg(bp);
2898
2899         bnxt_hwrm_func_qcfg(bp);
2900
2901         /* Get the MAX capabilities for this function */
2902         rc = bnxt_hwrm_func_qcaps(bp);
2903         if (rc) {
2904                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
2905                 goto error_free;
2906         }
2907         if (bp->max_tx_rings == 0) {
2908                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
2909                 rc = -EBUSY;
2910                 goto error_free;
2911         }
2912         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
2913                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
2914         if (eth_dev->data->mac_addrs == NULL) {
2915                 RTE_LOG(ERR, PMD,
2916                         "Failed to alloc %u bytes needed to store MAC addr tbl",
2917                         ETHER_ADDR_LEN * bp->max_l2_ctx);
2918                 rc = -ENOMEM;
2919                 goto error_free;
2920         }
2921         /* Copy the permanent MAC from the qcap response address now. */
2922         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
2923         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
2924         bp->grp_info = rte_zmalloc("bnxt_grp_info",
2925                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
2926         if (!bp->grp_info) {
2927                 RTE_LOG(ERR, PMD,
2928                         "Failed to alloc %zu bytes needed to store group info table\n",
2929                         sizeof(*bp->grp_info) * bp->max_ring_grps);
2930                 rc = -ENOMEM;
2931                 goto error_free;
2932         }
2933
2934         /* Forward all requests if firmware is new enough */
2935         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
2936             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
2937             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
2938                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
2939         } else {
2940                 RTE_LOG(WARNING, PMD,
2941                         "Firmware too old for VF mailbox functionality\n");
2942                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
2943         }
2944
2945         /*
2946          * The following are used for driver cleanup.  If we disallow these,
2947          * VF drivers can't clean up cleanly.
2948          */
2949         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
2950         ALLOW_FUNC(HWRM_VNIC_FREE);
2951         ALLOW_FUNC(HWRM_RING_FREE);
2952         ALLOW_FUNC(HWRM_RING_GRP_FREE);
2953         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
2954         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
2955         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
2956         rc = bnxt_hwrm_func_driver_register(bp);
2957         if (rc) {
2958                 RTE_LOG(ERR, PMD,
2959                         "Failed to register driver");
2960                 rc = -EBUSY;
2961                 goto error_free;
2962         }
2963
2964         RTE_LOG(INFO, PMD,
2965                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
2966                 pci_dev->mem_resource[0].phys_addr,
2967                 pci_dev->mem_resource[0].addr);
2968
2969         rc = bnxt_hwrm_func_reset(bp);
2970         if (rc) {
2971                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
2972                 rc = -1;
2973                 goto error_free;
2974         }
2975
2976         if (BNXT_PF(bp)) {
2977                 //if (bp->pf.active_vfs) {
2978                         // TODO: Deallocate VF resources?
2979                 //}
2980                 if (bp->pdev->max_vfs) {
2981                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
2982                         if (rc) {
2983                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
2984                                 goto error_free;
2985                         }
2986                 } else {
2987                         rc = bnxt_hwrm_allocate_pf_only(bp);
2988                         if (rc) {
2989                                 RTE_LOG(ERR, PMD,
2990                                         "Failed to allocate PF resources\n");
2991                                 goto error_free;
2992                         }
2993                 }
2994         }
2995
2996         bnxt_hwrm_port_led_qcaps(bp);
2997
2998         rc = bnxt_setup_int(bp);
2999         if (rc)
3000                 goto error_free;
3001
3002         rc = bnxt_alloc_mem(bp);
3003         if (rc)
3004                 goto error_free_int;
3005
3006         rc = bnxt_request_int(bp);
3007         if (rc)
3008                 goto error_free_int;
3009
3010         rc = bnxt_alloc_def_cp_ring(bp);
3011         if (rc)
3012                 goto error_free_int;
3013
3014         bnxt_enable_int(bp);
3015
3016         return 0;
3017
3018 error_free_int:
3019         bnxt_disable_int(bp);
3020         bnxt_free_def_cp_ring(bp);
3021         bnxt_hwrm_func_buf_unrgtr(bp);
3022         bnxt_free_int(bp);
3023         bnxt_free_mem(bp);
3024 error_free:
3025         bnxt_dev_uninit(eth_dev);
3026 error:
3027         return rc;
3028 }
3029
3030 static int
3031 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3032         struct bnxt *bp = eth_dev->data->dev_private;
3033         int rc;
3034
3035         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3036                 return -EPERM;
3037
3038         bnxt_disable_int(bp);
3039         bnxt_free_int(bp);
3040         bnxt_free_mem(bp);
3041         if (eth_dev->data->mac_addrs != NULL) {
3042                 rte_free(eth_dev->data->mac_addrs);
3043                 eth_dev->data->mac_addrs = NULL;
3044         }
3045         if (bp->grp_info != NULL) {
3046                 rte_free(bp->grp_info);
3047                 bp->grp_info = NULL;
3048         }
3049         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3050         bnxt_free_hwrm_resources(bp);
3051         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3052         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3053         if (bp->dev_stopped == 0)
3054                 bnxt_dev_close_op(eth_dev);
3055         if (bp->pf.vf_info)
3056                 rte_free(bp->pf.vf_info);
3057         eth_dev->dev_ops = NULL;
3058         eth_dev->rx_pkt_burst = NULL;
3059         eth_dev->tx_pkt_burst = NULL;
3060
3061         return rc;
3062 }
3063
3064 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3065         struct rte_pci_device *pci_dev)
3066 {
3067         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3068                 bnxt_dev_init);
3069 }
3070
3071 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3072 {
3073         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3074 }
3075
3076 static struct rte_pci_driver bnxt_rte_pmd = {
3077         .id_table = bnxt_pci_id_map,
3078         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3079                 RTE_PCI_DRV_INTR_LSC,
3080         .probe = bnxt_pci_probe,
3081         .remove = bnxt_pci_remove,
3082 };
3083
3084 static bool
3085 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3086 {
3087         if (strcmp(dev->device->driver->name, drv->driver.name))
3088                 return false;
3089
3090         return true;
3091 }
3092
3093 bool is_bnxt_supported(struct rte_eth_dev *dev)
3094 {
3095         return is_device_supported(dev, &bnxt_rte_pmd);
3096 }
3097
3098 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3099 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3100 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");