drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  64 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  65 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  66 #define BROADCOM_DEV_ID_57301 0x16c8
  67 #define BROADCOM_DEV_ID_57302 0x16c9
  68 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  69 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  70 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  71 #define BROADCOM_DEV_ID_NS2 0x16cd
  72 #define BROADCOM_DEV_ID_57311 0x16ce
  73 #define BROADCOM_DEV_ID_57312 0x16cf
  74 #define BROADCOM_DEV_ID_57402 0x16d0
  75 #define BROADCOM_DEV_ID_57404 0x16d1
  76 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  77 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  78 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  79 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  80 #define BROADCOM_DEV_ID_57412 0x16d6
  81 #define BROADCOM_DEV_ID_57414 0x16d7
  82 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  83 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  84 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  85 #define BROADCOM_DEV_ID_57412_MF 0x16de
  86 #define BROADCOM_DEV_ID_57314 0x16df
  87 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  88 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  89 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  90 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  91 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  92 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  93 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  94 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  95 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  96 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  97 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  98
  99 static const struct rte_pci_id bnxt_pci_id_map[] = {
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 101                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 136         { .vendor_id = 0, /* sentinel */ },
 137 };
 138
 139 #define BNXT_ETH_RSS_SUPPORT (  \
 140         ETH_RSS_IPV4 |          \
 141         ETH_RSS_NONFRAG_IPV4_TCP |      \
 142         ETH_RSS_NONFRAG_IPV4_UDP |      \
 143         ETH_RSS_IPV6 |          \
 144         ETH_RSS_NONFRAG_IPV6_TCP |      \
 145         ETH_RSS_NONFRAG_IPV6_UDP)
 146
 147 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 148
 149 /***********************/
 150
 151 /*
 152  * High level utility functions
 153  */
 154
 155 static void bnxt_free_mem(struct bnxt *bp)
 156 {
 157         bnxt_free_filter_mem(bp);
 158         bnxt_free_vnic_attributes(bp);
 159         bnxt_free_vnic_mem(bp);
 160
 161         bnxt_free_stats(bp);
 162         bnxt_free_tx_rings(bp);
 163         bnxt_free_rx_rings(bp);
 164         bnxt_free_def_cp_ring(bp);
 165 }
 166
 167 static int bnxt_alloc_mem(struct bnxt *bp)
 168 {
 169         int rc;
 170
 171         /* Default completion ring */
 172         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 177                               bp->def_cp_ring, "def_cp");
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         unsigned int i, rss_idx, fw_idx;
 203         struct rte_eth_link new;
 204         int rc;
 205
 206         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 208                 bp->flags |= BNXT_FLAG_JUMBO;
 209         } else {
 210                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 211                 bp->flags &= ~BNXT_FLAG_JUMBO;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_alloc_hwrm_rings(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_mq_rx_configure(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         /* VNIC configuration */
 239         for (i = 0; i < bp->nr_vnics; i++) {
 240                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 241
 242                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 243                 if (rc) {
 244                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 245                                 i, rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD,
 252                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 253                                 i, rc);
 254                         goto err_out;
 255                 }
 256
 257                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 265                 if (rc) {
 266                         RTE_LOG(ERR, PMD,
 267                                 "HWRM vnic %d filter failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271                 if (vnic->rss_table && vnic->hash_type) {
 272                         /*
 273                          * Fill the RSS hash & redirection table with
 274                          * ring group ids for all VNICs
 275                          */
 276                         for (rss_idx = 0, fw_idx = 0;
 277                              rss_idx < HW_HASH_INDEX_SIZE;
 278                              rss_idx++, fw_idx++) {
 279                                 if (vnic->fw_grp_ids[fw_idx] ==
 280                                     INVALID_HW_RING_ID)
 281                                         fw_idx = 0;
 282                                 vnic->rss_table[rss_idx] =
 283                                                 vnic->fw_grp_ids[fw_idx];
 284                         }
 285                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 286                         if (rc) {
 287                                 RTE_LOG(ERR, PMD,
 288                                         "HWRM vnic %d set RSS failure rc: %x\n",
 289                                         i, rc);
 290                                 goto err_out;
 291                         }
 292                 }
 293
 294                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 295
 296                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 297                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 298                 else
 299                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 300         }
 301         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 302         if (rc) {
 303                 RTE_LOG(ERR, PMD,
 304                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 305                 goto err_out;
 306         }
 307
 308         rc = bnxt_get_hwrm_link_config(bp, &new);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 311                 goto err_out;
 312         }
 313
 314         if (!bp->link_info.link_up) {
 315                 rc = bnxt_set_hwrm_link_config(bp, true);
 316                 if (rc) {
 317                         RTE_LOG(ERR, PMD,
 318                                 "HWRM link config failure rc: %x\n", rc);
 319                         goto err_out;
 320                 }
 321         }
 322
 323         return 0;
 324
 325 err_out:
 326         bnxt_free_all_hwrm_resources(bp);
 327
 328         return rc;
 329 }
 330
 331 static int bnxt_shutdown_nic(struct bnxt *bp)
 332 {
 333         bnxt_free_all_hwrm_resources(bp);
 334         bnxt_free_all_filters(bp);
 335         bnxt_free_all_vnics(bp);
 336         return 0;
 337 }
 338
 339 static int bnxt_init_nic(struct bnxt *bp)
 340 {
 341         int rc;
 342
 343         bnxt_init_ring_grps(bp);
 344         bnxt_init_vnics(bp);
 345         bnxt_init_filters(bp);
 346
 347         rc = bnxt_init_chip(bp);
 348         if (rc)
 349                 return rc;
 350
 351         return 0;
 352 }
 353
 354 /*
 355  * Device configuration and status function
 356  */
 357
 358 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 359                                   struct rte_eth_dev_info *dev_info)
 360 {
 361         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 362         uint16_t max_vnics, i, j, vpool, vrxq;
 363         unsigned int max_rx_rings;
 364
 365         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 366
 367         /* MAC Specifics */
 368         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 369         dev_info->max_hash_mac_addrs = 0;
 370
 371         /* PF/VF specifics */
 372         if (BNXT_PF(bp))
 373                 dev_info->max_vfs = bp->pdev->max_vfs;
 374         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 375                                                 RTE_MIN(bp->max_rsscos_ctx,
 376                                                 bp->max_stat_ctx)));
 377         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 378         dev_info->max_rx_queues = max_rx_rings;
 379         dev_info->max_tx_queues = max_rx_rings;
 380         dev_info->reta_size = bp->max_rsscos_ctx;
 381         max_vnics = bp->max_vnics;
 382
 383         /* Fast path specifics */
 384         dev_info->min_rx_bufsize = 1;
 385         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 386                                   + VLAN_TAG_SIZE;
 387         dev_info->rx_offload_capa = 0;
 388         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 389                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 390                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 391                                         DEV_TX_OFFLOAD_TCP_TSO |
 392                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 393                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 394                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 395                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 396                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 397
 398         /* *INDENT-OFF* */
 399         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 400                 .rx_thresh = {
 401                         .pthresh = 8,
 402                         .hthresh = 8,
 403                         .wthresh = 0,
 404                 },
 405                 .rx_free_thresh = 32,
 406                 .rx_drop_en = 0,
 407         };
 408
 409         dev_info->default_txconf = (struct rte_eth_txconf) {
 410                 .tx_thresh = {
 411                         .pthresh = 32,
 412                         .hthresh = 0,
 413                         .wthresh = 0,
 414                 },
 415                 .tx_free_thresh = 32,
 416                 .tx_rs_thresh = 32,
 417                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 418                              ETH_TXQ_FLAGS_NOOFFLOADS,
 419         };
 420         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 421
 422         /* *INDENT-ON* */
 423
 424         /*
 425          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 426          *       need further investigation.
 427          */
 428
 429         /* VMDq resources */
 430         vpool = 64; /* ETH_64_POOLS */
 431         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 432         for (i = 0; i < 4; vpool >>= 1, i++) {
 433                 if (max_vnics > vpool) {
 434                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 435                                 if (dev_info->max_rx_queues > vrxq) {
 436                                         if (vpool > vrxq)
 437                                                 vpool = vrxq;
 438                                         goto found;
 439                                 }
 440                         }
 441                         /* Not enough resources to support VMDq */
 442                         break;
 443                 }
 444         }
 445         /* Not enough resources to support VMDq */
 446         vpool = 0;
 447         vrxq = 0;
 448 found:
 449         dev_info->max_vmdq_pools = vpool;
 450         dev_info->vmdq_queue_num = vrxq;
 451
 452         dev_info->vmdq_pool_base = 0;
 453         dev_info->vmdq_queue_base = 0;
 454 }
 455
 456 /* Configure the device based on the configuration provided */
 457 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 458 {
 459         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 460
 461         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 462         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 463
 464         /* Inherit new configurations */
 465         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 466         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 467         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 468         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 469
 470         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 471                 eth_dev->data->mtu =
 472                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 473                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 474         return 0;
 475 }
 476
 477 static inline int
 478 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 479                                 struct rte_eth_link *link)
 480 {
 481         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 482         struct rte_eth_link *src = link;
 483
 484         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 485                                         *(uint64_t *)src) == 0)
 486                 return 1;
 487
 488         return 0;
 489 }
 490
 491 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 492 {
 493         struct rte_eth_link *link = &eth_dev->data->dev_link;
 494
 495         if (link->link_status)
 496                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 497                         (uint8_t)(eth_dev->data->port_id),
 498                         (uint32_t)link->link_speed,
 499                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 500                         ("full-duplex") : ("half-duplex\n"));
 501         else
 502                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 503                         (uint8_t)(eth_dev->data->port_id));
 504 }
 505
 506 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 507 {
 508         bnxt_print_link_info(eth_dev);
 509         return 0;
 510 }
 511
 512 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 513 {
 514         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 515         int vlan_mask = 0;
 516         int rc;
 517
 518         bp->dev_stopped = 0;
 519
 520         rc = bnxt_init_nic(bp);
 521         if (rc)
 522                 goto error;
 523
 524         bnxt_link_update_op(eth_dev, 0);
 525
 526         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 527                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 528         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 529                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 530         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 531
 532         return 0;
 533
 534 error:
 535         bnxt_shutdown_nic(bp);
 536         bnxt_free_tx_mbufs(bp);
 537         bnxt_free_rx_mbufs(bp);
 538         return rc;
 539 }
 540
 541 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 542 {
 543         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 544
 545         eth_dev->data->dev_link.link_status = 1;
 546         bnxt_set_hwrm_link_config(bp, true);
 547         return 0;
 548 }
 549
 550 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 551 {
 552         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 553
 554         eth_dev->data->dev_link.link_status = 0;
 555         bnxt_set_hwrm_link_config(bp, false);
 556         return 0;
 557 }
 558
 559 /* Unload the driver, release resources */
 560 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 561 {
 562         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 563
 564         if (bp->eth_dev->data->dev_started) {
 565                 /* TBD: STOP HW queues DMA */
 566                 eth_dev->data->dev_link.link_status = 0;
 567         }
 568         bnxt_set_hwrm_link_config(bp, false);
 569         bnxt_hwrm_port_clr_stats(bp);
 570         bnxt_shutdown_nic(bp);
 571         bp->dev_stopped = 1;
 572 }
 573
 574 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 575 {
 576         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 577
 578         if (bp->dev_stopped == 0)
 579                 bnxt_dev_stop_op(eth_dev);
 580
 581         bnxt_free_tx_mbufs(bp);
 582         bnxt_free_rx_mbufs(bp);
 583         bnxt_free_mem(bp);
 584         if (eth_dev->data->mac_addrs != NULL) {
 585                 rte_free(eth_dev->data->mac_addrs);
 586                 eth_dev->data->mac_addrs = NULL;
 587         }
 588         if (bp->grp_info != NULL) {
 589                 rte_free(bp->grp_info);
 590                 bp->grp_info = NULL;
 591         }
 592 }
 593
 594 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 595                                     uint32_t index)
 596 {
 597         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 598         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 599         struct bnxt_vnic_info *vnic;
 600         struct bnxt_filter_info *filter, *temp_filter;
 601         int i;
 602
 603         /*
 604          * Loop through all VNICs from the specified filter flow pools to
 605          * remove the corresponding MAC addr filter
 606          */
 607         for (i = 0; i < MAX_FF_POOLS; i++) {
 608                 if (!(pool_mask & (1ULL << i)))
 609                         continue;
 610
 611                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 612                         filter = STAILQ_FIRST(&vnic->filter);
 613                         while (filter) {
 614                                 temp_filter = STAILQ_NEXT(filter, next);
 615                                 if (filter->mac_index == index) {
 616                                         STAILQ_REMOVE(&vnic->filter, filter,
 617                                                       bnxt_filter_info, next);
 618                                         bnxt_hwrm_clear_filter(bp, filter);
 619                                         filter->mac_index = INVALID_MAC_INDEX;
 620                                         memset(&filter->l2_addr, 0,
 621                                                ETHER_ADDR_LEN);
 622                                         STAILQ_INSERT_TAIL(
 623                                                         &bp->free_filter_list,
 624                                                         filter, next);
 625                                 }
 626                                 filter = temp_filter;
 627                         }
 628                 }
 629         }
 630 }
 631
 632 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 633                                 struct ether_addr *mac_addr,
 634                                 uint32_t index, uint32_t pool)
 635 {
 636         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 637         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 638         struct bnxt_filter_info *filter;
 639
 640         if (BNXT_VF(bp)) {
 641                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 642                 return -ENOTSUP;
 643         }
 644
 645         if (!vnic) {
 646                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 647                 return -EINVAL;
 648         }
 649         /* Attach requested MAC address to the new l2_filter */
 650         STAILQ_FOREACH(filter, &vnic->filter, next) {
 651                 if (filter->mac_index == index) {
 652                         RTE_LOG(ERR, PMD,
 653                                 "MAC addr already existed for pool %d\n", pool);
 654                         return -EINVAL;
 655                 }
 656         }
 657         filter = bnxt_alloc_filter(bp);
 658         if (!filter) {
 659                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 660                 return -ENODEV;
 661         }
 662         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 663         filter->mac_index = index;
 664         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 665         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 666 }
 667
 668 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 669 {
 670         int rc = 0;
 671         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 672         struct rte_eth_link new;
 673         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 674
 675         memset(&new, 0, sizeof(new));
 676         do {
 677                 /* Retrieve link info from hardware */
 678                 rc = bnxt_get_hwrm_link_config(bp, &new);
 679                 if (rc) {
 680                         new.link_speed = ETH_LINK_SPEED_100M;
 681                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 682                         RTE_LOG(ERR, PMD,
 683                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 684                         goto out;
 685                 }
 686                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 687
 688                 if (!wait_to_complete)
 689                         break;
 690         } while (!new.link_status && cnt--);
 691
 692 out:
 693         /* Timed out or success */
 694         if (new.link_status != eth_dev->data->dev_link.link_status ||
 695         new.link_speed != eth_dev->data->dev_link.link_speed) {
 696                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 697                 bnxt_print_link_info(eth_dev);
 698         }
 699
 700         return rc;
 701 }
 702
 703 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 704 {
 705         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 706         struct bnxt_vnic_info *vnic;
 707
 708         if (bp->vnic_info == NULL)
 709                 return;
 710
 711         vnic = &bp->vnic_info[0];
 712
 713         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 714         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 715 }
 716
 717 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 718 {
 719         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 720         struct bnxt_vnic_info *vnic;
 721
 722         if (bp->vnic_info == NULL)
 723                 return;
 724
 725         vnic = &bp->vnic_info[0];
 726
 727         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 728         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 729 }
 730
 731 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 732 {
 733         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 734         struct bnxt_vnic_info *vnic;
 735
 736         if (bp->vnic_info == NULL)
 737                 return;
 738
 739         vnic = &bp->vnic_info[0];
 740
 741         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 742         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 743 }
 744
 745 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 746 {
 747         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 748         struct bnxt_vnic_info *vnic;
 749
 750         if (bp->vnic_info == NULL)
 751                 return;
 752
 753         vnic = &bp->vnic_info[0];
 754
 755         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 756         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 757 }
 758
 759 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 760                             struct rte_eth_rss_reta_entry64 *reta_conf,
 761                             uint16_t reta_size)
 762 {
 763         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 764         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 765         struct bnxt_vnic_info *vnic;
 766         int i;
 767
 768         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 769                 return -EINVAL;
 770
 771         if (reta_size != HW_HASH_INDEX_SIZE) {
 772                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 773                         "(%d) must equal the size supported by the hardware "
 774                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 775                 return -EINVAL;
 776         }
 777         /* Update the RSS VNIC(s) */
 778         for (i = 0; i < MAX_FF_POOLS; i++) {
 779                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 780                         memcpy(vnic->rss_table, reta_conf, reta_size);
 781
 782                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 783                 }
 784         }
 785         return 0;
 786 }
 787
 788 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 789                               struct rte_eth_rss_reta_entry64 *reta_conf,
 790                               uint16_t reta_size)
 791 {
 792         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 793         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 794         struct rte_intr_handle *intr_handle
 795                 = &bp->pdev->intr_handle;
 796
 797         /* Retrieve from the default VNIC */
 798         if (!vnic)
 799                 return -EINVAL;
 800         if (!vnic->rss_table)
 801                 return -EINVAL;
 802
 803         if (reta_size != HW_HASH_INDEX_SIZE) {
 804                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 805                         "(%d) must equal the size supported by the hardware "
 806                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 807                 return -EINVAL;
 808         }
 809         /* EW - need to revisit here copying from u64 to u16 */
 810         memcpy(reta_conf, vnic->rss_table, reta_size);
 811
 812         if (rte_intr_allow_others(intr_handle)) {
 813                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 814                         bnxt_dev_lsc_intr_setup(eth_dev);
 815         }
 816
 817         return 0;
 818 }
 819
 820 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 821                                    struct rte_eth_rss_conf *rss_conf)
 822 {
 823         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 824         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 825         struct bnxt_vnic_info *vnic;
 826         uint16_t hash_type = 0;
 827         int i;
 828
 829         /*
 830          * If RSS enablement were different than dev_configure,
 831          * then return -EINVAL
 832          */
 833         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 834                 if (!rss_conf->rss_hf)
 835                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 836         } else {
 837                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 838                         return -EINVAL;
 839         }
 840
 841         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 842         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 843
 844         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 845                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 846         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 847                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 848         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 849                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 850         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 851                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 852         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 853                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 854         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 855                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 856
 857         /* Update the RSS VNIC(s) */
 858         for (i = 0; i < MAX_FF_POOLS; i++) {
 859                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 860                         vnic->hash_type = hash_type;
 861
 862                         /*
 863                          * Use the supplied key if the key length is
 864                          * acceptable and the rss_key is not NULL
 865                          */
 866                         if (rss_conf->rss_key &&
 867                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 868                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 869                                        rss_conf->rss_key_len);
 870
 871                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 872                 }
 873         }
 874         return 0;
 875 }
 876
 877 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 878                                      struct rte_eth_rss_conf *rss_conf)
 879 {
 880         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 881         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 882         int len;
 883         uint32_t hash_types;
 884
 885         /* RSS configuration is the same for all VNICs */
 886         if (vnic && vnic->rss_hash_key) {
 887                 if (rss_conf->rss_key) {
 888                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 889                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 890                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 891                 }
 892
 893                 hash_types = vnic->hash_type;
 894                 rss_conf->rss_hf = 0;
 895                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 896                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 897                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 898                 }
 899                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 900                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 901                         hash_types &=
 902                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 903                 }
 904                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 905                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 906                         hash_types &=
 907                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 908                 }
 909                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 910                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 911                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 912                 }
 913                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 914                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 915                         hash_types &=
 916                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 917                 }
 918                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 919                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 920                         hash_types &=
 921                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 922                 }
 923                 if (hash_types) {
 924                         RTE_LOG(ERR, PMD,
 925                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 926                                 vnic->hash_type);
 927                         return -ENOTSUP;
 928                 }
 929         } else {
 930                 rss_conf->rss_hf = 0;
 931         }
 932         return 0;
 933 }
 934
 935 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 936                                struct rte_eth_fc_conf *fc_conf)
 937 {
 938         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 939         struct rte_eth_link link_info;
 940         int rc;
 941
 942         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 943         if (rc)
 944                 return rc;
 945
 946         memset(fc_conf, 0, sizeof(*fc_conf));
 947         if (bp->link_info.auto_pause)
 948                 fc_conf->autoneg = 1;
 949         switch (bp->link_info.pause) {
 950         case 0:
 951                 fc_conf->mode = RTE_FC_NONE;
 952                 break;
 953         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 954                 fc_conf->mode = RTE_FC_TX_PAUSE;
 955                 break;
 956         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 957                 fc_conf->mode = RTE_FC_RX_PAUSE;
 958                 break;
 959         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 960                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 961                 fc_conf->mode = RTE_FC_FULL;
 962                 break;
 963         }
 964         return 0;
 965 }
 966
 967 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 968                                struct rte_eth_fc_conf *fc_conf)
 969 {
 970         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 971
 972         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 973                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 974                 return -ENOTSUP;
 975         }
 976
 977         switch (fc_conf->mode) {
 978         case RTE_FC_NONE:
 979                 bp->link_info.auto_pause = 0;
 980                 bp->link_info.force_pause = 0;
 981                 break;
 982         case RTE_FC_RX_PAUSE:
 983                 if (fc_conf->autoneg) {
 984                         bp->link_info.auto_pause =
 985                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 986                         bp->link_info.force_pause = 0;
 987                 } else {
 988                         bp->link_info.auto_pause = 0;
 989                         bp->link_info.force_pause =
 990                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 991                 }
 992                 break;
 993         case RTE_FC_TX_PAUSE:
 994                 if (fc_conf->autoneg) {
 995                         bp->link_info.auto_pause =
 996                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 997                         bp->link_info.force_pause = 0;
 998                 } else {
 999                         bp->link_info.auto_pause = 0;
1000                         bp->link_info.force_pause =
1001                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1002                 }
1003                 break;
1004         case RTE_FC_FULL:
1005                 if (fc_conf->autoneg) {
1006                         bp->link_info.auto_pause =
1007                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1008                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1009                         bp->link_info.force_pause = 0;
1010                 } else {
1011                         bp->link_info.auto_pause = 0;
1012                         bp->link_info.force_pause =
1013                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1014                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1015                 }
1016                 break;
1017         }
1018         return bnxt_set_hwrm_link_config(bp, true);
1019 }
1020
1021 /* Add UDP tunneling port */
1022 static int
1023 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1024                          struct rte_eth_udp_tunnel *udp_tunnel)
1025 {
1026         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1027         uint16_t tunnel_type = 0;
1028         int rc = 0;
1029
1030         switch (udp_tunnel->prot_type) {
1031         case RTE_TUNNEL_TYPE_VXLAN:
1032                 if (bp->vxlan_port_cnt) {
1033                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1034                                 udp_tunnel->udp_port);
1035                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1036                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1037                                 return -ENOSPC;
1038                         }
1039                         bp->vxlan_port_cnt++;
1040                         return 0;
1041                 }
1042                 tunnel_type =
1043                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1044                 bp->vxlan_port_cnt++;
1045                 break;
1046         case RTE_TUNNEL_TYPE_GENEVE:
1047                 if (bp->geneve_port_cnt) {
1048                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1049                                 udp_tunnel->udp_port);
1050                         if (bp->geneve_port != udp_tunnel->udp_port) {
1051                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1052                                 return -ENOSPC;
1053                         }
1054                         bp->geneve_port_cnt++;
1055                         return 0;
1056                 }
1057                 tunnel_type =
1058                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1059                 bp->geneve_port_cnt++;
1060                 break;
1061         default:
1062                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1063                 return -ENOTSUP;
1064         }
1065         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1066                                              tunnel_type);
1067         return rc;
1068 }
1069
1070 static int
1071 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1072                          struct rte_eth_udp_tunnel *udp_tunnel)
1073 {
1074         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1075         uint16_t tunnel_type = 0;
1076         uint16_t port = 0;
1077         int rc = 0;
1078
1079         switch (udp_tunnel->prot_type) {
1080         case RTE_TUNNEL_TYPE_VXLAN:
1081                 if (!bp->vxlan_port_cnt) {
1082                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1083                         return -EINVAL;
1084                 }
1085                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1086                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1087                                 udp_tunnel->udp_port, bp->vxlan_port);
1088                         return -EINVAL;
1089                 }
1090                 if (--bp->vxlan_port_cnt)
1091                         return 0;
1092
1093                 tunnel_type =
1094                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1095                 port = bp->vxlan_fw_dst_port_id;
1096                 break;
1097         case RTE_TUNNEL_TYPE_GENEVE:
1098                 if (!bp->geneve_port_cnt) {
1099                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1100                         return -EINVAL;
1101                 }
1102                 if (bp->geneve_port != udp_tunnel->udp_port) {
1103                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1104                                 udp_tunnel->udp_port, bp->geneve_port);
1105                         return -EINVAL;
1106                 }
1107                 if (--bp->geneve_port_cnt)
1108                         return 0;
1109
1110                 tunnel_type =
1111                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1112                 port = bp->geneve_fw_dst_port_id;
1113                 break;
1114         default:
1115                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1116                 return -ENOTSUP;
1117         }
1118
1119         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1120         if (!rc) {
1121                 if (tunnel_type ==
1122                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1123                         bp->vxlan_port = 0;
1124                 if (tunnel_type ==
1125                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1126                         bp->geneve_port = 0;
1127         }
1128         return rc;
1129 }
1130
1131 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1132 {
1133         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1134         struct bnxt_vnic_info *vnic;
1135         unsigned int i;
1136         int rc = 0;
1137         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1138
1139         /* Cycle through all VNICs */
1140         for (i = 0; i < bp->nr_vnics; i++) {
1141                 /*
1142                  * For each VNIC and each associated filter(s)
1143                  * if VLAN exists && VLAN matches vlan_id
1144                  *      remove the MAC+VLAN filter
1145                  *      add a new MAC only filter
1146                  * else
1147                  *      VLAN filter doesn't exist, just skip and continue
1148                  */
1149                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1150                         filter = STAILQ_FIRST(&vnic->filter);
1151                         while (filter) {
1152                                 temp_filter = STAILQ_NEXT(filter, next);
1153
1154                                 if (filter->enables & chk &&
1155                                     filter->l2_ovlan == vlan_id) {
1156                                         /* Must delete the filter */
1157                                         STAILQ_REMOVE(&vnic->filter, filter,
1158                                                       bnxt_filter_info, next);
1159                                         bnxt_hwrm_clear_filter(bp, filter);
1160                                         STAILQ_INSERT_TAIL(
1161                                                         &bp->free_filter_list,
1162                                                         filter, next);
1163
1164                                         /*
1165                                          * Need to examine to see if the MAC
1166                                          * filter already existed or not before
1167                                          * allocating a new one
1168                                          */
1169
1170                                         new_filter = bnxt_alloc_filter(bp);
1171                                         if (!new_filter) {
1172                                                 RTE_LOG(ERR, PMD,
1173                                                         "MAC/VLAN filter alloc failed\n");
1174                                                 rc = -ENOMEM;
1175                                                 goto exit;
1176                                         }
1177                                         STAILQ_INSERT_TAIL(&vnic->filter,
1178                                                            new_filter, next);
1179                                         /* Inherit MAC from previous filter */
1180                                         new_filter->mac_index =
1181                                                         filter->mac_index;
1182                                         memcpy(new_filter->l2_addr,
1183                                                filter->l2_addr, ETHER_ADDR_LEN);
1184                                         /* MAC only filter */
1185                                         rc = bnxt_hwrm_set_filter(bp,
1186                                                         vnic->fw_vnic_id,
1187                                                         new_filter);
1188                                         if (rc)
1189                                                 goto exit;
1190                                         RTE_LOG(INFO, PMD,
1191                                                 "Del Vlan filter for %d\n",
1192                                                 vlan_id);
1193                                 }
1194                                 filter = temp_filter;
1195                         }
1196                 }
1197         }
1198 exit:
1199         return rc;
1200 }
1201
1202 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1203 {
1204         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1205         struct bnxt_vnic_info *vnic;
1206         unsigned int i;
1207         int rc = 0;
1208         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1209                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1210         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1211
1212         /* Cycle through all VNICs */
1213         for (i = 0; i < bp->nr_vnics; i++) {
1214                 /*
1215                  * For each VNIC and each associated filter(s)
1216                  * if VLAN exists:
1217                  *   if VLAN matches vlan_id
1218                  *      VLAN filter already exists, just skip and continue
1219                  *   else
1220                  *      add a new MAC+VLAN filter
1221                  * else
1222                  *   Remove the old MAC only filter
1223                  *    Add a new MAC+VLAN filter
1224                  */
1225                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1226                         filter = STAILQ_FIRST(&vnic->filter);
1227                         while (filter) {
1228                                 temp_filter = STAILQ_NEXT(filter, next);
1229
1230                                 if (filter->enables & chk) {
1231                                         if (filter->l2_ovlan == vlan_id)
1232                                                 goto cont;
1233                                 } else {
1234                                         /* Must delete the MAC filter */
1235                                         STAILQ_REMOVE(&vnic->filter, filter,
1236                                                       bnxt_filter_info, next);
1237                                         bnxt_hwrm_clear_filter(bp, filter);
1238                                         filter->l2_ovlan = 0;
1239                                         STAILQ_INSERT_TAIL(
1240                                                         &bp->free_filter_list,
1241                                                         filter, next);
1242                                 }
1243                                 new_filter = bnxt_alloc_filter(bp);
1244                                 if (!new_filter) {
1245                                         RTE_LOG(ERR, PMD,
1246                                                 "MAC/VLAN filter alloc failed\n");
1247                                         rc = -ENOMEM;
1248                                         goto exit;
1249                                 }
1250                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1251                                                    next);
1252                                 /* Inherit MAC from the previous filter */
1253                                 new_filter->mac_index = filter->mac_index;
1254                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1255                                        ETHER_ADDR_LEN);
1256                                 /* MAC + VLAN ID filter */
1257                                 new_filter->l2_ovlan = vlan_id;
1258                                 new_filter->l2_ovlan_mask = 0xF000;
1259                                 new_filter->enables |= en;
1260                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1261                                                           new_filter);
1262                                 if (rc)
1263                                         goto exit;
1264                                 RTE_LOG(INFO, PMD,
1265                                         "Added Vlan filter for %d\n", vlan_id);
1266 cont:
1267                                 filter = temp_filter;
1268                         }
1269                 }
1270         }
1271 exit:
1272         return rc;
1273 }
1274
1275 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1276                                    uint16_t vlan_id, int on)
1277 {
1278         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1279
1280         /* These operations apply to ALL existing MAC/VLAN filters */
1281         if (on)
1282                 return bnxt_add_vlan_filter(bp, vlan_id);
1283         else
1284                 return bnxt_del_vlan_filter(bp, vlan_id);
1285 }
1286
1287 static void
1288 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1289 {
1290         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1291         unsigned int i;
1292
1293         if (mask & ETH_VLAN_FILTER_MASK) {
1294                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1295                         /* Remove any VLAN filters programmed */
1296                         for (i = 0; i < 4095; i++)
1297                                 bnxt_del_vlan_filter(bp, i);
1298                 }
1299                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1300                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1301         }
1302
1303         if (mask & ETH_VLAN_STRIP_MASK) {
1304                 /* Enable or disable VLAN stripping */
1305                 for (i = 0; i < bp->nr_vnics; i++) {
1306                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1307                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1308                                 vnic->vlan_strip = true;
1309                         else
1310                                 vnic->vlan_strip = false;
1311                         bnxt_hwrm_vnic_cfg(bp, vnic);
1312                 }
1313                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1314                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1315         }
1316
1317         if (mask & ETH_VLAN_EXTEND_MASK)
1318                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1319 }
1320
1321 static void
1322 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1323 {
1324         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1325         /* Default Filter is tied to VNIC 0 */
1326         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1327         struct bnxt_filter_info *filter;
1328         int rc;
1329
1330         if (BNXT_VF(bp))
1331                 return;
1332
1333         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1334         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1335
1336         STAILQ_FOREACH(filter, &vnic->filter, next) {
1337                 /* Default Filter is at Index 0 */
1338                 if (filter->mac_index != 0)
1339                         continue;
1340                 rc = bnxt_hwrm_clear_filter(bp, filter);
1341                 if (rc)
1342                         break;
1343                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1344                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1345                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1346                 filter->enables |=
1347                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1348                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1349                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1350                 if (rc)
1351                         break;
1352                 filter->mac_index = 0;
1353                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1354         }
1355 }
1356
1357 static int
1358 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1359                           struct ether_addr *mc_addr_set,
1360                           uint32_t nb_mc_addr)
1361 {
1362         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1363         char *mc_addr_list = (char *)mc_addr_set;
1364         struct bnxt_vnic_info *vnic;
1365         uint32_t off = 0, i = 0;
1366
1367         vnic = &bp->vnic_info[0];
1368
1369         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1370                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1371                 goto allmulti;
1372         }
1373
1374         /* TODO Check for Duplicate mcast addresses */
1375         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1376         for (i = 0; i < nb_mc_addr; i++) {
1377                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1378                 off += ETHER_ADDR_LEN;
1379         }
1380
1381         vnic->mc_addr_cnt = i;
1382
1383 allmulti:
1384         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1385 }
1386
1387 static int
1388 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1389 {
1390         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1391         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1392         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1393         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1394         int ret;
1395
1396         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1397                         fw_major, fw_minor, fw_updt);
1398
1399         ret += 1; /* add the size of '\0' */
1400         if (fw_size < (uint32_t)ret)
1401                 return ret;
1402         else
1403                 return 0;
1404 }
1405
1406 static void
1407 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1408         struct rte_eth_rxq_info *qinfo)
1409 {
1410         struct bnxt_rx_queue *rxq;
1411
1412         rxq = dev->data->rx_queues[queue_id];
1413
1414         qinfo->mp = rxq->mb_pool;
1415         qinfo->scattered_rx = dev->data->scattered_rx;
1416         qinfo->nb_desc = rxq->nb_rx_desc;
1417
1418         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1419         qinfo->conf.rx_drop_en = 0;
1420         qinfo->conf.rx_deferred_start = 0;
1421 }
1422
1423 static void
1424 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1425         struct rte_eth_txq_info *qinfo)
1426 {
1427         struct bnxt_tx_queue *txq;
1428
1429         txq = dev->data->tx_queues[queue_id];
1430
1431         qinfo->nb_desc = txq->nb_tx_desc;
1432
1433         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1434         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1435         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1436
1437         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1438         qinfo->conf.tx_rs_thresh = 0;
1439         qinfo->conf.txq_flags = txq->txq_flags;
1440         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1441 }
1442
1443 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1444 {
1445         struct bnxt *bp = eth_dev->data->dev_private;
1446         struct rte_eth_dev_info dev_info;
1447         uint32_t max_dev_mtu;
1448         uint32_t rc = 0;
1449         uint32_t i;
1450
1451         bnxt_dev_info_get_op(eth_dev, &dev_info);
1452         max_dev_mtu = dev_info.max_rx_pktlen -
1453                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1454
1455         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1456                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1457                         ETHER_MIN_MTU, max_dev_mtu);
1458                 return -EINVAL;
1459         }
1460
1461
1462         if (new_mtu > ETHER_MTU) {
1463                 bp->flags |= BNXT_FLAG_JUMBO;
1464                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1465         } else {
1466                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1467                 bp->flags &= ~BNXT_FLAG_JUMBO;
1468         }
1469
1470         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1471                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1472
1473         eth_dev->data->mtu = new_mtu;
1474         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1475
1476         for (i = 0; i < bp->nr_vnics; i++) {
1477                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1478
1479                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1480                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1481                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1482                 if (rc)
1483                         break;
1484
1485                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1486                 if (rc)
1487                         return rc;
1488         }
1489
1490         return rc;
1491 }
1492
1493 static int
1494 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1495 {
1496         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1497         uint16_t vlan = bp->vlan;
1498         int rc;
1499
1500         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1501                 RTE_LOG(ERR, PMD,
1502                         "PVID cannot be modified for this function\n");
1503                 return -ENOTSUP;
1504         }
1505         bp->vlan = on ? pvid : 0;
1506
1507         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1508         if (rc)
1509                 bp->vlan = vlan;
1510         return rc;
1511 }
1512
1513 static int
1514 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1515 {
1516         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1517
1518         return bnxt_hwrm_port_led_cfg(bp, true);
1519 }
1520
1521 static int
1522 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1523 {
1524         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1525
1526         return bnxt_hwrm_port_led_cfg(bp, false);
1527 }
1528
1529 /*
1530  * Initialization
1531  */
1532
1533 static const struct eth_dev_ops bnxt_dev_ops = {
1534         .dev_infos_get = bnxt_dev_info_get_op,
1535         .dev_close = bnxt_dev_close_op,
1536         .dev_configure = bnxt_dev_configure_op,
1537         .dev_start = bnxt_dev_start_op,
1538         .dev_stop = bnxt_dev_stop_op,
1539         .dev_set_link_up = bnxt_dev_set_link_up_op,
1540         .dev_set_link_down = bnxt_dev_set_link_down_op,
1541         .stats_get = bnxt_stats_get_op,
1542         .stats_reset = bnxt_stats_reset_op,
1543         .rx_queue_setup = bnxt_rx_queue_setup_op,
1544         .rx_queue_release = bnxt_rx_queue_release_op,
1545         .tx_queue_setup = bnxt_tx_queue_setup_op,
1546         .tx_queue_release = bnxt_tx_queue_release_op,
1547         .reta_update = bnxt_reta_update_op,
1548         .reta_query = bnxt_reta_query_op,
1549         .rss_hash_update = bnxt_rss_hash_update_op,
1550         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1551         .link_update = bnxt_link_update_op,
1552         .promiscuous_enable = bnxt_promiscuous_enable_op,
1553         .promiscuous_disable = bnxt_promiscuous_disable_op,
1554         .allmulticast_enable = bnxt_allmulticast_enable_op,
1555         .allmulticast_disable = bnxt_allmulticast_disable_op,
1556         .mac_addr_add = bnxt_mac_addr_add_op,
1557         .mac_addr_remove = bnxt_mac_addr_remove_op,
1558         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1559         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1560         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1561         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1562         .vlan_filter_set = bnxt_vlan_filter_set_op,
1563         .vlan_offload_set = bnxt_vlan_offload_set_op,
1564         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1565         .mtu_set = bnxt_mtu_set_op,
1566         .mac_addr_set = bnxt_set_default_mac_addr_op,
1567         .xstats_get = bnxt_dev_xstats_get_op,
1568         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1569         .xstats_reset = bnxt_dev_xstats_reset_op,
1570         .fw_version_get = bnxt_fw_version_get,
1571         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1572         .rxq_info_get = bnxt_rxq_info_get_op,
1573         .txq_info_get = bnxt_txq_info_get_op,
1574         .dev_led_on = bnxt_dev_led_on_op,
1575         .dev_led_off = bnxt_dev_led_off_op,
1576         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
1577         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
1578 };
1579
1580 static bool bnxt_vf_pciid(uint16_t id)
1581 {
1582         if (id == BROADCOM_DEV_ID_57304_VF ||
1583             id == BROADCOM_DEV_ID_57406_VF ||
1584             id == BROADCOM_DEV_ID_5731X_VF ||
1585             id == BROADCOM_DEV_ID_5741X_VF ||
1586             id == BROADCOM_DEV_ID_57414_VF ||
1587             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
1588                 return true;
1589         return false;
1590 }
1591
1592 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1593 {
1594         struct bnxt *bp = eth_dev->data->dev_private;
1595         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1596         int rc;
1597
1598         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1599         if (!pci_dev->mem_resource[0].addr) {
1600                 RTE_LOG(ERR, PMD,
1601                         "Cannot find PCI device base address, aborting\n");
1602                 rc = -ENODEV;
1603                 goto init_err_disable;
1604         }
1605
1606         bp->eth_dev = eth_dev;
1607         bp->pdev = pci_dev;
1608
1609         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1610         if (!bp->bar0) {
1611                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1612                 rc = -ENOMEM;
1613                 goto init_err_release;
1614         }
1615         return 0;
1616
1617 init_err_release:
1618         if (bp->bar0)
1619                 bp->bar0 = NULL;
1620
1621 init_err_disable:
1622
1623         return rc;
1624 }
1625
1626 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1627
1628 #define ALLOW_FUNC(x)   \
1629         { \
1630                 typeof(x) arg = (x); \
1631                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1632                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1633         }
1634 static int
1635 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1636 {
1637         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1638         char mz_name[RTE_MEMZONE_NAMESIZE];
1639         const struct rte_memzone *mz = NULL;
1640         static int version_printed;
1641         uint32_t total_alloc_len;
1642         phys_addr_t mz_phys_addr;
1643         struct bnxt *bp;
1644         int rc;
1645
1646         if (version_printed++ == 0)
1647                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1648
1649         rte_eth_copy_pci_info(eth_dev, pci_dev);
1650         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1651
1652         bp = eth_dev->data->dev_private;
1653
1654         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1655         bp->dev_stopped = 1;
1656
1657         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1658                 goto skip_init;
1659
1660         if (bnxt_vf_pciid(pci_dev->id.device_id))
1661                 bp->flags |= BNXT_FLAG_VF;
1662
1663         rc = bnxt_init_board(eth_dev);
1664         if (rc) {
1665                 RTE_LOG(ERR, PMD,
1666                         "Board initialization failed rc: %x\n", rc);
1667                 goto error;
1668         }
1669 skip_init:
1670         eth_dev->dev_ops = &bnxt_dev_ops;
1671         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1672                 return 0;
1673         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1674         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1675
1676         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1677                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1678                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1679                          pci_dev->addr.bus, pci_dev->addr.devid,
1680                          pci_dev->addr.function, "rx_port_stats");
1681                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1682                 mz = rte_memzone_lookup(mz_name);
1683                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1684                                 sizeof(struct rx_port_stats) + 512);
1685                 if (!mz) {
1686                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1687                                                  SOCKET_ID_ANY,
1688                                                  RTE_MEMZONE_2MB |
1689                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1690                         if (mz == NULL)
1691                                 return -ENOMEM;
1692                 }
1693                 memset(mz->addr, 0, mz->len);
1694                 mz_phys_addr = mz->phys_addr;
1695                 if ((unsigned long)mz->addr == mz_phys_addr) {
1696                         RTE_LOG(WARNING, PMD,
1697                                 "Memzone physical address same as virtual.\n");
1698                         RTE_LOG(WARNING, PMD,
1699                                 "Using rte_mem_virt2phy()\n");
1700                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1701                         if (mz_phys_addr == 0) {
1702                                 RTE_LOG(ERR, PMD,
1703                                 "unable to map address to physical memory\n");
1704                                 return -ENOMEM;
1705                         }
1706                 }
1707
1708                 bp->rx_mem_zone = (const void *)mz;
1709                 bp->hw_rx_port_stats = mz->addr;
1710                 bp->hw_rx_port_stats_map = mz_phys_addr;
1711
1712                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1713                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1714                          pci_dev->addr.bus, pci_dev->addr.devid,
1715                          pci_dev->addr.function, "tx_port_stats");
1716                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1717                 mz = rte_memzone_lookup(mz_name);
1718                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1719                                 sizeof(struct tx_port_stats) + 512);
1720                 if (!mz) {
1721                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1722                                                  SOCKET_ID_ANY,
1723                                                  RTE_MEMZONE_2MB |
1724                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1725                         if (mz == NULL)
1726                                 return -ENOMEM;
1727                 }
1728                 memset(mz->addr, 0, mz->len);
1729                 mz_phys_addr = mz->phys_addr;
1730                 if ((unsigned long)mz->addr == mz_phys_addr) {
1731                         RTE_LOG(WARNING, PMD,
1732                                 "Memzone physical address same as virtual.\n");
1733                         RTE_LOG(WARNING, PMD,
1734                                 "Using rte_mem_virt2phy()\n");
1735                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1736                         if (mz_phys_addr == 0) {
1737                                 RTE_LOG(ERR, PMD,
1738                                 "unable to map address to physical memory\n");
1739                                 return -ENOMEM;
1740                         }
1741                 }
1742
1743                 bp->tx_mem_zone = (const void *)mz;
1744                 bp->hw_tx_port_stats = mz->addr;
1745                 bp->hw_tx_port_stats_map = mz_phys_addr;
1746
1747                 bp->flags |= BNXT_FLAG_PORT_STATS;
1748         }
1749
1750         rc = bnxt_alloc_hwrm_resources(bp);
1751         if (rc) {
1752                 RTE_LOG(ERR, PMD,
1753                         "hwrm resource allocation failure rc: %x\n", rc);
1754                 goto error_free;
1755         }
1756         rc = bnxt_hwrm_ver_get(bp);
1757         if (rc)
1758                 goto error_free;
1759         bnxt_hwrm_queue_qportcfg(bp);
1760
1761         bnxt_hwrm_func_qcfg(bp);
1762
1763         /* Get the MAX capabilities for this function */
1764         rc = bnxt_hwrm_func_qcaps(bp);
1765         if (rc) {
1766                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1767                 goto error_free;
1768         }
1769         if (bp->max_tx_rings == 0) {
1770                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1771                 rc = -EBUSY;
1772                 goto error_free;
1773         }
1774         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1775                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1776         if (eth_dev->data->mac_addrs == NULL) {
1777                 RTE_LOG(ERR, PMD,
1778                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1779                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1780                 rc = -ENOMEM;
1781                 goto error_free;
1782         }
1783         /* Copy the permanent MAC from the qcap response address now. */
1784         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1785         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1786         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1787                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1788         if (!bp->grp_info) {
1789                 RTE_LOG(ERR, PMD,
1790                         "Failed to alloc %zu bytes needed to store group info table\n",
1791                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1792                 rc = -ENOMEM;
1793                 goto error_free;
1794         }
1795
1796         /* Forward all requests if firmware is new enough */
1797         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1798             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1799             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1800                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1801         } else {
1802                 RTE_LOG(WARNING, PMD,
1803                         "Firmware too old for VF mailbox functionality\n");
1804                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1805         }
1806
1807         /*
1808          * The following are used for driver cleanup.  If we disallow these,
1809          * VF drivers can't clean up cleanly.
1810          */
1811         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1812         ALLOW_FUNC(HWRM_VNIC_FREE);
1813         ALLOW_FUNC(HWRM_RING_FREE);
1814         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1815         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1816         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1817         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1818         rc = bnxt_hwrm_func_driver_register(bp);
1819         if (rc) {
1820                 RTE_LOG(ERR, PMD,
1821                         "Failed to register driver");
1822                 rc = -EBUSY;
1823                 goto error_free;
1824         }
1825
1826         RTE_LOG(INFO, PMD,
1827                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1828                 pci_dev->mem_resource[0].phys_addr,
1829                 pci_dev->mem_resource[0].addr);
1830
1831         rc = bnxt_hwrm_func_reset(bp);
1832         if (rc) {
1833                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1834                 rc = -1;
1835                 goto error_free;
1836         }
1837
1838         if (BNXT_PF(bp)) {
1839                 //if (bp->pf.active_vfs) {
1840                         // TODO: Deallocate VF resources?
1841                 //}
1842                 if (bp->pdev->max_vfs) {
1843                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1844                         if (rc) {
1845                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1846                                 goto error_free;
1847                         }
1848                 } else {
1849                         rc = bnxt_hwrm_allocate_pf_only(bp);
1850                         if (rc) {
1851                                 RTE_LOG(ERR, PMD,
1852                                         "Failed to allocate PF resources\n");
1853                                 goto error_free;
1854                         }
1855                 }
1856         }
1857
1858         bnxt_hwrm_port_led_qcaps(bp);
1859
1860         rc = bnxt_setup_int(bp);
1861         if (rc)
1862                 goto error_free;
1863
1864         rc = bnxt_alloc_mem(bp);
1865         if (rc)
1866                 goto error_free_int;
1867
1868         rc = bnxt_request_int(bp);
1869         if (rc)
1870                 goto error_free_int;
1871
1872         rc = bnxt_alloc_def_cp_ring(bp);
1873         if (rc)
1874                 goto error_free_int;
1875
1876         bnxt_enable_int(bp);
1877
1878         return 0;
1879
1880 error_free_int:
1881         bnxt_disable_int(bp);
1882         bnxt_free_def_cp_ring(bp);
1883         bnxt_hwrm_func_buf_unrgtr(bp);
1884         bnxt_free_int(bp);
1885         bnxt_free_mem(bp);
1886 error_free:
1887         bnxt_dev_uninit(eth_dev);
1888 error:
1889         return rc;
1890 }
1891
1892 static int
1893 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1894         struct bnxt *bp = eth_dev->data->dev_private;
1895         int rc;
1896
1897         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1898                 return -EPERM;
1899
1900         bnxt_disable_int(bp);
1901         bnxt_free_int(bp);
1902         bnxt_free_mem(bp);
1903         if (eth_dev->data->mac_addrs != NULL) {
1904                 rte_free(eth_dev->data->mac_addrs);
1905                 eth_dev->data->mac_addrs = NULL;
1906         }
1907         if (bp->grp_info != NULL) {
1908                 rte_free(bp->grp_info);
1909                 bp->grp_info = NULL;
1910         }
1911         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1912         bnxt_free_hwrm_resources(bp);
1913         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1914         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1915         if (bp->dev_stopped == 0)
1916                 bnxt_dev_close_op(eth_dev);
1917         if (bp->pf.vf_info)
1918                 rte_free(bp->pf.vf_info);
1919         eth_dev->dev_ops = NULL;
1920         eth_dev->rx_pkt_burst = NULL;
1921         eth_dev->tx_pkt_burst = NULL;
1922
1923         return rc;
1924 }
1925
1926 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1927         struct rte_pci_device *pci_dev)
1928 {
1929         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1930                 bnxt_dev_init);
1931 }
1932
1933 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1934 {
1935         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1936 }
1937
1938 static struct rte_pci_driver bnxt_rte_pmd = {
1939         .id_table = bnxt_pci_id_map,
1940         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1941                 RTE_PCI_DRV_INTR_LSC,
1942         .probe = bnxt_pci_probe,
1943         .remove = bnxt_pci_remove,
1944 };
1945
1946 static bool
1947 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
1948 {
1949         if (strcmp(dev->device->driver->name, drv->driver.name))
1950                 return false;
1951
1952         return true;
1953 }
1954
1955 bool is_bnxt_supported(struct rte_eth_dev *dev)
1956 {
1957         return is_device_supported(dev, &bnxt_rte_pmd);
1958 }
1959
1960 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1961 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1962 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");