drivers/net/bnxt/bnxt_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_ethdev_driver.h>
  11 #include <rte_ethdev_pci.h>
  12 #include <rte_malloc.h>
  13 #include <rte_cycles.h>
  14
  15 #include "bnxt.h"
  16 #include "bnxt_cpr.h"
  17 #include "bnxt_filter.h"
  18 #include "bnxt_hwrm.h"
  19 #include "bnxt_irq.h"
  20 #include "bnxt_ring.h"
  21 #include "bnxt_rxq.h"
  22 #include "bnxt_rxr.h"
  23 #include "bnxt_stats.h"
  24 #include "bnxt_txq.h"
  25 #include "bnxt_txr.h"
  26 #include "bnxt_vnic.h"
  27 #include "hsi_struct_def_dpdk.h"
  28 #include "bnxt_nvm_defs.h"
  29
  30 #define DRV_MODULE_NAME         "bnxt"
  31 static const char bnxt_version[] =
  32         "Broadcom NetXtreme driver " DRV_MODULE_NAME "\n";
  33 int bnxt_logtype_driver;
  34
  35 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  36
  37 #define BROADCOM_DEV_ID_STRATUS_NIC_VF1 0x1606
  38 #define BROADCOM_DEV_ID_STRATUS_NIC_VF2 0x1609
  39 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  40 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  41 #define BROADCOM_DEV_ID_57301 0x16c8
  42 #define BROADCOM_DEV_ID_57302 0x16c9
  43 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  44 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  45 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  46 #define BROADCOM_DEV_ID_NS2 0x16cd
  47 #define BROADCOM_DEV_ID_57311 0x16ce
  48 #define BROADCOM_DEV_ID_57312 0x16cf
  49 #define BROADCOM_DEV_ID_57402 0x16d0
  50 #define BROADCOM_DEV_ID_57404 0x16d1
  51 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  52 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  53 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  54 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  55 #define BROADCOM_DEV_ID_57412 0x16d6
  56 #define BROADCOM_DEV_ID_57414 0x16d7
  57 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  58 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  59 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  60 #define BROADCOM_DEV_ID_57412_MF 0x16de
  61 #define BROADCOM_DEV_ID_57314 0x16df
  62 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  63 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  64 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  65 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  66 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  67 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  68 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  69 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  70 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  71 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  72 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  73 #define BROADCOM_DEV_ID_58802 0xd802
  74 #define BROADCOM_DEV_ID_58804 0xd804
  75 #define BROADCOM_DEV_ID_58808 0x16f0
  76
  77 static const struct rte_pci_id bnxt_pci_id_map[] = {
  78         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  79                          BROADCOM_DEV_ID_STRATUS_NIC_VF1) },
  80         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
  81                          BROADCOM_DEV_ID_STRATUS_NIC_VF2) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
  83         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58802) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58804) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_58808) },
 119         { .vendor_id = 0, /* sentinel */ },
 120 };
 121
 122 #define BNXT_ETH_RSS_SUPPORT (  \
 123         ETH_RSS_IPV4 |          \
 124         ETH_RSS_NONFRAG_IPV4_TCP |      \
 125         ETH_RSS_NONFRAG_IPV4_UDP |      \
 126         ETH_RSS_IPV6 |          \
 127         ETH_RSS_NONFRAG_IPV6_TCP |      \
 128         ETH_RSS_NONFRAG_IPV6_UDP)
 129
 130 #define BNXT_DEV_TX_OFFLOAD_SUPPORT (DEV_TX_OFFLOAD_VLAN_INSERT | \
 131                                      DEV_TX_OFFLOAD_IPV4_CKSUM | \
 132                                      DEV_TX_OFFLOAD_TCP_CKSUM | \
 133                                      DEV_TX_OFFLOAD_UDP_CKSUM | \
 134                                      DEV_TX_OFFLOAD_TCP_TSO | \
 135                                      DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | \
 136                                      DEV_TX_OFFLOAD_VXLAN_TNL_TSO | \
 137                                      DEV_TX_OFFLOAD_GRE_TNL_TSO | \
 138                                      DEV_TX_OFFLOAD_IPIP_TNL_TSO | \
 139                                      DEV_TX_OFFLOAD_GENEVE_TNL_TSO | \
 140                                      DEV_TX_OFFLOAD_MULTI_SEGS)
 141
 142 #define BNXT_DEV_RX_OFFLOAD_SUPPORT (DEV_RX_OFFLOAD_VLAN_FILTER | \
 143                                      DEV_RX_OFFLOAD_VLAN_STRIP | \
 144                                      DEV_RX_OFFLOAD_IPV4_CKSUM | \
 145                                      DEV_RX_OFFLOAD_UDP_CKSUM | \
 146                                      DEV_RX_OFFLOAD_TCP_CKSUM | \
 147                                      DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \
 148                                      DEV_RX_OFFLOAD_JUMBO_FRAME | \
 149                                      DEV_RX_OFFLOAD_CRC_STRIP | \
 150                                      DEV_RX_OFFLOAD_TCP_LRO)
 151
 152 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 153 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 154 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu);
 155
 156 /***********************/
 157
 158 /*
 159  * High level utility functions
 160  */
 161
 162 static void bnxt_free_mem(struct bnxt *bp)
 163 {
 164         bnxt_free_filter_mem(bp);
 165         bnxt_free_vnic_attributes(bp);
 166         bnxt_free_vnic_mem(bp);
 167
 168         bnxt_free_stats(bp);
 169         bnxt_free_tx_rings(bp);
 170         bnxt_free_rx_rings(bp);
 171 }
 172
 173 static int bnxt_alloc_mem(struct bnxt *bp)
 174 {
 175         int rc;
 176
 177         rc = bnxt_alloc_vnic_mem(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_attributes(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_filter_mem(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         return 0;
 190
 191 alloc_mem_err:
 192         bnxt_free_mem(bp);
 193         return rc;
 194 }
 195
 196 static int bnxt_init_chip(struct bnxt *bp)
 197 {
 198         unsigned int i;
 199         struct rte_eth_link new;
 200         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 201         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 202         uint32_t intr_vector = 0;
 203         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 204         uint32_t vec = BNXT_MISC_VEC_ID;
 205         int rc;
 206
 207         /* disable uio/vfio intr/eventfd mapping */
 208         rte_intr_disable(intr_handle);
 209
 210         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 211                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
 212                         DEV_RX_OFFLOAD_JUMBO_FRAME;
 213                 bp->flags |= BNXT_FLAG_JUMBO;
 214         } else {
 215                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
 216                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 217                 bp->flags &= ~BNXT_FLAG_JUMBO;
 218         }
 219
 220         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 221         if (rc) {
 222                 PMD_DRV_LOG(ERR, "HWRM stat ctx alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_hwrm_rings(bp);
 227         if (rc) {
 228                 PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 233         if (rc) {
 234                 PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         rc = bnxt_mq_rx_configure(bp);
 239         if (rc) {
 240                 PMD_DRV_LOG(ERR, "MQ mode configure failure rc: %x\n", rc);
 241                 goto err_out;
 242         }
 243
 244         /* VNIC configuration */
 245         for (i = 0; i < bp->nr_vnics; i++) {
 246                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 247
 248                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 249                 if (rc) {
 250                         PMD_DRV_LOG(ERR, "HWRM vnic %d alloc failure rc: %x\n",
 251                                 i, rc);
 252                         goto err_out;
 253                 }
 254
 255                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 256                 if (rc) {
 257                         PMD_DRV_LOG(ERR,
 258                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 259                                 i, rc);
 260                         goto err_out;
 261                 }
 262
 263                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 264                 if (rc) {
 265                         PMD_DRV_LOG(ERR, "HWRM vnic %d cfg failure rc: %x\n",
 266                                 i, rc);
 267                         goto err_out;
 268                 }
 269
 270                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 271                 if (rc) {
 272                         PMD_DRV_LOG(ERR,
 273                                 "HWRM vnic %d filter failure rc: %x\n",
 274                                 i, rc);
 275                         goto err_out;
 276                 }
 277
 278                 rc = bnxt_vnic_rss_configure(bp, vnic);
 279                 if (rc) {
 280                         PMD_DRV_LOG(ERR,
 281                                     "HWRM vnic set RSS failure rc: %x\n", rc);
 282                         goto err_out;
 283                 }
 284
 285                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 286
 287                 if (bp->eth_dev->data->dev_conf.rxmode.offloads &
 288                     DEV_RX_OFFLOAD_TCP_LRO)
 289                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 290                 else
 291                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 292         }
 293         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 294         if (rc) {
 295                 PMD_DRV_LOG(ERR,
 296                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 297                 goto err_out;
 298         }
 299
 300         /* check and configure queue intr-vector mapping */
 301         if ((rte_intr_cap_multiple(intr_handle) ||
 302              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 303             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 304                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 305                 PMD_DRV_LOG(DEBUG, "intr_vector = %d\n", intr_vector);
 306                 if (intr_vector > bp->rx_cp_nr_rings) {
 307                         PMD_DRV_LOG(ERR, "At most %d intr queues supported",
 308                                         bp->rx_cp_nr_rings);
 309                         return -ENOTSUP;
 310                 }
 311                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 312                         return -1;
 313         }
 314
 315         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 316                 intr_handle->intr_vec =
 317                         rte_zmalloc("intr_vec",
 318                                     bp->eth_dev->data->nb_rx_queues *
 319                                     sizeof(int), 0);
 320                 if (intr_handle->intr_vec == NULL) {
 321                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx_queues"
 322                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 323                         return -ENOMEM;
 324                 }
 325                 PMD_DRV_LOG(DEBUG, "intr_handle->intr_vec = %p "
 326                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 327                          intr_handle->intr_vec, intr_handle->nb_efd,
 328                         intr_handle->max_intr);
 329         }
 330
 331         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 332              queue_id++) {
 333                 intr_handle->intr_vec[queue_id] = vec;
 334                 if (vec < base + intr_handle->nb_efd - 1)
 335                         vec++;
 336         }
 337
 338         /* enable uio/vfio intr/eventfd mapping */
 339         rte_intr_enable(intr_handle);
 340
 341         rc = bnxt_get_hwrm_link_config(bp, &new);
 342         if (rc) {
 343                 PMD_DRV_LOG(ERR, "HWRM Get link config failure rc: %x\n", rc);
 344                 goto err_out;
 345         }
 346
 347         if (!bp->link_info.link_up) {
 348                 rc = bnxt_set_hwrm_link_config(bp, true);
 349                 if (rc) {
 350                         PMD_DRV_LOG(ERR,
 351                                 "HWRM link config failure rc: %x\n", rc);
 352                         goto err_out;
 353                 }
 354         }
 355         bnxt_print_link_info(bp->eth_dev);
 356
 357         return 0;
 358
 359 err_out:
 360         bnxt_free_all_hwrm_resources(bp);
 361
 362         /* Some of the error status returned by FW may not be from errno.h */
 363         if (rc > 0)
 364                 rc = -EIO;
 365
 366         return rc;
 367 }
 368
 369 static int bnxt_shutdown_nic(struct bnxt *bp)
 370 {
 371         bnxt_free_all_hwrm_resources(bp);
 372         bnxt_free_all_filters(bp);
 373         bnxt_free_all_vnics(bp);
 374         return 0;
 375 }
 376
 377 static int bnxt_init_nic(struct bnxt *bp)
 378 {
 379         int rc;
 380
 381         rc = bnxt_init_ring_grps(bp);
 382         if (rc)
 383                 return rc;
 384
 385         bnxt_init_vnics(bp);
 386         bnxt_init_filters(bp);
 387
 388         return 0;
 389 }
 390
 391 /*
 392  * Device configuration and status function
 393  */
 394
 395 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 396                                   struct rte_eth_dev_info *dev_info)
 397 {
 398         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 399         uint16_t max_vnics, i, j, vpool, vrxq;
 400         unsigned int max_rx_rings;
 401
 402         /* MAC Specifics */
 403         dev_info->max_mac_addrs = bp->max_l2_ctx;
 404         dev_info->max_hash_mac_addrs = 0;
 405
 406         /* PF/VF specifics */
 407         if (BNXT_PF(bp))
 408                 dev_info->max_vfs = bp->pdev->max_vfs;
 409         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 410                                                 RTE_MIN(bp->max_rsscos_ctx,
 411                                                 bp->max_stat_ctx)));
 412         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 413         dev_info->max_rx_queues = max_rx_rings;
 414         dev_info->max_tx_queues = max_rx_rings;
 415         dev_info->reta_size = bp->max_rsscos_ctx;
 416         dev_info->hash_key_size = 40;
 417         max_vnics = bp->max_vnics;
 418
 419         /* Fast path specifics */
 420         dev_info->min_rx_bufsize = 1;
 421         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 422                                   + VLAN_TAG_SIZE;
 423
 424         dev_info->rx_offload_capa = BNXT_DEV_RX_OFFLOAD_SUPPORT;
 425         if (bp->flags & BNXT_FLAG_PTP_SUPPORTED)
 426                 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_TIMESTAMP;
 427         dev_info->tx_offload_capa = BNXT_DEV_TX_OFFLOAD_SUPPORT;
 428         dev_info->flow_type_rss_offloads = BNXT_ETH_RSS_SUPPORT;
 429
 430         /* *INDENT-OFF* */
 431         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 432                 .rx_thresh = {
 433                         .pthresh = 8,
 434                         .hthresh = 8,
 435                         .wthresh = 0,
 436                 },
 437                 .rx_free_thresh = 32,
 438                 /* If no descriptors available, pkts are dropped by default */
 439                 .rx_drop_en = 1,
 440         };
 441
 442         dev_info->default_txconf = (struct rte_eth_txconf) {
 443                 .tx_thresh = {
 444                         .pthresh = 32,
 445                         .hthresh = 0,
 446                         .wthresh = 0,
 447                 },
 448                 .tx_free_thresh = 32,
 449                 .tx_rs_thresh = 32,
 450         };
 451         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 452
 453         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 454
 455         /* *INDENT-ON* */
 456
 457         /*
 458          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 459          *       need further investigation.
 460          */
 461
 462         /* VMDq resources */
 463         vpool = 64; /* ETH_64_POOLS */
 464         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 465         for (i = 0; i < 4; vpool >>= 1, i++) {
 466                 if (max_vnics > vpool) {
 467                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 468                                 if (dev_info->max_rx_queues > vrxq) {
 469                                         if (vpool > vrxq)
 470                                                 vpool = vrxq;
 471                                         goto found;
 472                                 }
 473                         }
 474                         /* Not enough resources to support VMDq */
 475                         break;
 476                 }
 477         }
 478         /* Not enough resources to support VMDq */
 479         vpool = 0;
 480         vrxq = 0;
 481 found:
 482         dev_info->max_vmdq_pools = vpool;
 483         dev_info->vmdq_queue_num = vrxq;
 484
 485         dev_info->vmdq_pool_base = 0;
 486         dev_info->vmdq_queue_base = 0;
 487 }
 488
 489 /* Configure the device based on the configuration provided */
 490 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 491 {
 492         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 493         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 494
 495         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 496         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 497
 498         /* Inherit new configurations */
 499         if (eth_dev->data->nb_rx_queues > bp->max_rx_rings ||
 500             eth_dev->data->nb_tx_queues > bp->max_tx_rings ||
 501             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 502             bp->max_cp_rings ||
 503             eth_dev->data->nb_rx_queues + eth_dev->data->nb_tx_queues >
 504             bp->max_stat_ctx ||
 505             (uint32_t)(eth_dev->data->nb_rx_queues) > bp->max_ring_grps) {
 506                 PMD_DRV_LOG(ERR,
 507                         "Insufficient resources to support requested config\n");
 508                 PMD_DRV_LOG(ERR,
 509                         "Num Queues Requested: Tx %d, Rx %d\n",
 510                         eth_dev->data->nb_tx_queues,
 511                         eth_dev->data->nb_rx_queues);
 512                 PMD_DRV_LOG(ERR,
 513                         "Res available: TxQ %d, RxQ %d, CQ %d Stat %d, Grp %d\n",
 514                         bp->max_tx_rings, bp->max_rx_rings, bp->max_cp_rings,
 515                         bp->max_stat_ctx, bp->max_ring_grps);
 516                 return -ENOSPC;
 517         }
 518
 519         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 520         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 521         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 522         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 523
 524         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 525                 eth_dev->data->mtu =
 526                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 527                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE *
 528                                 BNXT_NUM_VLANS;
 529                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 530         }
 531         return 0;
 532 }
 533
 534 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 535 {
 536         struct rte_eth_link *link = &eth_dev->data->dev_link;
 537
 538         if (link->link_status)
 539                 PMD_DRV_LOG(INFO, "Port %d Link Up - speed %u Mbps - %s\n",
 540                         eth_dev->data->port_id,
 541                         (uint32_t)link->link_speed,
 542                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 543                         ("full-duplex") : ("half-duplex\n"));
 544         else
 545                 PMD_DRV_LOG(INFO, "Port %d Link Down\n",
 546                         eth_dev->data->port_id);
 547 }
 548
 549 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 550 {
 551         bnxt_print_link_info(eth_dev);
 552         return 0;
 553 }
 554
 555 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 556 {
 557         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 558         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 559         int vlan_mask = 0;
 560         int rc;
 561
 562         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 563                 PMD_DRV_LOG(ERR,
 564                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 565                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 566         }
 567         bp->dev_stopped = 0;
 568
 569         rc = bnxt_init_chip(bp);
 570         if (rc)
 571                 goto error;
 572
 573         bnxt_link_update_op(eth_dev, 1);
 574
 575         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 576                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 577         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 578                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 579         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 580         if (rc)
 581                 goto error;
 582
 583         bp->flags |= BNXT_FLAG_INIT_DONE;
 584         return 0;
 585
 586 error:
 587         bnxt_shutdown_nic(bp);
 588         bnxt_free_tx_mbufs(bp);
 589         bnxt_free_rx_mbufs(bp);
 590         return rc;
 591 }
 592
 593 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 594 {
 595         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 596         int rc = 0;
 597
 598         if (!bp->link_info.link_up)
 599                 rc = bnxt_set_hwrm_link_config(bp, true);
 600         if (!rc)
 601                 eth_dev->data->dev_link.link_status = 1;
 602
 603         bnxt_print_link_info(eth_dev);
 604         return 0;
 605 }
 606
 607 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 608 {
 609         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 610
 611         eth_dev->data->dev_link.link_status = 0;
 612         bnxt_set_hwrm_link_config(bp, false);
 613         bp->link_info.link_up = 0;
 614
 615         return 0;
 616 }
 617
 618 /* Unload the driver, release resources */
 619 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 620 {
 621         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 622
 623         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 624         if (bp->eth_dev->data->dev_started) {
 625                 /* TBD: STOP HW queues DMA */
 626                 eth_dev->data->dev_link.link_status = 0;
 627         }
 628         bnxt_set_hwrm_link_config(bp, false);
 629         bnxt_hwrm_port_clr_stats(bp);
 630         bnxt_free_tx_mbufs(bp);
 631         bnxt_free_rx_mbufs(bp);
 632         bnxt_shutdown_nic(bp);
 633         bp->dev_stopped = 1;
 634 }
 635
 636 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 637 {
 638         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 639
 640         if (bp->dev_stopped == 0)
 641                 bnxt_dev_stop_op(eth_dev);
 642
 643         bnxt_free_mem(bp);
 644         if (eth_dev->data->mac_addrs != NULL) {
 645                 rte_free(eth_dev->data->mac_addrs);
 646                 eth_dev->data->mac_addrs = NULL;
 647         }
 648         if (bp->grp_info != NULL) {
 649                 rte_free(bp->grp_info);
 650                 bp->grp_info = NULL;
 651         }
 652 }
 653
 654 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 655                                     uint32_t index)
 656 {
 657         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 658         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 659         struct bnxt_vnic_info *vnic;
 660         struct bnxt_filter_info *filter, *temp_filter;
 661         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 662         uint32_t i;
 663
 664         /*
 665          * Loop through all VNICs from the specified filter flow pools to
 666          * remove the corresponding MAC addr filter
 667          */
 668         for (i = 0; i < pool; i++) {
 669                 if (!(pool_mask & (1ULL << i)))
 670                         continue;
 671
 672                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 673                         filter = STAILQ_FIRST(&vnic->filter);
 674                         while (filter) {
 675                                 temp_filter = STAILQ_NEXT(filter, next);
 676                                 if (filter->mac_index == index) {
 677                                         STAILQ_REMOVE(&vnic->filter, filter,
 678                                                       bnxt_filter_info, next);
 679                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 680                                         filter->mac_index = INVALID_MAC_INDEX;
 681                                         memset(&filter->l2_addr, 0,
 682                                                ETHER_ADDR_LEN);
 683                                         STAILQ_INSERT_TAIL(
 684                                                         &bp->free_filter_list,
 685                                                         filter, next);
 686                                 }
 687                                 filter = temp_filter;
 688                         }
 689                 }
 690         }
 691 }
 692
 693 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 694                                 struct ether_addr *mac_addr,
 695                                 uint32_t index, uint32_t pool)
 696 {
 697         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 698         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 699         struct bnxt_filter_info *filter;
 700
 701         if (BNXT_VF(bp)) {
 702                 PMD_DRV_LOG(ERR, "Cannot add MAC address to a VF interface\n");
 703                 return -ENOTSUP;
 704         }
 705
 706         if (!vnic) {
 707                 PMD_DRV_LOG(ERR, "VNIC not found for pool %d!\n", pool);
 708                 return -EINVAL;
 709         }
 710         /* Attach requested MAC address to the new l2_filter */
 711         STAILQ_FOREACH(filter, &vnic->filter, next) {
 712                 if (filter->mac_index == index) {
 713                         PMD_DRV_LOG(ERR,
 714                                 "MAC addr already existed for pool %d\n", pool);
 715                         return 0;
 716                 }
 717         }
 718         filter = bnxt_alloc_filter(bp);
 719         if (!filter) {
 720                 PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 721                 return -ENODEV;
 722         }
 723         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 724         filter->mac_index = index;
 725         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 726         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 727 }
 728
 729 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 730 {
 731         int rc = 0;
 732         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 733         struct rte_eth_link new;
 734         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 735
 736         memset(&new, 0, sizeof(new));
 737         do {
 738                 /* Retrieve link info from hardware */
 739                 rc = bnxt_get_hwrm_link_config(bp, &new);
 740                 if (rc) {
 741                         new.link_speed = ETH_LINK_SPEED_100M;
 742                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 743                         PMD_DRV_LOG(ERR,
 744                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 745                         goto out;
 746                 }
 747                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 748
 749                 if (!wait_to_complete)
 750                         break;
 751         } while (!new.link_status && cnt--);
 752
 753 out:
 754         /* Timed out or success */
 755         if (new.link_status != eth_dev->data->dev_link.link_status ||
 756         new.link_speed != eth_dev->data->dev_link.link_speed) {
 757                 memcpy(&eth_dev->data->dev_link, &new,
 758                         sizeof(struct rte_eth_link));
 759
 760                 _rte_eth_dev_callback_process(eth_dev,
 761                                               RTE_ETH_EVENT_INTR_LSC,
 762                                               NULL);
 763
 764                 bnxt_print_link_info(eth_dev);
 765         }
 766
 767         return rc;
 768 }
 769
 770 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 771 {
 772         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 773         struct bnxt_vnic_info *vnic;
 774
 775         if (bp->vnic_info == NULL)
 776                 return;
 777
 778         vnic = &bp->vnic_info[0];
 779
 780         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 781         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 782 }
 783
 784 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 785 {
 786         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 787         struct bnxt_vnic_info *vnic;
 788
 789         if (bp->vnic_info == NULL)
 790                 return;
 791
 792         vnic = &bp->vnic_info[0];
 793
 794         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 795         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 796 }
 797
 798 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 799 {
 800         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 801         struct bnxt_vnic_info *vnic;
 802
 803         if (bp->vnic_info == NULL)
 804                 return;
 805
 806         vnic = &bp->vnic_info[0];
 807
 808         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 809         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 810 }
 811
 812 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 813 {
 814         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 815         struct bnxt_vnic_info *vnic;
 816
 817         if (bp->vnic_info == NULL)
 818                 return;
 819
 820         vnic = &bp->vnic_info[0];
 821
 822         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 823         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 824 }
 825
 826 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 827                             struct rte_eth_rss_reta_entry64 *reta_conf,
 828                             uint16_t reta_size)
 829 {
 830         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 831         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 832         struct bnxt_vnic_info *vnic;
 833         int i;
 834
 835         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 836                 return -EINVAL;
 837
 838         if (reta_size != HW_HASH_INDEX_SIZE) {
 839                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 840                         "(%d) must equal the size supported by the hardware "
 841                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 842                 return -EINVAL;
 843         }
 844         /* Update the RSS VNIC(s) */
 845         for (i = 0; i < MAX_FF_POOLS; i++) {
 846                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 847                         memcpy(vnic->rss_table, reta_conf, reta_size);
 848
 849                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 850                 }
 851         }
 852         return 0;
 853 }
 854
 855 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 856                               struct rte_eth_rss_reta_entry64 *reta_conf,
 857                               uint16_t reta_size)
 858 {
 859         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 860         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 861         struct rte_intr_handle *intr_handle
 862                 = &bp->pdev->intr_handle;
 863
 864         /* Retrieve from the default VNIC */
 865         if (!vnic)
 866                 return -EINVAL;
 867         if (!vnic->rss_table)
 868                 return -EINVAL;
 869
 870         if (reta_size != HW_HASH_INDEX_SIZE) {
 871                 PMD_DRV_LOG(ERR, "The configured hash table lookup size "
 872                         "(%d) must equal the size supported by the hardware "
 873                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 874                 return -EINVAL;
 875         }
 876         /* EW - need to revisit here copying from uint64_t to uint16_t */
 877         memcpy(reta_conf, vnic->rss_table, reta_size);
 878
 879         if (rte_intr_allow_others(intr_handle)) {
 880                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 881                         bnxt_dev_lsc_intr_setup(eth_dev);
 882         }
 883
 884         return 0;
 885 }
 886
 887 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 888                                    struct rte_eth_rss_conf *rss_conf)
 889 {
 890         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 891         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 892         struct bnxt_vnic_info *vnic;
 893         uint16_t hash_type = 0;
 894         int i;
 895
 896         /*
 897          * If RSS enablement were different than dev_configure,
 898          * then return -EINVAL
 899          */
 900         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 901                 if (!rss_conf->rss_hf)
 902                         PMD_DRV_LOG(ERR, "Hash type NONE\n");
 903         } else {
 904                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 905                         return -EINVAL;
 906         }
 907
 908         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 909         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 910
 911         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 912                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 913         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 914                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 915         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 916                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 917         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 918                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 919         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 920                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 921         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 922                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 923
 924         /* Update the RSS VNIC(s) */
 925         for (i = 0; i < MAX_FF_POOLS; i++) {
 926                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 927                         vnic->hash_type = hash_type;
 928
 929                         /*
 930                          * Use the supplied key if the key length is
 931                          * acceptable and the rss_key is not NULL
 932                          */
 933                         if (rss_conf->rss_key &&
 934                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 935                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 936                                        rss_conf->rss_key_len);
 937
 938                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 939                 }
 940         }
 941         return 0;
 942 }
 943
 944 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 945                                      struct rte_eth_rss_conf *rss_conf)
 946 {
 947         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 948         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 949         int len;
 950         uint32_t hash_types;
 951
 952         /* RSS configuration is the same for all VNICs */
 953         if (vnic && vnic->rss_hash_key) {
 954                 if (rss_conf->rss_key) {
 955                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 956                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 957                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 958                 }
 959
 960                 hash_types = vnic->hash_type;
 961                 rss_conf->rss_hf = 0;
 962                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 963                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 964                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 965                 }
 966                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 967                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 968                         hash_types &=
 969                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 970                 }
 971                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 972                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 973                         hash_types &=
 974                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 975                 }
 976                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 977                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 978                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 979                 }
 980                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 981                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 982                         hash_types &=
 983                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 984                 }
 985                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 986                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 987                         hash_types &=
 988                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 989                 }
 990                 if (hash_types) {
 991                         PMD_DRV_LOG(ERR,
 992                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 993                                 vnic->hash_type);
 994                         return -ENOTSUP;
 995                 }
 996         } else {
 997                 rss_conf->rss_hf = 0;
 998         }
 999         return 0;
1000 }
1001
1002 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1003                                struct rte_eth_fc_conf *fc_conf)
1004 {
1005         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1006         struct rte_eth_link link_info;
1007         int rc;
1008
1009         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1010         if (rc)
1011                 return rc;
1012
1013         memset(fc_conf, 0, sizeof(*fc_conf));
1014         if (bp->link_info.auto_pause)
1015                 fc_conf->autoneg = 1;
1016         switch (bp->link_info.pause) {
1017         case 0:
1018                 fc_conf->mode = RTE_FC_NONE;
1019                 break;
1020         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1021                 fc_conf->mode = RTE_FC_TX_PAUSE;
1022                 break;
1023         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1024                 fc_conf->mode = RTE_FC_RX_PAUSE;
1025                 break;
1026         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1027                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1028                 fc_conf->mode = RTE_FC_FULL;
1029                 break;
1030         }
1031         return 0;
1032 }
1033
1034 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1035                                struct rte_eth_fc_conf *fc_conf)
1036 {
1037         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1038
1039         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1040                 PMD_DRV_LOG(ERR, "Flow Control Settings cannot be modified\n");
1041                 return -ENOTSUP;
1042         }
1043
1044         switch (fc_conf->mode) {
1045         case RTE_FC_NONE:
1046                 bp->link_info.auto_pause = 0;
1047                 bp->link_info.force_pause = 0;
1048                 break;
1049         case RTE_FC_RX_PAUSE:
1050                 if (fc_conf->autoneg) {
1051                         bp->link_info.auto_pause =
1052                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1053                         bp->link_info.force_pause = 0;
1054                 } else {
1055                         bp->link_info.auto_pause = 0;
1056                         bp->link_info.force_pause =
1057                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1058                 }
1059                 break;
1060         case RTE_FC_TX_PAUSE:
1061                 if (fc_conf->autoneg) {
1062                         bp->link_info.auto_pause =
1063                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1064                         bp->link_info.force_pause = 0;
1065                 } else {
1066                         bp->link_info.auto_pause = 0;
1067                         bp->link_info.force_pause =
1068                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1069                 }
1070                 break;
1071         case RTE_FC_FULL:
1072                 if (fc_conf->autoneg) {
1073                         bp->link_info.auto_pause =
1074                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1075                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1076                         bp->link_info.force_pause = 0;
1077                 } else {
1078                         bp->link_info.auto_pause = 0;
1079                         bp->link_info.force_pause =
1080                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1081                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1082                 }
1083                 break;
1084         }
1085         return bnxt_set_hwrm_link_config(bp, true);
1086 }
1087
1088 /* Add UDP tunneling port */
1089 static int
1090 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1091                          struct rte_eth_udp_tunnel *udp_tunnel)
1092 {
1093         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1094         uint16_t tunnel_type = 0;
1095         int rc = 0;
1096
1097         switch (udp_tunnel->prot_type) {
1098         case RTE_TUNNEL_TYPE_VXLAN:
1099                 if (bp->vxlan_port_cnt) {
1100                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1101                                 udp_tunnel->udp_port);
1102                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1103                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1104                                 return -ENOSPC;
1105                         }
1106                         bp->vxlan_port_cnt++;
1107                         return 0;
1108                 }
1109                 tunnel_type =
1110                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1111                 bp->vxlan_port_cnt++;
1112                 break;
1113         case RTE_TUNNEL_TYPE_GENEVE:
1114                 if (bp->geneve_port_cnt) {
1115                         PMD_DRV_LOG(ERR, "Tunnel Port %d already programmed\n",
1116                                 udp_tunnel->udp_port);
1117                         if (bp->geneve_port != udp_tunnel->udp_port) {
1118                                 PMD_DRV_LOG(ERR, "Only one port allowed\n");
1119                                 return -ENOSPC;
1120                         }
1121                         bp->geneve_port_cnt++;
1122                         return 0;
1123                 }
1124                 tunnel_type =
1125                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1126                 bp->geneve_port_cnt++;
1127                 break;
1128         default:
1129                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1130                 return -ENOTSUP;
1131         }
1132         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1133                                              tunnel_type);
1134         return rc;
1135 }
1136
1137 static int
1138 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1139                          struct rte_eth_udp_tunnel *udp_tunnel)
1140 {
1141         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1142         uint16_t tunnel_type = 0;
1143         uint16_t port = 0;
1144         int rc = 0;
1145
1146         switch (udp_tunnel->prot_type) {
1147         case RTE_TUNNEL_TYPE_VXLAN:
1148                 if (!bp->vxlan_port_cnt) {
1149                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1150                         return -EINVAL;
1151                 }
1152                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1153                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1154                                 udp_tunnel->udp_port, bp->vxlan_port);
1155                         return -EINVAL;
1156                 }
1157                 if (--bp->vxlan_port_cnt)
1158                         return 0;
1159
1160                 tunnel_type =
1161                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1162                 port = bp->vxlan_fw_dst_port_id;
1163                 break;
1164         case RTE_TUNNEL_TYPE_GENEVE:
1165                 if (!bp->geneve_port_cnt) {
1166                         PMD_DRV_LOG(ERR, "No Tunnel port configured yet\n");
1167                         return -EINVAL;
1168                 }
1169                 if (bp->geneve_port != udp_tunnel->udp_port) {
1170                         PMD_DRV_LOG(ERR, "Req Port: %d. Configured port: %d\n",
1171                                 udp_tunnel->udp_port, bp->geneve_port);
1172                         return -EINVAL;
1173                 }
1174                 if (--bp->geneve_port_cnt)
1175                         return 0;
1176
1177                 tunnel_type =
1178                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1179                 port = bp->geneve_fw_dst_port_id;
1180                 break;
1181         default:
1182                 PMD_DRV_LOG(ERR, "Tunnel type is not supported\n");
1183                 return -ENOTSUP;
1184         }
1185
1186         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1187         if (!rc) {
1188                 if (tunnel_type ==
1189                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1190                         bp->vxlan_port = 0;
1191                 if (tunnel_type ==
1192                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1193                         bp->geneve_port = 0;
1194         }
1195         return rc;
1196 }
1197
1198 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1199 {
1200         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1201         struct bnxt_vnic_info *vnic;
1202         unsigned int i;
1203         int rc = 0;
1204         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1205
1206         /* Cycle through all VNICs */
1207         for (i = 0; i < bp->nr_vnics; i++) {
1208                 /*
1209                  * For each VNIC and each associated filter(s)
1210                  * if VLAN exists && VLAN matches vlan_id
1211                  *      remove the MAC+VLAN filter
1212                  *      add a new MAC only filter
1213                  * else
1214                  *      VLAN filter doesn't exist, just skip and continue
1215                  */
1216                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1217                         filter = STAILQ_FIRST(&vnic->filter);
1218                         while (filter) {
1219                                 temp_filter = STAILQ_NEXT(filter, next);
1220
1221                                 if (filter->enables & chk &&
1222                                     filter->l2_ovlan == vlan_id) {
1223                                         /* Must delete the filter */
1224                                         STAILQ_REMOVE(&vnic->filter, filter,
1225                                                       bnxt_filter_info, next);
1226                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1227                                         STAILQ_INSERT_TAIL(
1228                                                         &bp->free_filter_list,
1229                                                         filter, next);
1230
1231                                         /*
1232                                          * Need to examine to see if the MAC
1233                                          * filter already existed or not before
1234                                          * allocating a new one
1235                                          */
1236
1237                                         new_filter = bnxt_alloc_filter(bp);
1238                                         if (!new_filter) {
1239                                                 PMD_DRV_LOG(ERR,
1240                                                         "MAC/VLAN filter alloc failed\n");
1241                                                 rc = -ENOMEM;
1242                                                 goto exit;
1243                                         }
1244                                         STAILQ_INSERT_TAIL(&vnic->filter,
1245                                                            new_filter, next);
1246                                         /* Inherit MAC from previous filter */
1247                                         new_filter->mac_index =
1248                                                         filter->mac_index;
1249                                         memcpy(new_filter->l2_addr,
1250                                                filter->l2_addr, ETHER_ADDR_LEN);
1251                                         /* MAC only filter */
1252                                         rc = bnxt_hwrm_set_l2_filter(bp,
1253                                                         vnic->fw_vnic_id,
1254                                                         new_filter);
1255                                         if (rc)
1256                                                 goto exit;
1257                                         PMD_DRV_LOG(INFO,
1258                                                 "Del Vlan filter for %d\n",
1259                                                 vlan_id);
1260                                 }
1261                                 filter = temp_filter;
1262                         }
1263                 }
1264         }
1265 exit:
1266         return rc;
1267 }
1268
1269 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1270 {
1271         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1272         struct bnxt_vnic_info *vnic;
1273         unsigned int i;
1274         int rc = 0;
1275         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1276                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1277         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1278
1279         /* Cycle through all VNICs */
1280         for (i = 0; i < bp->nr_vnics; i++) {
1281                 /*
1282                  * For each VNIC and each associated filter(s)
1283                  * if VLAN exists:
1284                  *   if VLAN matches vlan_id
1285                  *      VLAN filter already exists, just skip and continue
1286                  *   else
1287                  *      add a new MAC+VLAN filter
1288                  * else
1289                  *   Remove the old MAC only filter
1290                  *    Add a new MAC+VLAN filter
1291                  */
1292                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1293                         filter = STAILQ_FIRST(&vnic->filter);
1294                         while (filter) {
1295                                 temp_filter = STAILQ_NEXT(filter, next);
1296
1297                                 if (filter->enables & chk) {
1298                                         if (filter->l2_ovlan == vlan_id)
1299                                                 goto cont;
1300                                 } else {
1301                                         /* Must delete the MAC filter */
1302                                         STAILQ_REMOVE(&vnic->filter, filter,
1303                                                       bnxt_filter_info, next);
1304                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1305                                         filter->l2_ovlan = 0;
1306                                         STAILQ_INSERT_TAIL(
1307                                                         &bp->free_filter_list,
1308                                                         filter, next);
1309                                 }
1310                                 new_filter = bnxt_alloc_filter(bp);
1311                                 if (!new_filter) {
1312                                         PMD_DRV_LOG(ERR,
1313                                                 "MAC/VLAN filter alloc failed\n");
1314                                         rc = -ENOMEM;
1315                                         goto exit;
1316                                 }
1317                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1318                                                    next);
1319                                 /* Inherit MAC from the previous filter */
1320                                 new_filter->mac_index = filter->mac_index;
1321                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1322                                        ETHER_ADDR_LEN);
1323                                 /* MAC + VLAN ID filter */
1324                                 new_filter->l2_ovlan = vlan_id;
1325                                 new_filter->l2_ovlan_mask = 0xF000;
1326                                 new_filter->enables |= en;
1327                                 rc = bnxt_hwrm_set_l2_filter(bp,
1328                                                              vnic->fw_vnic_id,
1329                                                              new_filter);
1330                                 if (rc)
1331                                         goto exit;
1332                                 PMD_DRV_LOG(INFO,
1333                                         "Added Vlan filter for %d\n", vlan_id);
1334 cont:
1335                                 filter = temp_filter;
1336                         }
1337                 }
1338         }
1339 exit:
1340         return rc;
1341 }
1342
1343 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1344                                    uint16_t vlan_id, int on)
1345 {
1346         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1347
1348         /* These operations apply to ALL existing MAC/VLAN filters */
1349         if (on)
1350                 return bnxt_add_vlan_filter(bp, vlan_id);
1351         else
1352                 return bnxt_del_vlan_filter(bp, vlan_id);
1353 }
1354
1355 static int
1356 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1357 {
1358         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1359         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1360         unsigned int i;
1361
1362         if (mask & ETH_VLAN_FILTER_MASK) {
1363                 if (!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
1364                         /* Remove any VLAN filters programmed */
1365                         for (i = 0; i < 4095; i++)
1366                                 bnxt_del_vlan_filter(bp, i);
1367                 }
1368                 PMD_DRV_LOG(DEBUG, "VLAN Filtering: %d\n",
1369                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER));
1370         }
1371
1372         if (mask & ETH_VLAN_STRIP_MASK) {
1373                 /* Enable or disable VLAN stripping */
1374                 for (i = 0; i < bp->nr_vnics; i++) {
1375                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1376                         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1377                                 vnic->vlan_strip = true;
1378                         else
1379                                 vnic->vlan_strip = false;
1380                         bnxt_hwrm_vnic_cfg(bp, vnic);
1381                 }
1382                 PMD_DRV_LOG(DEBUG, "VLAN Strip Offload: %d\n",
1383                         !!(rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP));
1384         }
1385
1386         if (mask & ETH_VLAN_EXTEND_MASK)
1387                 PMD_DRV_LOG(ERR, "Extend VLAN Not supported\n");
1388
1389         return 0;
1390 }
1391
1392 static int
1393 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1394 {
1395         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1396         /* Default Filter is tied to VNIC 0 */
1397         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1398         struct bnxt_filter_info *filter;
1399         int rc;
1400
1401         if (BNXT_VF(bp))
1402                 return -EPERM;
1403
1404         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1405
1406         STAILQ_FOREACH(filter, &vnic->filter, next) {
1407                 /* Default Filter is at Index 0 */
1408                 if (filter->mac_index != 0)
1409                         continue;
1410                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1411                 if (rc)
1412                         return rc;
1413                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1414                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1415                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1416                 filter->enables |=
1417                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1418                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1419                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1420                 if (rc)
1421                         return rc;
1422                 filter->mac_index = 0;
1423                 PMD_DRV_LOG(DEBUG, "Set MAC addr\n");
1424         }
1425
1426         return 0;
1427 }
1428
1429 static int
1430 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1431                           struct ether_addr *mc_addr_set,
1432                           uint32_t nb_mc_addr)
1433 {
1434         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1435         char *mc_addr_list = (char *)mc_addr_set;
1436         struct bnxt_vnic_info *vnic;
1437         uint32_t off = 0, i = 0;
1438
1439         vnic = &bp->vnic_info[0];
1440
1441         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1442                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1443                 goto allmulti;
1444         }
1445
1446         /* TODO Check for Duplicate mcast addresses */
1447         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1448         for (i = 0; i < nb_mc_addr; i++) {
1449                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1450                 off += ETHER_ADDR_LEN;
1451         }
1452
1453         vnic->mc_addr_cnt = i;
1454
1455 allmulti:
1456         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1457 }
1458
1459 static int
1460 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1461 {
1462         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1463         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1464         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1465         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1466         int ret;
1467
1468         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1469                         fw_major, fw_minor, fw_updt);
1470
1471         ret += 1; /* add the size of '\0' */
1472         if (fw_size < (uint32_t)ret)
1473                 return ret;
1474         else
1475                 return 0;
1476 }
1477
1478 static void
1479 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1480         struct rte_eth_rxq_info *qinfo)
1481 {
1482         struct bnxt_rx_queue *rxq;
1483
1484         rxq = dev->data->rx_queues[queue_id];
1485
1486         qinfo->mp = rxq->mb_pool;
1487         qinfo->scattered_rx = dev->data->scattered_rx;
1488         qinfo->nb_desc = rxq->nb_rx_desc;
1489
1490         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1491         qinfo->conf.rx_drop_en = 0;
1492         qinfo->conf.rx_deferred_start = 0;
1493 }
1494
1495 static void
1496 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1497         struct rte_eth_txq_info *qinfo)
1498 {
1499         struct bnxt_tx_queue *txq;
1500
1501         txq = dev->data->tx_queues[queue_id];
1502
1503         qinfo->nb_desc = txq->nb_tx_desc;
1504
1505         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1506         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1507         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1508
1509         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1510         qinfo->conf.tx_rs_thresh = 0;
1511         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1512 }
1513
1514 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1515 {
1516         struct bnxt *bp = eth_dev->data->dev_private;
1517         struct rte_eth_dev_info dev_info;
1518         uint32_t max_dev_mtu;
1519         uint32_t rc = 0;
1520         uint32_t i;
1521
1522         bnxt_dev_info_get_op(eth_dev, &dev_info);
1523         max_dev_mtu = dev_info.max_rx_pktlen -
1524                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1525
1526         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1527                 PMD_DRV_LOG(ERR, "MTU requested must be within (%d, %d)\n",
1528                         ETHER_MIN_MTU, max_dev_mtu);
1529                 return -EINVAL;
1530         }
1531
1532
1533         if (new_mtu > ETHER_MTU) {
1534                 bp->flags |= BNXT_FLAG_JUMBO;
1535                 bp->eth_dev->data->dev_conf.rxmode.offloads |=
1536                         DEV_RX_OFFLOAD_JUMBO_FRAME;
1537         } else {
1538                 bp->eth_dev->data->dev_conf.rxmode.offloads &=
1539                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1540                 bp->flags &= ~BNXT_FLAG_JUMBO;
1541         }
1542
1543         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1544                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1545
1546         eth_dev->data->mtu = new_mtu;
1547         PMD_DRV_LOG(INFO, "New MTU is %d\n", eth_dev->data->mtu);
1548
1549         for (i = 0; i < bp->nr_vnics; i++) {
1550                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1551
1552                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1553                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1554                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1555                 if (rc)
1556                         break;
1557
1558                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1559                 if (rc)
1560                         return rc;
1561         }
1562
1563         return rc;
1564 }
1565
1566 static int
1567 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1568 {
1569         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1570         uint16_t vlan = bp->vlan;
1571         int rc;
1572
1573         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1574                 PMD_DRV_LOG(ERR,
1575                         "PVID cannot be modified for this function\n");
1576                 return -ENOTSUP;
1577         }
1578         bp->vlan = on ? pvid : 0;
1579
1580         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1581         if (rc)
1582                 bp->vlan = vlan;
1583         return rc;
1584 }
1585
1586 static int
1587 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1588 {
1589         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1590
1591         return bnxt_hwrm_port_led_cfg(bp, true);
1592 }
1593
1594 static int
1595 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1596 {
1597         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1598
1599         return bnxt_hwrm_port_led_cfg(bp, false);
1600 }
1601
1602 static uint32_t
1603 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1604 {
1605         uint32_t desc = 0, raw_cons = 0, cons;
1606         struct bnxt_cp_ring_info *cpr;
1607         struct bnxt_rx_queue *rxq;
1608         struct rx_pkt_cmpl *rxcmp;
1609         uint16_t cmp_type;
1610         uint8_t cmp = 1;
1611         bool valid;
1612
1613         rxq = dev->data->rx_queues[rx_queue_id];
1614         cpr = rxq->cp_ring;
1615         valid = cpr->valid;
1616
1617         while (raw_cons < rxq->nb_rx_desc) {
1618                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1619                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1620
1621                 if (!CMPL_VALID(rxcmp, valid))
1622                         goto nothing_to_do;
1623                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1624                 cmp_type = CMP_TYPE(rxcmp);
1625                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1626                         cmp = (rte_le_to_cpu_32(
1627                                         ((struct rx_tpa_end_cmpl *)
1628                                          (rxcmp))->agg_bufs_v1) &
1629                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1630                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1631                         desc++;
1632                 } else if (cmp_type == 0x11) {
1633                         desc++;
1634                         cmp = (rxcmp->agg_bufs_v1 &
1635                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1636                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1637                 } else {
1638                         cmp = 1;
1639                 }
1640 nothing_to_do:
1641                 raw_cons += cmp ? cmp : 2;
1642         }
1643
1644         return desc;
1645 }
1646
1647 static int
1648 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1649 {
1650         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1651         struct bnxt_rx_ring_info *rxr;
1652         struct bnxt_cp_ring_info *cpr;
1653         struct bnxt_sw_rx_bd *rx_buf;
1654         struct rx_pkt_cmpl *rxcmp;
1655         uint32_t cons, cp_cons;
1656
1657         if (!rxq)
1658                 return -EINVAL;
1659
1660         cpr = rxq->cp_ring;
1661         rxr = rxq->rx_ring;
1662
1663         if (offset >= rxq->nb_rx_desc)
1664                 return -EINVAL;
1665
1666         cons = RING_CMP(cpr->cp_ring_struct, offset);
1667         cp_cons = cpr->cp_raw_cons;
1668         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1669
1670         if (cons > cp_cons) {
1671                 if (CMPL_VALID(rxcmp, cpr->valid))
1672                         return RTE_ETH_RX_DESC_DONE;
1673         } else {
1674                 if (CMPL_VALID(rxcmp, !cpr->valid))
1675                         return RTE_ETH_RX_DESC_DONE;
1676         }
1677         rx_buf = &rxr->rx_buf_ring[cons];
1678         if (rx_buf->mbuf == NULL)
1679                 return RTE_ETH_RX_DESC_UNAVAIL;
1680
1681
1682         return RTE_ETH_RX_DESC_AVAIL;
1683 }
1684
1685 static int
1686 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1687 {
1688         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1689         struct bnxt_tx_ring_info *txr;
1690         struct bnxt_cp_ring_info *cpr;
1691         struct bnxt_sw_tx_bd *tx_buf;
1692         struct tx_pkt_cmpl *txcmp;
1693         uint32_t cons, cp_cons;
1694
1695         if (!txq)
1696                 return -EINVAL;
1697
1698         cpr = txq->cp_ring;
1699         txr = txq->tx_ring;
1700
1701         if (offset >= txq->nb_tx_desc)
1702                 return -EINVAL;
1703
1704         cons = RING_CMP(cpr->cp_ring_struct, offset);
1705         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1706         cp_cons = cpr->cp_raw_cons;
1707
1708         if (cons > cp_cons) {
1709                 if (CMPL_VALID(txcmp, cpr->valid))
1710                         return RTE_ETH_TX_DESC_UNAVAIL;
1711         } else {
1712                 if (CMPL_VALID(txcmp, !cpr->valid))
1713                         return RTE_ETH_TX_DESC_UNAVAIL;
1714         }
1715         tx_buf = &txr->tx_buf_ring[cons];
1716         if (tx_buf->mbuf == NULL)
1717                 return RTE_ETH_TX_DESC_DONE;
1718
1719         return RTE_ETH_TX_DESC_FULL;
1720 }
1721
1722 static struct bnxt_filter_info *
1723 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1724                                 struct rte_eth_ethertype_filter *efilter,
1725                                 struct bnxt_vnic_info *vnic0,
1726                                 struct bnxt_vnic_info *vnic,
1727                                 int *ret)
1728 {
1729         struct bnxt_filter_info *mfilter = NULL;
1730         int match = 0;
1731         *ret = 0;
1732
1733         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1734                 efilter->ether_type == ETHER_TYPE_IPv6) {
1735                 PMD_DRV_LOG(ERR, "invalid ether_type(0x%04x) in"
1736                         " ethertype filter.", efilter->ether_type);
1737                 *ret = -EINVAL;
1738                 goto exit;
1739         }
1740         if (efilter->queue >= bp->rx_nr_rings) {
1741                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1742                 *ret = -EINVAL;
1743                 goto exit;
1744         }
1745
1746         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1747         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1748         if (vnic == NULL) {
1749                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", efilter->queue);
1750                 *ret = -EINVAL;
1751                 goto exit;
1752         }
1753
1754         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1755                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1756                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1757                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1758                              mfilter->flags ==
1759                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1760                              mfilter->ethertype == efilter->ether_type)) {
1761                                 match = 1;
1762                                 break;
1763                         }
1764                 }
1765         } else {
1766                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1767                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1768                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1769                              mfilter->ethertype == efilter->ether_type &&
1770                              mfilter->flags ==
1771                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1772                                 match = 1;
1773                                 break;
1774                         }
1775         }
1776
1777         if (match)
1778                 *ret = -EEXIST;
1779
1780 exit:
1781         return mfilter;
1782 }
1783
1784 static int
1785 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1786                         enum rte_filter_op filter_op,
1787                         void *arg)
1788 {
1789         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1790         struct rte_eth_ethertype_filter *efilter =
1791                         (struct rte_eth_ethertype_filter *)arg;
1792         struct bnxt_filter_info *bfilter, *filter1;
1793         struct bnxt_vnic_info *vnic, *vnic0;
1794         int ret;
1795
1796         if (filter_op == RTE_ETH_FILTER_NOP)
1797                 return 0;
1798
1799         if (arg == NULL) {
1800                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
1801                             filter_op);
1802                 return -EINVAL;
1803         }
1804
1805         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1806         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1807
1808         switch (filter_op) {
1809         case RTE_ETH_FILTER_ADD:
1810                 bnxt_match_and_validate_ether_filter(bp, efilter,
1811                                                         vnic0, vnic, &ret);
1812                 if (ret < 0)
1813                         return ret;
1814
1815                 bfilter = bnxt_get_unused_filter(bp);
1816                 if (bfilter == NULL) {
1817                         PMD_DRV_LOG(ERR,
1818                                 "Not enough resources for a new filter.\n");
1819                         return -ENOMEM;
1820                 }
1821                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1822                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1823                        ETHER_ADDR_LEN);
1824                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1825                        ETHER_ADDR_LEN);
1826                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1827                 bfilter->ethertype = efilter->ether_type;
1828                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1829
1830                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1831                 if (filter1 == NULL) {
1832                         ret = -1;
1833                         goto cleanup;
1834                 }
1835                 bfilter->enables |=
1836                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1837                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1838
1839                 bfilter->dst_id = vnic->fw_vnic_id;
1840
1841                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1842                         bfilter->flags =
1843                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1844                 }
1845
1846                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1847                 if (ret)
1848                         goto cleanup;
1849                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1850                 break;
1851         case RTE_ETH_FILTER_DELETE:
1852                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1853                                                         vnic0, vnic, &ret);
1854                 if (ret == -EEXIST) {
1855                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1856
1857                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1858                                       next);
1859                         bnxt_free_filter(bp, filter1);
1860                 } else if (ret == 0) {
1861                         PMD_DRV_LOG(ERR, "No matching filter found\n");
1862                 }
1863                 break;
1864         default:
1865                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
1866                 ret = -EINVAL;
1867                 goto error;
1868         }
1869         return ret;
1870 cleanup:
1871         bnxt_free_filter(bp, bfilter);
1872 error:
1873         return ret;
1874 }
1875
1876 static inline int
1877 parse_ntuple_filter(struct bnxt *bp,
1878                     struct rte_eth_ntuple_filter *nfilter,
1879                     struct bnxt_filter_info *bfilter)
1880 {
1881         uint32_t en = 0;
1882
1883         if (nfilter->queue >= bp->rx_nr_rings) {
1884                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", nfilter->queue);
1885                 return -EINVAL;
1886         }
1887
1888         switch (nfilter->dst_port_mask) {
1889         case UINT16_MAX:
1890                 bfilter->dst_port_mask = -1;
1891                 bfilter->dst_port = nfilter->dst_port;
1892                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1893                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1894                 break;
1895         default:
1896                 PMD_DRV_LOG(ERR, "invalid dst_port mask.");
1897                 return -EINVAL;
1898         }
1899
1900         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1901         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1902
1903         switch (nfilter->proto_mask) {
1904         case UINT8_MAX:
1905                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1906                         bfilter->ip_protocol = 17;
1907                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1908                         bfilter->ip_protocol = 6;
1909                 else
1910                         return -EINVAL;
1911                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1912                 break;
1913         default:
1914                 PMD_DRV_LOG(ERR, "invalid protocol mask.");
1915                 return -EINVAL;
1916         }
1917
1918         switch (nfilter->dst_ip_mask) {
1919         case UINT32_MAX:
1920                 bfilter->dst_ipaddr_mask[0] = -1;
1921                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1922                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1923                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1924                 break;
1925         default:
1926                 PMD_DRV_LOG(ERR, "invalid dst_ip mask.");
1927                 return -EINVAL;
1928         }
1929
1930         switch (nfilter->src_ip_mask) {
1931         case UINT32_MAX:
1932                 bfilter->src_ipaddr_mask[0] = -1;
1933                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1934                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1935                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1936                 break;
1937         default:
1938                 PMD_DRV_LOG(ERR, "invalid src_ip mask.");
1939                 return -EINVAL;
1940         }
1941
1942         switch (nfilter->src_port_mask) {
1943         case UINT16_MAX:
1944                 bfilter->src_port_mask = -1;
1945                 bfilter->src_port = nfilter->src_port;
1946                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1947                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1948                 break;
1949         default:
1950                 PMD_DRV_LOG(ERR, "invalid src_port mask.");
1951                 return -EINVAL;
1952         }
1953
1954         //TODO Priority
1955         //nfilter->priority = (uint8_t)filter->priority;
1956
1957         bfilter->enables = en;
1958         return 0;
1959 }
1960
1961 static struct bnxt_filter_info*
1962 bnxt_match_ntuple_filter(struct bnxt *bp,
1963                          struct bnxt_filter_info *bfilter,
1964                          struct bnxt_vnic_info **mvnic)
1965 {
1966         struct bnxt_filter_info *mfilter = NULL;
1967         int i;
1968
1969         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1970                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1971                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1972                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1973                             bfilter->src_ipaddr_mask[0] ==
1974                             mfilter->src_ipaddr_mask[0] &&
1975                             bfilter->src_port == mfilter->src_port &&
1976                             bfilter->src_port_mask == mfilter->src_port_mask &&
1977                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1978                             bfilter->dst_ipaddr_mask[0] ==
1979                             mfilter->dst_ipaddr_mask[0] &&
1980                             bfilter->dst_port == mfilter->dst_port &&
1981                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1982                             bfilter->flags == mfilter->flags &&
1983                             bfilter->enables == mfilter->enables) {
1984                                 if (mvnic)
1985                                         *mvnic = vnic;
1986                                 return mfilter;
1987                         }
1988                 }
1989         }
1990         return NULL;
1991 }
1992
1993 static int
1994 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1995                        struct rte_eth_ntuple_filter *nfilter,
1996                        enum rte_filter_op filter_op)
1997 {
1998         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
1999         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2000         int ret;
2001
2002         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2003                 PMD_DRV_LOG(ERR, "only 5tuple is supported.");
2004                 return -EINVAL;
2005         }
2006
2007         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2008                 PMD_DRV_LOG(ERR, "Ntuple filter: TCP flags not supported\n");
2009                 return -EINVAL;
2010         }
2011
2012         bfilter = bnxt_get_unused_filter(bp);
2013         if (bfilter == NULL) {
2014                 PMD_DRV_LOG(ERR,
2015                         "Not enough resources for a new filter.\n");
2016                 return -ENOMEM;
2017         }
2018         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2019         if (ret < 0)
2020                 goto free_filter;
2021
2022         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2023         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2024         filter1 = STAILQ_FIRST(&vnic0->filter);
2025         if (filter1 == NULL) {
2026                 ret = -1;
2027                 goto free_filter;
2028         }
2029
2030         bfilter->dst_id = vnic->fw_vnic_id;
2031         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2032         bfilter->enables |=
2033                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2034         bfilter->ethertype = 0x800;
2035         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2036
2037         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2038
2039         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2040             bfilter->dst_id == mfilter->dst_id) {
2041                 PMD_DRV_LOG(ERR, "filter exists.\n");
2042                 ret = -EEXIST;
2043                 goto free_filter;
2044         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2045                    bfilter->dst_id != mfilter->dst_id) {
2046                 mfilter->dst_id = vnic->fw_vnic_id;
2047                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2048                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2049                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2050                 PMD_DRV_LOG(ERR, "filter with matching pattern exists.\n");
2051                 PMD_DRV_LOG(ERR, " Updated it to the new destination queue\n");
2052                 goto free_filter;
2053         }
2054         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2055                 PMD_DRV_LOG(ERR, "filter doesn't exist.");
2056                 ret = -ENOENT;
2057                 goto free_filter;
2058         }
2059
2060         if (filter_op == RTE_ETH_FILTER_ADD) {
2061                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2062                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2063                 if (ret)
2064                         goto free_filter;
2065                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2066         } else {
2067                 if (mfilter == NULL) {
2068                         /* This should not happen. But for Coverity! */
2069                         ret = -ENOENT;
2070                         goto free_filter;
2071                 }
2072                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2073
2074                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2075                 bnxt_free_filter(bp, mfilter);
2076                 mfilter->fw_l2_filter_id = -1;
2077                 bnxt_free_filter(bp, bfilter);
2078                 bfilter->fw_l2_filter_id = -1;
2079         }
2080
2081         return 0;
2082 free_filter:
2083         bfilter->fw_l2_filter_id = -1;
2084         bnxt_free_filter(bp, bfilter);
2085         return ret;
2086 }
2087
2088 static int
2089 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2090                         enum rte_filter_op filter_op,
2091                         void *arg)
2092 {
2093         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2094         int ret;
2095
2096         if (filter_op == RTE_ETH_FILTER_NOP)
2097                 return 0;
2098
2099         if (arg == NULL) {
2100                 PMD_DRV_LOG(ERR, "arg shouldn't be NULL for operation %u.",
2101                             filter_op);
2102                 return -EINVAL;
2103         }
2104
2105         switch (filter_op) {
2106         case RTE_ETH_FILTER_ADD:
2107                 ret = bnxt_cfg_ntuple_filter(bp,
2108                         (struct rte_eth_ntuple_filter *)arg,
2109                         filter_op);
2110                 break;
2111         case RTE_ETH_FILTER_DELETE:
2112                 ret = bnxt_cfg_ntuple_filter(bp,
2113                         (struct rte_eth_ntuple_filter *)arg,
2114                         filter_op);
2115                 break;
2116         default:
2117                 PMD_DRV_LOG(ERR, "unsupported operation %u.", filter_op);
2118                 ret = -EINVAL;
2119                 break;
2120         }
2121         return ret;
2122 }
2123
2124 static int
2125 bnxt_parse_fdir_filter(struct bnxt *bp,
2126                        struct rte_eth_fdir_filter *fdir,
2127                        struct bnxt_filter_info *filter)
2128 {
2129         enum rte_fdir_mode fdir_mode =
2130                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2131         struct bnxt_vnic_info *vnic0, *vnic;
2132         struct bnxt_filter_info *filter1;
2133         uint32_t en = 0;
2134         int i;
2135
2136         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2137                 return -EINVAL;
2138
2139         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2140         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2141
2142         switch (fdir->input.flow_type) {
2143         case RTE_ETH_FLOW_IPV4:
2144         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2145                 /* FALLTHROUGH */
2146                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2147                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2148                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2149                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2150                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2151                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2152                 filter->ip_addr_type =
2153                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2154                 filter->src_ipaddr_mask[0] = 0xffffffff;
2155                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2156                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2157                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2158                 filter->ethertype = 0x800;
2159                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2160                 break;
2161         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2162                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2163                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2164                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2165                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2166                 filter->dst_port_mask = 0xffff;
2167                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2168                 filter->src_port_mask = 0xffff;
2169                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2170                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2171                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2172                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2173                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2174                 filter->ip_protocol = 6;
2175                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2176                 filter->ip_addr_type =
2177                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2178                 filter->src_ipaddr_mask[0] = 0xffffffff;
2179                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2180                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2181                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2182                 filter->ethertype = 0x800;
2183                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2184                 break;
2185         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2186                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2187                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2188                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2189                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2190                 filter->dst_port_mask = 0xffff;
2191                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2192                 filter->src_port_mask = 0xffff;
2193                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2194                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2195                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2196                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2197                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2198                 filter->ip_protocol = 17;
2199                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2200                 filter->ip_addr_type =
2201                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2202                 filter->src_ipaddr_mask[0] = 0xffffffff;
2203                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2204                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2205                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2206                 filter->ethertype = 0x800;
2207                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2208                 break;
2209         case RTE_ETH_FLOW_IPV6:
2210         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2211                 /* FALLTHROUGH */
2212                 filter->ip_addr_type =
2213                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2214                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2215                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2216                 rte_memcpy(filter->src_ipaddr,
2217                            fdir->input.flow.ipv6_flow.src_ip, 16);
2218                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2219                 rte_memcpy(filter->dst_ipaddr,
2220                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2221                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2222                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2223                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2224                 memset(filter->src_ipaddr_mask, 0xff, 16);
2225                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2226                 filter->ethertype = 0x86dd;
2227                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2228                 break;
2229         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2230                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2231                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2232                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2233                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2234                 filter->dst_port_mask = 0xffff;
2235                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2236                 filter->src_port_mask = 0xffff;
2237                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2238                 filter->ip_addr_type =
2239                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2240                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2241                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2242                 rte_memcpy(filter->src_ipaddr,
2243                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2244                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2245                 rte_memcpy(filter->dst_ipaddr,
2246                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2247                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2248                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2249                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2250                 memset(filter->src_ipaddr_mask, 0xff, 16);
2251                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2252                 filter->ethertype = 0x86dd;
2253                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2254                 break;
2255         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2256                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2257                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2258                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2259                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2260                 filter->dst_port_mask = 0xffff;
2261                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2262                 filter->src_port_mask = 0xffff;
2263                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2264                 filter->ip_addr_type =
2265                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2266                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2267                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2268                 rte_memcpy(filter->src_ipaddr,
2269                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2270                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2271                 rte_memcpy(filter->dst_ipaddr,
2272                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2273                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2274                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2275                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2276                 memset(filter->src_ipaddr_mask, 0xff, 16);
2277                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2278                 filter->ethertype = 0x86dd;
2279                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2280                 break;
2281         case RTE_ETH_FLOW_L2_PAYLOAD:
2282                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2283                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2284                 break;
2285         case RTE_ETH_FLOW_VXLAN:
2286                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2287                         return -EINVAL;
2288                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2289                 filter->tunnel_type =
2290                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2291                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2292                 break;
2293         case RTE_ETH_FLOW_NVGRE:
2294                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2295                         return -EINVAL;
2296                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2297                 filter->tunnel_type =
2298                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2299                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2300                 break;
2301         case RTE_ETH_FLOW_UNKNOWN:
2302         case RTE_ETH_FLOW_RAW:
2303         case RTE_ETH_FLOW_FRAG_IPV4:
2304         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2305         case RTE_ETH_FLOW_FRAG_IPV6:
2306         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2307         case RTE_ETH_FLOW_IPV6_EX:
2308         case RTE_ETH_FLOW_IPV6_TCP_EX:
2309         case RTE_ETH_FLOW_IPV6_UDP_EX:
2310         case RTE_ETH_FLOW_GENEVE:
2311                 /* FALLTHROUGH */
2312         default:
2313                 return -EINVAL;
2314         }
2315
2316         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2317         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2318         if (vnic == NULL) {
2319                 PMD_DRV_LOG(ERR, "Invalid queue %d\n", fdir->action.rx_queue);
2320                 return -EINVAL;
2321         }
2322
2323
2324         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2325                 rte_memcpy(filter->dst_macaddr,
2326                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2327                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2328         }
2329
2330         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2331                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2332                 filter1 = STAILQ_FIRST(&vnic0->filter);
2333                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2334         } else {
2335                 filter->dst_id = vnic->fw_vnic_id;
2336                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2337                         if (filter->dst_macaddr[i] == 0x00)
2338                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2339                         else
2340                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2341         }
2342
2343         if (filter1 == NULL)
2344                 return -EINVAL;
2345
2346         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2347         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2348
2349         filter->enables = en;
2350
2351         return 0;
2352 }
2353
2354 static struct bnxt_filter_info *
2355 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf,
2356                 struct bnxt_vnic_info **mvnic)
2357 {
2358         struct bnxt_filter_info *mf = NULL;
2359         int i;
2360
2361         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2362                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2363
2364                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2365                         if (mf->filter_type == nf->filter_type &&
2366                             mf->flags == nf->flags &&
2367                             mf->src_port == nf->src_port &&
2368                             mf->src_port_mask == nf->src_port_mask &&
2369                             mf->dst_port == nf->dst_port &&
2370                             mf->dst_port_mask == nf->dst_port_mask &&
2371                             mf->ip_protocol == nf->ip_protocol &&
2372                             mf->ip_addr_type == nf->ip_addr_type &&
2373                             mf->ethertype == nf->ethertype &&
2374                             mf->vni == nf->vni &&
2375                             mf->tunnel_type == nf->tunnel_type &&
2376                             mf->l2_ovlan == nf->l2_ovlan &&
2377                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2378                             mf->l2_ivlan == nf->l2_ivlan &&
2379                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2380                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2381                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2382                                     ETHER_ADDR_LEN) &&
2383                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2384                                     ETHER_ADDR_LEN) &&
2385                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2386                                     ETHER_ADDR_LEN) &&
2387                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2388                                     sizeof(nf->src_ipaddr)) &&
2389                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2390                                     sizeof(nf->src_ipaddr_mask)) &&
2391                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2392                                     sizeof(nf->dst_ipaddr)) &&
2393                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2394                                     sizeof(nf->dst_ipaddr_mask))) {
2395                                 if (mvnic)
2396                                         *mvnic = vnic;
2397                                 return mf;
2398                         }
2399                 }
2400         }
2401         return NULL;
2402 }
2403
2404 static int
2405 bnxt_fdir_filter(struct rte_eth_dev *dev,
2406                  enum rte_filter_op filter_op,
2407                  void *arg)
2408 {
2409         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2410         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2411         struct bnxt_filter_info *filter, *match;
2412         struct bnxt_vnic_info *vnic, *mvnic;
2413         int ret = 0, i;
2414
2415         if (filter_op == RTE_ETH_FILTER_NOP)
2416                 return 0;
2417
2418         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2419                 return -EINVAL;
2420
2421         switch (filter_op) {
2422         case RTE_ETH_FILTER_ADD:
2423         case RTE_ETH_FILTER_DELETE:
2424                 /* FALLTHROUGH */
2425                 filter = bnxt_get_unused_filter(bp);
2426                 if (filter == NULL) {
2427                         PMD_DRV_LOG(ERR,
2428                                 "Not enough resources for a new flow.\n");
2429                         return -ENOMEM;
2430                 }
2431
2432                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2433                 if (ret != 0)
2434                         goto free_filter;
2435                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2436
2437                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2438                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2439                 else
2440                         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2441
2442                 match = bnxt_match_fdir(bp, filter, &mvnic);
2443                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2444                         if (match->dst_id == vnic->fw_vnic_id) {
2445                                 PMD_DRV_LOG(ERR, "Flow already exists.\n");
2446                                 ret = -EEXIST;
2447                                 goto free_filter;
2448                         } else {
2449                                 match->dst_id = vnic->fw_vnic_id;
2450                                 ret = bnxt_hwrm_set_ntuple_filter(bp,
2451                                                                   match->dst_id,
2452                                                                   match);
2453                                 STAILQ_REMOVE(&mvnic->filter, match,
2454                                               bnxt_filter_info, next);
2455                                 STAILQ_INSERT_TAIL(&vnic->filter, match, next);
2456                                 PMD_DRV_LOG(ERR,
2457                                         "Filter with matching pattern exist\n");
2458                                 PMD_DRV_LOG(ERR,
2459                                         "Updated it to new destination q\n");
2460                                 goto free_filter;
2461                         }
2462                 }
2463                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2464                         PMD_DRV_LOG(ERR, "Flow does not exist.\n");
2465                         ret = -ENOENT;
2466                         goto free_filter;
2467                 }
2468
2469                 if (filter_op == RTE_ETH_FILTER_ADD) {
2470                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2471                                                           filter->dst_id,
2472                                                           filter);
2473                         if (ret)
2474                                 goto free_filter;
2475                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2476                 } else {
2477                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2478                         STAILQ_REMOVE(&vnic->filter, match,
2479                                       bnxt_filter_info, next);
2480                         bnxt_free_filter(bp, match);
2481                         filter->fw_l2_filter_id = -1;
2482                         bnxt_free_filter(bp, filter);
2483                 }
2484                 break;
2485         case RTE_ETH_FILTER_FLUSH:
2486                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2487                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2488
2489                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2490                                 if (filter->filter_type ==
2491                                     HWRM_CFA_NTUPLE_FILTER) {
2492                                         ret =
2493                                         bnxt_hwrm_clear_ntuple_filter(bp,
2494                                                                       filter);
2495                                         STAILQ_REMOVE(&vnic->filter, filter,
2496                                                       bnxt_filter_info, next);
2497                                 }
2498                         }
2499                 }
2500                 return ret;
2501         case RTE_ETH_FILTER_UPDATE:
2502         case RTE_ETH_FILTER_STATS:
2503         case RTE_ETH_FILTER_INFO:
2504                 PMD_DRV_LOG(ERR, "operation %u not implemented", filter_op);
2505                 break;
2506         default:
2507                 PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
2508                 ret = -EINVAL;
2509                 break;
2510         }
2511         return ret;
2512
2513 free_filter:
2514         filter->fw_l2_filter_id = -1;
2515         bnxt_free_filter(bp, filter);
2516         return ret;
2517 }
2518
2519 static int
2520 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2521                     enum rte_filter_type filter_type,
2522                     enum rte_filter_op filter_op, void *arg)
2523 {
2524         int ret = 0;
2525
2526         switch (filter_type) {
2527         case RTE_ETH_FILTER_TUNNEL:
2528                 PMD_DRV_LOG(ERR,
2529                         "filter type: %d: To be implemented\n", filter_type);
2530                 break;
2531         case RTE_ETH_FILTER_FDIR:
2532                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2533                 break;
2534         case RTE_ETH_FILTER_NTUPLE:
2535                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2536                 break;
2537         case RTE_ETH_FILTER_ETHERTYPE:
2538                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2539                 break;
2540         case RTE_ETH_FILTER_GENERIC:
2541                 if (filter_op != RTE_ETH_FILTER_GET)
2542                         return -EINVAL;
2543                 *(const void **)arg = &bnxt_flow_ops;
2544                 break;
2545         default:
2546                 PMD_DRV_LOG(ERR,
2547                         "Filter type (%d) not supported", filter_type);
2548                 ret = -EINVAL;
2549                 break;
2550         }
2551         return ret;
2552 }
2553
2554 static const uint32_t *
2555 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2556 {
2557         static const uint32_t ptypes[] = {
2558                 RTE_PTYPE_L2_ETHER_VLAN,
2559                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2560                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2561                 RTE_PTYPE_L4_ICMP,
2562                 RTE_PTYPE_L4_TCP,
2563                 RTE_PTYPE_L4_UDP,
2564                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2565                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2566                 RTE_PTYPE_INNER_L4_ICMP,
2567                 RTE_PTYPE_INNER_L4_TCP,
2568                 RTE_PTYPE_INNER_L4_UDP,
2569                 RTE_PTYPE_UNKNOWN
2570         };
2571
2572         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2573                 return ptypes;
2574         return NULL;
2575 }
2576
2577 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2578                          int reg_win)
2579 {
2580         uint32_t reg_base = *reg_arr & 0xfffff000;
2581         uint32_t win_off;
2582         int i;
2583
2584         for (i = 0; i < count; i++) {
2585                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2586                         return -ERANGE;
2587         }
2588         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2589         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2590         return 0;
2591 }
2592
2593 static int bnxt_map_ptp_regs(struct bnxt *bp)
2594 {
2595         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2596         uint32_t *reg_arr;
2597         int rc, i;
2598
2599         reg_arr = ptp->rx_regs;
2600         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2601         if (rc)
2602                 return rc;
2603
2604         reg_arr = ptp->tx_regs;
2605         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2606         if (rc)
2607                 return rc;
2608
2609         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2610                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2611
2612         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2613                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2614
2615         return 0;
2616 }
2617
2618 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2619 {
2620         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2621                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2622         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2623                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2624 }
2625
2626 static uint64_t bnxt_cc_read(struct bnxt *bp)
2627 {
2628         uint64_t ns;
2629
2630         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2631                               BNXT_GRCPF_REG_SYNC_TIME));
2632         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2633                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2634         return ns;
2635 }
2636
2637 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2638 {
2639         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2640         uint32_t fifo;
2641
2642         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2643                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2644         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2645                 return -EAGAIN;
2646
2647         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2648                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2649         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2650                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2651         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2652                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2653
2654         return 0;
2655 }
2656
2657 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2658 {
2659         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2660         struct bnxt_pf_info *pf = &bp->pf;
2661         uint16_t port_id;
2662         uint32_t fifo;
2663
2664         if (!ptp)
2665                 return -ENODEV;
2666
2667         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2668                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2669         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2670                 return -EAGAIN;
2671
2672         port_id = pf->port_id;
2673         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2674                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2675
2676         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2677                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2678         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2679 /*              bnxt_clr_rx_ts(bp);       TBD  */
2680                 return -EBUSY;
2681         }
2682
2683         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2684                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2685         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2686                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2687
2688         return 0;
2689 }
2690
2691 static int
2692 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2693 {
2694         uint64_t ns;
2695         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2696         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2697
2698         if (!ptp)
2699                 return 0;
2700
2701         ns = rte_timespec_to_ns(ts);
2702         /* Set the timecounters to a new value. */
2703         ptp->tc.nsec = ns;
2704
2705         return 0;
2706 }
2707
2708 static int
2709 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2710 {
2711         uint64_t ns, systime_cycles;
2712         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2713         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2714
2715         if (!ptp)
2716                 return 0;
2717
2718         systime_cycles = bnxt_cc_read(bp);
2719         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2720         *ts = rte_ns_to_timespec(ns);
2721
2722         return 0;
2723 }
2724 static int
2725 bnxt_timesync_enable(struct rte_eth_dev *dev)
2726 {
2727         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2728         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2729         uint32_t shift = 0;
2730
2731         if (!ptp)
2732                 return 0;
2733
2734         ptp->rx_filter = 1;
2735         ptp->tx_tstamp_en = 1;
2736         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2737
2738         if (!bnxt_hwrm_ptp_cfg(bp))
2739                 bnxt_map_ptp_regs(bp);
2740
2741         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2742         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2743         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2744
2745         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2746         ptp->tc.cc_shift = shift;
2747         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2748
2749         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2750         ptp->rx_tstamp_tc.cc_shift = shift;
2751         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2752
2753         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2754         ptp->tx_tstamp_tc.cc_shift = shift;
2755         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2756
2757         return 0;
2758 }
2759
2760 static int
2761 bnxt_timesync_disable(struct rte_eth_dev *dev)
2762 {
2763         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2764         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2765
2766         if (!ptp)
2767                 return 0;
2768
2769         ptp->rx_filter = 0;
2770         ptp->tx_tstamp_en = 0;
2771         ptp->rxctl = 0;
2772
2773         bnxt_hwrm_ptp_cfg(bp);
2774
2775         bnxt_unmap_ptp_regs(bp);
2776
2777         return 0;
2778 }
2779
2780 static int
2781 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2782                                  struct timespec *timestamp,
2783                                  uint32_t flags __rte_unused)
2784 {
2785         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2786         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2787         uint64_t rx_tstamp_cycles = 0;
2788         uint64_t ns;
2789
2790         if (!ptp)
2791                 return 0;
2792
2793         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2794         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2795         *timestamp = rte_ns_to_timespec(ns);
2796         return  0;
2797 }
2798
2799 static int
2800 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2801                                  struct timespec *timestamp)
2802 {
2803         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2804         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2805         uint64_t tx_tstamp_cycles = 0;
2806         uint64_t ns;
2807
2808         if (!ptp)
2809                 return 0;
2810
2811         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2812         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2813         *timestamp = rte_ns_to_timespec(ns);
2814
2815         return 0;
2816 }
2817
2818 static int
2819 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2820 {
2821         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2822         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2823
2824         if (!ptp)
2825                 return 0;
2826
2827         ptp->tc.nsec += delta;
2828
2829         return 0;
2830 }
2831
2832 static int
2833 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2834 {
2835         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2836         int rc;
2837         uint32_t dir_entries;
2838         uint32_t entry_length;
2839
2840         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x\n",
2841                 bp->pdev->addr.domain, bp->pdev->addr.bus,
2842                 bp->pdev->addr.devid, bp->pdev->addr.function);
2843
2844         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2845         if (rc != 0)
2846                 return rc;
2847
2848         return dir_entries * entry_length;
2849 }
2850
2851 static int
2852 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2853                 struct rte_dev_eeprom_info *in_eeprom)
2854 {
2855         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2856         uint32_t index;
2857         uint32_t offset;
2858
2859         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2860                 "len = %d\n", bp->pdev->addr.domain,
2861                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2862                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2863
2864         if (in_eeprom->offset == 0) /* special offset value to get directory */
2865                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2866                                                 in_eeprom->data);
2867
2868         index = in_eeprom->offset >> 24;
2869         offset = in_eeprom->offset & 0xffffff;
2870
2871         if (index != 0)
2872                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2873                                            in_eeprom->length, in_eeprom->data);
2874
2875         return 0;
2876 }
2877
2878 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2879 {
2880         switch (dir_type) {
2881         case BNX_DIR_TYPE_CHIMP_PATCH:
2882         case BNX_DIR_TYPE_BOOTCODE:
2883         case BNX_DIR_TYPE_BOOTCODE_2:
2884         case BNX_DIR_TYPE_APE_FW:
2885         case BNX_DIR_TYPE_APE_PATCH:
2886         case BNX_DIR_TYPE_KONG_FW:
2887         case BNX_DIR_TYPE_KONG_PATCH:
2888         case BNX_DIR_TYPE_BONO_FW:
2889         case BNX_DIR_TYPE_BONO_PATCH:
2890                 /* FALLTHROUGH */
2891                 return true;
2892         }
2893
2894         return false;
2895 }
2896
2897 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2898 {
2899         switch (dir_type) {
2900         case BNX_DIR_TYPE_AVS:
2901         case BNX_DIR_TYPE_EXP_ROM_MBA:
2902         case BNX_DIR_TYPE_PCIE:
2903         case BNX_DIR_TYPE_TSCF_UCODE:
2904         case BNX_DIR_TYPE_EXT_PHY:
2905         case BNX_DIR_TYPE_CCM:
2906         case BNX_DIR_TYPE_ISCSI_BOOT:
2907         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2908         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2909                 /* FALLTHROUGH */
2910                 return true;
2911         }
2912
2913         return false;
2914 }
2915
2916 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2917 {
2918         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2919                 bnxt_dir_type_is_other_exec_format(dir_type);
2920 }
2921
2922 static int
2923 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2924                 struct rte_dev_eeprom_info *in_eeprom)
2925 {
2926         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2927         uint8_t index, dir_op;
2928         uint16_t type, ext, ordinal, attr;
2929
2930         PMD_DRV_LOG(INFO, "%04x:%02x:%02x:%02x in_eeprom->offset = %d "
2931                 "len = %d\n", bp->pdev->addr.domain,
2932                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2933                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2934
2935         if (!BNXT_PF(bp)) {
2936                 PMD_DRV_LOG(ERR, "NVM write not supported from a VF\n");
2937                 return -EINVAL;
2938         }
2939
2940         type = in_eeprom->magic >> 16;
2941
2942         if (type == 0xffff) { /* special value for directory operations */
2943                 index = in_eeprom->magic & 0xff;
2944                 dir_op = in_eeprom->magic >> 8;
2945                 if (index == 0)
2946                         return -EINVAL;
2947                 switch (dir_op) {
2948                 case 0x0e: /* erase */
2949                         if (in_eeprom->offset != ~in_eeprom->magic)
2950                                 return -EINVAL;
2951                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2952                 default:
2953                         return -EINVAL;
2954                 }
2955         }
2956
2957         /* Create or re-write an NVM item: */
2958         if (bnxt_dir_type_is_executable(type) == true)
2959                 return -EOPNOTSUPP;
2960         ext = in_eeprom->magic & 0xffff;
2961         ordinal = in_eeprom->offset >> 16;
2962         attr = in_eeprom->offset & 0xffff;
2963
2964         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2965                                      in_eeprom->data, in_eeprom->length);
2966         return 0;
2967 }
2968
2969 /*
2970  * Initialization
2971  */
2972
2973 static const struct eth_dev_ops bnxt_dev_ops = {
2974         .dev_infos_get = bnxt_dev_info_get_op,
2975         .dev_close = bnxt_dev_close_op,
2976         .dev_configure = bnxt_dev_configure_op,
2977         .dev_start = bnxt_dev_start_op,
2978         .dev_stop = bnxt_dev_stop_op,
2979         .dev_set_link_up = bnxt_dev_set_link_up_op,
2980         .dev_set_link_down = bnxt_dev_set_link_down_op,
2981         .stats_get = bnxt_stats_get_op,
2982         .stats_reset = bnxt_stats_reset_op,
2983         .rx_queue_setup = bnxt_rx_queue_setup_op,
2984         .rx_queue_release = bnxt_rx_queue_release_op,
2985         .tx_queue_setup = bnxt_tx_queue_setup_op,
2986         .tx_queue_release = bnxt_tx_queue_release_op,
2987         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2988         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2989         .reta_update = bnxt_reta_update_op,
2990         .reta_query = bnxt_reta_query_op,
2991         .rss_hash_update = bnxt_rss_hash_update_op,
2992         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2993         .link_update = bnxt_link_update_op,
2994         .promiscuous_enable = bnxt_promiscuous_enable_op,
2995         .promiscuous_disable = bnxt_promiscuous_disable_op,
2996         .allmulticast_enable = bnxt_allmulticast_enable_op,
2997         .allmulticast_disable = bnxt_allmulticast_disable_op,
2998         .mac_addr_add = bnxt_mac_addr_add_op,
2999         .mac_addr_remove = bnxt_mac_addr_remove_op,
3000         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
3001         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
3002         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
3003         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
3004         .vlan_filter_set = bnxt_vlan_filter_set_op,
3005         .vlan_offload_set = bnxt_vlan_offload_set_op,
3006         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
3007         .mtu_set = bnxt_mtu_set_op,
3008         .mac_addr_set = bnxt_set_default_mac_addr_op,
3009         .xstats_get = bnxt_dev_xstats_get_op,
3010         .xstats_get_names = bnxt_dev_xstats_get_names_op,
3011         .xstats_reset = bnxt_dev_xstats_reset_op,
3012         .fw_version_get = bnxt_fw_version_get,
3013         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
3014         .rxq_info_get = bnxt_rxq_info_get_op,
3015         .txq_info_get = bnxt_txq_info_get_op,
3016         .dev_led_on = bnxt_dev_led_on_op,
3017         .dev_led_off = bnxt_dev_led_off_op,
3018         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
3019         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
3020         .rx_queue_count = bnxt_rx_queue_count_op,
3021         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
3022         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
3023         .rx_queue_start = bnxt_rx_queue_start,
3024         .rx_queue_stop = bnxt_rx_queue_stop,
3025         .tx_queue_start = bnxt_tx_queue_start,
3026         .tx_queue_stop = bnxt_tx_queue_stop,
3027         .filter_ctrl = bnxt_filter_ctrl_op,
3028         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3029         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3030         .get_eeprom           = bnxt_get_eeprom_op,
3031         .set_eeprom           = bnxt_set_eeprom_op,
3032         .timesync_enable      = bnxt_timesync_enable,
3033         .timesync_disable     = bnxt_timesync_disable,
3034         .timesync_read_time   = bnxt_timesync_read_time,
3035         .timesync_write_time   = bnxt_timesync_write_time,
3036         .timesync_adjust_time = bnxt_timesync_adjust_time,
3037         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3038         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3039 };
3040
3041 static bool bnxt_vf_pciid(uint16_t id)
3042 {
3043         if (id == BROADCOM_DEV_ID_57304_VF ||
3044             id == BROADCOM_DEV_ID_57406_VF ||
3045             id == BROADCOM_DEV_ID_5731X_VF ||
3046             id == BROADCOM_DEV_ID_5741X_VF ||
3047             id == BROADCOM_DEV_ID_57414_VF ||
3048             id == BROADCOM_DEV_ID_STRATUS_NIC_VF1 ||
3049             id == BROADCOM_DEV_ID_STRATUS_NIC_VF2)
3050                 return true;
3051         return false;
3052 }
3053
3054 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3055 {
3056         struct bnxt *bp = eth_dev->data->dev_private;
3057         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3058         int rc;
3059
3060         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3061         if (!pci_dev->mem_resource[0].addr) {
3062                 PMD_DRV_LOG(ERR,
3063                         "Cannot find PCI device base address, aborting\n");
3064                 rc = -ENODEV;
3065                 goto init_err_disable;
3066         }
3067
3068         bp->eth_dev = eth_dev;
3069         bp->pdev = pci_dev;
3070
3071         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3072         if (!bp->bar0) {
3073                 PMD_DRV_LOG(ERR, "Cannot map device registers, aborting\n");
3074                 rc = -ENOMEM;
3075                 goto init_err_release;
3076         }
3077
3078         if (!pci_dev->mem_resource[2].addr) {
3079                 PMD_DRV_LOG(ERR,
3080                             "Cannot find PCI device BAR 2 address, aborting\n");
3081                 rc = -ENODEV;
3082                 goto init_err_release;
3083         } else {
3084                 bp->doorbell_base = (void *)pci_dev->mem_resource[2].addr;
3085         }
3086
3087         return 0;
3088
3089 init_err_release:
3090         if (bp->bar0)
3091                 bp->bar0 = NULL;
3092         if (bp->doorbell_base)
3093                 bp->doorbell_base = NULL;
3094
3095 init_err_disable:
3096
3097         return rc;
3098 }
3099
3100 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3101
3102 #define ALLOW_FUNC(x)   \
3103         { \
3104                 typeof(x) arg = (x); \
3105                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3106                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3107         }
3108 static int
3109 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3110 {
3111         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3112         char mz_name[RTE_MEMZONE_NAMESIZE];
3113         const struct rte_memzone *mz = NULL;
3114         static int version_printed;
3115         uint32_t total_alloc_len;
3116         rte_iova_t mz_phys_addr;
3117         struct bnxt *bp;
3118         int rc;
3119
3120         if (version_printed++ == 0)
3121                 PMD_DRV_LOG(INFO, "%s\n", bnxt_version);
3122
3123         rte_eth_copy_pci_info(eth_dev, pci_dev);
3124
3125         bp = eth_dev->data->dev_private;
3126
3127         bp->dev_stopped = 1;
3128
3129         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3130                 goto skip_init;
3131
3132         if (bnxt_vf_pciid(pci_dev->id.device_id))
3133                 bp->flags |= BNXT_FLAG_VF;
3134
3135         rc = bnxt_init_board(eth_dev);
3136         if (rc) {
3137                 PMD_DRV_LOG(ERR,
3138                         "Board initialization failed rc: %x\n", rc);
3139                 goto error;
3140         }
3141 skip_init:
3142         eth_dev->dev_ops = &bnxt_dev_ops;
3143         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3144         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3145         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3146                 return 0;
3147
3148         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3149                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3150                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3151                          pci_dev->addr.bus, pci_dev->addr.devid,
3152                          pci_dev->addr.function, "rx_port_stats");
3153                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3154                 mz = rte_memzone_lookup(mz_name);
3155                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3156                                 sizeof(struct rx_port_stats) + 512);
3157                 if (!mz) {
3158                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3159                                         SOCKET_ID_ANY,
3160                                         RTE_MEMZONE_2MB |
3161                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3162                                         RTE_MEMZONE_IOVA_CONTIG);
3163                         if (mz == NULL)
3164                                 return -ENOMEM;
3165                 }
3166                 memset(mz->addr, 0, mz->len);
3167                 mz_phys_addr = mz->iova;
3168                 if ((unsigned long)mz->addr == mz_phys_addr) {
3169                         PMD_DRV_LOG(WARNING,
3170                                 "Memzone physical address same as virtual.\n");
3171                         PMD_DRV_LOG(WARNING,
3172                                 "Using rte_mem_virt2iova()\n");
3173                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3174                         if (mz_phys_addr == 0) {
3175                                 PMD_DRV_LOG(ERR,
3176                                 "unable to map address to physical memory\n");
3177                                 return -ENOMEM;
3178                         }
3179                 }
3180
3181                 bp->rx_mem_zone = (const void *)mz;
3182                 bp->hw_rx_port_stats = mz->addr;
3183                 bp->hw_rx_port_stats_map = mz_phys_addr;
3184
3185                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3186                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3187                          pci_dev->addr.bus, pci_dev->addr.devid,
3188                          pci_dev->addr.function, "tx_port_stats");
3189                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3190                 mz = rte_memzone_lookup(mz_name);
3191                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3192                                 sizeof(struct tx_port_stats) + 512);
3193                 if (!mz) {
3194                         mz = rte_memzone_reserve(mz_name,
3195                                         total_alloc_len,
3196                                         SOCKET_ID_ANY,
3197                                         RTE_MEMZONE_2MB |
3198                                         RTE_MEMZONE_SIZE_HINT_ONLY |
3199                                         RTE_MEMZONE_IOVA_CONTIG);
3200                         if (mz == NULL)
3201                                 return -ENOMEM;
3202                 }
3203                 memset(mz->addr, 0, mz->len);
3204                 mz_phys_addr = mz->iova;
3205                 if ((unsigned long)mz->addr == mz_phys_addr) {
3206                         PMD_DRV_LOG(WARNING,
3207                                 "Memzone physical address same as virtual.\n");
3208                         PMD_DRV_LOG(WARNING,
3209                                 "Using rte_mem_virt2iova()\n");
3210                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3211                         if (mz_phys_addr == 0) {
3212                                 PMD_DRV_LOG(ERR,
3213                                 "unable to map address to physical memory\n");
3214                                 return -ENOMEM;
3215                         }
3216                 }
3217
3218                 bp->tx_mem_zone = (const void *)mz;
3219                 bp->hw_tx_port_stats = mz->addr;
3220                 bp->hw_tx_port_stats_map = mz_phys_addr;
3221
3222                 bp->flags |= BNXT_FLAG_PORT_STATS;
3223         }
3224
3225         rc = bnxt_alloc_hwrm_resources(bp);
3226         if (rc) {
3227                 PMD_DRV_LOG(ERR,
3228                         "hwrm resource allocation failure rc: %x\n", rc);
3229                 goto error_free;
3230         }
3231         rc = bnxt_hwrm_ver_get(bp);
3232         if (rc)
3233                 goto error_free;
3234         rc = bnxt_hwrm_queue_qportcfg(bp);
3235         if (rc) {
3236                 PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
3237                 goto error_free;
3238         }
3239
3240         rc = bnxt_hwrm_func_qcfg(bp);
3241         if (rc) {
3242                 PMD_DRV_LOG(ERR, "hwrm func qcfg failed\n");
3243                 goto error_free;
3244         }
3245
3246         /* Get the MAX capabilities for this function */
3247         rc = bnxt_hwrm_func_qcaps(bp);
3248         if (rc) {
3249                 PMD_DRV_LOG(ERR, "hwrm query capability failure rc: %x\n", rc);
3250                 goto error_free;
3251         }
3252         if (bp->max_tx_rings == 0) {
3253                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
3254                 rc = -EBUSY;
3255                 goto error_free;
3256         }
3257         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3258                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3259         if (eth_dev->data->mac_addrs == NULL) {
3260                 PMD_DRV_LOG(ERR,
3261                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3262                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3263                 rc = -ENOMEM;
3264                 goto error_free;
3265         }
3266
3267         if (bnxt_check_zero_bytes(bp->dflt_mac_addr, ETHER_ADDR_LEN)) {
3268                 PMD_DRV_LOG(ERR,
3269                             "Invalid MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
3270                             bp->dflt_mac_addr[0], bp->dflt_mac_addr[1],
3271                             bp->dflt_mac_addr[2], bp->dflt_mac_addr[3],
3272                             bp->dflt_mac_addr[4], bp->dflt_mac_addr[5]);
3273                 rc = -EINVAL;
3274                 goto error_free;
3275         }
3276         /* Copy the permanent MAC from the qcap response address now. */
3277         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3278         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3279
3280         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3281                 /* 1 ring is for default completion ring */
3282                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
3283                 rc = -ENOSPC;
3284                 goto error_free;
3285         }
3286
3287         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3288                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3289         if (!bp->grp_info) {
3290                 PMD_DRV_LOG(ERR,
3291                         "Failed to alloc %zu bytes to store group info table\n",
3292                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3293                 rc = -ENOMEM;
3294                 goto error_free;
3295         }
3296
3297         /* Forward all requests if firmware is new enough */
3298         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3299             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3300             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3301                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3302         } else {
3303                 PMD_DRV_LOG(WARNING,
3304                         "Firmware too old for VF mailbox functionality\n");
3305                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3306         }
3307
3308         /*
3309          * The following are used for driver cleanup.  If we disallow these,
3310          * VF drivers can't clean up cleanly.
3311          */
3312         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3313         ALLOW_FUNC(HWRM_VNIC_FREE);
3314         ALLOW_FUNC(HWRM_RING_FREE);
3315         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3316         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3317         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3318         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3319         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3320         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3321         rc = bnxt_hwrm_func_driver_register(bp);
3322         if (rc) {
3323                 PMD_DRV_LOG(ERR,
3324                         "Failed to register driver");
3325                 rc = -EBUSY;
3326                 goto error_free;
3327         }
3328
3329         PMD_DRV_LOG(INFO,
3330                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3331                 pci_dev->mem_resource[0].phys_addr,
3332                 pci_dev->mem_resource[0].addr);
3333
3334         rc = bnxt_hwrm_func_reset(bp);
3335         if (rc) {
3336                 PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
3337                 rc = -EIO;
3338                 goto error_free;
3339         }
3340
3341         if (BNXT_PF(bp)) {
3342                 //if (bp->pf.active_vfs) {
3343                         // TODO: Deallocate VF resources?
3344                 //}
3345                 if (bp->pdev->max_vfs) {
3346                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3347                         if (rc) {
3348                                 PMD_DRV_LOG(ERR, "Failed to allocate VFs\n");
3349                                 goto error_free;
3350                         }
3351                 } else {
3352                         rc = bnxt_hwrm_allocate_pf_only(bp);
3353                         if (rc) {
3354                                 PMD_DRV_LOG(ERR,
3355                                         "Failed to allocate PF resources\n");
3356                                 goto error_free;
3357                         }
3358                 }
3359         }
3360
3361         bnxt_hwrm_port_led_qcaps(bp);
3362
3363         rc = bnxt_setup_int(bp);
3364         if (rc)
3365                 goto error_free;
3366
3367         rc = bnxt_alloc_mem(bp);
3368         if (rc)
3369                 goto error_free_int;
3370
3371         rc = bnxt_request_int(bp);
3372         if (rc)
3373                 goto error_free_int;
3374
3375         bnxt_enable_int(bp);
3376         bnxt_init_nic(bp);
3377
3378         return 0;
3379
3380 error_free_int:
3381         bnxt_disable_int(bp);
3382         bnxt_hwrm_func_buf_unrgtr(bp);
3383         bnxt_free_int(bp);
3384         bnxt_free_mem(bp);
3385 error_free:
3386         bnxt_dev_uninit(eth_dev);
3387 error:
3388         return rc;
3389 }
3390
3391 static int
3392 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3393         struct bnxt *bp = eth_dev->data->dev_private;
3394         int rc;
3395
3396         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3397                 return -EPERM;
3398
3399         bnxt_disable_int(bp);
3400         bnxt_free_int(bp);
3401         bnxt_free_mem(bp);
3402         if (eth_dev->data->mac_addrs != NULL) {
3403                 rte_free(eth_dev->data->mac_addrs);
3404                 eth_dev->data->mac_addrs = NULL;
3405         }
3406         if (bp->grp_info != NULL) {
3407                 rte_free(bp->grp_info);
3408                 bp->grp_info = NULL;
3409         }
3410         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3411         bnxt_free_hwrm_resources(bp);
3412         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3413         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3414         if (bp->dev_stopped == 0)
3415                 bnxt_dev_close_op(eth_dev);
3416         if (bp->pf.vf_info)
3417                 rte_free(bp->pf.vf_info);
3418         eth_dev->dev_ops = NULL;
3419         eth_dev->rx_pkt_burst = NULL;
3420         eth_dev->tx_pkt_burst = NULL;
3421
3422         return rc;
3423 }
3424
3425 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3426         struct rte_pci_device *pci_dev)
3427 {
3428         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3429                 bnxt_dev_init);
3430 }
3431
3432 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3433 {
3434         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3435 }
3436
3437 static struct rte_pci_driver bnxt_rte_pmd = {
3438         .id_table = bnxt_pci_id_map,
3439         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3440                 RTE_PCI_DRV_INTR_LSC,
3441         .probe = bnxt_pci_probe,
3442         .remove = bnxt_pci_remove,
3443 };
3444
3445 static bool
3446 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3447 {
3448         if (strcmp(dev->device->driver->name, drv->driver.name))
3449                 return false;
3450
3451         return true;
3452 }
3453
3454 bool is_bnxt_supported(struct rte_eth_dev *dev)
3455 {
3456         return is_device_supported(dev, &bnxt_rte_pmd);
3457 }
3458
3459 RTE_INIT(bnxt_init_log);
3460 static void
3461 bnxt_init_log(void)
3462 {
3463         bnxt_logtype_driver = rte_log_register("pmd.bnxt.driver");
3464         if (bnxt_logtype_driver >= 0)
3465                 rte_log_set_level(bnxt_logtype_driver, RTE_LOG_INFO);
3466 }
3467
3468 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3469 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3470 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");