drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  64 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  65 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  66 #define BROADCOM_DEV_ID_57301 0x16c8
  67 #define BROADCOM_DEV_ID_57302 0x16c9
  68 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  69 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  70 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  71 #define BROADCOM_DEV_ID_NS2 0x16cd
  72 #define BROADCOM_DEV_ID_57311 0x16ce
  73 #define BROADCOM_DEV_ID_57312 0x16cf
  74 #define BROADCOM_DEV_ID_57402 0x16d0
  75 #define BROADCOM_DEV_ID_57404 0x16d1
  76 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  77 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  78 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  79 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  80 #define BROADCOM_DEV_ID_57412 0x16d6
  81 #define BROADCOM_DEV_ID_57414 0x16d7
  82 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  83 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  84 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  85 #define BROADCOM_DEV_ID_57412_MF 0x16de
  86 #define BROADCOM_DEV_ID_57314 0x16df
  87 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  88 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  89 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  90 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  91 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  92 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  93 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  94 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  95 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  96 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  97 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  98
  99 static const struct rte_pci_id bnxt_pci_id_map[] = {
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 101                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 136         { .vendor_id = 0, /* sentinel */ },
 137 };
 138
 139 #define BNXT_ETH_RSS_SUPPORT (  \
 140         ETH_RSS_IPV4 |          \
 141         ETH_RSS_NONFRAG_IPV4_TCP |      \
 142         ETH_RSS_NONFRAG_IPV4_UDP |      \
 143         ETH_RSS_IPV6 |          \
 144         ETH_RSS_NONFRAG_IPV6_TCP |      \
 145         ETH_RSS_NONFRAG_IPV6_UDP)
 146
 147 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 148
 149 /***********************/
 150
 151 /*
 152  * High level utility functions
 153  */
 154
 155 static void bnxt_free_mem(struct bnxt *bp)
 156 {
 157         bnxt_free_filter_mem(bp);
 158         bnxt_free_vnic_attributes(bp);
 159         bnxt_free_vnic_mem(bp);
 160
 161         bnxt_free_stats(bp);
 162         bnxt_free_tx_rings(bp);
 163         bnxt_free_rx_rings(bp);
 164         bnxt_free_def_cp_ring(bp);
 165 }
 166
 167 static int bnxt_alloc_mem(struct bnxt *bp)
 168 {
 169         int rc;
 170
 171         /* Default completion ring */
 172         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 177                               bp->def_cp_ring, "def_cp");
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         unsigned int i, rss_idx, fw_idx;
 203         struct rte_eth_link new;
 204         int rc;
 205
 206         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 208                 bp->flags |= BNXT_FLAG_JUMBO;
 209         } else {
 210                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 211                 bp->flags &= ~BNXT_FLAG_JUMBO;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_alloc_hwrm_rings(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_mq_rx_configure(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         /* VNIC configuration */
 239         for (i = 0; i < bp->nr_vnics; i++) {
 240                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 241
 242                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 243                 if (rc) {
 244                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 245                                 i, rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD,
 252                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 253                                 i, rc);
 254                         goto err_out;
 255                 }
 256
 257                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 265                 if (rc) {
 266                         RTE_LOG(ERR, PMD,
 267                                 "HWRM vnic %d filter failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271                 if (vnic->rss_table && vnic->hash_type) {
 272                         /*
 273                          * Fill the RSS hash & redirection table with
 274                          * ring group ids for all VNICs
 275                          */
 276                         for (rss_idx = 0, fw_idx = 0;
 277                              rss_idx < HW_HASH_INDEX_SIZE;
 278                              rss_idx++, fw_idx++) {
 279                                 if (vnic->fw_grp_ids[fw_idx] ==
 280                                     INVALID_HW_RING_ID)
 281                                         fw_idx = 0;
 282                                 vnic->rss_table[rss_idx] =
 283                                                 vnic->fw_grp_ids[fw_idx];
 284                         }
 285                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 286                         if (rc) {
 287                                 RTE_LOG(ERR, PMD,
 288                                         "HWRM vnic %d set RSS failure rc: %x\n",
 289                                         i, rc);
 290                                 goto err_out;
 291                         }
 292                 }
 293
 294                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 295
 296                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 297                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 298                 else
 299                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 300         }
 301         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 302         if (rc) {
 303                 RTE_LOG(ERR, PMD,
 304                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 305                 goto err_out;
 306         }
 307
 308         rc = bnxt_get_hwrm_link_config(bp, &new);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 311                 goto err_out;
 312         }
 313
 314         if (!bp->link_info.link_up) {
 315                 rc = bnxt_set_hwrm_link_config(bp, true);
 316                 if (rc) {
 317                         RTE_LOG(ERR, PMD,
 318                                 "HWRM link config failure rc: %x\n", rc);
 319                         goto err_out;
 320                 }
 321         }
 322
 323         return 0;
 324
 325 err_out:
 326         bnxt_free_all_hwrm_resources(bp);
 327
 328         return rc;
 329 }
 330
 331 static int bnxt_shutdown_nic(struct bnxt *bp)
 332 {
 333         bnxt_free_all_hwrm_resources(bp);
 334         bnxt_free_all_filters(bp);
 335         bnxt_free_all_vnics(bp);
 336         return 0;
 337 }
 338
 339 static int bnxt_init_nic(struct bnxt *bp)
 340 {
 341         int rc;
 342
 343         bnxt_init_ring_grps(bp);
 344         bnxt_init_vnics(bp);
 345         bnxt_init_filters(bp);
 346
 347         rc = bnxt_init_chip(bp);
 348         if (rc)
 349                 return rc;
 350
 351         return 0;
 352 }
 353
 354 /*
 355  * Device configuration and status function
 356  */
 357
 358 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 359                                   struct rte_eth_dev_info *dev_info)
 360 {
 361         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 362         uint16_t max_vnics, i, j, vpool, vrxq;
 363         unsigned int max_rx_rings;
 364
 365         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 366
 367         /* MAC Specifics */
 368         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 369         dev_info->max_hash_mac_addrs = 0;
 370
 371         /* PF/VF specifics */
 372         if (BNXT_PF(bp))
 373                 dev_info->max_vfs = bp->pdev->max_vfs;
 374         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 375                                                 RTE_MIN(bp->max_rsscos_ctx,
 376                                                 bp->max_stat_ctx)));
 377         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 378         dev_info->max_rx_queues = max_rx_rings;
 379         dev_info->max_tx_queues = max_rx_rings;
 380         dev_info->reta_size = bp->max_rsscos_ctx;
 381         max_vnics = bp->max_vnics;
 382
 383         /* Fast path specifics */
 384         dev_info->min_rx_bufsize = 1;
 385         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 386                                   + VLAN_TAG_SIZE;
 387         dev_info->rx_offload_capa = 0;
 388         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 389                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 390                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 391                                         DEV_TX_OFFLOAD_TCP_TSO |
 392                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 393                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 394                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 395                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 396                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 397
 398         /* *INDENT-OFF* */
 399         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 400                 .rx_thresh = {
 401                         .pthresh = 8,
 402                         .hthresh = 8,
 403                         .wthresh = 0,
 404                 },
 405                 .rx_free_thresh = 32,
 406                 .rx_drop_en = 0,
 407         };
 408
 409         dev_info->default_txconf = (struct rte_eth_txconf) {
 410                 .tx_thresh = {
 411                         .pthresh = 32,
 412                         .hthresh = 0,
 413                         .wthresh = 0,
 414                 },
 415                 .tx_free_thresh = 32,
 416                 .tx_rs_thresh = 32,
 417                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 418                              ETH_TXQ_FLAGS_NOOFFLOADS,
 419         };
 420         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 421
 422         /* *INDENT-ON* */
 423
 424         /*
 425          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 426          *       need further investigation.
 427          */
 428
 429         /* VMDq resources */
 430         vpool = 64; /* ETH_64_POOLS */
 431         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 432         for (i = 0; i < 4; vpool >>= 1, i++) {
 433                 if (max_vnics > vpool) {
 434                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 435                                 if (dev_info->max_rx_queues > vrxq) {
 436                                         if (vpool > vrxq)
 437                                                 vpool = vrxq;
 438                                         goto found;
 439                                 }
 440                         }
 441                         /* Not enough resources to support VMDq */
 442                         break;
 443                 }
 444         }
 445         /* Not enough resources to support VMDq */
 446         vpool = 0;
 447         vrxq = 0;
 448 found:
 449         dev_info->max_vmdq_pools = vpool;
 450         dev_info->vmdq_queue_num = vrxq;
 451
 452         dev_info->vmdq_pool_base = 0;
 453         dev_info->vmdq_queue_base = 0;
 454 }
 455
 456 /* Configure the device based on the configuration provided */
 457 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 458 {
 459         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 460
 461         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 462         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 463
 464         /* Inherit new configurations */
 465         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 466         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 467         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 468         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 469
 470         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 471                 eth_dev->data->mtu =
 472                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 473                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 474         return 0;
 475 }
 476
 477 static inline int
 478 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 479                                 struct rte_eth_link *link)
 480 {
 481         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 482         struct rte_eth_link *src = link;
 483
 484         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 485                                         *(uint64_t *)src) == 0)
 486                 return 1;
 487
 488         return 0;
 489 }
 490
 491 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 492 {
 493         struct rte_eth_link *link = &eth_dev->data->dev_link;
 494
 495         if (link->link_status)
 496                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 497                         (uint8_t)(eth_dev->data->port_id),
 498                         (uint32_t)link->link_speed,
 499                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 500                         ("full-duplex") : ("half-duplex\n"));
 501         else
 502                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 503                         (uint8_t)(eth_dev->data->port_id));
 504 }
 505
 506 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 507 {
 508         bnxt_print_link_info(eth_dev);
 509         return 0;
 510 }
 511
 512 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 513 {
 514         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 515         int vlan_mask = 0;
 516         int rc;
 517
 518         bp->dev_stopped = 0;
 519
 520         rc = bnxt_init_nic(bp);
 521         if (rc)
 522                 goto error;
 523
 524         bnxt_link_update_op(eth_dev, 0);
 525
 526         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 527                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 528         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 529                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 530         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 531
 532         return 0;
 533
 534 error:
 535         bnxt_shutdown_nic(bp);
 536         bnxt_free_tx_mbufs(bp);
 537         bnxt_free_rx_mbufs(bp);
 538         return rc;
 539 }
 540
 541 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 542 {
 543         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 544
 545         eth_dev->data->dev_link.link_status = 1;
 546         bnxt_set_hwrm_link_config(bp, true);
 547         return 0;
 548 }
 549
 550 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 551 {
 552         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 553
 554         eth_dev->data->dev_link.link_status = 0;
 555         bnxt_set_hwrm_link_config(bp, false);
 556         return 0;
 557 }
 558
 559 /* Unload the driver, release resources */
 560 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 561 {
 562         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 563
 564         if (bp->eth_dev->data->dev_started) {
 565                 /* TBD: STOP HW queues DMA */
 566                 eth_dev->data->dev_link.link_status = 0;
 567         }
 568         bnxt_set_hwrm_link_config(bp, false);
 569         bnxt_hwrm_port_clr_stats(bp);
 570         bnxt_shutdown_nic(bp);
 571         bp->dev_stopped = 1;
 572 }
 573
 574 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 575 {
 576         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 577
 578         if (bp->dev_stopped == 0)
 579                 bnxt_dev_stop_op(eth_dev);
 580
 581         bnxt_free_tx_mbufs(bp);
 582         bnxt_free_rx_mbufs(bp);
 583         bnxt_free_mem(bp);
 584         if (eth_dev->data->mac_addrs != NULL) {
 585                 rte_free(eth_dev->data->mac_addrs);
 586                 eth_dev->data->mac_addrs = NULL;
 587         }
 588         if (bp->grp_info != NULL) {
 589                 rte_free(bp->grp_info);
 590                 bp->grp_info = NULL;
 591         }
 592 }
 593
 594 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 595                                     uint32_t index)
 596 {
 597         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 598         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 599         struct bnxt_vnic_info *vnic;
 600         struct bnxt_filter_info *filter, *temp_filter;
 601         int i;
 602
 603         /*
 604          * Loop through all VNICs from the specified filter flow pools to
 605          * remove the corresponding MAC addr filter
 606          */
 607         for (i = 0; i < MAX_FF_POOLS; i++) {
 608                 if (!(pool_mask & (1ULL << i)))
 609                         continue;
 610
 611                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 612                         filter = STAILQ_FIRST(&vnic->filter);
 613                         while (filter) {
 614                                 temp_filter = STAILQ_NEXT(filter, next);
 615                                 if (filter->mac_index == index) {
 616                                         STAILQ_REMOVE(&vnic->filter, filter,
 617                                                       bnxt_filter_info, next);
 618                                         bnxt_hwrm_clear_filter(bp, filter);
 619                                         filter->mac_index = INVALID_MAC_INDEX;
 620                                         memset(&filter->l2_addr, 0,
 621                                                ETHER_ADDR_LEN);
 622                                         STAILQ_INSERT_TAIL(
 623                                                         &bp->free_filter_list,
 624                                                         filter, next);
 625                                 }
 626                                 filter = temp_filter;
 627                         }
 628                 }
 629         }
 630 }
 631
 632 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 633                                 struct ether_addr *mac_addr,
 634                                 uint32_t index, uint32_t pool)
 635 {
 636         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 637         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 638         struct bnxt_filter_info *filter;
 639
 640         if (BNXT_VF(bp)) {
 641                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 642                 return -ENOTSUP;
 643         }
 644
 645         if (!vnic) {
 646                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 647                 return -EINVAL;
 648         }
 649         /* Attach requested MAC address to the new l2_filter */
 650         STAILQ_FOREACH(filter, &vnic->filter, next) {
 651                 if (filter->mac_index == index) {
 652                         RTE_LOG(ERR, PMD,
 653                                 "MAC addr already existed for pool %d\n", pool);
 654                         return -EINVAL;
 655                 }
 656         }
 657         filter = bnxt_alloc_filter(bp);
 658         if (!filter) {
 659                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 660                 return -ENODEV;
 661         }
 662         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 663         filter->mac_index = index;
 664         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 665         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 666 }
 667
 668 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 669 {
 670         int rc = 0;
 671         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 672         struct rte_eth_link new;
 673         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 674
 675         memset(&new, 0, sizeof(new));
 676         do {
 677                 /* Retrieve link info from hardware */
 678                 rc = bnxt_get_hwrm_link_config(bp, &new);
 679                 if (rc) {
 680                         new.link_speed = ETH_LINK_SPEED_100M;
 681                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 682                         RTE_LOG(ERR, PMD,
 683                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 684                         goto out;
 685                 }
 686                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 687
 688                 if (!wait_to_complete)
 689                         break;
 690         } while (!new.link_status && cnt--);
 691
 692 out:
 693         /* Timed out or success */
 694         if (new.link_status != eth_dev->data->dev_link.link_status ||
 695         new.link_speed != eth_dev->data->dev_link.link_speed) {
 696                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 697                 bnxt_print_link_info(eth_dev);
 698         }
 699
 700         return rc;
 701 }
 702
 703 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 704 {
 705         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 706         struct bnxt_vnic_info *vnic;
 707
 708         if (bp->vnic_info == NULL)
 709                 return;
 710
 711         vnic = &bp->vnic_info[0];
 712
 713         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 714         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 715 }
 716
 717 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 718 {
 719         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 720         struct bnxt_vnic_info *vnic;
 721
 722         if (bp->vnic_info == NULL)
 723                 return;
 724
 725         vnic = &bp->vnic_info[0];
 726
 727         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 728         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 729 }
 730
 731 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 732 {
 733         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 734         struct bnxt_vnic_info *vnic;
 735
 736         if (bp->vnic_info == NULL)
 737                 return;
 738
 739         vnic = &bp->vnic_info[0];
 740
 741         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 742         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 743 }
 744
 745 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 746 {
 747         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 748         struct bnxt_vnic_info *vnic;
 749
 750         if (bp->vnic_info == NULL)
 751                 return;
 752
 753         vnic = &bp->vnic_info[0];
 754
 755         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 756         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 757 }
 758
 759 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 760                             struct rte_eth_rss_reta_entry64 *reta_conf,
 761                             uint16_t reta_size)
 762 {
 763         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 764         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 765         struct bnxt_vnic_info *vnic;
 766         int i;
 767
 768         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 769                 return -EINVAL;
 770
 771         if (reta_size != HW_HASH_INDEX_SIZE) {
 772                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 773                         "(%d) must equal the size supported by the hardware "
 774                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 775                 return -EINVAL;
 776         }
 777         /* Update the RSS VNIC(s) */
 778         for (i = 0; i < MAX_FF_POOLS; i++) {
 779                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 780                         memcpy(vnic->rss_table, reta_conf, reta_size);
 781
 782                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 783                 }
 784         }
 785         return 0;
 786 }
 787
 788 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 789                               struct rte_eth_rss_reta_entry64 *reta_conf,
 790                               uint16_t reta_size)
 791 {
 792         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 793         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 794         struct rte_intr_handle *intr_handle
 795                 = &bp->pdev->intr_handle;
 796
 797         /* Retrieve from the default VNIC */
 798         if (!vnic)
 799                 return -EINVAL;
 800         if (!vnic->rss_table)
 801                 return -EINVAL;
 802
 803         if (reta_size != HW_HASH_INDEX_SIZE) {
 804                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 805                         "(%d) must equal the size supported by the hardware "
 806                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 807                 return -EINVAL;
 808         }
 809         /* EW - need to revisit here copying from u64 to u16 */
 810         memcpy(reta_conf, vnic->rss_table, reta_size);
 811
 812         if (rte_intr_allow_others(intr_handle)) {
 813                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 814                         bnxt_dev_lsc_intr_setup(eth_dev);
 815         }
 816
 817         return 0;
 818 }
 819
 820 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 821                                    struct rte_eth_rss_conf *rss_conf)
 822 {
 823         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 824         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 825         struct bnxt_vnic_info *vnic;
 826         uint16_t hash_type = 0;
 827         int i;
 828
 829         /*
 830          * If RSS enablement were different than dev_configure,
 831          * then return -EINVAL
 832          */
 833         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 834                 if (!rss_conf->rss_hf)
 835                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 836         } else {
 837                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 838                         return -EINVAL;
 839         }
 840         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 841                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 842         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 843                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 844         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 845                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 846         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 847                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 848         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 849                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 850         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 851                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 852
 853         /* Update the RSS VNIC(s) */
 854         for (i = 0; i < MAX_FF_POOLS; i++) {
 855                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 856                         vnic->hash_type = hash_type;
 857
 858                         /*
 859                          * Use the supplied key if the key length is
 860                          * acceptable and the rss_key is not NULL
 861                          */
 862                         if (rss_conf->rss_key &&
 863                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 864                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 865                                        rss_conf->rss_key_len);
 866
 867                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 868                 }
 869         }
 870         return 0;
 871 }
 872
 873 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 874                                      struct rte_eth_rss_conf *rss_conf)
 875 {
 876         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 877         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 878         int len;
 879         uint32_t hash_types;
 880
 881         /* RSS configuration is the same for all VNICs */
 882         if (vnic && vnic->rss_hash_key) {
 883                 if (rss_conf->rss_key) {
 884                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 885                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 886                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 887                 }
 888
 889                 hash_types = vnic->hash_type;
 890                 rss_conf->rss_hf = 0;
 891                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 892                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 893                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 894                 }
 895                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 896                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 897                         hash_types &=
 898                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 904                 }
 905                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 906                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 907                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 908                 }
 909                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 910                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 911                         hash_types &=
 912                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 913                 }
 914                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 915                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 916                         hash_types &=
 917                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 918                 }
 919                 if (hash_types) {
 920                         RTE_LOG(ERR, PMD,
 921                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 922                                 vnic->hash_type);
 923                         return -ENOTSUP;
 924                 }
 925         } else {
 926                 rss_conf->rss_hf = 0;
 927         }
 928         return 0;
 929 }
 930
 931 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 932                                struct rte_eth_fc_conf *fc_conf)
 933 {
 934         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 935         struct rte_eth_link link_info;
 936         int rc;
 937
 938         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 939         if (rc)
 940                 return rc;
 941
 942         memset(fc_conf, 0, sizeof(*fc_conf));
 943         if (bp->link_info.auto_pause)
 944                 fc_conf->autoneg = 1;
 945         switch (bp->link_info.pause) {
 946         case 0:
 947                 fc_conf->mode = RTE_FC_NONE;
 948                 break;
 949         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 950                 fc_conf->mode = RTE_FC_TX_PAUSE;
 951                 break;
 952         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 953                 fc_conf->mode = RTE_FC_RX_PAUSE;
 954                 break;
 955         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 956                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 957                 fc_conf->mode = RTE_FC_FULL;
 958                 break;
 959         }
 960         return 0;
 961 }
 962
 963 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 964                                struct rte_eth_fc_conf *fc_conf)
 965 {
 966         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 967
 968         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 969                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 970                 return -ENOTSUP;
 971         }
 972
 973         switch (fc_conf->mode) {
 974         case RTE_FC_NONE:
 975                 bp->link_info.auto_pause = 0;
 976                 bp->link_info.force_pause = 0;
 977                 break;
 978         case RTE_FC_RX_PAUSE:
 979                 if (fc_conf->autoneg) {
 980                         bp->link_info.auto_pause =
 981                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 982                         bp->link_info.force_pause = 0;
 983                 } else {
 984                         bp->link_info.auto_pause = 0;
 985                         bp->link_info.force_pause =
 986                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 987                 }
 988                 break;
 989         case RTE_FC_TX_PAUSE:
 990                 if (fc_conf->autoneg) {
 991                         bp->link_info.auto_pause =
 992                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 993                         bp->link_info.force_pause = 0;
 994                 } else {
 995                         bp->link_info.auto_pause = 0;
 996                         bp->link_info.force_pause =
 997                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 998                 }
 999                 break;
1000         case RTE_FC_FULL:
1001                 if (fc_conf->autoneg) {
1002                         bp->link_info.auto_pause =
1003                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1004                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1005                         bp->link_info.force_pause = 0;
1006                 } else {
1007                         bp->link_info.auto_pause = 0;
1008                         bp->link_info.force_pause =
1009                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1010                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1011                 }
1012                 break;
1013         }
1014         return bnxt_set_hwrm_link_config(bp, true);
1015 }
1016
1017 /* Add UDP tunneling port */
1018 static int
1019 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1020                          struct rte_eth_udp_tunnel *udp_tunnel)
1021 {
1022         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1023         uint16_t tunnel_type = 0;
1024         int rc = 0;
1025
1026         switch (udp_tunnel->prot_type) {
1027         case RTE_TUNNEL_TYPE_VXLAN:
1028                 if (bp->vxlan_port_cnt) {
1029                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1030                                 udp_tunnel->udp_port);
1031                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1032                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1033                                 return -ENOSPC;
1034                         }
1035                         bp->vxlan_port_cnt++;
1036                         return 0;
1037                 }
1038                 tunnel_type =
1039                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1040                 bp->vxlan_port_cnt++;
1041                 break;
1042         case RTE_TUNNEL_TYPE_GENEVE:
1043                 if (bp->geneve_port_cnt) {
1044                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1045                                 udp_tunnel->udp_port);
1046                         if (bp->geneve_port != udp_tunnel->udp_port) {
1047                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1048                                 return -ENOSPC;
1049                         }
1050                         bp->geneve_port_cnt++;
1051                         return 0;
1052                 }
1053                 tunnel_type =
1054                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1055                 bp->geneve_port_cnt++;
1056                 break;
1057         default:
1058                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1059                 return -ENOTSUP;
1060         }
1061         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1062                                              tunnel_type);
1063         return rc;
1064 }
1065
1066 static int
1067 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1068                          struct rte_eth_udp_tunnel *udp_tunnel)
1069 {
1070         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1071         uint16_t tunnel_type = 0;
1072         uint16_t port = 0;
1073         int rc = 0;
1074
1075         switch (udp_tunnel->prot_type) {
1076         case RTE_TUNNEL_TYPE_VXLAN:
1077                 if (!bp->vxlan_port_cnt) {
1078                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1079                         return -EINVAL;
1080                 }
1081                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1082                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1083                                 udp_tunnel->udp_port, bp->vxlan_port);
1084                         return -EINVAL;
1085                 }
1086                 if (--bp->vxlan_port_cnt)
1087                         return 0;
1088
1089                 tunnel_type =
1090                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1091                 port = bp->vxlan_fw_dst_port_id;
1092                 break;
1093         case RTE_TUNNEL_TYPE_GENEVE:
1094                 if (!bp->geneve_port_cnt) {
1095                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1096                         return -EINVAL;
1097                 }
1098                 if (bp->geneve_port != udp_tunnel->udp_port) {
1099                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1100                                 udp_tunnel->udp_port, bp->geneve_port);
1101                         return -EINVAL;
1102                 }
1103                 if (--bp->geneve_port_cnt)
1104                         return 0;
1105
1106                 tunnel_type =
1107                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1108                 port = bp->geneve_fw_dst_port_id;
1109                 break;
1110         default:
1111                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1112                 return -ENOTSUP;
1113         }
1114
1115         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1116         if (!rc) {
1117                 if (tunnel_type ==
1118                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1119                         bp->vxlan_port = 0;
1120                 if (tunnel_type ==
1121                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1122                         bp->geneve_port = 0;
1123         }
1124         return rc;
1125 }
1126
1127 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1128 {
1129         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1130         struct bnxt_vnic_info *vnic;
1131         unsigned int i;
1132         int rc = 0;
1133         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1134
1135         /* Cycle through all VNICs */
1136         for (i = 0; i < bp->nr_vnics; i++) {
1137                 /*
1138                  * For each VNIC and each associated filter(s)
1139                  * if VLAN exists && VLAN matches vlan_id
1140                  *      remove the MAC+VLAN filter
1141                  *      add a new MAC only filter
1142                  * else
1143                  *      VLAN filter doesn't exist, just skip and continue
1144                  */
1145                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1146                         filter = STAILQ_FIRST(&vnic->filter);
1147                         while (filter) {
1148                                 temp_filter = STAILQ_NEXT(filter, next);
1149
1150                                 if (filter->enables & chk &&
1151                                     filter->l2_ovlan == vlan_id) {
1152                                         /* Must delete the filter */
1153                                         STAILQ_REMOVE(&vnic->filter, filter,
1154                                                       bnxt_filter_info, next);
1155                                         bnxt_hwrm_clear_filter(bp, filter);
1156                                         STAILQ_INSERT_TAIL(
1157                                                         &bp->free_filter_list,
1158                                                         filter, next);
1159
1160                                         /*
1161                                          * Need to examine to see if the MAC
1162                                          * filter already existed or not before
1163                                          * allocating a new one
1164                                          */
1165
1166                                         new_filter = bnxt_alloc_filter(bp);
1167                                         if (!new_filter) {
1168                                                 RTE_LOG(ERR, PMD,
1169                                                         "MAC/VLAN filter alloc failed\n");
1170                                                 rc = -ENOMEM;
1171                                                 goto exit;
1172                                         }
1173                                         STAILQ_INSERT_TAIL(&vnic->filter,
1174                                                            new_filter, next);
1175                                         /* Inherit MAC from previous filter */
1176                                         new_filter->mac_index =
1177                                                         filter->mac_index;
1178                                         memcpy(new_filter->l2_addr,
1179                                                filter->l2_addr, ETHER_ADDR_LEN);
1180                                         /* MAC only filter */
1181                                         rc = bnxt_hwrm_set_filter(bp,
1182                                                         vnic->fw_vnic_id,
1183                                                         new_filter);
1184                                         if (rc)
1185                                                 goto exit;
1186                                         RTE_LOG(INFO, PMD,
1187                                                 "Del Vlan filter for %d\n",
1188                                                 vlan_id);
1189                                 }
1190                                 filter = temp_filter;
1191                         }
1192                 }
1193         }
1194 exit:
1195         return rc;
1196 }
1197
1198 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1199 {
1200         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1201         struct bnxt_vnic_info *vnic;
1202         unsigned int i;
1203         int rc = 0;
1204         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1205                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1206         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1207
1208         /* Cycle through all VNICs */
1209         for (i = 0; i < bp->nr_vnics; i++) {
1210                 /*
1211                  * For each VNIC and each associated filter(s)
1212                  * if VLAN exists:
1213                  *   if VLAN matches vlan_id
1214                  *      VLAN filter already exists, just skip and continue
1215                  *   else
1216                  *      add a new MAC+VLAN filter
1217                  * else
1218                  *   Remove the old MAC only filter
1219                  *    Add a new MAC+VLAN filter
1220                  */
1221                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1222                         filter = STAILQ_FIRST(&vnic->filter);
1223                         while (filter) {
1224                                 temp_filter = STAILQ_NEXT(filter, next);
1225
1226                                 if (filter->enables & chk) {
1227                                         if (filter->l2_ovlan == vlan_id)
1228                                                 goto cont;
1229                                 } else {
1230                                         /* Must delete the MAC filter */
1231                                         STAILQ_REMOVE(&vnic->filter, filter,
1232                                                       bnxt_filter_info, next);
1233                                         bnxt_hwrm_clear_filter(bp, filter);
1234                                         filter->l2_ovlan = 0;
1235                                         STAILQ_INSERT_TAIL(
1236                                                         &bp->free_filter_list,
1237                                                         filter, next);
1238                                 }
1239                                 new_filter = bnxt_alloc_filter(bp);
1240                                 if (!new_filter) {
1241                                         RTE_LOG(ERR, PMD,
1242                                                 "MAC/VLAN filter alloc failed\n");
1243                                         rc = -ENOMEM;
1244                                         goto exit;
1245                                 }
1246                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1247                                                    next);
1248                                 /* Inherit MAC from the previous filter */
1249                                 new_filter->mac_index = filter->mac_index;
1250                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1251                                        ETHER_ADDR_LEN);
1252                                 /* MAC + VLAN ID filter */
1253                                 new_filter->l2_ovlan = vlan_id;
1254                                 new_filter->l2_ovlan_mask = 0xF000;
1255                                 new_filter->enables |= en;
1256                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1257                                                           new_filter);
1258                                 if (rc)
1259                                         goto exit;
1260                                 RTE_LOG(INFO, PMD,
1261                                         "Added Vlan filter for %d\n", vlan_id);
1262 cont:
1263                                 filter = temp_filter;
1264                         }
1265                 }
1266         }
1267 exit:
1268         return rc;
1269 }
1270
1271 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1272                                    uint16_t vlan_id, int on)
1273 {
1274         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1275
1276         /* These operations apply to ALL existing MAC/VLAN filters */
1277         if (on)
1278                 return bnxt_add_vlan_filter(bp, vlan_id);
1279         else
1280                 return bnxt_del_vlan_filter(bp, vlan_id);
1281 }
1282
1283 static void
1284 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1285 {
1286         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1287         unsigned int i;
1288
1289         if (mask & ETH_VLAN_FILTER_MASK) {
1290                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1291                         /* Remove any VLAN filters programmed */
1292                         for (i = 0; i < 4095; i++)
1293                                 bnxt_del_vlan_filter(bp, i);
1294                 }
1295                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1296                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1297         }
1298
1299         if (mask & ETH_VLAN_STRIP_MASK) {
1300                 /* Enable or disable VLAN stripping */
1301                 for (i = 0; i < bp->nr_vnics; i++) {
1302                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1303                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1304                                 vnic->vlan_strip = true;
1305                         else
1306                                 vnic->vlan_strip = false;
1307                         bnxt_hwrm_vnic_cfg(bp, vnic);
1308                 }
1309                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1310                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1311         }
1312
1313         if (mask & ETH_VLAN_EXTEND_MASK)
1314                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1315 }
1316
1317 static void
1318 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1319 {
1320         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1321         /* Default Filter is tied to VNIC 0 */
1322         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1323         struct bnxt_filter_info *filter;
1324         int rc;
1325
1326         if (BNXT_VF(bp))
1327                 return;
1328
1329         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1330         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1331
1332         STAILQ_FOREACH(filter, &vnic->filter, next) {
1333                 /* Default Filter is at Index 0 */
1334                 if (filter->mac_index != 0)
1335                         continue;
1336                 rc = bnxt_hwrm_clear_filter(bp, filter);
1337                 if (rc)
1338                         break;
1339                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1340                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1341                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1342                 filter->enables |=
1343                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1344                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1345                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1346                 if (rc)
1347                         break;
1348                 filter->mac_index = 0;
1349                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1350         }
1351 }
1352
1353 static int
1354 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1355                           struct ether_addr *mc_addr_set,
1356                           uint32_t nb_mc_addr)
1357 {
1358         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1359         char *mc_addr_list = (char *)mc_addr_set;
1360         struct bnxt_vnic_info *vnic;
1361         uint32_t off = 0, i = 0;
1362
1363         vnic = &bp->vnic_info[0];
1364
1365         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1366                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1367                 goto allmulti;
1368         }
1369
1370         /* TODO Check for Duplicate mcast addresses */
1371         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1372         for (i = 0; i < nb_mc_addr; i++) {
1373                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1374                 off += ETHER_ADDR_LEN;
1375         }
1376
1377         vnic->mc_addr_cnt = i;
1378
1379 allmulti:
1380         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1381 }
1382
1383 static int
1384 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1385 {
1386         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1387         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1388         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1389         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1390         int ret;
1391
1392         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1393                         fw_major, fw_minor, fw_updt);
1394
1395         ret += 1; /* add the size of '\0' */
1396         if (fw_size < (uint32_t)ret)
1397                 return ret;
1398         else
1399                 return 0;
1400 }
1401
1402 static void
1403 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1404         struct rte_eth_rxq_info *qinfo)
1405 {
1406         struct bnxt_rx_queue *rxq;
1407
1408         rxq = dev->data->rx_queues[queue_id];
1409
1410         qinfo->mp = rxq->mb_pool;
1411         qinfo->scattered_rx = dev->data->scattered_rx;
1412         qinfo->nb_desc = rxq->nb_rx_desc;
1413
1414         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1415         qinfo->conf.rx_drop_en = 0;
1416         qinfo->conf.rx_deferred_start = 0;
1417 }
1418
1419 static void
1420 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1421         struct rte_eth_txq_info *qinfo)
1422 {
1423         struct bnxt_tx_queue *txq;
1424
1425         txq = dev->data->tx_queues[queue_id];
1426
1427         qinfo->nb_desc = txq->nb_tx_desc;
1428
1429         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1430         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1431         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1432
1433         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1434         qinfo->conf.tx_rs_thresh = 0;
1435         qinfo->conf.txq_flags = txq->txq_flags;
1436         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1437 }
1438
1439 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1440 {
1441         struct bnxt *bp = eth_dev->data->dev_private;
1442         struct rte_eth_dev_info dev_info;
1443         uint32_t max_dev_mtu;
1444         uint32_t rc = 0;
1445         uint32_t i;
1446
1447         bnxt_dev_info_get_op(eth_dev, &dev_info);
1448         max_dev_mtu = dev_info.max_rx_pktlen -
1449                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1450
1451         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1452                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1453                         ETHER_MIN_MTU, max_dev_mtu);
1454                 return -EINVAL;
1455         }
1456
1457
1458         if (new_mtu > ETHER_MTU) {
1459                 bp->flags |= BNXT_FLAG_JUMBO;
1460                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1461         } else {
1462                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1463                 bp->flags &= ~BNXT_FLAG_JUMBO;
1464         }
1465
1466         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1467                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1468
1469         eth_dev->data->mtu = new_mtu;
1470         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1471
1472         for (i = 0; i < bp->nr_vnics; i++) {
1473                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1474
1475                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1476                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1477                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1478                 if (rc)
1479                         break;
1480
1481                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1482                 if (rc)
1483                         return rc;
1484         }
1485
1486         return rc;
1487 }
1488
1489 static int
1490 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1491 {
1492         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1493         uint16_t vlan = bp->vlan;
1494         int rc;
1495
1496         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1497                 RTE_LOG(ERR, PMD,
1498                         "PVID cannot be modified for this function\n");
1499                 return -ENOTSUP;
1500         }
1501         bp->vlan = on ? pvid : 0;
1502
1503         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1504         if (rc)
1505                 bp->vlan = vlan;
1506         return rc;
1507 }
1508
1509 static int
1510 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1511 {
1512         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1513
1514         return bnxt_hwrm_port_led_cfg(bp, true);
1515 }
1516
1517 static int
1518 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1519 {
1520         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1521
1522         return bnxt_hwrm_port_led_cfg(bp, false);
1523 }
1524
1525 /*
1526  * Initialization
1527  */
1528
1529 static const struct eth_dev_ops bnxt_dev_ops = {
1530         .dev_infos_get = bnxt_dev_info_get_op,
1531         .dev_close = bnxt_dev_close_op,
1532         .dev_configure = bnxt_dev_configure_op,
1533         .dev_start = bnxt_dev_start_op,
1534         .dev_stop = bnxt_dev_stop_op,
1535         .dev_set_link_up = bnxt_dev_set_link_up_op,
1536         .dev_set_link_down = bnxt_dev_set_link_down_op,
1537         .stats_get = bnxt_stats_get_op,
1538         .stats_reset = bnxt_stats_reset_op,
1539         .rx_queue_setup = bnxt_rx_queue_setup_op,
1540         .rx_queue_release = bnxt_rx_queue_release_op,
1541         .tx_queue_setup = bnxt_tx_queue_setup_op,
1542         .tx_queue_release = bnxt_tx_queue_release_op,
1543         .reta_update = bnxt_reta_update_op,
1544         .reta_query = bnxt_reta_query_op,
1545         .rss_hash_update = bnxt_rss_hash_update_op,
1546         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1547         .link_update = bnxt_link_update_op,
1548         .promiscuous_enable = bnxt_promiscuous_enable_op,
1549         .promiscuous_disable = bnxt_promiscuous_disable_op,
1550         .allmulticast_enable = bnxt_allmulticast_enable_op,
1551         .allmulticast_disable = bnxt_allmulticast_disable_op,
1552         .mac_addr_add = bnxt_mac_addr_add_op,
1553         .mac_addr_remove = bnxt_mac_addr_remove_op,
1554         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1555         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1556         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1557         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1558         .vlan_filter_set = bnxt_vlan_filter_set_op,
1559         .vlan_offload_set = bnxt_vlan_offload_set_op,
1560         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1561         .mtu_set = bnxt_mtu_set_op,
1562         .mac_addr_set = bnxt_set_default_mac_addr_op,
1563         .xstats_get = bnxt_dev_xstats_get_op,
1564         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1565         .xstats_reset = bnxt_dev_xstats_reset_op,
1566         .fw_version_get = bnxt_fw_version_get,
1567         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1568         .rxq_info_get = bnxt_rxq_info_get_op,
1569         .txq_info_get = bnxt_txq_info_get_op,
1570         .dev_led_on = bnxt_dev_led_on_op,
1571         .dev_led_off = bnxt_dev_led_off_op,
1572 };
1573
1574 static bool bnxt_vf_pciid(uint16_t id)
1575 {
1576         if (id == BROADCOM_DEV_ID_57304_VF ||
1577             id == BROADCOM_DEV_ID_57406_VF ||
1578             id == BROADCOM_DEV_ID_5731X_VF ||
1579             id == BROADCOM_DEV_ID_5741X_VF ||
1580             id == BROADCOM_DEV_ID_57414_VF ||
1581             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
1582                 return true;
1583         return false;
1584 }
1585
1586 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1587 {
1588         struct bnxt *bp = eth_dev->data->dev_private;
1589         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1590         int rc;
1591
1592         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1593         if (!pci_dev->mem_resource[0].addr) {
1594                 RTE_LOG(ERR, PMD,
1595                         "Cannot find PCI device base address, aborting\n");
1596                 rc = -ENODEV;
1597                 goto init_err_disable;
1598         }
1599
1600         bp->eth_dev = eth_dev;
1601         bp->pdev = pci_dev;
1602
1603         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1604         if (!bp->bar0) {
1605                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1606                 rc = -ENOMEM;
1607                 goto init_err_release;
1608         }
1609         return 0;
1610
1611 init_err_release:
1612         if (bp->bar0)
1613                 bp->bar0 = NULL;
1614
1615 init_err_disable:
1616
1617         return rc;
1618 }
1619
1620 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1621
1622 #define ALLOW_FUNC(x)   \
1623         { \
1624                 typeof(x) arg = (x); \
1625                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1626                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1627         }
1628 static int
1629 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1630 {
1631         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1632         char mz_name[RTE_MEMZONE_NAMESIZE];
1633         const struct rte_memzone *mz = NULL;
1634         static int version_printed;
1635         uint32_t total_alloc_len;
1636         phys_addr_t mz_phys_addr;
1637         struct bnxt *bp;
1638         int rc;
1639
1640         if (version_printed++ == 0)
1641                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1642
1643         rte_eth_copy_pci_info(eth_dev, pci_dev);
1644         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1645
1646         bp = eth_dev->data->dev_private;
1647
1648         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1649         bp->dev_stopped = 1;
1650
1651         if (bnxt_vf_pciid(pci_dev->id.device_id))
1652                 bp->flags |= BNXT_FLAG_VF;
1653
1654         rc = bnxt_init_board(eth_dev);
1655         if (rc) {
1656                 RTE_LOG(ERR, PMD,
1657                         "Board initialization failed rc: %x\n", rc);
1658                 goto error;
1659         }
1660         eth_dev->dev_ops = &bnxt_dev_ops;
1661         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1662         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1663
1664         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1665                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1666                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1667                          pci_dev->addr.bus, pci_dev->addr.devid,
1668                          pci_dev->addr.function, "rx_port_stats");
1669                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1670                 mz = rte_memzone_lookup(mz_name);
1671                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1672                                 sizeof(struct rx_port_stats) + 512);
1673                 if (!mz) {
1674                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1675                                                  SOCKET_ID_ANY,
1676                                                  RTE_MEMZONE_2MB |
1677                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1678                         if (mz == NULL)
1679                                 return -ENOMEM;
1680                 }
1681                 memset(mz->addr, 0, mz->len);
1682                 mz_phys_addr = mz->phys_addr;
1683                 if ((unsigned long)mz->addr == mz_phys_addr) {
1684                         RTE_LOG(WARNING, PMD,
1685                                 "Memzone physical address same as virtual.\n");
1686                         RTE_LOG(WARNING, PMD,
1687                                 "Using rte_mem_virt2phy()\n");
1688                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1689                         if (mz_phys_addr == 0) {
1690                                 RTE_LOG(ERR, PMD,
1691                                 "unable to map address to physical memory\n");
1692                                 return -ENOMEM;
1693                         }
1694                 }
1695
1696                 bp->rx_mem_zone = (const void *)mz;
1697                 bp->hw_rx_port_stats = mz->addr;
1698                 bp->hw_rx_port_stats_map = mz_phys_addr;
1699
1700                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1701                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1702                          pci_dev->addr.bus, pci_dev->addr.devid,
1703                          pci_dev->addr.function, "tx_port_stats");
1704                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1705                 mz = rte_memzone_lookup(mz_name);
1706                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1707                                 sizeof(struct tx_port_stats) + 512);
1708                 if (!mz) {
1709                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1710                                                  SOCKET_ID_ANY,
1711                                                  RTE_MEMZONE_2MB |
1712                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1713                         if (mz == NULL)
1714                                 return -ENOMEM;
1715                 }
1716                 memset(mz->addr, 0, mz->len);
1717                 mz_phys_addr = mz->phys_addr;
1718                 if ((unsigned long)mz->addr == mz_phys_addr) {
1719                         RTE_LOG(WARNING, PMD,
1720                                 "Memzone physical address same as virtual.\n");
1721                         RTE_LOG(WARNING, PMD,
1722                                 "Using rte_mem_virt2phy()\n");
1723                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1724                         if (mz_phys_addr == 0) {
1725                                 RTE_LOG(ERR, PMD,
1726                                 "unable to map address to physical memory\n");
1727                                 return -ENOMEM;
1728                         }
1729                 }
1730
1731                 bp->tx_mem_zone = (const void *)mz;
1732                 bp->hw_tx_port_stats = mz->addr;
1733                 bp->hw_tx_port_stats_map = mz_phys_addr;
1734
1735                 bp->flags |= BNXT_FLAG_PORT_STATS;
1736         }
1737
1738         rc = bnxt_alloc_hwrm_resources(bp);
1739         if (rc) {
1740                 RTE_LOG(ERR, PMD,
1741                         "hwrm resource allocation failure rc: %x\n", rc);
1742                 goto error_free;
1743         }
1744         rc = bnxt_hwrm_ver_get(bp);
1745         if (rc)
1746                 goto error_free;
1747         bnxt_hwrm_queue_qportcfg(bp);
1748
1749         bnxt_hwrm_func_qcfg(bp);
1750
1751         /* Get the MAX capabilities for this function */
1752         rc = bnxt_hwrm_func_qcaps(bp);
1753         if (rc) {
1754                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1755                 goto error_free;
1756         }
1757         if (bp->max_tx_rings == 0) {
1758                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1759                 rc = -EBUSY;
1760                 goto error_free;
1761         }
1762         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1763                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1764         if (eth_dev->data->mac_addrs == NULL) {
1765                 RTE_LOG(ERR, PMD,
1766                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1767                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1768                 rc = -ENOMEM;
1769                 goto error_free;
1770         }
1771         /* Copy the permanent MAC from the qcap response address now. */
1772         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1773         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1774         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1775                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1776         if (!bp->grp_info) {
1777                 RTE_LOG(ERR, PMD,
1778                         "Failed to alloc %zu bytes needed to store group info table\n",
1779                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1780                 rc = -ENOMEM;
1781                 goto error_free;
1782         }
1783
1784         /* Forward all requests if firmware is new enough */
1785         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1786             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1787             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1788                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1789         } else {
1790                 RTE_LOG(WARNING, PMD,
1791                         "Firmware too old for VF mailbox functionality\n");
1792                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1793         }
1794
1795         /*
1796          * The following are used for driver cleanup.  If we disallow these,
1797          * VF drivers can't clean up cleanly.
1798          */
1799         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1800         ALLOW_FUNC(HWRM_VNIC_FREE);
1801         ALLOW_FUNC(HWRM_RING_FREE);
1802         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1803         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1804         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1805         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1806         rc = bnxt_hwrm_func_driver_register(bp);
1807         if (rc) {
1808                 RTE_LOG(ERR, PMD,
1809                         "Failed to register driver");
1810                 rc = -EBUSY;
1811                 goto error_free;
1812         }
1813
1814         RTE_LOG(INFO, PMD,
1815                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1816                 pci_dev->mem_resource[0].phys_addr,
1817                 pci_dev->mem_resource[0].addr);
1818
1819         rc = bnxt_hwrm_func_reset(bp);
1820         if (rc) {
1821                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1822                 rc = -1;
1823                 goto error_free;
1824         }
1825
1826         if (BNXT_PF(bp)) {
1827                 //if (bp->pf.active_vfs) {
1828                         // TODO: Deallocate VF resources?
1829                 //}
1830                 if (bp->pdev->max_vfs) {
1831                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1832                         if (rc) {
1833                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1834                                 goto error_free;
1835                         }
1836                 } else {
1837                         rc = bnxt_hwrm_allocate_pf_only(bp);
1838                         if (rc) {
1839                                 RTE_LOG(ERR, PMD,
1840                                         "Failed to allocate PF resources\n");
1841                                 goto error_free;
1842                         }
1843                 }
1844         }
1845
1846         bnxt_hwrm_port_led_qcaps(bp);
1847
1848         rc = bnxt_setup_int(bp);
1849         if (rc)
1850                 goto error_free;
1851
1852         rc = bnxt_alloc_mem(bp);
1853         if (rc)
1854                 goto error_free_int;
1855
1856         rc = bnxt_request_int(bp);
1857         if (rc)
1858                 goto error_free_int;
1859
1860         rc = bnxt_alloc_def_cp_ring(bp);
1861         if (rc)
1862                 goto error_free_int;
1863
1864         bnxt_enable_int(bp);
1865
1866         return 0;
1867
1868 error_free_int:
1869         bnxt_disable_int(bp);
1870         bnxt_free_def_cp_ring(bp);
1871         bnxt_hwrm_func_buf_unrgtr(bp);
1872         bnxt_free_int(bp);
1873         bnxt_free_mem(bp);
1874 error_free:
1875         bnxt_dev_uninit(eth_dev);
1876 error:
1877         return rc;
1878 }
1879
1880 static int
1881 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1882         struct bnxt *bp = eth_dev->data->dev_private;
1883         int rc;
1884
1885         bnxt_disable_int(bp);
1886         bnxt_free_int(bp);
1887         bnxt_free_mem(bp);
1888         if (eth_dev->data->mac_addrs != NULL) {
1889                 rte_free(eth_dev->data->mac_addrs);
1890                 eth_dev->data->mac_addrs = NULL;
1891         }
1892         if (bp->grp_info != NULL) {
1893                 rte_free(bp->grp_info);
1894                 bp->grp_info = NULL;
1895         }
1896         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1897         bnxt_free_hwrm_resources(bp);
1898         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1899         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1900         if (bp->dev_stopped == 0)
1901                 bnxt_dev_close_op(eth_dev);
1902         if (bp->pf.vf_info)
1903                 rte_free(bp->pf.vf_info);
1904         eth_dev->dev_ops = NULL;
1905         eth_dev->rx_pkt_burst = NULL;
1906         eth_dev->tx_pkt_burst = NULL;
1907
1908         return rc;
1909 }
1910
1911 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1912         struct rte_pci_device *pci_dev)
1913 {
1914         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1915                 bnxt_dev_init);
1916 }
1917
1918 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1919 {
1920         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1921 }
1922
1923 static struct rte_pci_driver bnxt_rte_pmd = {
1924         .id_table = bnxt_pci_id_map,
1925         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1926                 RTE_PCI_DRV_INTR_LSC,
1927         .probe = bnxt_pci_probe,
1928         .remove = bnxt_pci_remove,
1929 };
1930
1931 static bool
1932 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
1933 {
1934         if (strcmp(dev->device->driver->name, drv->driver.name))
1935                 return false;
1936
1937         return true;
1938 }
1939
1940 bool is_bnxt_supported(struct rte_eth_dev *dev)
1941 {
1942         return is_device_supported(dev, &bnxt_rte_pmd);
1943 }
1944
1945 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1946 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1947 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");