drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_ring.h"
  47 #include "bnxt_rxq.h"
  48 #include "bnxt_rxr.h"
  49 #include "bnxt_stats.h"
  50 #include "bnxt_txq.h"
  51 #include "bnxt_txr.h"
  52 #include "bnxt_vnic.h"
  53 #include "hsi_struct_def_dpdk.h"
  54
  55 #define DRV_MODULE_NAME         "bnxt"
  56 static const char bnxt_version[] =
  57         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  58
  59 static struct rte_pci_id bnxt_pci_id_map[] = {
  60 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
  61 #include "rte_pci_dev_ids.h"
  62         {.device_id = 0},
  63 };
  64
  65 /***********************/
  66
  67 /*
  68  * High level utility functions
  69  */
  70
  71 static void bnxt_free_mem(struct bnxt *bp)
  72 {
  73         bnxt_free_filter_mem(bp);
  74         bnxt_free_vnic_attributes(bp);
  75         bnxt_free_vnic_mem(bp);
  76
  77         bnxt_free_stats(bp);
  78         bnxt_free_tx_rings(bp);
  79         bnxt_free_rx_rings(bp);
  80         bnxt_free_def_cp_ring(bp);
  81 }
  82
  83 static int bnxt_alloc_mem(struct bnxt *bp)
  84 {
  85         int rc;
  86
  87         /* Default completion ring */
  88         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
  89         if (rc)
  90                 goto alloc_mem_err;
  91
  92         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
  93                               bp->def_cp_ring, "def_cp");
  94         if (rc)
  95                 goto alloc_mem_err;
  96
  97         rc = bnxt_alloc_vnic_mem(bp);
  98         if (rc)
  99                 goto alloc_mem_err;
 100
 101         rc = bnxt_alloc_vnic_attributes(bp);
 102         if (rc)
 103                 goto alloc_mem_err;
 104
 105         rc = bnxt_alloc_filter_mem(bp);
 106         if (rc)
 107                 goto alloc_mem_err;
 108
 109         return 0;
 110
 111 alloc_mem_err:
 112         bnxt_free_mem(bp);
 113         return rc;
 114 }
 115
 116 static int bnxt_init_chip(struct bnxt *bp)
 117 {
 118         unsigned int i, rss_idx, fw_idx;
 119         int rc;
 120
 121         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 122         if (rc) {
 123                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 124                 goto err_out;
 125         }
 126
 127         rc = bnxt_alloc_hwrm_rings(bp);
 128         if (rc) {
 129                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 130                 goto err_out;
 131         }
 132
 133         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 134         if (rc) {
 135                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 136                 goto err_out;
 137         }
 138
 139         rc = bnxt_mq_rx_configure(bp);
 140         if (rc) {
 141                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 142                 goto err_out;
 143         }
 144
 145         /* VNIC configuration */
 146         for (i = 0; i < bp->nr_vnics; i++) {
 147                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 148
 149                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 150                 if (rc) {
 151                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 152                                 rc);
 153                         goto err_out;
 154                 }
 155
 156                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 157                 if (rc) {
 158                         RTE_LOG(ERR, PMD,
 159                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 160                         goto err_out;
 161                 }
 162
 163                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 164                 if (rc) {
 165                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 166                         goto err_out;
 167                 }
 168
 169                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 170                 if (rc) {
 171                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 172                                 rc);
 173                         goto err_out;
 174                 }
 175                 if (vnic->rss_table && vnic->hash_type) {
 176                         /*
 177                          * Fill the RSS hash & redirection table with
 178                          * ring group ids for all VNICs
 179                          */
 180                         for (rss_idx = 0, fw_idx = 0;
 181                              rss_idx < HW_HASH_INDEX_SIZE;
 182                              rss_idx++, fw_idx++) {
 183                                 if (vnic->fw_grp_ids[fw_idx] ==
 184                                     INVALID_HW_RING_ID)
 185                                         fw_idx = 0;
 186                                 vnic->rss_table[rss_idx] =
 187                                                 vnic->fw_grp_ids[fw_idx];
 188                         }
 189                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 190                         if (rc) {
 191                                 RTE_LOG(ERR, PMD,
 192                                         "HWRM vnic set RSS failure rc: %x\n",
 193                                         rc);
 194                                 goto err_out;
 195                         }
 196                 }
 197         }
 198         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 199         if (rc) {
 200                 RTE_LOG(ERR, PMD,
 201                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 202                 goto err_out;
 203         }
 204
 205         return 0;
 206
 207 err_out:
 208         bnxt_free_all_hwrm_resources(bp);
 209
 210         return rc;
 211 }
 212
 213 static int bnxt_shutdown_nic(struct bnxt *bp)
 214 {
 215         bnxt_free_all_hwrm_resources(bp);
 216         bnxt_free_all_filters(bp);
 217         bnxt_free_all_vnics(bp);
 218         return 0;
 219 }
 220
 221 static int bnxt_init_nic(struct bnxt *bp)
 222 {
 223         int rc;
 224
 225         bnxt_init_ring_grps(bp);
 226         bnxt_init_vnics(bp);
 227         bnxt_init_filters(bp);
 228
 229         rc = bnxt_init_chip(bp);
 230         if (rc)
 231                 return rc;
 232
 233         return 0;
 234 }
 235
 236 /*
 237  * Device configuration and status function
 238  */
 239
 240 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 241                                   struct rte_eth_dev_info *dev_info)
 242 {
 243         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 244         uint16_t max_vnics, i, j, vpool, vrxq;
 245
 246         /* MAC Specifics */
 247         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 248         dev_info->max_hash_mac_addrs = 0;
 249
 250         /* PF/VF specifics */
 251         if (BNXT_PF(bp)) {
 252                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 253                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 254                 dev_info->max_vfs = bp->pf.active_vfs;
 255                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
 256                 max_vnics = bp->pf.max_vnics;
 257         } else {
 258                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 259                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 260                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
 261                 max_vnics = bp->vf.max_vnics;
 262         }
 263
 264         /* Fast path specifics */
 265         dev_info->min_rx_bufsize = 1;
 266         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 267                                   + VLAN_TAG_SIZE;
 268         dev_info->rx_offload_capa = 0;
 269         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 270                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 271                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 272                                         DEV_TX_OFFLOAD_TCP_TSO;
 273
 274         /* *INDENT-OFF* */
 275         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 276                 .rx_thresh = {
 277                         .pthresh = 8,
 278                         .hthresh = 8,
 279                         .wthresh = 0,
 280                 },
 281                 .rx_free_thresh = 32,
 282                 .rx_drop_en = 0,
 283         };
 284
 285         dev_info->default_txconf = (struct rte_eth_txconf) {
 286                 .tx_thresh = {
 287                         .pthresh = 32,
 288                         .hthresh = 0,
 289                         .wthresh = 0,
 290                 },
 291                 .tx_free_thresh = 32,
 292                 .tx_rs_thresh = 32,
 293                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 294                              ETH_TXQ_FLAGS_NOOFFLOADS,
 295         };
 296         /* *INDENT-ON* */
 297
 298         /*
 299          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 300          *       need further investigation.
 301          */
 302
 303         /* VMDq resources */
 304         vpool = 64; /* ETH_64_POOLS */
 305         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 306         for (i = 0; i < 4; vpool >>= 1, i++) {
 307                 if (max_vnics > vpool) {
 308                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 309                                 if (dev_info->max_rx_queues > vrxq) {
 310                                         if (vpool > vrxq)
 311                                                 vpool = vrxq;
 312                                         goto found;
 313                                 }
 314                         }
 315                         /* Not enough resources to support VMDq */
 316                         break;
 317                 }
 318         }
 319         /* Not enough resources to support VMDq */
 320         vpool = 0;
 321         vrxq = 0;
 322 found:
 323         dev_info->max_vmdq_pools = vpool;
 324         dev_info->vmdq_queue_num = vrxq;
 325
 326         dev_info->vmdq_pool_base = 0;
 327         dev_info->vmdq_queue_base = 0;
 328 }
 329
 330 /* Configure the device based on the configuration provided */
 331 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 332 {
 333         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 334         int rc;
 335
 336         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 337         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 338
 339         /* Inherit new configurations */
 340         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 341         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 342         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 343         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 344
 345         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 346                 eth_dev->data->mtu =
 347                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 348                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 349         rc = bnxt_set_hwrm_link_config(bp, true);
 350         return rc;
 351 }
 352
 353 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 354 {
 355         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 356         int rc;
 357
 358         rc = bnxt_hwrm_func_reset(bp);
 359         if (rc) {
 360                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 361                 rc = -1;
 362                 goto error;
 363         }
 364
 365         rc = bnxt_alloc_mem(bp);
 366         if (rc)
 367                 goto error;
 368
 369         rc = bnxt_init_nic(bp);
 370         if (rc)
 371                 goto error;
 372
 373         return 0;
 374
 375 error:
 376         bnxt_shutdown_nic(bp);
 377         bnxt_free_tx_mbufs(bp);
 378         bnxt_free_rx_mbufs(bp);
 379         bnxt_free_mem(bp);
 380         return rc;
 381 }
 382
 383 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 384 {
 385         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 386
 387         bnxt_free_tx_mbufs(bp);
 388         bnxt_free_rx_mbufs(bp);
 389         bnxt_free_mem(bp);
 390         rte_free(eth_dev->data->mac_addrs);
 391 }
 392
 393 /* Unload the driver, release resources */
 394 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 395 {
 396         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 397
 398         if (bp->eth_dev->data->dev_started) {
 399                 /* TBD: STOP HW queues DMA */
 400                 eth_dev->data->dev_link.link_status = 0;
 401         }
 402         bnxt_shutdown_nic(bp);
 403 }
 404
 405 static int bnxt_link_update_op(struct rte_eth_dev *eth_dev,
 406                                int wait_to_complete)
 407 {
 408         int rc = 0;
 409         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 410         struct rte_eth_link new;
 411         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 412
 413         memset(&new, 0, sizeof(new));
 414         do {
 415                 /* Retrieve link info from hardware */
 416                 rc = bnxt_get_hwrm_link_config(bp, &new);
 417                 if (rc) {
 418                         new.link_speed = ETH_LINK_SPEED_100M;
 419                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 420                         RTE_LOG(ERR, PMD,
 421                                 "Failed to retrieve link rc = 0x%x!", rc);
 422                         goto out;
 423                 }
 424                 if (!wait_to_complete)
 425                         break;
 426
 427                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 428
 429         } while (!new.link_status && cnt--);
 430
 431         /* Timed out or success */
 432         if (new.link_status) {
 433                 /* Update only if success */
 434                 eth_dev->data->dev_link.link_duplex = new.link_duplex;
 435                 eth_dev->data->dev_link.link_speed = new.link_speed;
 436         }
 437         eth_dev->data->dev_link.link_status = new.link_status;
 438 out:
 439         return rc;
 440 }
 441
 442 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 443 {
 444         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 445         struct bnxt_vnic_info *vnic;
 446
 447         if (bp->vnic_info == NULL)
 448                 return;
 449
 450         vnic = &bp->vnic_info[0];
 451
 452         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 453         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 454 }
 455
 456 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 457 {
 458         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 459         struct bnxt_vnic_info *vnic;
 460
 461         if (bp->vnic_info == NULL)
 462                 return;
 463
 464         vnic = &bp->vnic_info[0];
 465
 466         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 467         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 468 }
 469
 470 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 471 {
 472         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 473         struct bnxt_vnic_info *vnic;
 474
 475         if (bp->vnic_info == NULL)
 476                 return;
 477
 478         vnic = &bp->vnic_info[0];
 479
 480         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 481         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 482 }
 483
 484 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 485 {
 486         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 487         struct bnxt_vnic_info *vnic;
 488
 489         if (bp->vnic_info == NULL)
 490                 return;
 491
 492         vnic = &bp->vnic_info[0];
 493
 494         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 495         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 496 }
 497
 498 /*
 499  * Initialization
 500  */
 501
 502 static struct eth_dev_ops bnxt_dev_ops = {
 503         .dev_infos_get = bnxt_dev_info_get_op,
 504         .dev_close = bnxt_dev_close_op,
 505         .dev_configure = bnxt_dev_configure_op,
 506         .dev_start = bnxt_dev_start_op,
 507         .dev_stop = bnxt_dev_stop_op,
 508         .stats_get = bnxt_stats_get_op,
 509         .stats_reset = bnxt_stats_reset_op,
 510         .rx_queue_setup = bnxt_rx_queue_setup_op,
 511         .rx_queue_release = bnxt_rx_queue_release_op,
 512         .tx_queue_setup = bnxt_tx_queue_setup_op,
 513         .tx_queue_release = bnxt_tx_queue_release_op,
 514         .link_update = bnxt_link_update_op,
 515         .promiscuous_enable = bnxt_promiscuous_enable_op,
 516         .promiscuous_disable = bnxt_promiscuous_disable_op,
 517         .allmulticast_enable = bnxt_allmulticast_enable_op,
 518         .allmulticast_disable = bnxt_allmulticast_disable_op,
 519 };
 520
 521 static bool bnxt_vf_pciid(uint16_t id)
 522 {
 523         if (id == BROADCOM_DEV_ID_57304_VF ||
 524             id == BROADCOM_DEV_ID_57406_VF)
 525                 return true;
 526         return false;
 527 }
 528
 529 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
 530 {
 531         int rc;
 532         struct bnxt *bp = eth_dev->data->dev_private;
 533
 534         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 535         if (!eth_dev->pci_dev->mem_resource[0].addr) {
 536                 RTE_LOG(ERR, PMD,
 537                         "Cannot find PCI device base address, aborting\n");
 538                 rc = -ENODEV;
 539                 goto init_err_disable;
 540         }
 541
 542         bp->eth_dev = eth_dev;
 543         bp->pdev = eth_dev->pci_dev;
 544
 545         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
 546         if (!bp->bar0) {
 547                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
 548                 rc = -ENOMEM;
 549                 goto init_err_release;
 550         }
 551         return 0;
 552
 553 init_err_release:
 554         if (bp->bar0)
 555                 bp->bar0 = NULL;
 556
 557 init_err_disable:
 558
 559         return rc;
 560 }
 561
 562 static int
 563 bnxt_dev_init(struct rte_eth_dev *eth_dev)
 564 {
 565         static int version_printed;
 566         struct bnxt *bp;
 567         int rc;
 568
 569         if (version_printed++ == 0)
 570                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
 571
 572         if (eth_dev->pci_dev->addr.function >= 2 &&
 573                         eth_dev->pci_dev->addr.function < 4) {
 574                 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
 575                         eth_dev->pci_dev->addr.function);
 576                 rc = -ENOMEM;
 577                 goto error;
 578         }
 579
 580         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
 581         bp = eth_dev->data->dev_private;
 582
 583         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
 584                 bp->flags |= BNXT_FLAG_VF;
 585
 586         rc = bnxt_init_board(eth_dev);
 587         if (rc) {
 588                 RTE_LOG(ERR, PMD,
 589                         "Board initialization failed rc: %x\n", rc);
 590                 goto error;
 591         }
 592         eth_dev->dev_ops = &bnxt_dev_ops;
 593         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
 594         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
 595
 596         rc = bnxt_alloc_hwrm_resources(bp);
 597         if (rc) {
 598                 RTE_LOG(ERR, PMD,
 599                         "hwrm resource allocation failure rc: %x\n", rc);
 600                 goto error_free;
 601         }
 602         rc = bnxt_hwrm_ver_get(bp);
 603         if (rc)
 604                 goto error_free;
 605         bnxt_hwrm_queue_qportcfg(bp);
 606
 607         /* Get the MAX capabilities for this function */
 608         rc = bnxt_hwrm_func_qcaps(bp);
 609         if (rc) {
 610                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
 611                 goto error_free;
 612         }
 613         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
 614                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
 615         if (eth_dev->data->mac_addrs == NULL) {
 616                 RTE_LOG(ERR, PMD,
 617                         "Failed to alloc %u bytes needed to store MAC addr tbl",
 618                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
 619                 rc = -ENOMEM;
 620                 goto error_free;
 621         }
 622         /* Copy the permanent MAC from the qcap response address now. */
 623         if (BNXT_PF(bp))
 624                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
 625         else
 626                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
 627         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
 628         bp->grp_info = rte_zmalloc("bnxt_grp_info",
 629                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
 630         if (!bp->grp_info) {
 631                 RTE_LOG(ERR, PMD,
 632                         "Failed to alloc %zu bytes needed to store group info table\n",
 633                         sizeof(*bp->grp_info) * bp->max_ring_grps);
 634                 rc = -ENOMEM;
 635                 goto error_free;
 636         }
 637
 638         rc = bnxt_hwrm_func_driver_register(bp, 0,
 639                                             bp->pf.vf_req_fwd);
 640         if (rc) {
 641                 RTE_LOG(ERR, PMD,
 642                         "Failed to register driver");
 643                 rc = -EBUSY;
 644                 goto error_free;
 645         }
 646
 647         RTE_LOG(INFO, PMD,
 648                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
 649                 eth_dev->pci_dev->mem_resource[0].phys_addr,
 650                 eth_dev->pci_dev->mem_resource[0].addr);
 651
 652         return 0;
 653
 654 error_free:
 655         eth_dev->driver->eth_dev_uninit(eth_dev);
 656 error:
 657         return rc;
 658 }
 659
 660 static int
 661 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
 662         struct bnxt *bp = eth_dev->data->dev_private;
 663         int rc;
 664
 665         if (eth_dev->data->mac_addrs)
 666                 rte_free(eth_dev->data->mac_addrs);
 667         if (bp->grp_info)
 668                 rte_free(bp->grp_info);
 669         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
 670         bnxt_free_hwrm_resources(bp);
 671         return rc;
 672 }
 673
 674 static struct eth_driver bnxt_rte_pmd = {
 675         .pci_drv = {
 676                     .name = "rte_" DRV_MODULE_NAME "_pmd",
 677                     .id_table = bnxt_pci_id_map,
 678                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 679                     },
 680         .eth_dev_init = bnxt_dev_init,
 681         .eth_dev_uninit = bnxt_dev_uninit,
 682         .dev_private_size = sizeof(struct bnxt),
 683 };
 684
 685 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
 686 {
 687         RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
 688         rte_eth_driver_register(&bnxt_rte_pmd);
 689         return 0;
 690 }
 691
 692 static struct rte_driver bnxt_pmd_drv = {
 693         .name = "eth_bnxt",
 694         .type = PMD_PDEV,
 695         .init = bnxt_rte_pmd_init,
 696 };
 697
 698 PMD_REGISTER_DRIVER(bnxt_pmd_drv);