drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56 #include "bnxt_nvm_defs.h"
  57
  58 #define DRV_MODULE_NAME         "bnxt"
  59 static const char bnxt_version[] =
  60         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  61
  62 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  63
  64 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  65 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  66 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  67 #define BROADCOM_DEV_ID_57301 0x16c8
  68 #define BROADCOM_DEV_ID_57302 0x16c9
  69 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  70 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  71 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  72 #define BROADCOM_DEV_ID_NS2 0x16cd
  73 #define BROADCOM_DEV_ID_57311 0x16ce
  74 #define BROADCOM_DEV_ID_57312 0x16cf
  75 #define BROADCOM_DEV_ID_57402 0x16d0
  76 #define BROADCOM_DEV_ID_57404 0x16d1
  77 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  78 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  79 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  80 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  81 #define BROADCOM_DEV_ID_57412 0x16d6
  82 #define BROADCOM_DEV_ID_57414 0x16d7
  83 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  84 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  85 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  86 #define BROADCOM_DEV_ID_57412_MF 0x16de
  87 #define BROADCOM_DEV_ID_57314 0x16df
  88 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  89 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  90 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  91 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  92 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  93 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  94 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  95 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  96 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  97 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  98 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  99
 100 static const struct rte_pci_id bnxt_pci_id_map[] = {
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 102                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 136         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 137         { .vendor_id = 0, /* sentinel */ },
 138 };
 139
 140 #define BNXT_ETH_RSS_SUPPORT (  \
 141         ETH_RSS_IPV4 |          \
 142         ETH_RSS_NONFRAG_IPV4_TCP |      \
 143         ETH_RSS_NONFRAG_IPV4_UDP |      \
 144         ETH_RSS_IPV6 |          \
 145         ETH_RSS_NONFRAG_IPV6_TCP |      \
 146         ETH_RSS_NONFRAG_IPV6_UDP)
 147
 148 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 149 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 150
 151 /***********************/
 152
 153 /*
 154  * High level utility functions
 155  */
 156
 157 static void bnxt_free_mem(struct bnxt *bp)
 158 {
 159         bnxt_free_filter_mem(bp);
 160         bnxt_free_vnic_attributes(bp);
 161         bnxt_free_vnic_mem(bp);
 162
 163         bnxt_free_stats(bp);
 164         bnxt_free_tx_rings(bp);
 165         bnxt_free_rx_rings(bp);
 166         bnxt_free_def_cp_ring(bp);
 167 }
 168
 169 static int bnxt_alloc_mem(struct bnxt *bp)
 170 {
 171         int rc;
 172
 173         /* Default completion ring */
 174         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 175         if (rc)
 176                 goto alloc_mem_err;
 177
 178         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 179                               bp->def_cp_ring, "def_cp");
 180         if (rc)
 181                 goto alloc_mem_err;
 182
 183         rc = bnxt_alloc_vnic_mem(bp);
 184         if (rc)
 185                 goto alloc_mem_err;
 186
 187         rc = bnxt_alloc_vnic_attributes(bp);
 188         if (rc)
 189                 goto alloc_mem_err;
 190
 191         rc = bnxt_alloc_filter_mem(bp);
 192         if (rc)
 193                 goto alloc_mem_err;
 194
 195         return 0;
 196
 197 alloc_mem_err:
 198         bnxt_free_mem(bp);
 199         return rc;
 200 }
 201
 202 static int bnxt_init_chip(struct bnxt *bp)
 203 {
 204         unsigned int i, rss_idx, fw_idx;
 205         struct rte_eth_link new;
 206         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 207         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 208         uint32_t intr_vector = 0;
 209         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 210         uint32_t vec = BNXT_MISC_VEC_ID;
 211         int rc;
 212
 213         /* disable uio/vfio intr/eventfd mapping */
 214         rte_intr_disable(intr_handle);
 215
 216         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 217                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 218                 bp->flags |= BNXT_FLAG_JUMBO;
 219         } else {
 220                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 221                 bp->flags &= ~BNXT_FLAG_JUMBO;
 222         }
 223
 224         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 225         if (rc) {
 226                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 227                 goto err_out;
 228         }
 229
 230         rc = bnxt_alloc_hwrm_rings(bp);
 231         if (rc) {
 232                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 233                 goto err_out;
 234         }
 235
 236         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 237         if (rc) {
 238                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 239                 goto err_out;
 240         }
 241
 242         rc = bnxt_mq_rx_configure(bp);
 243         if (rc) {
 244                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 245                 goto err_out;
 246         }
 247
 248         /* VNIC configuration */
 249         for (i = 0; i < bp->nr_vnics; i++) {
 250                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 251
 252                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 253                 if (rc) {
 254                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 255                                 i, rc);
 256                         goto err_out;
 257                 }
 258
 259                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 260                 if (rc) {
 261                         RTE_LOG(ERR, PMD,
 262                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 263                                 i, rc);
 264                         goto err_out;
 265                 }
 266
 267                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 268                 if (rc) {
 269                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 270                                 i, rc);
 271                         goto err_out;
 272                 }
 273
 274                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 275                 if (rc) {
 276                         RTE_LOG(ERR, PMD,
 277                                 "HWRM vnic %d filter failure rc: %x\n",
 278                                 i, rc);
 279                         goto err_out;
 280                 }
 281                 if (vnic->rss_table && vnic->hash_type) {
 282                         /*
 283                          * Fill the RSS hash & redirection table with
 284                          * ring group ids for all VNICs
 285                          */
 286                         for (rss_idx = 0, fw_idx = 0;
 287                              rss_idx < HW_HASH_INDEX_SIZE;
 288                              rss_idx++, fw_idx++) {
 289                                 if (vnic->fw_grp_ids[fw_idx] ==
 290                                     INVALID_HW_RING_ID)
 291                                         fw_idx = 0;
 292                                 vnic->rss_table[rss_idx] =
 293                                                 vnic->fw_grp_ids[fw_idx];
 294                         }
 295                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 296                         if (rc) {
 297                                 RTE_LOG(ERR, PMD,
 298                                         "HWRM vnic %d set RSS failure rc: %x\n",
 299                                         i, rc);
 300                                 goto err_out;
 301                         }
 302                 }
 303
 304                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 305
 306                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 307                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 308                 else
 309                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 310         }
 311         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 312         if (rc) {
 313                 RTE_LOG(ERR, PMD,
 314                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 315                 goto err_out;
 316         }
 317
 318         /* check and configure queue intr-vector mapping */
 319         if ((rte_intr_cap_multiple(intr_handle) ||
 320              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 321             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 322                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 323                 RTE_LOG(INFO, PMD, "%s(): intr_vector = %d\n", __func__,
 324                         intr_vector);
 325                 if (intr_vector > bp->rx_cp_nr_rings) {
 326                         RTE_LOG(ERR, PMD, "At most %d intr queues supported",
 327                                         bp->rx_cp_nr_rings);
 328                         return -ENOTSUP;
 329                 }
 330                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 331                         return -1;
 332         }
 333
 334         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 335                 intr_handle->intr_vec =
 336                         rte_zmalloc("intr_vec",
 337                                     bp->eth_dev->data->nb_rx_queues *
 338                                     sizeof(int), 0);
 339                 if (intr_handle->intr_vec == NULL) {
 340                         RTE_LOG(ERR, PMD, "Failed to allocate %d rx_queues"
 341                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 342                         return -ENOMEM;
 343                 }
 344                 RTE_LOG(DEBUG, PMD, "%s(): intr_handle->intr_vec = %p "
 345                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 346                          __func__, intr_handle->intr_vec, intr_handle->nb_efd,
 347                         intr_handle->max_intr);
 348         }
 349
 350         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 351              queue_id++) {
 352                 intr_handle->intr_vec[queue_id] = vec;
 353                 if (vec < base + intr_handle->nb_efd - 1)
 354                         vec++;
 355         }
 356
 357         /* enable uio/vfio intr/eventfd mapping */
 358         rte_intr_enable(intr_handle);
 359
 360         rc = bnxt_get_hwrm_link_config(bp, &new);
 361         if (rc) {
 362                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 363                 goto err_out;
 364         }
 365
 366         if (!bp->link_info.link_up) {
 367                 rc = bnxt_set_hwrm_link_config(bp, true);
 368                 if (rc) {
 369                         RTE_LOG(ERR, PMD,
 370                                 "HWRM link config failure rc: %x\n", rc);
 371                         goto err_out;
 372                 }
 373         }
 374         bnxt_print_link_info(bp->eth_dev);
 375
 376         return 0;
 377
 378 err_out:
 379         bnxt_free_all_hwrm_resources(bp);
 380
 381         /* Some of the error status returned by FW may not be from errno.h */
 382         if (rc > 0)
 383                 rc = -EIO;
 384
 385         return rc;
 386 }
 387
 388 static int bnxt_shutdown_nic(struct bnxt *bp)
 389 {
 390         bnxt_free_all_hwrm_resources(bp);
 391         bnxt_free_all_filters(bp);
 392         bnxt_free_all_vnics(bp);
 393         return 0;
 394 }
 395
 396 static int bnxt_init_nic(struct bnxt *bp)
 397 {
 398         int rc;
 399
 400         rc = bnxt_init_ring_grps(bp);
 401         if (rc)
 402                 return rc;
 403
 404         bnxt_init_vnics(bp);
 405         bnxt_init_filters(bp);
 406
 407         rc = bnxt_init_chip(bp);
 408         if (rc)
 409                 return rc;
 410
 411         return 0;
 412 }
 413
 414 /*
 415  * Device configuration and status function
 416  */
 417
 418 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 419                                   struct rte_eth_dev_info *dev_info)
 420 {
 421         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 422         uint16_t max_vnics, i, j, vpool, vrxq;
 423         unsigned int max_rx_rings;
 424
 425         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 426
 427         /* MAC Specifics */
 428         dev_info->max_mac_addrs = bp->max_l2_ctx;
 429         dev_info->max_hash_mac_addrs = 0;
 430
 431         /* PF/VF specifics */
 432         if (BNXT_PF(bp))
 433                 dev_info->max_vfs = bp->pdev->max_vfs;
 434         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 435                                                 RTE_MIN(bp->max_rsscos_ctx,
 436                                                 bp->max_stat_ctx)));
 437         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 438         dev_info->max_rx_queues = max_rx_rings;
 439         dev_info->max_tx_queues = max_rx_rings;
 440         dev_info->reta_size = bp->max_rsscos_ctx;
 441         dev_info->hash_key_size = 40;
 442         max_vnics = bp->max_vnics;
 443
 444         /* Fast path specifics */
 445         dev_info->min_rx_bufsize = 1;
 446         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 447                                   + VLAN_TAG_SIZE;
 448         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 449                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 450                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 451                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 452                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 453         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 454                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 455                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 456                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 457                                         DEV_TX_OFFLOAD_TCP_TSO |
 458                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 459                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 460                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 461                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 462                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 463
 464         /* *INDENT-OFF* */
 465         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 466                 .rx_thresh = {
 467                         .pthresh = 8,
 468                         .hthresh = 8,
 469                         .wthresh = 0,
 470                 },
 471                 .rx_free_thresh = 32,
 472                 .rx_drop_en = 0,
 473         };
 474
 475         dev_info->default_txconf = (struct rte_eth_txconf) {
 476                 .tx_thresh = {
 477                         .pthresh = 32,
 478                         .hthresh = 0,
 479                         .wthresh = 0,
 480                 },
 481                 .tx_free_thresh = 32,
 482                 .tx_rs_thresh = 32,
 483                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 484                              ETH_TXQ_FLAGS_NOOFFLOADS,
 485         };
 486         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 487
 488         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 489
 490         /* *INDENT-ON* */
 491
 492         /*
 493          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 494          *       need further investigation.
 495          */
 496
 497         /* VMDq resources */
 498         vpool = 64; /* ETH_64_POOLS */
 499         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 500         for (i = 0; i < 4; vpool >>= 1, i++) {
 501                 if (max_vnics > vpool) {
 502                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 503                                 if (dev_info->max_rx_queues > vrxq) {
 504                                         if (vpool > vrxq)
 505                                                 vpool = vrxq;
 506                                         goto found;
 507                                 }
 508                         }
 509                         /* Not enough resources to support VMDq */
 510                         break;
 511                 }
 512         }
 513         /* Not enough resources to support VMDq */
 514         vpool = 0;
 515         vrxq = 0;
 516 found:
 517         dev_info->max_vmdq_pools = vpool;
 518         dev_info->vmdq_queue_num = vrxq;
 519
 520         dev_info->vmdq_pool_base = 0;
 521         dev_info->vmdq_queue_base = 0;
 522 }
 523
 524 /* Configure the device based on the configuration provided */
 525 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 526 {
 527         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 528
 529         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 530         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 531
 532         /* Inherit new configurations */
 533         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 534         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 535         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 536         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 537
 538         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 539                 eth_dev->data->mtu =
 540                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 541                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 542         return 0;
 543 }
 544
 545 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 546 {
 547         struct rte_eth_link *link = &eth_dev->data->dev_link;
 548
 549         if (link->link_status)
 550                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 551                         eth_dev->data->port_id,
 552                         (uint32_t)link->link_speed,
 553                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 554                         ("full-duplex") : ("half-duplex\n"));
 555         else
 556                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 557                         eth_dev->data->port_id);
 558 }
 559
 560 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 561 {
 562         bnxt_print_link_info(eth_dev);
 563         return 0;
 564 }
 565
 566 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 567 {
 568         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 569         int vlan_mask = 0;
 570         int rc;
 571
 572         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 573                 RTE_LOG(ERR, PMD,
 574                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 575                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 576         }
 577         bp->dev_stopped = 0;
 578
 579         rc = bnxt_init_nic(bp);
 580         if (rc)
 581                 goto error;
 582
 583         bnxt_link_update_op(eth_dev, 1);
 584
 585         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 586                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 587         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 588                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 589         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 590         if (rc)
 591                 goto error;
 592
 593         return 0;
 594
 595 error:
 596         bnxt_shutdown_nic(bp);
 597         bnxt_free_tx_mbufs(bp);
 598         bnxt_free_rx_mbufs(bp);
 599         return rc;
 600 }
 601
 602 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 603 {
 604         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 605         int rc = 0;
 606
 607         if (!bp->link_info.link_up)
 608                 rc = bnxt_set_hwrm_link_config(bp, true);
 609         if (!rc)
 610                 eth_dev->data->dev_link.link_status = 1;
 611
 612         bnxt_print_link_info(eth_dev);
 613         return 0;
 614 }
 615
 616 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 617 {
 618         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 619
 620         eth_dev->data->dev_link.link_status = 0;
 621         bnxt_set_hwrm_link_config(bp, false);
 622         bp->link_info.link_up = 0;
 623
 624         return 0;
 625 }
 626
 627 /* Unload the driver, release resources */
 628 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 629 {
 630         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 631
 632         if (bp->eth_dev->data->dev_started) {
 633                 /* TBD: STOP HW queues DMA */
 634                 eth_dev->data->dev_link.link_status = 0;
 635         }
 636         bnxt_set_hwrm_link_config(bp, false);
 637         bnxt_hwrm_port_clr_stats(bp);
 638         bnxt_shutdown_nic(bp);
 639         bp->dev_stopped = 1;
 640 }
 641
 642 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 643 {
 644         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 645
 646         if (bp->dev_stopped == 0)
 647                 bnxt_dev_stop_op(eth_dev);
 648
 649         bnxt_free_tx_mbufs(bp);
 650         bnxt_free_rx_mbufs(bp);
 651         bnxt_free_mem(bp);
 652         if (eth_dev->data->mac_addrs != NULL) {
 653                 rte_free(eth_dev->data->mac_addrs);
 654                 eth_dev->data->mac_addrs = NULL;
 655         }
 656         if (bp->grp_info != NULL) {
 657                 rte_free(bp->grp_info);
 658                 bp->grp_info = NULL;
 659         }
 660 }
 661
 662 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 663                                     uint32_t index)
 664 {
 665         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 666         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 667         struct bnxt_vnic_info *vnic;
 668         struct bnxt_filter_info *filter, *temp_filter;
 669         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 670         uint32_t i;
 671
 672         /*
 673          * Loop through all VNICs from the specified filter flow pools to
 674          * remove the corresponding MAC addr filter
 675          */
 676         for (i = 0; i < pool; i++) {
 677                 if (!(pool_mask & (1ULL << i)))
 678                         continue;
 679
 680                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 681                         filter = STAILQ_FIRST(&vnic->filter);
 682                         while (filter) {
 683                                 temp_filter = STAILQ_NEXT(filter, next);
 684                                 if (filter->mac_index == index) {
 685                                         STAILQ_REMOVE(&vnic->filter, filter,
 686                                                       bnxt_filter_info, next);
 687                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 688                                         filter->mac_index = INVALID_MAC_INDEX;
 689                                         memset(&filter->l2_addr, 0,
 690                                                ETHER_ADDR_LEN);
 691                                         STAILQ_INSERT_TAIL(
 692                                                         &bp->free_filter_list,
 693                                                         filter, next);
 694                                 }
 695                                 filter = temp_filter;
 696                         }
 697                 }
 698         }
 699 }
 700
 701 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 702                                 struct ether_addr *mac_addr,
 703                                 uint32_t index, uint32_t pool)
 704 {
 705         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 706         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 707         struct bnxt_filter_info *filter;
 708
 709         if (BNXT_VF(bp)) {
 710                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 711                 return -ENOTSUP;
 712         }
 713
 714         if (!vnic) {
 715                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 716                 return -EINVAL;
 717         }
 718         /* Attach requested MAC address to the new l2_filter */
 719         STAILQ_FOREACH(filter, &vnic->filter, next) {
 720                 if (filter->mac_index == index) {
 721                         RTE_LOG(ERR, PMD,
 722                                 "MAC addr already existed for pool %d\n", pool);
 723                         return -EINVAL;
 724                 }
 725         }
 726         filter = bnxt_alloc_filter(bp);
 727         if (!filter) {
 728                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 729                 return -ENODEV;
 730         }
 731         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 732         filter->mac_index = index;
 733         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 734         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 735 }
 736
 737 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 738 {
 739         int rc = 0;
 740         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 741         struct rte_eth_link new;
 742         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 743
 744         memset(&new, 0, sizeof(new));
 745         do {
 746                 /* Retrieve link info from hardware */
 747                 rc = bnxt_get_hwrm_link_config(bp, &new);
 748                 if (rc) {
 749                         new.link_speed = ETH_LINK_SPEED_100M;
 750                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 751                         RTE_LOG(ERR, PMD,
 752                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 753                         goto out;
 754                 }
 755                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 756
 757                 if (!wait_to_complete)
 758                         break;
 759         } while (!new.link_status && cnt--);
 760
 761 out:
 762         /* Timed out or success */
 763         if (new.link_status != eth_dev->data->dev_link.link_status ||
 764         new.link_speed != eth_dev->data->dev_link.link_speed) {
 765                 memcpy(&eth_dev->data->dev_link, &new,
 766                         sizeof(struct rte_eth_link));
 767                 bnxt_print_link_info(eth_dev);
 768         }
 769
 770         return rc;
 771 }
 772
 773 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 774 {
 775         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 776         struct bnxt_vnic_info *vnic;
 777
 778         if (bp->vnic_info == NULL)
 779                 return;
 780
 781         vnic = &bp->vnic_info[0];
 782
 783         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 784         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 785 }
 786
 787 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 788 {
 789         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 790         struct bnxt_vnic_info *vnic;
 791
 792         if (bp->vnic_info == NULL)
 793                 return;
 794
 795         vnic = &bp->vnic_info[0];
 796
 797         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 798         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 799 }
 800
 801 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 802 {
 803         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 804         struct bnxt_vnic_info *vnic;
 805
 806         if (bp->vnic_info == NULL)
 807                 return;
 808
 809         vnic = &bp->vnic_info[0];
 810
 811         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 812         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 813 }
 814
 815 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 816 {
 817         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 818         struct bnxt_vnic_info *vnic;
 819
 820         if (bp->vnic_info == NULL)
 821                 return;
 822
 823         vnic = &bp->vnic_info[0];
 824
 825         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 826         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 827 }
 828
 829 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 830                             struct rte_eth_rss_reta_entry64 *reta_conf,
 831                             uint16_t reta_size)
 832 {
 833         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 834         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 835         struct bnxt_vnic_info *vnic;
 836         int i;
 837
 838         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 839                 return -EINVAL;
 840
 841         if (reta_size != HW_HASH_INDEX_SIZE) {
 842                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 843                         "(%d) must equal the size supported by the hardware "
 844                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 845                 return -EINVAL;
 846         }
 847         /* Update the RSS VNIC(s) */
 848         for (i = 0; i < MAX_FF_POOLS; i++) {
 849                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 850                         memcpy(vnic->rss_table, reta_conf, reta_size);
 851
 852                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 853                 }
 854         }
 855         return 0;
 856 }
 857
 858 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 859                               struct rte_eth_rss_reta_entry64 *reta_conf,
 860                               uint16_t reta_size)
 861 {
 862         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 863         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 864         struct rte_intr_handle *intr_handle
 865                 = &bp->pdev->intr_handle;
 866
 867         /* Retrieve from the default VNIC */
 868         if (!vnic)
 869                 return -EINVAL;
 870         if (!vnic->rss_table)
 871                 return -EINVAL;
 872
 873         if (reta_size != HW_HASH_INDEX_SIZE) {
 874                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 875                         "(%d) must equal the size supported by the hardware "
 876                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 877                 return -EINVAL;
 878         }
 879         /* EW - need to revisit here copying from uint64_t to uint16_t */
 880         memcpy(reta_conf, vnic->rss_table, reta_size);
 881
 882         if (rte_intr_allow_others(intr_handle)) {
 883                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 884                         bnxt_dev_lsc_intr_setup(eth_dev);
 885         }
 886
 887         return 0;
 888 }
 889
 890 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 891                                    struct rte_eth_rss_conf *rss_conf)
 892 {
 893         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 894         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 895         struct bnxt_vnic_info *vnic;
 896         uint16_t hash_type = 0;
 897         int i;
 898
 899         /*
 900          * If RSS enablement were different than dev_configure,
 901          * then return -EINVAL
 902          */
 903         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 904                 if (!rss_conf->rss_hf)
 905                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 906         } else {
 907                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 908                         return -EINVAL;
 909         }
 910
 911         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 912         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 913
 914         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 915                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 916         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 917                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 918         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 919                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 920         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 921                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 922         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 923                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 924         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 925                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 926
 927         /* Update the RSS VNIC(s) */
 928         for (i = 0; i < MAX_FF_POOLS; i++) {
 929                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 930                         vnic->hash_type = hash_type;
 931
 932                         /*
 933                          * Use the supplied key if the key length is
 934                          * acceptable and the rss_key is not NULL
 935                          */
 936                         if (rss_conf->rss_key &&
 937                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 938                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 939                                        rss_conf->rss_key_len);
 940
 941                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 942                 }
 943         }
 944         return 0;
 945 }
 946
 947 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 948                                      struct rte_eth_rss_conf *rss_conf)
 949 {
 950         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 951         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 952         int len;
 953         uint32_t hash_types;
 954
 955         /* RSS configuration is the same for all VNICs */
 956         if (vnic && vnic->rss_hash_key) {
 957                 if (rss_conf->rss_key) {
 958                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 959                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 960                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 961                 }
 962
 963                 hash_types = vnic->hash_type;
 964                 rss_conf->rss_hf = 0;
 965                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 966                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 967                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 968                 }
 969                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 970                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 971                         hash_types &=
 972                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 973                 }
 974                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 975                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 976                         hash_types &=
 977                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 978                 }
 979                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 980                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 981                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 982                 }
 983                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 984                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 985                         hash_types &=
 986                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 987                 }
 988                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 989                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 990                         hash_types &=
 991                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 992                 }
 993                 if (hash_types) {
 994                         RTE_LOG(ERR, PMD,
 995                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 996                                 vnic->hash_type);
 997                         return -ENOTSUP;
 998                 }
 999         } else {
1000                 rss_conf->rss_hf = 0;
1001         }
1002         return 0;
1003 }
1004
1005 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1006                                struct rte_eth_fc_conf *fc_conf)
1007 {
1008         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1009         struct rte_eth_link link_info;
1010         int rc;
1011
1012         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1013         if (rc)
1014                 return rc;
1015
1016         memset(fc_conf, 0, sizeof(*fc_conf));
1017         if (bp->link_info.auto_pause)
1018                 fc_conf->autoneg = 1;
1019         switch (bp->link_info.pause) {
1020         case 0:
1021                 fc_conf->mode = RTE_FC_NONE;
1022                 break;
1023         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1024                 fc_conf->mode = RTE_FC_TX_PAUSE;
1025                 break;
1026         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1027                 fc_conf->mode = RTE_FC_RX_PAUSE;
1028                 break;
1029         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1030                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1031                 fc_conf->mode = RTE_FC_FULL;
1032                 break;
1033         }
1034         return 0;
1035 }
1036
1037 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1038                                struct rte_eth_fc_conf *fc_conf)
1039 {
1040         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1041
1042         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1043                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
1044                 return -ENOTSUP;
1045         }
1046
1047         switch (fc_conf->mode) {
1048         case RTE_FC_NONE:
1049                 bp->link_info.auto_pause = 0;
1050                 bp->link_info.force_pause = 0;
1051                 break;
1052         case RTE_FC_RX_PAUSE:
1053                 if (fc_conf->autoneg) {
1054                         bp->link_info.auto_pause =
1055                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1056                         bp->link_info.force_pause = 0;
1057                 } else {
1058                         bp->link_info.auto_pause = 0;
1059                         bp->link_info.force_pause =
1060                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1061                 }
1062                 break;
1063         case RTE_FC_TX_PAUSE:
1064                 if (fc_conf->autoneg) {
1065                         bp->link_info.auto_pause =
1066                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1067                         bp->link_info.force_pause = 0;
1068                 } else {
1069                         bp->link_info.auto_pause = 0;
1070                         bp->link_info.force_pause =
1071                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1072                 }
1073                 break;
1074         case RTE_FC_FULL:
1075                 if (fc_conf->autoneg) {
1076                         bp->link_info.auto_pause =
1077                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1078                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1079                         bp->link_info.force_pause = 0;
1080                 } else {
1081                         bp->link_info.auto_pause = 0;
1082                         bp->link_info.force_pause =
1083                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1084                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1085                 }
1086                 break;
1087         }
1088         return bnxt_set_hwrm_link_config(bp, true);
1089 }
1090
1091 /* Add UDP tunneling port */
1092 static int
1093 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1094                          struct rte_eth_udp_tunnel *udp_tunnel)
1095 {
1096         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1097         uint16_t tunnel_type = 0;
1098         int rc = 0;
1099
1100         switch (udp_tunnel->prot_type) {
1101         case RTE_TUNNEL_TYPE_VXLAN:
1102                 if (bp->vxlan_port_cnt) {
1103                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1104                                 udp_tunnel->udp_port);
1105                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1106                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1107                                 return -ENOSPC;
1108                         }
1109                         bp->vxlan_port_cnt++;
1110                         return 0;
1111                 }
1112                 tunnel_type =
1113                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1114                 bp->vxlan_port_cnt++;
1115                 break;
1116         case RTE_TUNNEL_TYPE_GENEVE:
1117                 if (bp->geneve_port_cnt) {
1118                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1119                                 udp_tunnel->udp_port);
1120                         if (bp->geneve_port != udp_tunnel->udp_port) {
1121                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1122                                 return -ENOSPC;
1123                         }
1124                         bp->geneve_port_cnt++;
1125                         return 0;
1126                 }
1127                 tunnel_type =
1128                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1129                 bp->geneve_port_cnt++;
1130                 break;
1131         default:
1132                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1133                 return -ENOTSUP;
1134         }
1135         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1136                                              tunnel_type);
1137         return rc;
1138 }
1139
1140 static int
1141 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1142                          struct rte_eth_udp_tunnel *udp_tunnel)
1143 {
1144         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1145         uint16_t tunnel_type = 0;
1146         uint16_t port = 0;
1147         int rc = 0;
1148
1149         switch (udp_tunnel->prot_type) {
1150         case RTE_TUNNEL_TYPE_VXLAN:
1151                 if (!bp->vxlan_port_cnt) {
1152                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1153                         return -EINVAL;
1154                 }
1155                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1156                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1157                                 udp_tunnel->udp_port, bp->vxlan_port);
1158                         return -EINVAL;
1159                 }
1160                 if (--bp->vxlan_port_cnt)
1161                         return 0;
1162
1163                 tunnel_type =
1164                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1165                 port = bp->vxlan_fw_dst_port_id;
1166                 break;
1167         case RTE_TUNNEL_TYPE_GENEVE:
1168                 if (!bp->geneve_port_cnt) {
1169                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1170                         return -EINVAL;
1171                 }
1172                 if (bp->geneve_port != udp_tunnel->udp_port) {
1173                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1174                                 udp_tunnel->udp_port, bp->geneve_port);
1175                         return -EINVAL;
1176                 }
1177                 if (--bp->geneve_port_cnt)
1178                         return 0;
1179
1180                 tunnel_type =
1181                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1182                 port = bp->geneve_fw_dst_port_id;
1183                 break;
1184         default:
1185                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1186                 return -ENOTSUP;
1187         }
1188
1189         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1190         if (!rc) {
1191                 if (tunnel_type ==
1192                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1193                         bp->vxlan_port = 0;
1194                 if (tunnel_type ==
1195                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1196                         bp->geneve_port = 0;
1197         }
1198         return rc;
1199 }
1200
1201 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1202 {
1203         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1204         struct bnxt_vnic_info *vnic;
1205         unsigned int i;
1206         int rc = 0;
1207         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1208
1209         /* Cycle through all VNICs */
1210         for (i = 0; i < bp->nr_vnics; i++) {
1211                 /*
1212                  * For each VNIC and each associated filter(s)
1213                  * if VLAN exists && VLAN matches vlan_id
1214                  *      remove the MAC+VLAN filter
1215                  *      add a new MAC only filter
1216                  * else
1217                  *      VLAN filter doesn't exist, just skip and continue
1218                  */
1219                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1220                         filter = STAILQ_FIRST(&vnic->filter);
1221                         while (filter) {
1222                                 temp_filter = STAILQ_NEXT(filter, next);
1223
1224                                 if (filter->enables & chk &&
1225                                     filter->l2_ovlan == vlan_id) {
1226                                         /* Must delete the filter */
1227                                         STAILQ_REMOVE(&vnic->filter, filter,
1228                                                       bnxt_filter_info, next);
1229                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1230                                         STAILQ_INSERT_TAIL(
1231                                                         &bp->free_filter_list,
1232                                                         filter, next);
1233
1234                                         /*
1235                                          * Need to examine to see if the MAC
1236                                          * filter already existed or not before
1237                                          * allocating a new one
1238                                          */
1239
1240                                         new_filter = bnxt_alloc_filter(bp);
1241                                         if (!new_filter) {
1242                                                 RTE_LOG(ERR, PMD,
1243                                                         "MAC/VLAN filter alloc failed\n");
1244                                                 rc = -ENOMEM;
1245                                                 goto exit;
1246                                         }
1247                                         STAILQ_INSERT_TAIL(&vnic->filter,
1248                                                            new_filter, next);
1249                                         /* Inherit MAC from previous filter */
1250                                         new_filter->mac_index =
1251                                                         filter->mac_index;
1252                                         memcpy(new_filter->l2_addr,
1253                                                filter->l2_addr, ETHER_ADDR_LEN);
1254                                         /* MAC only filter */
1255                                         rc = bnxt_hwrm_set_l2_filter(bp,
1256                                                         vnic->fw_vnic_id,
1257                                                         new_filter);
1258                                         if (rc)
1259                                                 goto exit;
1260                                         RTE_LOG(INFO, PMD,
1261                                                 "Del Vlan filter for %d\n",
1262                                                 vlan_id);
1263                                 }
1264                                 filter = temp_filter;
1265                         }
1266                 }
1267         }
1268 exit:
1269         return rc;
1270 }
1271
1272 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1273 {
1274         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1275         struct bnxt_vnic_info *vnic;
1276         unsigned int i;
1277         int rc = 0;
1278         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1279                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1280         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1281
1282         /* Cycle through all VNICs */
1283         for (i = 0; i < bp->nr_vnics; i++) {
1284                 /*
1285                  * For each VNIC and each associated filter(s)
1286                  * if VLAN exists:
1287                  *   if VLAN matches vlan_id
1288                  *      VLAN filter already exists, just skip and continue
1289                  *   else
1290                  *      add a new MAC+VLAN filter
1291                  * else
1292                  *   Remove the old MAC only filter
1293                  *    Add a new MAC+VLAN filter
1294                  */
1295                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1296                         filter = STAILQ_FIRST(&vnic->filter);
1297                         while (filter) {
1298                                 temp_filter = STAILQ_NEXT(filter, next);
1299
1300                                 if (filter->enables & chk) {
1301                                         if (filter->l2_ovlan == vlan_id)
1302                                                 goto cont;
1303                                 } else {
1304                                         /* Must delete the MAC filter */
1305                                         STAILQ_REMOVE(&vnic->filter, filter,
1306                                                       bnxt_filter_info, next);
1307                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1308                                         filter->l2_ovlan = 0;
1309                                         STAILQ_INSERT_TAIL(
1310                                                         &bp->free_filter_list,
1311                                                         filter, next);
1312                                 }
1313                                 new_filter = bnxt_alloc_filter(bp);
1314                                 if (!new_filter) {
1315                                         RTE_LOG(ERR, PMD,
1316                                                 "MAC/VLAN filter alloc failed\n");
1317                                         rc = -ENOMEM;
1318                                         goto exit;
1319                                 }
1320                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1321                                                    next);
1322                                 /* Inherit MAC from the previous filter */
1323                                 new_filter->mac_index = filter->mac_index;
1324                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1325                                        ETHER_ADDR_LEN);
1326                                 /* MAC + VLAN ID filter */
1327                                 new_filter->l2_ovlan = vlan_id;
1328                                 new_filter->l2_ovlan_mask = 0xF000;
1329                                 new_filter->enables |= en;
1330                                 rc = bnxt_hwrm_set_l2_filter(bp,
1331                                                              vnic->fw_vnic_id,
1332                                                              new_filter);
1333                                 if (rc)
1334                                         goto exit;
1335                                 RTE_LOG(INFO, PMD,
1336                                         "Added Vlan filter for %d\n", vlan_id);
1337 cont:
1338                                 filter = temp_filter;
1339                         }
1340                 }
1341         }
1342 exit:
1343         return rc;
1344 }
1345
1346 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1347                                    uint16_t vlan_id, int on)
1348 {
1349         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1350
1351         /* These operations apply to ALL existing MAC/VLAN filters */
1352         if (on)
1353                 return bnxt_add_vlan_filter(bp, vlan_id);
1354         else
1355                 return bnxt_del_vlan_filter(bp, vlan_id);
1356 }
1357
1358 static int
1359 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1360 {
1361         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1362         unsigned int i;
1363
1364         if (mask & ETH_VLAN_FILTER_MASK) {
1365                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1366                         /* Remove any VLAN filters programmed */
1367                         for (i = 0; i < 4095; i++)
1368                                 bnxt_del_vlan_filter(bp, i);
1369                 }
1370                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1371                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1372         }
1373
1374         if (mask & ETH_VLAN_STRIP_MASK) {
1375                 /* Enable or disable VLAN stripping */
1376                 for (i = 0; i < bp->nr_vnics; i++) {
1377                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1378                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1379                                 vnic->vlan_strip = true;
1380                         else
1381                                 vnic->vlan_strip = false;
1382                         bnxt_hwrm_vnic_cfg(bp, vnic);
1383                 }
1384                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1385                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1386         }
1387
1388         if (mask & ETH_VLAN_EXTEND_MASK)
1389                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1390
1391         return 0;
1392 }
1393
1394 static void
1395 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1396 {
1397         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1398         /* Default Filter is tied to VNIC 0 */
1399         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1400         struct bnxt_filter_info *filter;
1401         int rc;
1402
1403         if (BNXT_VF(bp))
1404                 return;
1405
1406         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1407         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1408
1409         STAILQ_FOREACH(filter, &vnic->filter, next) {
1410                 /* Default Filter is at Index 0 */
1411                 if (filter->mac_index != 0)
1412                         continue;
1413                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1414                 if (rc)
1415                         break;
1416                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1417                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1418                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1419                 filter->enables |=
1420                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1421                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1422                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1423                 if (rc)
1424                         break;
1425                 filter->mac_index = 0;
1426                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1427         }
1428 }
1429
1430 static int
1431 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1432                           struct ether_addr *mc_addr_set,
1433                           uint32_t nb_mc_addr)
1434 {
1435         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1436         char *mc_addr_list = (char *)mc_addr_set;
1437         struct bnxt_vnic_info *vnic;
1438         uint32_t off = 0, i = 0;
1439
1440         vnic = &bp->vnic_info[0];
1441
1442         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1443                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1444                 goto allmulti;
1445         }
1446
1447         /* TODO Check for Duplicate mcast addresses */
1448         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1449         for (i = 0; i < nb_mc_addr; i++) {
1450                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1451                 off += ETHER_ADDR_LEN;
1452         }
1453
1454         vnic->mc_addr_cnt = i;
1455
1456 allmulti:
1457         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1458 }
1459
1460 static int
1461 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1462 {
1463         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1464         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1465         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1466         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1467         int ret;
1468
1469         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1470                         fw_major, fw_minor, fw_updt);
1471
1472         ret += 1; /* add the size of '\0' */
1473         if (fw_size < (uint32_t)ret)
1474                 return ret;
1475         else
1476                 return 0;
1477 }
1478
1479 static void
1480 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1481         struct rte_eth_rxq_info *qinfo)
1482 {
1483         struct bnxt_rx_queue *rxq;
1484
1485         rxq = dev->data->rx_queues[queue_id];
1486
1487         qinfo->mp = rxq->mb_pool;
1488         qinfo->scattered_rx = dev->data->scattered_rx;
1489         qinfo->nb_desc = rxq->nb_rx_desc;
1490
1491         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1492         qinfo->conf.rx_drop_en = 0;
1493         qinfo->conf.rx_deferred_start = 0;
1494 }
1495
1496 static void
1497 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1498         struct rte_eth_txq_info *qinfo)
1499 {
1500         struct bnxt_tx_queue *txq;
1501
1502         txq = dev->data->tx_queues[queue_id];
1503
1504         qinfo->nb_desc = txq->nb_tx_desc;
1505
1506         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1507         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1508         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1509
1510         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1511         qinfo->conf.tx_rs_thresh = 0;
1512         qinfo->conf.txq_flags = txq->txq_flags;
1513         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1514 }
1515
1516 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1517 {
1518         struct bnxt *bp = eth_dev->data->dev_private;
1519         struct rte_eth_dev_info dev_info;
1520         uint32_t max_dev_mtu;
1521         uint32_t rc = 0;
1522         uint32_t i;
1523
1524         bnxt_dev_info_get_op(eth_dev, &dev_info);
1525         max_dev_mtu = dev_info.max_rx_pktlen -
1526                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1527
1528         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1529                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1530                         ETHER_MIN_MTU, max_dev_mtu);
1531                 return -EINVAL;
1532         }
1533
1534
1535         if (new_mtu > ETHER_MTU) {
1536                 bp->flags |= BNXT_FLAG_JUMBO;
1537                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1538         } else {
1539                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1540                 bp->flags &= ~BNXT_FLAG_JUMBO;
1541         }
1542
1543         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1544                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1545
1546         eth_dev->data->mtu = new_mtu;
1547         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1548
1549         for (i = 0; i < bp->nr_vnics; i++) {
1550                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1551
1552                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1553                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1554                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1555                 if (rc)
1556                         break;
1557
1558                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1559                 if (rc)
1560                         return rc;
1561         }
1562
1563         return rc;
1564 }
1565
1566 static int
1567 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1568 {
1569         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1570         uint16_t vlan = bp->vlan;
1571         int rc;
1572
1573         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1574                 RTE_LOG(ERR, PMD,
1575                         "PVID cannot be modified for this function\n");
1576                 return -ENOTSUP;
1577         }
1578         bp->vlan = on ? pvid : 0;
1579
1580         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1581         if (rc)
1582                 bp->vlan = vlan;
1583         return rc;
1584 }
1585
1586 static int
1587 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1588 {
1589         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1590
1591         return bnxt_hwrm_port_led_cfg(bp, true);
1592 }
1593
1594 static int
1595 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1596 {
1597         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1598
1599         return bnxt_hwrm_port_led_cfg(bp, false);
1600 }
1601
1602 static uint32_t
1603 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1604 {
1605         uint32_t desc = 0, raw_cons = 0, cons;
1606         struct bnxt_cp_ring_info *cpr;
1607         struct bnxt_rx_queue *rxq;
1608         struct rx_pkt_cmpl *rxcmp;
1609         uint16_t cmp_type;
1610         uint8_t cmp = 1;
1611         bool valid;
1612
1613         rxq = dev->data->rx_queues[rx_queue_id];
1614         cpr = rxq->cp_ring;
1615         valid = cpr->valid;
1616
1617         while (raw_cons < rxq->nb_rx_desc) {
1618                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1619                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1620
1621                 if (!CMPL_VALID(rxcmp, valid))
1622                         goto nothing_to_do;
1623                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1624                 cmp_type = CMP_TYPE(rxcmp);
1625                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1626                         cmp = (rte_le_to_cpu_32(
1627                                         ((struct rx_tpa_end_cmpl *)
1628                                          (rxcmp))->agg_bufs_v1) &
1629                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1630                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1631                         desc++;
1632                 } else if (cmp_type == 0x11) {
1633                         desc++;
1634                         cmp = (rxcmp->agg_bufs_v1 &
1635                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1636                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1637                 } else {
1638                         cmp = 1;
1639                 }
1640 nothing_to_do:
1641                 raw_cons += cmp ? cmp : 2;
1642         }
1643
1644         return desc;
1645 }
1646
1647 static int
1648 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1649 {
1650         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1651         struct bnxt_rx_ring_info *rxr;
1652         struct bnxt_cp_ring_info *cpr;
1653         struct bnxt_sw_rx_bd *rx_buf;
1654         struct rx_pkt_cmpl *rxcmp;
1655         uint32_t cons, cp_cons;
1656
1657         if (!rxq)
1658                 return -EINVAL;
1659
1660         cpr = rxq->cp_ring;
1661         rxr = rxq->rx_ring;
1662
1663         if (offset >= rxq->nb_rx_desc)
1664                 return -EINVAL;
1665
1666         cons = RING_CMP(cpr->cp_ring_struct, offset);
1667         cp_cons = cpr->cp_raw_cons;
1668         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1669
1670         if (cons > cp_cons) {
1671                 if (CMPL_VALID(rxcmp, cpr->valid))
1672                         return RTE_ETH_RX_DESC_DONE;
1673         } else {
1674                 if (CMPL_VALID(rxcmp, !cpr->valid))
1675                         return RTE_ETH_RX_DESC_DONE;
1676         }
1677         rx_buf = &rxr->rx_buf_ring[cons];
1678         if (rx_buf->mbuf == NULL)
1679                 return RTE_ETH_RX_DESC_UNAVAIL;
1680
1681
1682         return RTE_ETH_RX_DESC_AVAIL;
1683 }
1684
1685 static int
1686 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1687 {
1688         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1689         struct bnxt_tx_ring_info *txr;
1690         struct bnxt_cp_ring_info *cpr;
1691         struct bnxt_sw_tx_bd *tx_buf;
1692         struct tx_pkt_cmpl *txcmp;
1693         uint32_t cons, cp_cons;
1694
1695         if (!txq)
1696                 return -EINVAL;
1697
1698         cpr = txq->cp_ring;
1699         txr = txq->tx_ring;
1700
1701         if (offset >= txq->nb_tx_desc)
1702                 return -EINVAL;
1703
1704         cons = RING_CMP(cpr->cp_ring_struct, offset);
1705         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1706         cp_cons = cpr->cp_raw_cons;
1707
1708         if (cons > cp_cons) {
1709                 if (CMPL_VALID(txcmp, cpr->valid))
1710                         return RTE_ETH_TX_DESC_UNAVAIL;
1711         } else {
1712                 if (CMPL_VALID(txcmp, !cpr->valid))
1713                         return RTE_ETH_TX_DESC_UNAVAIL;
1714         }
1715         tx_buf = &txr->tx_buf_ring[cons];
1716         if (tx_buf->mbuf == NULL)
1717                 return RTE_ETH_TX_DESC_DONE;
1718
1719         return RTE_ETH_TX_DESC_FULL;
1720 }
1721
1722 static struct bnxt_filter_info *
1723 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1724                                 struct rte_eth_ethertype_filter *efilter,
1725                                 struct bnxt_vnic_info *vnic0,
1726                                 struct bnxt_vnic_info *vnic,
1727                                 int *ret)
1728 {
1729         struct bnxt_filter_info *mfilter = NULL;
1730         int match = 0;
1731         *ret = 0;
1732
1733         if (efilter->ether_type != ETHER_TYPE_IPv4 &&
1734                 efilter->ether_type != ETHER_TYPE_IPv6) {
1735                 RTE_LOG(ERR, PMD, "unsupported ether_type(0x%04x) in"
1736                         " ethertype filter.", efilter->ether_type);
1737                 *ret = -EINVAL;
1738                 goto exit;
1739         }
1740         if (efilter->queue >= bp->rx_nr_rings) {
1741                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1742                 *ret = -EINVAL;
1743                 goto exit;
1744         }
1745
1746         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1747         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1748         if (vnic == NULL) {
1749                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1750                 *ret = -EINVAL;
1751                 goto exit;
1752         }
1753
1754         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1755                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1756                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1757                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1758                              mfilter->flags ==
1759                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1760                              mfilter->ethertype == efilter->ether_type)) {
1761                                 match = 1;
1762                                 break;
1763                         }
1764                 }
1765         } else {
1766                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1767                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1768                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1769                              mfilter->ethertype == efilter->ether_type &&
1770                              mfilter->flags ==
1771                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1772                                 match = 1;
1773                                 break;
1774                         }
1775         }
1776
1777         if (match)
1778                 *ret = -EEXIST;
1779
1780 exit:
1781         return mfilter;
1782 }
1783
1784 static int
1785 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1786                         enum rte_filter_op filter_op,
1787                         void *arg)
1788 {
1789         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1790         struct rte_eth_ethertype_filter *efilter =
1791                         (struct rte_eth_ethertype_filter *)arg;
1792         struct bnxt_filter_info *bfilter, *filter1;
1793         struct bnxt_vnic_info *vnic, *vnic0;
1794         int ret;
1795
1796         if (filter_op == RTE_ETH_FILTER_NOP)
1797                 return 0;
1798
1799         if (arg == NULL) {
1800                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1801                             filter_op);
1802                 return -EINVAL;
1803         }
1804
1805         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1806         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1807
1808         switch (filter_op) {
1809         case RTE_ETH_FILTER_ADD:
1810                 bnxt_match_and_validate_ether_filter(bp, efilter,
1811                                                         vnic0, vnic, &ret);
1812                 if (ret < 0)
1813                         return ret;
1814
1815                 bfilter = bnxt_get_unused_filter(bp);
1816                 if (bfilter == NULL) {
1817                         RTE_LOG(ERR, PMD,
1818                                 "Not enough resources for a new filter.\n");
1819                         return -ENOMEM;
1820                 }
1821                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1822                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1823                        ETHER_ADDR_LEN);
1824                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1825                        ETHER_ADDR_LEN);
1826                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1827                 bfilter->ethertype = efilter->ether_type;
1828                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1829
1830                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1831                 if (filter1 == NULL) {
1832                         ret = -1;
1833                         goto cleanup;
1834                 }
1835                 bfilter->enables |=
1836                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1837                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1838
1839                 bfilter->dst_id = vnic->fw_vnic_id;
1840
1841                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1842                         bfilter->flags =
1843                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1844                 }
1845
1846                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1847                 if (ret)
1848                         goto cleanup;
1849                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1850                 break;
1851         case RTE_ETH_FILTER_DELETE:
1852                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1853                                                         vnic0, vnic, &ret);
1854                 if (ret == -EEXIST) {
1855                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1856
1857                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1858                                       next);
1859                         bnxt_free_filter(bp, filter1);
1860                 } else if (ret == 0) {
1861                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1862                 }
1863                 break;
1864         default:
1865                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1866                 ret = -EINVAL;
1867                 goto error;
1868         }
1869         return ret;
1870 cleanup:
1871         bnxt_free_filter(bp, bfilter);
1872 error:
1873         return ret;
1874 }
1875
1876 static inline int
1877 parse_ntuple_filter(struct bnxt *bp,
1878                     struct rte_eth_ntuple_filter *nfilter,
1879                     struct bnxt_filter_info *bfilter)
1880 {
1881         uint32_t en = 0;
1882
1883         if (nfilter->queue >= bp->rx_nr_rings) {
1884                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", nfilter->queue);
1885                 return -EINVAL;
1886         }
1887
1888         switch (nfilter->dst_port_mask) {
1889         case UINT16_MAX:
1890                 bfilter->dst_port_mask = -1;
1891                 bfilter->dst_port = nfilter->dst_port;
1892                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1893                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1894                 break;
1895         default:
1896                 RTE_LOG(ERR, PMD, "invalid dst_port mask.");
1897                 return -EINVAL;
1898         }
1899
1900         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1901         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1902
1903         switch (nfilter->proto_mask) {
1904         case UINT8_MAX:
1905                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1906                         bfilter->ip_protocol = 17;
1907                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1908                         bfilter->ip_protocol = 6;
1909                 else
1910                         return -EINVAL;
1911                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1912                 break;
1913         default:
1914                 RTE_LOG(ERR, PMD, "invalid protocol mask.");
1915                 return -EINVAL;
1916         }
1917
1918         switch (nfilter->dst_ip_mask) {
1919         case UINT32_MAX:
1920                 bfilter->dst_ipaddr_mask[0] = -1;
1921                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1922                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1923                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1924                 break;
1925         default:
1926                 RTE_LOG(ERR, PMD, "invalid dst_ip mask.");
1927                 return -EINVAL;
1928         }
1929
1930         switch (nfilter->src_ip_mask) {
1931         case UINT32_MAX:
1932                 bfilter->src_ipaddr_mask[0] = -1;
1933                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1934                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1935                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1936                 break;
1937         default:
1938                 RTE_LOG(ERR, PMD, "invalid src_ip mask.");
1939                 return -EINVAL;
1940         }
1941
1942         switch (nfilter->src_port_mask) {
1943         case UINT16_MAX:
1944                 bfilter->src_port_mask = -1;
1945                 bfilter->src_port = nfilter->src_port;
1946                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1947                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1948                 break;
1949         default:
1950                 RTE_LOG(ERR, PMD, "invalid src_port mask.");
1951                 return -EINVAL;
1952         }
1953
1954         //TODO Priority
1955         //nfilter->priority = (uint8_t)filter->priority;
1956
1957         bfilter->enables = en;
1958         return 0;
1959 }
1960
1961 static struct bnxt_filter_info*
1962 bnxt_match_ntuple_filter(struct bnxt *bp,
1963                          struct bnxt_filter_info *bfilter)
1964 {
1965         struct bnxt_filter_info *mfilter = NULL;
1966         int i;
1967
1968         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1969                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1970                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1971                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1972                             bfilter->src_ipaddr_mask[0] ==
1973                             mfilter->src_ipaddr_mask[0] &&
1974                             bfilter->src_port == mfilter->src_port &&
1975                             bfilter->src_port_mask == mfilter->src_port_mask &&
1976                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1977                             bfilter->dst_ipaddr_mask[0] ==
1978                             mfilter->dst_ipaddr_mask[0] &&
1979                             bfilter->dst_port == mfilter->dst_port &&
1980                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1981                             bfilter->flags == mfilter->flags &&
1982                             bfilter->enables == mfilter->enables)
1983                                 return mfilter;
1984                 }
1985         }
1986         return NULL;
1987 }
1988
1989 static int
1990 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1991                        struct rte_eth_ntuple_filter *nfilter,
1992                        enum rte_filter_op filter_op)
1993 {
1994         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
1995         struct bnxt_vnic_info *vnic, *vnic0;
1996         int ret;
1997
1998         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
1999                 RTE_LOG(ERR, PMD, "only 5tuple is supported.");
2000                 return -EINVAL;
2001         }
2002
2003         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2004                 RTE_LOG(ERR, PMD, "Ntuple filter: TCP flags not supported\n");
2005                 return -EINVAL;
2006         }
2007
2008         bfilter = bnxt_get_unused_filter(bp);
2009         if (bfilter == NULL) {
2010                 RTE_LOG(ERR, PMD,
2011                         "Not enough resources for a new filter.\n");
2012                 return -ENOMEM;
2013         }
2014         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2015         if (ret < 0)
2016                 goto free_filter;
2017
2018         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2019         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2020         filter1 = STAILQ_FIRST(&vnic0->filter);
2021         if (filter1 == NULL) {
2022                 ret = -1;
2023                 goto free_filter;
2024         }
2025
2026         bfilter->dst_id = vnic->fw_vnic_id;
2027         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2028         bfilter->enables |=
2029                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2030         bfilter->ethertype = 0x800;
2031         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2032
2033         mfilter = bnxt_match_ntuple_filter(bp, bfilter);
2034
2035         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2036                 RTE_LOG(ERR, PMD, "filter exists.");
2037                 ret = -EEXIST;
2038                 goto free_filter;
2039         }
2040         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2041                 RTE_LOG(ERR, PMD, "filter doesn't exist.");
2042                 ret = -ENOENT;
2043                 goto free_filter;
2044         }
2045
2046         if (filter_op == RTE_ETH_FILTER_ADD) {
2047                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2048                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2049                 if (ret)
2050                         goto free_filter;
2051                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2052         } else {
2053                 if (mfilter == NULL) {
2054                         /* This should not happen. But for Coverity! */
2055                         ret = -ENOENT;
2056                         goto free_filter;
2057                 }
2058                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2059
2060                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info,
2061                               next);
2062                 bnxt_free_filter(bp, mfilter);
2063                 bfilter->fw_l2_filter_id = -1;
2064                 bnxt_free_filter(bp, bfilter);
2065         }
2066
2067         return 0;
2068 free_filter:
2069         bfilter->fw_l2_filter_id = -1;
2070         bnxt_free_filter(bp, bfilter);
2071         return ret;
2072 }
2073
2074 static int
2075 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2076                         enum rte_filter_op filter_op,
2077                         void *arg)
2078 {
2079         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2080         int ret;
2081
2082         if (filter_op == RTE_ETH_FILTER_NOP)
2083                 return 0;
2084
2085         if (arg == NULL) {
2086                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
2087                             filter_op);
2088                 return -EINVAL;
2089         }
2090
2091         switch (filter_op) {
2092         case RTE_ETH_FILTER_ADD:
2093                 ret = bnxt_cfg_ntuple_filter(bp,
2094                         (struct rte_eth_ntuple_filter *)arg,
2095                         filter_op);
2096                 break;
2097         case RTE_ETH_FILTER_DELETE:
2098                 ret = bnxt_cfg_ntuple_filter(bp,
2099                         (struct rte_eth_ntuple_filter *)arg,
2100                         filter_op);
2101                 break;
2102         default:
2103                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
2104                 ret = -EINVAL;
2105                 break;
2106         }
2107         return ret;
2108 }
2109
2110 static int
2111 bnxt_parse_fdir_filter(struct bnxt *bp,
2112                        struct rte_eth_fdir_filter *fdir,
2113                        struct bnxt_filter_info *filter)
2114 {
2115         enum rte_fdir_mode fdir_mode =
2116                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2117         struct bnxt_vnic_info *vnic0, *vnic;
2118         struct bnxt_filter_info *filter1;
2119         uint32_t en = 0;
2120         int i;
2121
2122         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2123                 return -EINVAL;
2124
2125         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2126         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2127
2128         switch (fdir->input.flow_type) {
2129         case RTE_ETH_FLOW_IPV4:
2130         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2131                 /* FALLTHROUGH */
2132                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2133                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2134                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2135                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2136                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2137                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2138                 filter->ip_addr_type =
2139                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2140                 filter->src_ipaddr_mask[0] = 0xffffffff;
2141                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2142                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2143                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2144                 filter->ethertype = 0x800;
2145                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2146                 break;
2147         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2148                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2149                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2150                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2151                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2152                 filter->dst_port_mask = 0xffff;
2153                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2154                 filter->src_port_mask = 0xffff;
2155                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2156                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2157                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2158                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2159                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2160                 filter->ip_protocol = 6;
2161                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2162                 filter->ip_addr_type =
2163                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2164                 filter->src_ipaddr_mask[0] = 0xffffffff;
2165                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2166                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2167                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2168                 filter->ethertype = 0x800;
2169                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2170                 break;
2171         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2172                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2173                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2174                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2175                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2176                 filter->dst_port_mask = 0xffff;
2177                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2178                 filter->src_port_mask = 0xffff;
2179                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2180                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2181                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2182                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2183                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2184                 filter->ip_protocol = 17;
2185                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2186                 filter->ip_addr_type =
2187                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2188                 filter->src_ipaddr_mask[0] = 0xffffffff;
2189                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2190                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2191                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2192                 filter->ethertype = 0x800;
2193                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2194                 break;
2195         case RTE_ETH_FLOW_IPV6:
2196         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2197                 /* FALLTHROUGH */
2198                 filter->ip_addr_type =
2199                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2200                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2201                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2202                 rte_memcpy(filter->src_ipaddr,
2203                            fdir->input.flow.ipv6_flow.src_ip, 16);
2204                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2205                 rte_memcpy(filter->dst_ipaddr,
2206                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2207                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2208                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2209                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2210                 memset(filter->src_ipaddr_mask, 0xff, 16);
2211                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2212                 filter->ethertype = 0x86dd;
2213                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2214                 break;
2215         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2216                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2217                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2218                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2219                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2220                 filter->dst_port_mask = 0xffff;
2221                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2222                 filter->src_port_mask = 0xffff;
2223                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2224                 filter->ip_addr_type =
2225                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2226                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2227                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2228                 rte_memcpy(filter->src_ipaddr,
2229                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2230                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2231                 rte_memcpy(filter->dst_ipaddr,
2232                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2233                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2234                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2235                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2236                 memset(filter->src_ipaddr_mask, 0xff, 16);
2237                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2238                 filter->ethertype = 0x86dd;
2239                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2240                 break;
2241         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2242                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2243                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2244                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2245                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2246                 filter->dst_port_mask = 0xffff;
2247                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2248                 filter->src_port_mask = 0xffff;
2249                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2250                 filter->ip_addr_type =
2251                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2252                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2253                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2254                 rte_memcpy(filter->src_ipaddr,
2255                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2256                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2257                 rte_memcpy(filter->dst_ipaddr,
2258                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2259                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2260                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2261                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2262                 memset(filter->src_ipaddr_mask, 0xff, 16);
2263                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2264                 filter->ethertype = 0x86dd;
2265                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2266                 break;
2267         case RTE_ETH_FLOW_L2_PAYLOAD:
2268                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2269                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2270                 break;
2271         case RTE_ETH_FLOW_VXLAN:
2272                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2273                         return -EINVAL;
2274                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2275                 filter->tunnel_type =
2276                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2277                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2278                 break;
2279         case RTE_ETH_FLOW_NVGRE:
2280                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2281                         return -EINVAL;
2282                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2283                 filter->tunnel_type =
2284                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2285                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2286                 break;
2287         case RTE_ETH_FLOW_UNKNOWN:
2288         case RTE_ETH_FLOW_RAW:
2289         case RTE_ETH_FLOW_FRAG_IPV4:
2290         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2291         case RTE_ETH_FLOW_FRAG_IPV6:
2292         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2293         case RTE_ETH_FLOW_IPV6_EX:
2294         case RTE_ETH_FLOW_IPV6_TCP_EX:
2295         case RTE_ETH_FLOW_IPV6_UDP_EX:
2296         case RTE_ETH_FLOW_GENEVE:
2297                 /* FALLTHROUGH */
2298         default:
2299                 return -EINVAL;
2300         }
2301
2302         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2303         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2304         if (vnic == NULL) {
2305                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", fdir->action.rx_queue);
2306                 return -EINVAL;
2307         }
2308
2309
2310         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2311                 rte_memcpy(filter->dst_macaddr,
2312                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2313                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2314         }
2315
2316         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2317                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2318                 filter1 = STAILQ_FIRST(&vnic0->filter);
2319                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2320         } else {
2321                 filter->dst_id = vnic->fw_vnic_id;
2322                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2323                         if (filter->dst_macaddr[i] == 0x00)
2324                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2325                         else
2326                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2327         }
2328
2329         if (filter1 == NULL)
2330                 return -EINVAL;
2331
2332         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2333         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2334
2335         filter->enables = en;
2336
2337         return 0;
2338 }
2339
2340 static struct bnxt_filter_info *
2341 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf)
2342 {
2343         struct bnxt_filter_info *mf = NULL;
2344         int i;
2345
2346         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2347                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2348
2349                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2350                         if (mf->filter_type == nf->filter_type &&
2351                             mf->flags == nf->flags &&
2352                             mf->src_port == nf->src_port &&
2353                             mf->src_port_mask == nf->src_port_mask &&
2354                             mf->dst_port == nf->dst_port &&
2355                             mf->dst_port_mask == nf->dst_port_mask &&
2356                             mf->ip_protocol == nf->ip_protocol &&
2357                             mf->ip_addr_type == nf->ip_addr_type &&
2358                             mf->ethertype == nf->ethertype &&
2359                             mf->vni == nf->vni &&
2360                             mf->tunnel_type == nf->tunnel_type &&
2361                             mf->l2_ovlan == nf->l2_ovlan &&
2362                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2363                             mf->l2_ivlan == nf->l2_ivlan &&
2364                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2365                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2366                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2367                                     ETHER_ADDR_LEN) &&
2368                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2369                                     ETHER_ADDR_LEN) &&
2370                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2371                                     ETHER_ADDR_LEN) &&
2372                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2373                                     sizeof(nf->src_ipaddr)) &&
2374                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2375                                     sizeof(nf->src_ipaddr_mask)) &&
2376                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2377                                     sizeof(nf->dst_ipaddr)) &&
2378                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2379                                     sizeof(nf->dst_ipaddr_mask)))
2380                                 return mf;
2381                 }
2382         }
2383         return NULL;
2384 }
2385
2386 static int
2387 bnxt_fdir_filter(struct rte_eth_dev *dev,
2388                  enum rte_filter_op filter_op,
2389                  void *arg)
2390 {
2391         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2392         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2393         struct bnxt_filter_info *filter, *match;
2394         struct bnxt_vnic_info *vnic;
2395         int ret = 0, i;
2396
2397         if (filter_op == RTE_ETH_FILTER_NOP)
2398                 return 0;
2399
2400         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2401                 return -EINVAL;
2402
2403         switch (filter_op) {
2404         case RTE_ETH_FILTER_ADD:
2405         case RTE_ETH_FILTER_DELETE:
2406                 /* FALLTHROUGH */
2407                 filter = bnxt_get_unused_filter(bp);
2408                 if (filter == NULL) {
2409                         RTE_LOG(ERR, PMD,
2410                                 "Not enough resources for a new flow.\n");
2411                         return -ENOMEM;
2412                 }
2413
2414                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2415                 if (ret != 0)
2416                         goto free_filter;
2417                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2418
2419                 match = bnxt_match_fdir(bp, filter);
2420                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2421                         RTE_LOG(ERR, PMD, "Flow already exists.\n");
2422                         ret = -EEXIST;
2423                         goto free_filter;
2424                 }
2425                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2426                         RTE_LOG(ERR, PMD, "Flow does not exist.\n");
2427                         ret = -ENOENT;
2428                         goto free_filter;
2429                 }
2430
2431                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2432                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2433                 else
2434                         vnic =
2435                         STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2436
2437                 if (filter_op == RTE_ETH_FILTER_ADD) {
2438                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2439                                                           filter->dst_id,
2440                                                           filter);
2441                         if (ret)
2442                                 goto free_filter;
2443                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2444                 } else {
2445                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2446                         STAILQ_REMOVE(&vnic->filter, match,
2447                                       bnxt_filter_info, next);
2448                         bnxt_free_filter(bp, match);
2449                         filter->fw_l2_filter_id = -1;
2450                         bnxt_free_filter(bp, filter);
2451                 }
2452                 break;
2453         case RTE_ETH_FILTER_FLUSH:
2454                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2455                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2456
2457                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2458                                 if (filter->filter_type ==
2459                                     HWRM_CFA_NTUPLE_FILTER) {
2460                                         ret =
2461                                         bnxt_hwrm_clear_ntuple_filter(bp,
2462                                                                       filter);
2463                                         STAILQ_REMOVE(&vnic->filter, filter,
2464                                                       bnxt_filter_info, next);
2465                                 }
2466                         }
2467                 }
2468                 return ret;
2469         case RTE_ETH_FILTER_UPDATE:
2470         case RTE_ETH_FILTER_STATS:
2471         case RTE_ETH_FILTER_INFO:
2472                 /* FALLTHROUGH */
2473                 RTE_LOG(ERR, PMD, "operation %u not implemented", filter_op);
2474                 break;
2475         default:
2476                 RTE_LOG(ERR, PMD, "unknown operation %u", filter_op);
2477                 ret = -EINVAL;
2478                 break;
2479         }
2480         return ret;
2481
2482 free_filter:
2483         filter->fw_l2_filter_id = -1;
2484         bnxt_free_filter(bp, filter);
2485         return ret;
2486 }
2487
2488 static int
2489 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2490                     enum rte_filter_type filter_type,
2491                     enum rte_filter_op filter_op, void *arg)
2492 {
2493         int ret = 0;
2494
2495         switch (filter_type) {
2496         case RTE_ETH_FILTER_TUNNEL:
2497                 RTE_LOG(ERR, PMD,
2498                         "filter type: %d: To be implemented\n", filter_type);
2499                 break;
2500         case RTE_ETH_FILTER_FDIR:
2501                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2502                 break;
2503         case RTE_ETH_FILTER_NTUPLE:
2504                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2505                 break;
2506         case RTE_ETH_FILTER_ETHERTYPE:
2507                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2508                 break;
2509         case RTE_ETH_FILTER_GENERIC:
2510                 if (filter_op != RTE_ETH_FILTER_GET)
2511                         return -EINVAL;
2512                 *(const void **)arg = &bnxt_flow_ops;
2513                 break;
2514         default:
2515                 RTE_LOG(ERR, PMD,
2516                         "Filter type (%d) not supported", filter_type);
2517                 ret = -EINVAL;
2518                 break;
2519         }
2520         return ret;
2521 }
2522
2523 static const uint32_t *
2524 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2525 {
2526         static const uint32_t ptypes[] = {
2527                 RTE_PTYPE_L2_ETHER_VLAN,
2528                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2529                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2530                 RTE_PTYPE_L4_ICMP,
2531                 RTE_PTYPE_L4_TCP,
2532                 RTE_PTYPE_L4_UDP,
2533                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2534                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2535                 RTE_PTYPE_INNER_L4_ICMP,
2536                 RTE_PTYPE_INNER_L4_TCP,
2537                 RTE_PTYPE_INNER_L4_UDP,
2538                 RTE_PTYPE_UNKNOWN
2539         };
2540
2541         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2542                 return ptypes;
2543         return NULL;
2544 }
2545
2546 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2547                          int reg_win)
2548 {
2549         uint32_t reg_base = *reg_arr & 0xfffff000;
2550         uint32_t win_off;
2551         int i;
2552
2553         for (i = 0; i < count; i++) {
2554                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2555                         return -ERANGE;
2556         }
2557         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2558         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2559         return 0;
2560 }
2561
2562 static int bnxt_map_ptp_regs(struct bnxt *bp)
2563 {
2564         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2565         uint32_t *reg_arr;
2566         int rc, i;
2567
2568         reg_arr = ptp->rx_regs;
2569         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2570         if (rc)
2571                 return rc;
2572
2573         reg_arr = ptp->tx_regs;
2574         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2575         if (rc)
2576                 return rc;
2577
2578         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2579                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2580
2581         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2582                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2583
2584         return 0;
2585 }
2586
2587 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2588 {
2589         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2590                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2591         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2592                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2593 }
2594
2595 static uint64_t bnxt_cc_read(struct bnxt *bp)
2596 {
2597         uint64_t ns;
2598
2599         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2600                               BNXT_GRCPF_REG_SYNC_TIME));
2601         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2602                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2603         return ns;
2604 }
2605
2606 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2607 {
2608         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2609         uint32_t fifo;
2610
2611         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2612                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2613         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2614                 return -EAGAIN;
2615
2616         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2617                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2618         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2619                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2620         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2621                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2622
2623         return 0;
2624 }
2625
2626 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2627 {
2628         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2629         struct bnxt_pf_info *pf = &bp->pf;
2630         uint16_t port_id;
2631         uint32_t fifo;
2632
2633         if (!ptp)
2634                 return -ENODEV;
2635
2636         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2637                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2638         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2639                 return -EAGAIN;
2640
2641         port_id = pf->port_id;
2642         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2643                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2644
2645         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2646                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2647         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2648 /*              bnxt_clr_rx_ts(bp);       TBD  */
2649                 return -EBUSY;
2650         }
2651
2652         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2653                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2654         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2655                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2656
2657         return 0;
2658 }
2659
2660 static int
2661 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2662 {
2663         uint64_t ns;
2664         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2665         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2666
2667         if (!ptp)
2668                 return 0;
2669
2670         ns = rte_timespec_to_ns(ts);
2671         /* Set the timecounters to a new value. */
2672         ptp->tc.nsec = ns;
2673
2674         return 0;
2675 }
2676
2677 static int
2678 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2679 {
2680         uint64_t ns, systime_cycles;
2681         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2682         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2683
2684         if (!ptp)
2685                 return 0;
2686
2687         systime_cycles = bnxt_cc_read(bp);
2688         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2689         *ts = rte_ns_to_timespec(ns);
2690
2691         return 0;
2692 }
2693 static int
2694 bnxt_timesync_enable(struct rte_eth_dev *dev)
2695 {
2696         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2697         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2698         uint32_t shift = 0;
2699
2700         if (!ptp)
2701                 return 0;
2702
2703         ptp->rx_filter = 1;
2704         ptp->tx_tstamp_en = 1;
2705         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2706
2707         if (!bnxt_hwrm_ptp_cfg(bp))
2708                 bnxt_map_ptp_regs(bp);
2709
2710         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2711         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2712         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2713
2714         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2715         ptp->tc.cc_shift = shift;
2716         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2717
2718         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2719         ptp->rx_tstamp_tc.cc_shift = shift;
2720         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2721
2722         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2723         ptp->tx_tstamp_tc.cc_shift = shift;
2724         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2725
2726         return 0;
2727 }
2728
2729 static int
2730 bnxt_timesync_disable(struct rte_eth_dev *dev)
2731 {
2732         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2733         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2734
2735         if (!ptp)
2736                 return 0;
2737
2738         ptp->rx_filter = 0;
2739         ptp->tx_tstamp_en = 0;
2740         ptp->rxctl = 0;
2741
2742         bnxt_hwrm_ptp_cfg(bp);
2743
2744         bnxt_unmap_ptp_regs(bp);
2745
2746         return 0;
2747 }
2748
2749 static int
2750 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2751                                  struct timespec *timestamp,
2752                                  uint32_t flags __rte_unused)
2753 {
2754         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2755         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2756         uint64_t rx_tstamp_cycles = 0;
2757         uint64_t ns;
2758
2759         if (!ptp)
2760                 return 0;
2761
2762         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2763         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2764         *timestamp = rte_ns_to_timespec(ns);
2765         return  0;
2766 }
2767
2768 static int
2769 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2770                                  struct timespec *timestamp)
2771 {
2772         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2773         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2774         uint64_t tx_tstamp_cycles = 0;
2775         uint64_t ns;
2776
2777         if (!ptp)
2778                 return 0;
2779
2780         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2781         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2782         *timestamp = rte_ns_to_timespec(ns);
2783
2784         return 0;
2785 }
2786
2787 static int
2788 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2789 {
2790         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2791         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2792
2793         if (!ptp)
2794                 return 0;
2795
2796         ptp->tc.nsec += delta;
2797
2798         return 0;
2799 }
2800
2801 static int
2802 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2803 {
2804         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2805         int rc;
2806         uint32_t dir_entries;
2807         uint32_t entry_length;
2808
2809         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
2810                 __func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
2811                 bp->pdev->addr.devid, bp->pdev->addr.function);
2812
2813         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2814         if (rc != 0)
2815                 return rc;
2816
2817         return dir_entries * entry_length;
2818 }
2819
2820 static int
2821 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2822                 struct rte_dev_eeprom_info *in_eeprom)
2823 {
2824         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2825         uint32_t index;
2826         uint32_t offset;
2827
2828         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2829                 "len = %d\n", __func__, bp->pdev->addr.domain,
2830                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2831                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2832
2833         if (in_eeprom->offset == 0) /* special offset value to get directory */
2834                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2835                                                 in_eeprom->data);
2836
2837         index = in_eeprom->offset >> 24;
2838         offset = in_eeprom->offset & 0xffffff;
2839
2840         if (index != 0)
2841                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2842                                            in_eeprom->length, in_eeprom->data);
2843
2844         return 0;
2845 }
2846
2847 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2848 {
2849         switch (dir_type) {
2850         case BNX_DIR_TYPE_CHIMP_PATCH:
2851         case BNX_DIR_TYPE_BOOTCODE:
2852         case BNX_DIR_TYPE_BOOTCODE_2:
2853         case BNX_DIR_TYPE_APE_FW:
2854         case BNX_DIR_TYPE_APE_PATCH:
2855         case BNX_DIR_TYPE_KONG_FW:
2856         case BNX_DIR_TYPE_KONG_PATCH:
2857         case BNX_DIR_TYPE_BONO_FW:
2858         case BNX_DIR_TYPE_BONO_PATCH:
2859                 return true;
2860         }
2861
2862         return false;
2863 }
2864
2865 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2866 {
2867         switch (dir_type) {
2868         case BNX_DIR_TYPE_AVS:
2869         case BNX_DIR_TYPE_EXP_ROM_MBA:
2870         case BNX_DIR_TYPE_PCIE:
2871         case BNX_DIR_TYPE_TSCF_UCODE:
2872         case BNX_DIR_TYPE_EXT_PHY:
2873         case BNX_DIR_TYPE_CCM:
2874         case BNX_DIR_TYPE_ISCSI_BOOT:
2875         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2876         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2877                 return true;
2878         }
2879
2880         return false;
2881 }
2882
2883 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2884 {
2885         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2886                 bnxt_dir_type_is_other_exec_format(dir_type);
2887 }
2888
2889 static int
2890 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2891                 struct rte_dev_eeprom_info *in_eeprom)
2892 {
2893         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2894         uint8_t index, dir_op;
2895         uint16_t type, ext, ordinal, attr;
2896
2897         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2898                 "len = %d\n", __func__, bp->pdev->addr.domain,
2899                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2900                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2901
2902         if (!BNXT_PF(bp)) {
2903                 RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
2904                 return -EINVAL;
2905         }
2906
2907         type = in_eeprom->magic >> 16;
2908
2909         if (type == 0xffff) { /* special value for directory operations */
2910                 index = in_eeprom->magic & 0xff;
2911                 dir_op = in_eeprom->magic >> 8;
2912                 if (index == 0)
2913                         return -EINVAL;
2914                 switch (dir_op) {
2915                 case 0x0e: /* erase */
2916                         if (in_eeprom->offset != ~in_eeprom->magic)
2917                                 return -EINVAL;
2918                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2919                 default:
2920                         return -EINVAL;
2921                 }
2922         }
2923
2924         /* Create or re-write an NVM item: */
2925         if (bnxt_dir_type_is_executable(type) == true)
2926                 return -EOPNOTSUPP;
2927         ext = in_eeprom->magic & 0xffff;
2928         ordinal = in_eeprom->offset >> 16;
2929         attr = in_eeprom->offset & 0xffff;
2930
2931         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2932                                      in_eeprom->data, in_eeprom->length);
2933         return 0;
2934 }
2935
2936 /*
2937  * Initialization
2938  */
2939
2940 static const struct eth_dev_ops bnxt_dev_ops = {
2941         .dev_infos_get = bnxt_dev_info_get_op,
2942         .dev_close = bnxt_dev_close_op,
2943         .dev_configure = bnxt_dev_configure_op,
2944         .dev_start = bnxt_dev_start_op,
2945         .dev_stop = bnxt_dev_stop_op,
2946         .dev_set_link_up = bnxt_dev_set_link_up_op,
2947         .dev_set_link_down = bnxt_dev_set_link_down_op,
2948         .stats_get = bnxt_stats_get_op,
2949         .stats_reset = bnxt_stats_reset_op,
2950         .rx_queue_setup = bnxt_rx_queue_setup_op,
2951         .rx_queue_release = bnxt_rx_queue_release_op,
2952         .tx_queue_setup = bnxt_tx_queue_setup_op,
2953         .tx_queue_release = bnxt_tx_queue_release_op,
2954         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2955         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2956         .reta_update = bnxt_reta_update_op,
2957         .reta_query = bnxt_reta_query_op,
2958         .rss_hash_update = bnxt_rss_hash_update_op,
2959         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2960         .link_update = bnxt_link_update_op,
2961         .promiscuous_enable = bnxt_promiscuous_enable_op,
2962         .promiscuous_disable = bnxt_promiscuous_disable_op,
2963         .allmulticast_enable = bnxt_allmulticast_enable_op,
2964         .allmulticast_disable = bnxt_allmulticast_disable_op,
2965         .mac_addr_add = bnxt_mac_addr_add_op,
2966         .mac_addr_remove = bnxt_mac_addr_remove_op,
2967         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2968         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2969         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2970         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2971         .vlan_filter_set = bnxt_vlan_filter_set_op,
2972         .vlan_offload_set = bnxt_vlan_offload_set_op,
2973         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2974         .mtu_set = bnxt_mtu_set_op,
2975         .mac_addr_set = bnxt_set_default_mac_addr_op,
2976         .xstats_get = bnxt_dev_xstats_get_op,
2977         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2978         .xstats_reset = bnxt_dev_xstats_reset_op,
2979         .fw_version_get = bnxt_fw_version_get,
2980         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2981         .rxq_info_get = bnxt_rxq_info_get_op,
2982         .txq_info_get = bnxt_txq_info_get_op,
2983         .dev_led_on = bnxt_dev_led_on_op,
2984         .dev_led_off = bnxt_dev_led_off_op,
2985         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
2986         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
2987         .rx_queue_count = bnxt_rx_queue_count_op,
2988         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
2989         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
2990         .filter_ctrl = bnxt_filter_ctrl_op,
2991         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
2992         .get_eeprom_length    = bnxt_get_eeprom_length_op,
2993         .get_eeprom           = bnxt_get_eeprom_op,
2994         .set_eeprom           = bnxt_set_eeprom_op,
2995         .timesync_enable      = bnxt_timesync_enable,
2996         .timesync_disable     = bnxt_timesync_disable,
2997         .timesync_read_time   = bnxt_timesync_read_time,
2998         .timesync_write_time   = bnxt_timesync_write_time,
2999         .timesync_adjust_time = bnxt_timesync_adjust_time,
3000         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3001         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3002 };
3003
3004 static bool bnxt_vf_pciid(uint16_t id)
3005 {
3006         if (id == BROADCOM_DEV_ID_57304_VF ||
3007             id == BROADCOM_DEV_ID_57406_VF ||
3008             id == BROADCOM_DEV_ID_5731X_VF ||
3009             id == BROADCOM_DEV_ID_5741X_VF ||
3010             id == BROADCOM_DEV_ID_57414_VF ||
3011             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
3012                 return true;
3013         return false;
3014 }
3015
3016 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3017 {
3018         struct bnxt *bp = eth_dev->data->dev_private;
3019         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3020         int rc;
3021
3022         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3023         if (!pci_dev->mem_resource[0].addr) {
3024                 RTE_LOG(ERR, PMD,
3025                         "Cannot find PCI device base address, aborting\n");
3026                 rc = -ENODEV;
3027                 goto init_err_disable;
3028         }
3029
3030         bp->eth_dev = eth_dev;
3031         bp->pdev = pci_dev;
3032
3033         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3034         if (!bp->bar0) {
3035                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
3036                 rc = -ENOMEM;
3037                 goto init_err_release;
3038         }
3039         return 0;
3040
3041 init_err_release:
3042         if (bp->bar0)
3043                 bp->bar0 = NULL;
3044
3045 init_err_disable:
3046
3047         return rc;
3048 }
3049
3050 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3051
3052 #define ALLOW_FUNC(x)   \
3053         { \
3054                 typeof(x) arg = (x); \
3055                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3056                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3057         }
3058 static int
3059 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3060 {
3061         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3062         char mz_name[RTE_MEMZONE_NAMESIZE];
3063         const struct rte_memzone *mz = NULL;
3064         static int version_printed;
3065         uint32_t total_alloc_len;
3066         rte_iova_t mz_phys_addr;
3067         struct bnxt *bp;
3068         int rc;
3069
3070         if (version_printed++ == 0)
3071                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
3072
3073         rte_eth_copy_pci_info(eth_dev, pci_dev);
3074
3075         bp = eth_dev->data->dev_private;
3076
3077         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
3078         bp->dev_stopped = 1;
3079
3080         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3081                 goto skip_init;
3082
3083         if (bnxt_vf_pciid(pci_dev->id.device_id))
3084                 bp->flags |= BNXT_FLAG_VF;
3085
3086         rc = bnxt_init_board(eth_dev);
3087         if (rc) {
3088                 RTE_LOG(ERR, PMD,
3089                         "Board initialization failed rc: %x\n", rc);
3090                 goto error;
3091         }
3092 skip_init:
3093         eth_dev->dev_ops = &bnxt_dev_ops;
3094         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3095                 return 0;
3096         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3097         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3098
3099         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3100                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3101                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3102                          pci_dev->addr.bus, pci_dev->addr.devid,
3103                          pci_dev->addr.function, "rx_port_stats");
3104                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3105                 mz = rte_memzone_lookup(mz_name);
3106                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3107                                 sizeof(struct rx_port_stats) + 512);
3108                 if (!mz) {
3109                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3110                                                  SOCKET_ID_ANY,
3111                                                  RTE_MEMZONE_2MB |
3112                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
3113                         if (mz == NULL)
3114                                 return -ENOMEM;
3115                 }
3116                 memset(mz->addr, 0, mz->len);
3117                 mz_phys_addr = mz->iova;
3118                 if ((unsigned long)mz->addr == mz_phys_addr) {
3119                         RTE_LOG(WARNING, PMD,
3120                                 "Memzone physical address same as virtual.\n");
3121                         RTE_LOG(WARNING, PMD,
3122                                 "Using rte_mem_virt2iova()\n");
3123                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3124                         if (mz_phys_addr == 0) {
3125                                 RTE_LOG(ERR, PMD,
3126                                 "unable to map address to physical memory\n");
3127                                 return -ENOMEM;
3128                         }
3129                 }
3130
3131                 bp->rx_mem_zone = (const void *)mz;
3132                 bp->hw_rx_port_stats = mz->addr;
3133                 bp->hw_rx_port_stats_map = mz_phys_addr;
3134
3135                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3136                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3137                          pci_dev->addr.bus, pci_dev->addr.devid,
3138                          pci_dev->addr.function, "tx_port_stats");
3139                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3140                 mz = rte_memzone_lookup(mz_name);
3141                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3142                                 sizeof(struct tx_port_stats) + 512);
3143                 if (!mz) {
3144                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3145                                                  SOCKET_ID_ANY,
3146                                                  RTE_MEMZONE_2MB |
3147                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
3148                         if (mz == NULL)
3149                                 return -ENOMEM;
3150                 }
3151                 memset(mz->addr, 0, mz->len);
3152                 mz_phys_addr = mz->iova;
3153                 if ((unsigned long)mz->addr == mz_phys_addr) {
3154                         RTE_LOG(WARNING, PMD,
3155                                 "Memzone physical address same as virtual.\n");
3156                         RTE_LOG(WARNING, PMD,
3157                                 "Using rte_mem_virt2iova()\n");
3158                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3159                         if (mz_phys_addr == 0) {
3160                                 RTE_LOG(ERR, PMD,
3161                                 "unable to map address to physical memory\n");
3162                                 return -ENOMEM;
3163                         }
3164                 }
3165
3166                 bp->tx_mem_zone = (const void *)mz;
3167                 bp->hw_tx_port_stats = mz->addr;
3168                 bp->hw_tx_port_stats_map = mz_phys_addr;
3169
3170                 bp->flags |= BNXT_FLAG_PORT_STATS;
3171         }
3172
3173         rc = bnxt_alloc_hwrm_resources(bp);
3174         if (rc) {
3175                 RTE_LOG(ERR, PMD,
3176                         "hwrm resource allocation failure rc: %x\n", rc);
3177                 goto error_free;
3178         }
3179         rc = bnxt_hwrm_ver_get(bp);
3180         if (rc)
3181                 goto error_free;
3182         rc = bnxt_hwrm_queue_qportcfg(bp);
3183         if (rc) {
3184                 RTE_LOG(ERR, PMD, "hwrm queue qportcfg failed\n");
3185                 goto error_free;
3186         }
3187
3188         rc = bnxt_hwrm_func_qcfg(bp);
3189         if (rc) {
3190                 RTE_LOG(ERR, PMD, "hwrm func qcfg failed\n");
3191                 goto error_free;
3192         }
3193
3194         /* Get the MAX capabilities for this function */
3195         rc = bnxt_hwrm_func_qcaps(bp);
3196         if (rc) {
3197                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
3198                 goto error_free;
3199         }
3200         if (bp->max_tx_rings == 0) {
3201                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
3202                 rc = -EBUSY;
3203                 goto error_free;
3204         }
3205         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3206                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3207         if (eth_dev->data->mac_addrs == NULL) {
3208                 RTE_LOG(ERR, PMD,
3209                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3210                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3211                 rc = -ENOMEM;
3212                 goto error_free;
3213         }
3214         /* Copy the permanent MAC from the qcap response address now. */
3215         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3216         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3217
3218         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3219                 /* 1 ring is for default completion ring */
3220                 RTE_LOG(ERR, PMD, "Insufficient resource: Ring Group\n");
3221                 rc = -ENOSPC;
3222                 goto error_free;
3223         }
3224
3225         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3226                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3227         if (!bp->grp_info) {
3228                 RTE_LOG(ERR, PMD,
3229                         "Failed to alloc %zu bytes to store group info table\n",
3230                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3231                 rc = -ENOMEM;
3232                 goto error_free;
3233         }
3234
3235         /* Forward all requests if firmware is new enough */
3236         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3237             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3238             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3239                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3240         } else {
3241                 RTE_LOG(WARNING, PMD,
3242                         "Firmware too old for VF mailbox functionality\n");
3243                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3244         }
3245
3246         /*
3247          * The following are used for driver cleanup.  If we disallow these,
3248          * VF drivers can't clean up cleanly.
3249          */
3250         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3251         ALLOW_FUNC(HWRM_VNIC_FREE);
3252         ALLOW_FUNC(HWRM_RING_FREE);
3253         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3254         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3255         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3256         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3257         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3258         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3259         rc = bnxt_hwrm_func_driver_register(bp);
3260         if (rc) {
3261                 RTE_LOG(ERR, PMD,
3262                         "Failed to register driver");
3263                 rc = -EBUSY;
3264                 goto error_free;
3265         }
3266
3267         RTE_LOG(INFO, PMD,
3268                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3269                 pci_dev->mem_resource[0].phys_addr,
3270                 pci_dev->mem_resource[0].addr);
3271
3272         rc = bnxt_hwrm_func_reset(bp);
3273         if (rc) {
3274                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
3275                 rc = -EIO;
3276                 goto error_free;
3277         }
3278
3279         if (BNXT_PF(bp)) {
3280                 //if (bp->pf.active_vfs) {
3281                         // TODO: Deallocate VF resources?
3282                 //}
3283                 if (bp->pdev->max_vfs) {
3284                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3285                         if (rc) {
3286                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
3287                                 goto error_free;
3288                         }
3289                 } else {
3290                         rc = bnxt_hwrm_allocate_pf_only(bp);
3291                         if (rc) {
3292                                 RTE_LOG(ERR, PMD,
3293                                         "Failed to allocate PF resources\n");
3294                                 goto error_free;
3295                         }
3296                 }
3297         }
3298
3299         bnxt_hwrm_port_led_qcaps(bp);
3300
3301         rc = bnxt_setup_int(bp);
3302         if (rc)
3303                 goto error_free;
3304
3305         rc = bnxt_alloc_mem(bp);
3306         if (rc)
3307                 goto error_free_int;
3308
3309         rc = bnxt_request_int(bp);
3310         if (rc)
3311                 goto error_free_int;
3312
3313         rc = bnxt_alloc_def_cp_ring(bp);
3314         if (rc)
3315                 goto error_free_int;
3316
3317         bnxt_enable_int(bp);
3318
3319         return 0;
3320
3321 error_free_int:
3322         bnxt_disable_int(bp);
3323         bnxt_free_def_cp_ring(bp);
3324         bnxt_hwrm_func_buf_unrgtr(bp);
3325         bnxt_free_int(bp);
3326         bnxt_free_mem(bp);
3327 error_free:
3328         bnxt_dev_uninit(eth_dev);
3329 error:
3330         return rc;
3331 }
3332
3333 static int
3334 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3335         struct bnxt *bp = eth_dev->data->dev_private;
3336         int rc;
3337
3338         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3339                 return -EPERM;
3340
3341         bnxt_disable_int(bp);
3342         bnxt_free_int(bp);
3343         bnxt_free_mem(bp);
3344         if (eth_dev->data->mac_addrs != NULL) {
3345                 rte_free(eth_dev->data->mac_addrs);
3346                 eth_dev->data->mac_addrs = NULL;
3347         }
3348         if (bp->grp_info != NULL) {
3349                 rte_free(bp->grp_info);
3350                 bp->grp_info = NULL;
3351         }
3352         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3353         bnxt_free_hwrm_resources(bp);
3354         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3355         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3356         if (bp->dev_stopped == 0)
3357                 bnxt_dev_close_op(eth_dev);
3358         if (bp->pf.vf_info)
3359                 rte_free(bp->pf.vf_info);
3360         eth_dev->dev_ops = NULL;
3361         eth_dev->rx_pkt_burst = NULL;
3362         eth_dev->tx_pkt_burst = NULL;
3363
3364         return rc;
3365 }
3366
3367 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3368         struct rte_pci_device *pci_dev)
3369 {
3370         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3371                 bnxt_dev_init);
3372 }
3373
3374 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3375 {
3376         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3377 }
3378
3379 static struct rte_pci_driver bnxt_rte_pmd = {
3380         .id_table = bnxt_pci_id_map,
3381         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3382                 RTE_PCI_DRV_INTR_LSC,
3383         .probe = bnxt_pci_probe,
3384         .remove = bnxt_pci_remove,
3385 };
3386
3387 static bool
3388 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3389 {
3390         if (strcmp(dev->device->driver->name, drv->driver.name))
3391                 return false;
3392
3393         return true;
3394 }
3395
3396 bool is_bnxt_supported(struct rte_eth_dev *dev)
3397 {
3398         return is_device_supported(dev, &bnxt_rte_pmd);
3399 }
3400
3401 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3402 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3403 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");