9db3e748776e56a81b84a5ccc9318608fbbb8c54
[dpdk.git] / drivers / net / bnxt / bnxt_filter.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Broadcom
3  * All rights reserved.
4  */
5
6 #ifndef _BNXT_FILTER_H_
7 #define _BNXT_FILTER_H_
8
9 #include <rte_ether.h>
10
11 #define bnxt_vlan_filter_exists(bp, filter, chk, vlan_id)       \
12                 (((filter)->enables & (chk)) &&                 \
13                  ((filter)->l2_ivlan == (vlan_id) &&            \
14                   (filter)->l2_ivlan_mask == 0x0FFF) &&         \
15                  !memcmp((filter)->l2_addr, (bp)->mac_addr,     \
16                          RTE_ETHER_ADDR_LEN))
17 struct bnxt;
18
19 #define BNXT_FLOW_L2_VALID_FLAG                 BIT(0)
20 #define BNXT_FLOW_L2_SRC_VALID_FLAG             BIT(1)
21 #define BNXT_FLOW_L2_INNER_SRC_VALID_FLAG       BIT(2)
22 #define BNXT_FLOW_L2_DST_VALID_FLAG             BIT(3)
23 #define BNXT_FLOW_L2_INNER_DST_VALID_FLAG       BIT(4)
24 #define BNXT_FLOW_L2_DROP_FLAG                  BIT(5)
25 #define BNXT_FLOW_PARSE_INNER_FLAG              BIT(6)
26
27 struct bnxt_filter_info {
28         STAILQ_ENTRY(bnxt_filter_info)  next;
29         uint64_t                fw_l2_filter_id;
30         struct bnxt_filter_info *matching_l2_fltr_ptr;
31         uint64_t                fw_em_filter_id;
32         uint64_t                fw_ntuple_filter_id;
33 #define INVALID_MAC_INDEX       ((uint16_t)-1)
34         uint16_t                mac_index;
35 #define HWRM_CFA_L2_FILTER      0
36 #define HWRM_CFA_EM_FILTER      1
37 #define HWRM_CFA_NTUPLE_FILTER  2
38 #define HWRM_CFA_TUNNEL_REDIRECT_FILTER 3
39         uint8_t                 filter_type;
40         uint32_t                dst_id;
41
42         /* Filter Characteristics */
43         uint32_t                flags;
44         uint32_t                enables;
45         uint32_t                l2_ref_cnt;
46         uint8_t                 l2_addr[RTE_ETHER_ADDR_LEN];
47         uint8_t                 l2_addr_mask[RTE_ETHER_ADDR_LEN];
48         uint32_t                valid_flags;
49         uint16_t                l2_ovlan;
50         uint16_t                l2_ovlan_mask;
51         uint16_t                l2_ivlan;
52         uint16_t                l2_ivlan_mask;
53         uint8_t                 t_l2_addr[RTE_ETHER_ADDR_LEN];
54         uint8_t                 t_l2_addr_mask[RTE_ETHER_ADDR_LEN];
55         uint16_t                t_l2_ovlan;
56         uint16_t                t_l2_ovlan_mask;
57         uint16_t                t_l2_ivlan;
58         uint16_t                t_l2_ivlan_mask;
59         uint8_t                 tunnel_type;
60         uint16_t                mirror_vnic_id;
61         uint32_t                vni;
62         uint8_t                 pri_hint;
63         uint64_t                l2_filter_id_hint;
64         uint32_t                src_id;
65         uint8_t                 src_type;
66         uint8_t                 src_macaddr[6];
67         uint8_t                 dst_macaddr[6];
68         uint32_t                dst_ipaddr[4];
69         uint32_t                dst_ipaddr_mask[4];
70         uint32_t                src_ipaddr[4];
71         uint32_t                src_ipaddr_mask[4];
72         uint16_t                dst_port;
73         uint16_t                dst_port_mask;
74         uint16_t                src_port;
75         uint16_t                src_port_mask;
76         uint16_t                ip_protocol;
77         uint16_t                ip_addr_type;
78         uint16_t                ethertype;
79         uint32_t                priority;
80 };
81
82 struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp);
83 struct bnxt_filter_info *bnxt_alloc_vf_filter(struct bnxt *bp, uint16_t vf);
84 void bnxt_free_all_filters(struct bnxt *bp);
85 void bnxt_free_filter_mem(struct bnxt *bp);
86 int bnxt_alloc_filter_mem(struct bnxt *bp);
87 struct bnxt_filter_info *bnxt_get_unused_filter(struct bnxt *bp);
88 void bnxt_free_filter(struct bnxt *bp, struct bnxt_filter_info *filter);
89 struct bnxt_filter_info *bnxt_get_l2_filter(struct bnxt *bp,
90                 struct bnxt_filter_info *nf, struct bnxt_vnic_info *vnic);
91
92 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_MACADDR  \
93         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR
94 #define EM_FLOW_ALLOC_INPUT_EN_SRC_MACADDR      \
95         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR
96 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR  \
97         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR
98 #define EM_FLOW_ALLOC_INPUT_EN_DST_MACADDR      \
99         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR
100 #define NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE   \
101         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE
102 #define EM_FLOW_ALLOC_INPUT_EN_ETHERTYPE       \
103         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE
104 #define EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID       \
105         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID
106 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR  \
107         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR
108 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK     \
109         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK
110 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR  \
111         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR
112 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK     \
113         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK
114 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT    \
115         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT
116 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK       \
117         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK
118 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT    \
119         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT
120 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK       \
121         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK
122 #define NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO        \
123         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL
124 #define EM_FLOW_ALLOC_INPUT_EN_SRC_IPADDR       \
125         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR
126 #define EM_FLOW_ALLOC_INPUT_EN_DST_IPADDR       \
127         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR
128 #define EM_FLOW_ALLOC_INPUT_EN_SRC_PORT \
129         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT
130 #define EM_FLOW_ALLOC_INPUT_EN_DST_PORT \
131         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT
132 #define EM_FLOW_ALLOC_INPUT_EN_IP_PROTO \
133         HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL
134 #define EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6   \
135         HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6
136 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6       \
137         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6
138 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN   \
139         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN
140 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE   \
141         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE
142 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE  \
143         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE
144 #define L2_FILTER_ALLOC_INPUT_EN_L2_ADDR_MASK   \
145         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK
146 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UDP \
147         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP
148 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_TCP \
149         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP
150 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN     \
151         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN
152 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4       \
153         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4
154 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID       \
155         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
156 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID       \
157         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
158 #define L2_FILTER_ALLOC_INPUT_EN_T_NUM_VLANS \
159         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS
160 #define L2_FILTER_ALLOC_INPUT_EN_NUM_VLANS \
161         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS
162 #endif