drivers/net/bnxt/bnxt_ring.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <rte_bitmap.h>
   7 #include <rte_memzone.h>
   8 #include <rte_malloc.h>
   9 #include <unistd.h>
  10
  11 #include "bnxt.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_txq.h"
  17 #include "bnxt_txr.h"
  18
  19 #include "hsi_struct_def_dpdk.h"
  20
  21 /*
  22  * Generic ring handling
  23  */
  24
  25 void bnxt_free_ring(struct bnxt_ring *ring)
  26 {
  27         if (!ring)
  28                 return;
  29
  30         if (ring->vmem_size && *ring->vmem) {
  31                 memset((char *)*ring->vmem, 0, ring->vmem_size);
  32                 *ring->vmem = NULL;
  33         }
  34         ring->mem_zone = NULL;
  35 }
  36
  37 /*
  38  * Ring groups
  39  */
  40
  41 static void bnxt_init_ring_grps(struct bnxt *bp)
  42 {
  43         unsigned int i;
  44
  45         for (i = 0; i < bp->max_ring_grps; i++)
  46                 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
  47                        sizeof(struct bnxt_ring_grp_info));
  48 }
  49
  50 int bnxt_alloc_ring_grps(struct bnxt *bp)
  51 {
  52         if (bp->max_tx_rings == 0) {
  53                 PMD_DRV_LOG(ERR, "No TX rings available!\n");
  54                 return -EBUSY;
  55         }
  56
  57         /* THOR does not support ring groups.
  58          * But we will use the array to save RSS context IDs.
  59          */
  60         if (BNXT_CHIP_THOR(bp)) {
  61                 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
  62         } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
  63                 /* 1 ring is for default completion ring */
  64                 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
  65                 return -ENOSPC;
  66         }
  67
  68         if (BNXT_HAS_RING_GRPS(bp)) {
  69                 bp->grp_info = rte_zmalloc("bnxt_grp_info",
  70                                            sizeof(*bp->grp_info) *
  71                                            bp->max_ring_grps, 0);
  72                 if (!bp->grp_info) {
  73                         PMD_DRV_LOG(ERR,
  74                                     "Failed to alloc grp info tbl.\n");
  75                         return -ENOMEM;
  76                 }
  77                 bnxt_init_ring_grps(bp);
  78         }
  79
  80         return 0;
  81 }
  82
  83 /*
  84  * Allocates a completion ring with vmem and stats optionally also allocating
  85  * a TX and/or RX ring.  Passing NULL as tx_ring_info and/or rx_ring_info
  86  * to not allocate them.
  87  *
  88  * Order in the allocation is:
  89  * stats - Always non-zero length
  90  * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
  91  * tx vmem - Only non-zero length if tx_ring_info is not NULL
  92  * rx vmem - Only non-zero length if rx_ring_info is not NULL
  93  * cp bd ring - Always non-zero length
  94  * tx bd ring - Only non-zero length if tx_ring_info is not NULL
  95  * rx bd ring - Only non-zero length if rx_ring_info is not NULL
  96  */
  97 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
  98                             struct bnxt_tx_queue *txq,
  99                             struct bnxt_rx_queue *rxq,
 100                             struct bnxt_cp_ring_info *cp_ring_info,
 101                             struct bnxt_cp_ring_info *nq_ring_info,
 102                             const char *suffix)
 103 {
 104         struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
 105         struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
 106         struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
 107         struct bnxt_ring *tx_ring;
 108         struct bnxt_ring *rx_ring;
 109         struct rte_pci_device *pdev = bp->pdev;
 110         uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
 111         const struct rte_memzone *mz = NULL;
 112         char mz_name[RTE_MEMZONE_NAMESIZE];
 113         rte_iova_t mz_phys_addr_base;
 114         rte_iova_t mz_phys_addr;
 115         int sz;
 116
 117         int stats_len = (tx_ring_info || rx_ring_info) ?
 118             RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
 119                                    sizeof (struct hwrm_resp_hdr)) : 0;
 120         stats_len = RTE_ALIGN(stats_len, 128);
 121
 122         int cp_vmem_start = stats_len;
 123         int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
 124         cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
 125
 126         int nq_vmem_len = nq_ring_info ?
 127                 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
 128         nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
 129
 130         int nq_vmem_start = cp_vmem_start + cp_vmem_len;
 131
 132         int tx_vmem_start = nq_vmem_start + nq_vmem_len;
 133         int tx_vmem_len =
 134             tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
 135                                                 tx_ring_struct->vmem_size) : 0;
 136         tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
 137
 138         int rx_vmem_start = tx_vmem_start + tx_vmem_len;
 139         int rx_vmem_len = rx_ring_info ?
 140                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
 141                                                 rx_ring_struct->vmem_size) : 0;
 142         rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
 143         int ag_vmem_start = 0;
 144         int ag_vmem_len = 0;
 145         int cp_ring_start =  0;
 146         int nq_ring_start = 0;
 147
 148         ag_vmem_start = rx_vmem_start + rx_vmem_len;
 149         ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
 150                                 rx_ring_info->ag_ring_struct->vmem_size) : 0;
 151         cp_ring_start = ag_vmem_start + ag_vmem_len;
 152         cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
 153
 154         int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
 155                                                  sizeof(struct cmpl_base));
 156         cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
 157         nq_ring_start = cp_ring_start + cp_ring_len;
 158         nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
 159
 160         int nq_ring_len = nq_ring_info ? cp_ring_len : 0;
 161
 162         int tx_ring_start = nq_ring_start + nq_ring_len;
 163         tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
 164         int tx_ring_len = tx_ring_info ?
 165             RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
 166                                    sizeof(struct tx_bd_long)) : 0;
 167         tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
 168
 169         int rx_ring_start = tx_ring_start + tx_ring_len;
 170         rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
 171         int rx_ring_len =  rx_ring_info ?
 172                 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
 173                 sizeof(struct rx_prod_pkt_bd)) : 0;
 174         rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
 175
 176         int ag_ring_start = rx_ring_start + rx_ring_len;
 177         ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
 178         int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
 179         ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
 180
 181         int ag_bitmap_start = ag_ring_start + ag_ring_len;
 182         int ag_bitmap_len =  rx_ring_info ?
 183                 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
 184                         rx_ring_info->rx_ring_struct->ring_size *
 185                         AGG_RING_SIZE_FACTOR)) : 0;
 186
 187         int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
 188         int tpa_info_len = 0;
 189
 190         if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) {
 191                 int tpa_max = BNXT_TPA_MAX_AGGS(bp);
 192
 193                 tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info);
 194                 tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len);
 195         }
 196
 197         int total_alloc_len = tpa_info_start;
 198         total_alloc_len += tpa_info_len;
 199
 200         snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
 201                  "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
 202                  pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
 203                  suffix);
 204         mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
 205         mz = rte_memzone_lookup(mz_name);
 206         if (!mz) {
 207                 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
 208                                 SOCKET_ID_ANY,
 209                                 RTE_MEMZONE_2MB |
 210                                 RTE_MEMZONE_SIZE_HINT_ONLY |
 211                                 RTE_MEMZONE_IOVA_CONTIG,
 212                                 getpagesize());
 213                 if (mz == NULL)
 214                         return -ENOMEM;
 215         }
 216         memset(mz->addr, 0, mz->len);
 217         mz_phys_addr_base = mz->iova;
 218         mz_phys_addr = mz->iova;
 219         if ((unsigned long)mz->addr == mz_phys_addr_base) {
 220                 PMD_DRV_LOG(DEBUG,
 221                             "Memzone physical address same as virtual.\n");
 222                 PMD_DRV_LOG(DEBUG, "Using rte_mem_virt2iova()\n");
 223                 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
 224                         rte_mem_lock_page(((char *)mz->addr) + sz);
 225                 mz_phys_addr_base = rte_mem_virt2iova(mz->addr);
 226                 mz_phys_addr = rte_mem_virt2iova(mz->addr);
 227                 if (mz_phys_addr == RTE_BAD_IOVA) {
 228                         PMD_DRV_LOG(ERR,
 229                         "unable to map ring address to physical memory\n");
 230                         return -ENOMEM;
 231                 }
 232         }
 233
 234         if (tx_ring_info) {
 235                 txq->mz = mz;
 236                 tx_ring = tx_ring_info->tx_ring_struct;
 237
 238                 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
 239                 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
 240                 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
 241                 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
 242                 tx_ring->mem_zone = (const void *)mz;
 243
 244                 if (!tx_ring->bd)
 245                         return -ENOMEM;
 246                 if (tx_ring->vmem_size) {
 247                         tx_ring->vmem =
 248                             (void **)((char *)mz->addr + tx_vmem_start);
 249                         tx_ring_info->tx_buf_ring =
 250                             (struct bnxt_sw_tx_bd *)tx_ring->vmem;
 251                 }
 252         }
 253
 254         if (rx_ring_info) {
 255                 rxq->mz = mz;
 256                 rx_ring = rx_ring_info->rx_ring_struct;
 257
 258                 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
 259                 rx_ring_info->rx_desc_ring =
 260                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 261                 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
 262                 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
 263                 rx_ring->mem_zone = (const void *)mz;
 264
 265                 if (!rx_ring->bd)
 266                         return -ENOMEM;
 267                 if (rx_ring->vmem_size) {
 268                         rx_ring->vmem =
 269                             (void **)((char *)mz->addr + rx_vmem_start);
 270                         rx_ring_info->rx_buf_ring =
 271                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 272                 }
 273
 274                 rx_ring = rx_ring_info->ag_ring_struct;
 275
 276                 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
 277                 rx_ring_info->ag_desc_ring =
 278                     (struct rx_prod_pkt_bd *)rx_ring->bd;
 279                 rx_ring->bd_dma = mz->iova + ag_ring_start;
 280                 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
 281                 rx_ring->mem_zone = (const void *)mz;
 282
 283                 if (!rx_ring->bd)
 284                         return -ENOMEM;
 285                 if (rx_ring->vmem_size) {
 286                         rx_ring->vmem =
 287                             (void **)((char *)mz->addr + ag_vmem_start);
 288                         rx_ring_info->ag_buf_ring =
 289                             (struct bnxt_sw_rx_bd *)rx_ring->vmem;
 290                 }
 291
 292                 rx_ring_info->ag_bitmap =
 293                     rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
 294                                     AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
 295                                     ag_bitmap_start, ag_bitmap_len);
 296
 297                 /* TPA info */
 298                 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
 299                         rx_ring_info->tpa_info =
 300                                 ((struct bnxt_tpa_info *)((char *)mz->addr +
 301                                                           tpa_info_start));
 302         }
 303
 304         cp_ring->bd = ((char *)mz->addr + cp_ring_start);
 305         cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
 306         cp_ring_info->cp_desc_ring = cp_ring->bd;
 307         cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
 308         cp_ring->mem_zone = (const void *)mz;
 309
 310         if (!cp_ring->bd)
 311                 return -ENOMEM;
 312         if (cp_ring->vmem_size)
 313                 *cp_ring->vmem = ((char *)mz->addr + stats_len);
 314         if (stats_len) {
 315                 cp_ring_info->hw_stats = mz->addr;
 316                 cp_ring_info->hw_stats_map = mz_phys_addr;
 317         }
 318         cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 319
 320         if (nq_ring_info) {
 321                 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
 322
 323                 nq_ring->bd = (char *)mz->addr + nq_ring_start;
 324                 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
 325                 nq_ring_info->cp_desc_ring = nq_ring->bd;
 326                 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
 327                 nq_ring->mem_zone = (const void *)mz;
 328
 329                 if (!nq_ring->bd)
 330                         return -ENOMEM;
 331                 if (nq_ring->vmem_size)
 332                         *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
 333
 334                 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 335         }
 336
 337         return 0;
 338 }
 339
 340 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
 341 {
 342         /* Tick values in micro seconds.
 343          * 1 coal_buf x bufs_per_record = 1 completion record.
 344          */
 345         coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
 346         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 347         coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
 348         /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
 349         coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
 350         coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
 351         /* min timer set to 1/2 of interrupt timer */
 352         coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
 353         /* buf timer set to 1/4 of interrupt timer */
 354         coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
 355         coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 356 }
 357
 358 static void bnxt_set_db(struct bnxt *bp,
 359                         struct bnxt_db_info *db,
 360                         uint32_t ring_type,
 361                         uint32_t map_idx,
 362                         uint32_t fid)
 363 {
 364         if (BNXT_CHIP_THOR(bp)) {
 365                 if (BNXT_PF(bp))
 366                         db->doorbell = (char *)bp->doorbell_base + 0x10000;
 367                 else
 368                         db->doorbell = (char *)bp->doorbell_base + 0x4000;
 369                 switch (ring_type) {
 370                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 371                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
 372                         break;
 373                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 374                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
 375                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
 376                         break;
 377                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 378                         db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
 379                         break;
 380                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
 381                         db->db_key64 = DBR_PATH_L2;
 382                         break;
 383                 }
 384                 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
 385                 db->db_64 = true;
 386         } else {
 387                 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
 388                 switch (ring_type) {
 389                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
 390                         db->db_key32 = DB_KEY_TX;
 391                         break;
 392                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
 393                         db->db_key32 = DB_KEY_RX;
 394                         break;
 395                 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
 396                         db->db_key32 = DB_KEY_CP;
 397                         break;
 398                 }
 399                 db->db_64 = false;
 400         }
 401 }
 402
 403 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
 404                                 struct bnxt_cp_ring_info *cpr)
 405 {
 406         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 407         uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
 408         int cp_ring_index = queue_index + BNXT_RX_VEC_START;
 409         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 410         uint8_t ring_type;
 411         int rc = 0;
 412
 413         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 414
 415         if (BNXT_HAS_NQ(bp)) {
 416                 if (nqr) {
 417                         nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
 418                 } else {
 419                         PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
 420                         return -EINVAL;
 421                 }
 422         }
 423
 424         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
 425                                   HWRM_NA_SIGNATURE, nq_ring_id, 0);
 426         if (rc)
 427                 return rc;
 428
 429         cpr->cp_cons = 0;
 430         bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
 431                     cp_ring->fw_ring_id);
 432         bnxt_db_cq(cpr);
 433
 434         return 0;
 435 }
 436
 437 int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
 438 {
 439         struct bnxt_cp_ring_info *nqr;
 440         struct bnxt_ring *ring;
 441         int ring_index = BNXT_NUM_ASYNC_CPR(bp);
 442         unsigned int socket_id;
 443         uint8_t ring_type;
 444         int rc = 0;
 445
 446         if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring)
 447                 return 0;
 448
 449         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 450
 451         nqr = rte_zmalloc_socket("nqr",
 452                                  sizeof(struct bnxt_cp_ring_info),
 453                                  RTE_CACHE_LINE_SIZE, socket_id);
 454         if (nqr == NULL)
 455                 return -ENOMEM;
 456
 457         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 458                                   sizeof(struct bnxt_ring),
 459                                   RTE_CACHE_LINE_SIZE, socket_id);
 460         if (ring == NULL) {
 461                 rte_free(nqr);
 462                 return -ENOMEM;
 463         }
 464
 465         ring->bd = (void *)nqr->cp_desc_ring;
 466         ring->bd_dma = nqr->cp_desc_mapping;
 467         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 468         ring->ring_mask = ring->ring_size - 1;
 469         ring->vmem_size = 0;
 470         ring->vmem = NULL;
 471
 472         nqr->cp_ring_struct = ring;
 473         rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
 474         if (rc) {
 475                 rte_free(ring);
 476                 rte_free(nqr);
 477                 return -ENOMEM;
 478         }
 479
 480         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 481
 482         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index,
 483                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 484         if (rc) {
 485                 rte_free(ring);
 486                 rte_free(nqr);
 487                 return rc;
 488         }
 489
 490         bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index,
 491                     ring->fw_ring_id);
 492         bnxt_db_nq(nqr);
 493
 494         bp->rxtx_nq_ring = nqr;
 495
 496         return 0;
 497 }
 498
 499 /* Free RX/TX NQ ring.  */
 500 void bnxt_free_rxtx_nq_ring(struct bnxt *bp)
 501 {
 502         struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
 503
 504         if (!nqr)
 505                 return;
 506
 507         bnxt_free_nq_ring(bp, nqr);
 508
 509         bnxt_free_ring(nqr->cp_ring_struct);
 510         rte_free(nqr->cp_ring_struct);
 511         nqr->cp_ring_struct = NULL;
 512         rte_free(nqr);
 513         bp->rxtx_nq_ring = NULL;
 514 }
 515
 516 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 517 {
 518         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 519         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 520         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 521         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 522         struct bnxt_ring *ring = rxr->rx_ring_struct;
 523         uint8_t ring_type;
 524         int rc = 0;
 525
 526         ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 527
 528         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
 529                                   queue_index, cpr->hw_stats_ctx_id,
 530                                   cp_ring->fw_ring_id, 0);
 531         if (rc)
 532                 return rc;
 533
 534         rxr->rx_prod = 0;
 535         if (BNXT_HAS_RING_GRPS(bp))
 536                 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
 537         bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
 538         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 539
 540         return 0;
 541 }
 542
 543 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
 544 {
 545         unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
 546         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 547         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 548         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 549         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 550         struct bnxt_ring *ring = rxr->ag_ring_struct;
 551         uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
 552         uint8_t ring_type;
 553         int rc = 0;
 554
 555         ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
 556
 557         if (BNXT_CHIP_THOR(bp)) {
 558                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
 559                 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
 560         } else {
 561                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
 562         }
 563
 564         rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
 565                                   hw_stats_ctx_id, cp_ring->fw_ring_id, 0);
 566
 567         if (rc)
 568                 return rc;
 569
 570         rxr->ag_prod = 0;
 571         if (BNXT_HAS_RING_GRPS(bp))
 572                 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
 573         bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
 574         bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 575
 576         return 0;
 577 }
 578
 579 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
 580 {
 581         struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
 582         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 583         struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 584         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 585         int rc;
 586
 587         rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr);
 588         if (rc)
 589                 goto err_out;
 590
 591         if (BNXT_HAS_RING_GRPS(bp)) {
 592                 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
 593                 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
 594         }
 595
 596         if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
 597                 /*
 598                  * If a dedicated async event completion ring is not enabled,
 599                  * use the first completion ring from PF or VF as the default
 600                  * completion ring for async event handling.
 601                  */
 602                 bp->async_cp_ring = cpr;
 603                 rc = bnxt_hwrm_set_async_event_cr(bp);
 604                 if (rc)
 605                         goto err_out;
 606         }
 607
 608         rc = bnxt_alloc_rx_ring(bp, queue_index);
 609         if (rc)
 610                 goto err_out;
 611
 612         rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
 613         if (rc)
 614                 goto err_out;
 615
 616         if (rxq->rx_started) {
 617                 if (bnxt_init_one_rx_ring(rxq)) {
 618                         RTE_LOG(ERR, PMD,
 619                                 "bnxt_init_one_rx_ring failed!\n");
 620                         bnxt_rx_queue_release_op(rxq);
 621                         rc = -ENOMEM;
 622                         goto err_out;
 623                 }
 624                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 625                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 626         }
 627         rxq->index = queue_index;
 628 #ifdef RTE_ARCH_X86
 629         bnxt_rxq_vec_setup(rxq);
 630 #endif
 631
 632         return 0;
 633
 634 err_out:
 635         PMD_DRV_LOG(ERR,
 636                     "Failed to allocate receive queue %d, rc %d.\n",
 637                     queue_index, rc);
 638         return rc;
 639 }
 640
 641 /* Initialise all rings to -1, its used to free rings later if allocation
 642  * of few rings fails.
 643  */
 644 static void bnxt_init_all_rings(struct bnxt *bp)
 645 {
 646         unsigned int i = 0;
 647         struct bnxt_rx_queue *rxq;
 648         struct bnxt_ring *cp_ring;
 649         struct bnxt_ring *ring;
 650         struct bnxt_rx_ring_info *rxr;
 651         struct bnxt_tx_queue *txq;
 652
 653         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 654                 rxq = bp->rx_queues[i];
 655                 /* Rx-compl */
 656                 cp_ring = rxq->cp_ring->cp_ring_struct;
 657                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 658                 /* Rx-Reg */
 659                 rxr = rxq->rx_ring;
 660                 ring = rxr->rx_ring_struct;
 661                 ring->fw_ring_id = INVALID_HW_RING_ID;
 662                 /* Rx-AGG */
 663                 ring = rxr->ag_ring_struct;
 664                 ring->fw_ring_id = INVALID_HW_RING_ID;
 665         }
 666         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 667                 txq = bp->tx_queues[i];
 668                 /* Tx cmpl */
 669                 cp_ring = txq->cp_ring->cp_ring_struct;
 670                 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
 671                 /*Tx Ring */
 672                 ring = txq->tx_ring->tx_ring_struct;
 673                 ring->fw_ring_id = INVALID_HW_RING_ID;
 674         }
 675 }
 676
 677 /* ring_grp usage:
 678  * [0] = default completion ring
 679  * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
 680  * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
 681  */
 682 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
 683 {
 684         struct bnxt_coal coal;
 685         unsigned int i;
 686         uint8_t ring_type;
 687         int rc = 0;
 688
 689         bnxt_init_dflt_coal(&coal);
 690         bnxt_init_all_rings(bp);
 691
 692         for (i = 0; i < bp->rx_cp_nr_rings; i++) {
 693                 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
 694                 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 695                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 696                 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 697
 698                 if (bnxt_alloc_cmpl_ring(bp, i, cpr))
 699                         goto err_out;
 700
 701                 if (BNXT_HAS_RING_GRPS(bp)) {
 702                         bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
 703                         bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
 704                 }
 705
 706                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 707                 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
 708                         /*
 709                          * If a dedicated async event completion ring is not
 710                          * enabled, use the first completion ring as the default
 711                          * completion ring for async event handling.
 712                          */
 713                         bp->async_cp_ring = cpr;
 714                         rc = bnxt_hwrm_set_async_event_cr(bp);
 715                         if (rc)
 716                                 goto err_out;
 717                 }
 718
 719                 if (bnxt_alloc_rx_ring(bp, i))
 720                         goto err_out;
 721
 722                 if (bnxt_alloc_rx_agg_ring(bp, i))
 723                         goto err_out;
 724
 725                 if (bnxt_init_one_rx_ring(rxq)) {
 726                         PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
 727                         bnxt_rx_queue_release_op(rxq);
 728                         return -ENOMEM;
 729                 }
 730                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 731                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 732                 rxq->index = i;
 733 #ifdef RTE_ARCH_X86
 734                 bnxt_rxq_vec_setup(rxq);
 735 #endif
 736         }
 737
 738         for (i = 0; i < bp->tx_cp_nr_rings; i++) {
 739                 struct bnxt_tx_queue *txq = bp->tx_queues[i];
 740                 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
 741                 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
 742                 struct bnxt_tx_ring_info *txr = txq->tx_ring;
 743                 struct bnxt_ring *ring = txr->tx_ring_struct;
 744                 unsigned int idx = i + bp->rx_cp_nr_rings;
 745                 uint16_t tx_cosq_id = 0;
 746
 747                 if (bnxt_alloc_cmpl_ring(bp, idx, cpr))
 748                         goto err_out;
 749
 750                 if (bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)
 751                         tx_cosq_id = bp->tx_cosq_id[i < bp->max_lltc ? i : 0];
 752                 else
 753                         tx_cosq_id = bp->tx_cosq_id[0];
 754                 /* Tx ring */
 755                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
 756                 rc = bnxt_hwrm_ring_alloc(bp, ring,
 757                                           ring_type,
 758                                           i, cpr->hw_stats_ctx_id,
 759                                           cp_ring->fw_ring_id,
 760                                           tx_cosq_id);
 761                 if (rc)
 762                         goto err_out;
 763
 764                 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
 765                 txq->index = idx;
 766                 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
 767         }
 768
 769 err_out:
 770         return rc;
 771 }
 772
 773 /* Allocate dedicated async completion ring. */
 774 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
 775 {
 776         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 777         struct bnxt_ring *cp_ring;
 778         uint8_t ring_type;
 779         int rc;
 780
 781         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 782                 return 0;
 783
 784         cp_ring = cpr->cp_ring_struct;
 785
 786         if (BNXT_HAS_NQ(bp))
 787                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
 788         else
 789                 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
 790
 791         rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
 792                                   HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
 793
 794         if (rc)
 795                 return rc;
 796
 797         cpr->cp_cons = 0;
 798         cpr->valid = 0;
 799         bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
 800                     cp_ring->fw_ring_id);
 801
 802         if (BNXT_HAS_NQ(bp))
 803                 bnxt_db_nq(cpr);
 804         else
 805                 bnxt_db_cq(cpr);
 806
 807         return bnxt_hwrm_set_async_event_cr(bp);
 808 }
 809
 810 /* Free dedicated async completion ring. */
 811 void bnxt_free_async_cp_ring(struct bnxt *bp)
 812 {
 813         struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
 814
 815         if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
 816                 return;
 817
 818         if (BNXT_HAS_NQ(bp))
 819                 bnxt_free_nq_ring(bp, cpr);
 820         else
 821                 bnxt_free_cp_ring(bp, cpr);
 822
 823         bnxt_free_ring(cpr->cp_ring_struct);
 824         rte_free(cpr->cp_ring_struct);
 825         cpr->cp_ring_struct = NULL;
 826         rte_free(cpr);
 827         bp->async_cp_ring = NULL;
 828 }
 829
 830 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
 831 {
 832         struct bnxt_cp_ring_info *cpr = NULL;
 833         struct bnxt_ring *ring = NULL;
 834         unsigned int socket_id;
 835
 836         if (BNXT_NUM_ASYNC_CPR(bp) == 0)
 837                 return 0;
 838
 839         socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
 840
 841         cpr = rte_zmalloc_socket("cpr",
 842                                  sizeof(struct bnxt_cp_ring_info),
 843                                  RTE_CACHE_LINE_SIZE, socket_id);
 844         if (cpr == NULL)
 845                 return -ENOMEM;
 846
 847         ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
 848                                   sizeof(struct bnxt_ring),
 849                                   RTE_CACHE_LINE_SIZE, socket_id);
 850         if (ring == NULL) {
 851                 rte_free(cpr);
 852                 return -ENOMEM;
 853         }
 854
 855         ring->bd = (void *)cpr->cp_desc_ring;
 856         ring->bd_dma = cpr->cp_desc_mapping;
 857         ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
 858         ring->ring_mask = ring->ring_size - 1;
 859         ring->vmem_size = 0;
 860         ring->vmem = NULL;
 861
 862         bp->async_cp_ring = cpr;
 863         cpr->cp_ring_struct = ring;
 864
 865         return bnxt_alloc_rings(bp, 0, NULL, NULL,
 866                                 bp->async_cp_ring, NULL,
 867                                 "def_cp");
 868 }