net/bnxt: support creating SMAC and inner DMAC filters
[dpdk.git] / drivers / net / bnxt / bnxt_rxq.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Broadcom
3  * All rights reserved.
4  */
5
6 #include <inttypes.h>
7
8 #include <rte_malloc.h>
9
10 #include "bnxt.h"
11 #include "bnxt_cpr.h"
12 #include "bnxt_filter.h"
13 #include "bnxt_hwrm.h"
14 #include "bnxt_ring.h"
15 #include "bnxt_rxq.h"
16 #include "bnxt_rxr.h"
17 #include "bnxt_vnic.h"
18 #include "hsi_struct_def_dpdk.h"
19
20 /*
21  * RX Queues
22  */
23
24 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
25 {
26         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
27                 rxq->cp_ring->hw_stats = NULL;
28 }
29
30 int bnxt_mq_rx_configure(struct bnxt *bp)
31 {
32         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
33         const struct rte_eth_vmdq_rx_conf *conf =
34                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
35         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
36         int start_grp_id, end_grp_id = 1, rc = 0;
37         struct bnxt_vnic_info *vnic;
38         struct bnxt_filter_info *filter;
39         enum rte_eth_nb_pools pools = bp->rx_cp_nr_rings, max_pools = 0;
40         struct bnxt_rx_queue *rxq;
41
42         bp->nr_vnics = 0;
43
44         /* Single queue mode */
45         if (bp->rx_cp_nr_rings < 2) {
46                 vnic = &bp->vnic_info[0];
47                 if (!vnic) {
48                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
49                         rc = -ENOMEM;
50                         goto err_out;
51                 }
52                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
53                 bp->nr_vnics++;
54
55                 rxq = bp->eth_dev->data->rx_queues[0];
56                 rxq->vnic = vnic;
57
58                 vnic->func_default = true;
59                 vnic->start_grp_id = 0;
60                 vnic->end_grp_id = vnic->start_grp_id;
61                 filter = bnxt_alloc_filter(bp);
62                 if (!filter) {
63                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
64                         rc = -ENOMEM;
65                         goto err_out;
66                 }
67                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
68                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
69                 goto out;
70         }
71
72         /* Multi-queue mode */
73         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
74                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
75
76                 switch (dev_conf->rxmode.mq_mode) {
77                 case ETH_MQ_RX_VMDQ_RSS:
78                 case ETH_MQ_RX_VMDQ_ONLY:
79                         /* FALLTHROUGH */
80                         /* ETH_8/64_POOLs */
81                         pools = conf->nb_queue_pools;
82                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
83                         max_pools = RTE_MIN(bp->max_vnics,
84                                             RTE_MIN(bp->max_l2_ctx,
85                                             RTE_MIN(bp->max_rsscos_ctx,
86                                                     ETH_64_POOLS)));
87                         PMD_DRV_LOG(DEBUG,
88                                     "pools = %u max_pools = %u\n",
89                                     pools, max_pools);
90                         if (pools > max_pools)
91                                 pools = max_pools;
92                         break;
93                 case ETH_MQ_RX_RSS:
94                         pools = 1;
95                         break;
96                 default:
97                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
98                                 dev_conf->rxmode.mq_mode);
99                         rc = -EINVAL;
100                         goto err_out;
101                 }
102         }
103         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
104         bp->rx_num_qs_per_vnic = nb_q_per_grp;
105         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
106                     pools, nb_q_per_grp);
107         start_grp_id = 0;
108         end_grp_id = nb_q_per_grp;
109
110         for (i = 0; i < pools; i++) {
111                 vnic = &bp->vnic_info[i];
112                 if (!vnic) {
113                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
114                         rc = -ENOMEM;
115                         goto err_out;
116                 }
117                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
118                 bp->nr_vnics++;
119
120                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
121                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
122                         rxq->vnic = vnic;
123                         PMD_DRV_LOG(DEBUG,
124                                     "rxq[%d] = %p vnic[%d] = %p\n",
125                                     ring_idx, rxq, i, vnic);
126                 }
127                 if (i == 0) {
128                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
129                                 bp->eth_dev->data->promiscuous = 1;
130                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
131                         }
132                         vnic->func_default = true;
133                 }
134                 vnic->start_grp_id = start_grp_id;
135                 vnic->end_grp_id = end_grp_id;
136
137                 if (i) {
138                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
139                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
140                                 vnic->rss_dflt_cr = true;
141                         goto skip_filter_allocation;
142                 }
143                 filter = bnxt_alloc_filter(bp);
144                 if (!filter) {
145                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
146                         rc = -ENOMEM;
147                         goto err_out;
148                 }
149                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
150                 /*
151                  * TODO: Configure & associate CFA rule for
152                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
153                  */
154                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
155
156 skip_filter_allocation:
157                 start_grp_id = end_grp_id;
158                 end_grp_id += nb_q_per_grp;
159         }
160
161 out:
162         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
163                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
164
165                 if (bp->flags & BNXT_FLAG_UPDATE_HASH) {
166                         rss = &bp->rss_conf;
167                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
168                 }
169
170                 for (i = 0; i < bp->nr_vnics; i++) {
171                         vnic = &bp->vnic_info[i];
172                         vnic->hash_type =
173                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
174
175                         /*
176                          * Use the supplied key if the key length is
177                          * acceptable and the rss_key is not NULL
178                          */
179                         if (rss->rss_key &&
180                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
181                                 memcpy(vnic->rss_hash_key,
182                                        rss->rss_key, rss->rss_key_len);
183                 }
184         }
185
186         return rc;
187
188 err_out:
189         /* Free allocated vnic/filters */
190
191         return rc;
192 }
193
194 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
195 {
196         struct bnxt_sw_rx_bd *sw_ring;
197         struct bnxt_tpa_info *tpa_info;
198         uint16_t i;
199
200         if (!rxq)
201                 return;
202
203         rte_spinlock_lock(&rxq->lock);
204
205         sw_ring = rxq->rx_ring->rx_buf_ring;
206         if (sw_ring) {
207                 for (i = 0;
208                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
209                         if (sw_ring[i].mbuf) {
210                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
211                                 sw_ring[i].mbuf = NULL;
212                         }
213                 }
214         }
215         /* Free up mbufs in Agg ring */
216         sw_ring = rxq->rx_ring->ag_buf_ring;
217         if (sw_ring) {
218                 for (i = 0;
219                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
220                         if (sw_ring[i].mbuf) {
221                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
222                                 sw_ring[i].mbuf = NULL;
223                         }
224                 }
225         }
226
227         /* Free up mbufs in TPA */
228         tpa_info = rxq->rx_ring->tpa_info;
229         if (tpa_info) {
230                 for (i = 0; i < BNXT_TPA_MAX; i++) {
231                         if (tpa_info[i].mbuf) {
232                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
233                                 tpa_info[i].mbuf = NULL;
234                         }
235                 }
236         }
237
238         rte_spinlock_unlock(&rxq->lock);
239 }
240
241 void bnxt_free_rx_mbufs(struct bnxt *bp)
242 {
243         struct bnxt_rx_queue *rxq;
244         int i;
245
246         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
247                 rxq = bp->rx_queues[i];
248                 bnxt_rx_queue_release_mbufs(rxq);
249         }
250 }
251
252 void bnxt_rx_queue_release_op(void *rx_queue)
253 {
254         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
255
256         if (rxq) {
257                 if (is_bnxt_in_error(rxq->bp))
258                         return;
259
260                 bnxt_rx_queue_release_mbufs(rxq);
261
262                 /* Free RX ring hardware descriptors */
263                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
264                 /* Free RX Agg ring hardware descriptors */
265                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
266
267                 /* Free RX completion ring hardware descriptors */
268                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
269
270                 bnxt_free_rxq_stats(rxq);
271                 rte_memzone_free(rxq->mz);
272                 rxq->mz = NULL;
273
274                 rte_free(rxq);
275         }
276 }
277
278 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
279                                uint16_t queue_idx,
280                                uint16_t nb_desc,
281                                unsigned int socket_id,
282                                const struct rte_eth_rxconf *rx_conf,
283                                struct rte_mempool *mp)
284 {
285         struct bnxt *bp = eth_dev->data->dev_private;
286         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
287         struct bnxt_rx_queue *rxq;
288         int rc = 0;
289         uint8_t queue_state;
290
291         rc = is_bnxt_in_error(bp);
292         if (rc)
293                 return rc;
294
295         if (queue_idx >= bp->max_rx_rings) {
296                 PMD_DRV_LOG(ERR,
297                         "Cannot create Rx ring %d. Only %d rings available\n",
298                         queue_idx, bp->max_rx_rings);
299                 return -EINVAL;
300         }
301
302         if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
303                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
304                 rc = -EINVAL;
305                 goto out;
306         }
307
308         if (eth_dev->data->rx_queues) {
309                 rxq = eth_dev->data->rx_queues[queue_idx];
310                 if (rxq)
311                         bnxt_rx_queue_release_op(rxq);
312         }
313         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
314                                  RTE_CACHE_LINE_SIZE, socket_id);
315         if (!rxq) {
316                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
317                 rc = -ENOMEM;
318                 goto out;
319         }
320         rxq->bp = bp;
321         rxq->mb_pool = mp;
322         rxq->nb_rx_desc = nb_desc;
323         rxq->rx_free_thresh = rx_conf->rx_free_thresh;
324
325         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
326
327         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
328         if (rc)
329                 goto out;
330
331         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
332         rxq->queue_id = queue_idx;
333         rxq->port_id = eth_dev->data->port_id;
334         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
335                 rxq->crc_len = RTE_ETHER_CRC_LEN;
336         else
337                 rxq->crc_len = 0;
338
339         eth_dev->data->rx_queues[queue_idx] = rxq;
340         /* Allocate RX ring hardware descriptors */
341         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring,
342                         rxq->nq_ring, "rxr")) {
343                 PMD_DRV_LOG(ERR,
344                         "ring_dma_zone_reserve for rx_ring failed!\n");
345                 bnxt_rx_queue_release_op(rxq);
346                 rc = -ENOMEM;
347                 goto out;
348         }
349         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
350
351         /* rxq 0 must not be stopped when used as async CPR */
352         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
353                 rxq->rx_deferred_start = false;
354         else
355                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
356
357         if (rxq->rx_deferred_start) {
358                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
359                 rxq->rx_started = false;
360         } else {
361                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
362                 rxq->rx_started = true;
363         }
364         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
365         rte_spinlock_init(&rxq->lock);
366
367 out:
368         return rc;
369 }
370
371 int
372 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
373 {
374         struct bnxt *bp = eth_dev->data->dev_private;
375         struct bnxt_rx_queue *rxq;
376         struct bnxt_cp_ring_info *cpr;
377         int rc = 0;
378
379         rc = is_bnxt_in_error(bp);
380         if (rc)
381                 return rc;
382
383         if (eth_dev->data->rx_queues) {
384                 rxq = eth_dev->data->rx_queues[queue_id];
385                 if (!rxq) {
386                         rc = -EINVAL;
387                         return rc;
388                 }
389                 cpr = rxq->cp_ring;
390                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
391         }
392         return rc;
393 }
394
395 int
396 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
397 {
398         struct bnxt *bp = eth_dev->data->dev_private;
399         struct bnxt_rx_queue *rxq;
400         struct bnxt_cp_ring_info *cpr;
401         int rc = 0;
402
403         rc = is_bnxt_in_error(bp);
404         if (rc)
405                 return rc;
406
407         if (eth_dev->data->rx_queues) {
408                 rxq = eth_dev->data->rx_queues[queue_id];
409                 if (!rxq) {
410                         rc = -EINVAL;
411                         return rc;
412                 }
413                 cpr = rxq->cp_ring;
414                 B_CP_DB_DISARM(cpr);
415         }
416         return rc;
417 }
418
419 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
420 {
421         struct bnxt *bp = dev->data->dev_private;
422         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
423         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
424         struct bnxt_vnic_info *vnic = NULL;
425         int rc = 0;
426
427         rc = is_bnxt_in_error(bp);
428         if (rc)
429                 return rc;
430
431         if (rxq == NULL) {
432                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
433                 return -EINVAL;
434         }
435
436         /* Set the queue state to started here.
437          * We check the status of the queue while posting buffer.
438          * If queue is it started, we do not post buffers for Rx.
439          */
440         rxq->rx_started = true;
441         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
442         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
443         if (rc)
444                 return rc;
445
446         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
447
448         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
449                 vnic = rxq->vnic;
450
451                 if (BNXT_HAS_RING_GRPS(bp)) {
452                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
453                                 return 0;
454
455                         vnic->fw_grp_ids[rx_queue_id] =
456                                         bp->grp_info[rx_queue_id].fw_grp_id;
457                         PMD_DRV_LOG(DEBUG,
458                                     "vnic = %p fw_grp_id = %d\n",
459                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
460                 }
461
462                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
463                 if (vnic->rx_queue_cnt > 1)
464                         rc = bnxt_vnic_rss_configure(bp, vnic);
465         }
466
467         if (rc == 0)
468                 dev->data->rx_queue_state[rx_queue_id] =
469                                 RTE_ETH_QUEUE_STATE_STARTED;
470         else
471                 rxq->rx_started = false;
472
473         PMD_DRV_LOG(INFO,
474                     "queue %d, rx_deferred_start %d, state %d!\n",
475                     rx_queue_id, rxq->rx_deferred_start,
476                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
477
478         return rc;
479 }
480
481 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
482 {
483         struct bnxt *bp = dev->data->dev_private;
484         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
485         struct bnxt_vnic_info *vnic = NULL;
486         struct bnxt_rx_queue *rxq = NULL;
487         int rc = 0;
488
489         rc = is_bnxt_in_error(bp);
490         if (rc)
491                 return rc;
492
493         /* For the stingray platform and other platforms needing tighter
494          * control of resource utilization, Rx CQ 0 also works as
495          * Default CQ for async notifications
496          */
497         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
498                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
499                 return -EINVAL;
500         }
501
502         rxq = bp->rx_queues[rx_queue_id];
503
504         if (rxq == NULL) {
505                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
506                 return -EINVAL;
507         }
508
509         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
510         rxq->rx_started = false;
511         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
512
513         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
514                 vnic = rxq->vnic;
515                 if (BNXT_HAS_RING_GRPS(bp))
516                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
517
518                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
519                 if (vnic->rx_queue_cnt > 1)
520                         rc = bnxt_vnic_rss_configure(bp, vnic);
521         }
522
523         if (rc == 0)
524                 bnxt_rx_queue_release_mbufs(rxq);
525
526         return rc;
527 }