drivers/net/bnxt/bnxt_rxq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7
   8 #include <rte_malloc.h>
   9
  10 #include "bnxt.h"
  11 #include "bnxt_filter.h"
  12 #include "bnxt_hwrm.h"
  13 #include "bnxt_ring.h"
  14 #include "bnxt_rxq.h"
  15 #include "bnxt_rxr.h"
  16 #include "bnxt_vnic.h"
  17 #include "hsi_struct_def_dpdk.h"
  18
  19 /*
  20  * RX Queues
  21  */
  22
  23 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  24 {
  25         if (rxq && rxq->cp_ring && rxq->cp_ring->hw_stats)
  26                 rxq->cp_ring->hw_stats = NULL;
  27 }
  28
  29 int bnxt_mq_rx_configure(struct bnxt *bp)
  30 {
  31         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  32         const struct rte_eth_vmdq_rx_conf *conf =
  33                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  34         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  35         int start_grp_id, end_grp_id = 1, rc = 0;
  36         struct bnxt_vnic_info *vnic;
  37         struct bnxt_filter_info *filter;
  38         enum rte_eth_nb_pools pools = bp->rx_cp_nr_rings, max_pools = 0;
  39         struct bnxt_rx_queue *rxq;
  40
  41         bp->nr_vnics = 0;
  42
  43         /* Single queue mode */
  44         if (bp->rx_cp_nr_rings < 2) {
  45                 vnic = &bp->vnic_info[0];
  46                 if (!vnic) {
  47                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
  48                         rc = -ENOMEM;
  49                         goto err_out;
  50                 }
  51                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
  52                 bp->nr_vnics++;
  53
  54                 rxq = bp->eth_dev->data->rx_queues[0];
  55                 rxq->vnic = vnic;
  56
  57                 vnic->func_default = true;
  58                 vnic->start_grp_id = 0;
  59                 vnic->end_grp_id = vnic->start_grp_id;
  60                 filter = bnxt_alloc_filter(bp);
  61                 if (!filter) {
  62                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
  63                         rc = -ENOMEM;
  64                         goto err_out;
  65                 }
  66                 filter->mac_index = 0;
  67                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
  68                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
  69                 goto out;
  70         }
  71
  72         /* Multi-queue mode */
  73         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
  74                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
  75
  76                 switch (dev_conf->rxmode.mq_mode) {
  77                 case ETH_MQ_RX_VMDQ_RSS:
  78                 case ETH_MQ_RX_VMDQ_ONLY:
  79                 case ETH_MQ_RX_VMDQ_DCB_RSS:
  80                         /* FALLTHROUGH */
  81                         /* ETH_8/64_POOLs */
  82                         pools = conf->nb_queue_pools;
  83                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
  84                         max_pools = RTE_MIN(bp->max_vnics,
  85                                             RTE_MIN(bp->max_l2_ctx,
  86                                             RTE_MIN(bp->max_rsscos_ctx,
  87                                                     ETH_64_POOLS)));
  88                         PMD_DRV_LOG(DEBUG,
  89                                     "pools = %u max_pools = %u\n",
  90                                     pools, max_pools);
  91                         if (pools > max_pools)
  92                                 pools = max_pools;
  93                         break;
  94                 case ETH_MQ_RX_RSS:
  95                         pools = bp->rx_cosq_cnt ? bp->rx_cosq_cnt : 1;
  96                         break;
  97                 default:
  98                         PMD_DRV_LOG(ERR, "Unsupported mq_mod %d\n",
  99                                 dev_conf->rxmode.mq_mode);
 100                         rc = -EINVAL;
 101                         goto err_out;
 102                 }
 103         }
 104         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
 105         bp->rx_num_qs_per_vnic = nb_q_per_grp;
 106         PMD_DRV_LOG(DEBUG, "pools = %u nb_q_per_grp = %u\n",
 107                     pools, nb_q_per_grp);
 108         start_grp_id = 0;
 109         end_grp_id = nb_q_per_grp;
 110
 111         for (i = 0; i < pools; i++) {
 112                 vnic = &bp->vnic_info[i];
 113                 if (!vnic) {
 114                         PMD_DRV_LOG(ERR, "VNIC alloc failed\n");
 115                         rc = -ENOMEM;
 116                         goto err_out;
 117                 }
 118                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 119                 bp->nr_vnics++;
 120
 121                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 122                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 123                         rxq->vnic = vnic;
 124                         PMD_DRV_LOG(DEBUG,
 125                                     "rxq[%d] = %p vnic[%d] = %p\n",
 126                                     ring_idx, rxq, i, vnic);
 127                 }
 128                 if (i == 0) {
 129                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
 130                                 bp->eth_dev->data->promiscuous = 1;
 131                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 132                         }
 133                         vnic->func_default = true;
 134                 }
 135                 vnic->start_grp_id = start_grp_id;
 136                 vnic->end_grp_id = end_grp_id;
 137
 138                 if (i) {
 139                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
 140                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
 141                                 vnic->rss_dflt_cr = true;
 142                         goto skip_filter_allocation;
 143                 }
 144                 filter = bnxt_alloc_filter(bp);
 145                 if (!filter) {
 146                         PMD_DRV_LOG(ERR, "L2 filter alloc failed\n");
 147                         rc = -ENOMEM;
 148                         goto err_out;
 149                 }
 150                 filter->mac_index = 0;
 151                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST;
 152                 /*
 153                  * TODO: Configure & associate CFA rule for
 154                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 155                  */
 156                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 157
 158 skip_filter_allocation:
 159                 start_grp_id = end_grp_id;
 160                 end_grp_id += nb_q_per_grp;
 161         }
 162
 163 out:
 164         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 165                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
 166
 167                 if (bp->flags & BNXT_FLAG_UPDATE_HASH) {
 168                         rss = &bp->rss_conf;
 169                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 170                 }
 171
 172                 for (i = 0; i < bp->nr_vnics; i++) {
 173                         vnic = &bp->vnic_info[i];
 174                         vnic->hash_type =
 175                                 bnxt_rte_to_hwrm_hash_types(rss->rss_hf);
 176
 177                         /*
 178                          * Use the supplied key if the key length is
 179                          * acceptable and the rss_key is not NULL
 180                          */
 181                         if (rss->rss_key &&
 182                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 183                                 memcpy(vnic->rss_hash_key,
 184                                        rss->rss_key, rss->rss_key_len);
 185                 }
 186         }
 187
 188         return rc;
 189
 190 err_out:
 191         /* Free allocated vnic/filters */
 192
 193         return rc;
 194 }
 195
 196 void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 197 {
 198         struct bnxt_sw_rx_bd *sw_ring;
 199         struct bnxt_tpa_info *tpa_info;
 200         uint16_t i;
 201
 202         if (!rxq)
 203                 return;
 204
 205         rte_spinlock_lock(&rxq->lock);
 206
 207         sw_ring = rxq->rx_ring->rx_buf_ring;
 208         if (sw_ring) {
 209                 for (i = 0;
 210                      i < rxq->rx_ring->rx_ring_struct->ring_size; i++) {
 211                         if (sw_ring[i].mbuf) {
 212                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 213                                 sw_ring[i].mbuf = NULL;
 214                         }
 215                 }
 216         }
 217         /* Free up mbufs in Agg ring */
 218         sw_ring = rxq->rx_ring->ag_buf_ring;
 219         if (sw_ring) {
 220                 for (i = 0;
 221                      i < rxq->rx_ring->ag_ring_struct->ring_size; i++) {
 222                         if (sw_ring[i].mbuf) {
 223                                 rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 224                                 sw_ring[i].mbuf = NULL;
 225                         }
 226                 }
 227         }
 228
 229         /* Free up mbufs in TPA */
 230         tpa_info = rxq->rx_ring->tpa_info;
 231         if (tpa_info) {
 232                 int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 233
 234                 for (i = 0; i < max_aggs; i++) {
 235                         if (tpa_info[i].mbuf) {
 236                                 rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 237                                 tpa_info[i].mbuf = NULL;
 238                         }
 239                 }
 240         }
 241
 242         rte_spinlock_unlock(&rxq->lock);
 243 }
 244
 245 void bnxt_free_rx_mbufs(struct bnxt *bp)
 246 {
 247         struct bnxt_rx_queue *rxq;
 248         int i;
 249
 250         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 251                 rxq = bp->rx_queues[i];
 252                 bnxt_rx_queue_release_mbufs(rxq);
 253         }
 254 }
 255
 256 void bnxt_rx_queue_release_op(void *rx_queue)
 257 {
 258         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
 259
 260         if (rxq) {
 261                 if (is_bnxt_in_error(rxq->bp))
 262                         return;
 263
 264                 bnxt_rx_queue_release_mbufs(rxq);
 265
 266                 /* Free RX ring hardware descriptors */
 267                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 268                 /* Free RX Agg ring hardware descriptors */
 269                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 270
 271                 /* Free RX completion ring hardware descriptors */
 272                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 273
 274                 bnxt_free_rxq_stats(rxq);
 275                 rte_memzone_free(rxq->mz);
 276                 rxq->mz = NULL;
 277
 278                 rte_free(rxq);
 279         }
 280 }
 281
 282 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 283                                uint16_t queue_idx,
 284                                uint16_t nb_desc,
 285                                unsigned int socket_id,
 286                                const struct rte_eth_rxconf *rx_conf,
 287                                struct rte_mempool *mp)
 288 {
 289         struct bnxt *bp = eth_dev->data->dev_private;
 290         uint64_t rx_offloads = eth_dev->data->dev_conf.rxmode.offloads;
 291         struct bnxt_rx_queue *rxq;
 292         int rc = 0;
 293         uint8_t queue_state;
 294
 295         rc = is_bnxt_in_error(bp);
 296         if (rc)
 297                 return rc;
 298
 299         if (queue_idx >= bp->max_rx_rings) {
 300                 PMD_DRV_LOG(ERR,
 301                         "Cannot create Rx ring %d. Only %d rings available\n",
 302                         queue_idx, bp->max_rx_rings);
 303                 return -EINVAL;
 304         }
 305
 306         if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
 307                 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc);
 308                 rc = -EINVAL;
 309                 goto out;
 310         }
 311
 312         if (eth_dev->data->rx_queues) {
 313                 rxq = eth_dev->data->rx_queues[queue_idx];
 314                 if (rxq)
 315                         bnxt_rx_queue_release_op(rxq);
 316         }
 317         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 318                                  RTE_CACHE_LINE_SIZE, socket_id);
 319         if (!rxq) {
 320                 PMD_DRV_LOG(ERR, "bnxt_rx_queue allocation failed!\n");
 321                 rc = -ENOMEM;
 322                 goto out;
 323         }
 324         rxq->bp = bp;
 325         rxq->mb_pool = mp;
 326         rxq->nb_rx_desc = nb_desc;
 327         rxq->rx_free_thresh = rx_conf->rx_free_thresh;
 328
 329         PMD_DRV_LOG(DEBUG, "RX Buf MTU %d\n", eth_dev->data->mtu);
 330
 331         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 332         if (rc)
 333                 goto out;
 334
 335         PMD_DRV_LOG(DEBUG, "RX Buf size is %d\n", rxq->rx_buf_size);
 336         rxq->queue_id = queue_idx;
 337         rxq->port_id = eth_dev->data->port_id;
 338         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC)
 339                 rxq->crc_len = RTE_ETHER_CRC_LEN;
 340         else
 341                 rxq->crc_len = 0;
 342
 343         eth_dev->data->rx_queues[queue_idx] = rxq;
 344         /* Allocate RX ring hardware descriptors */
 345         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq, rxq->cp_ring, NULL,
 346                              "rxr")) {
 347                 PMD_DRV_LOG(ERR,
 348                         "ring_dma_zone_reserve for rx_ring failed!\n");
 349                 bnxt_rx_queue_release_op(rxq);
 350                 rc = -ENOMEM;
 351                 goto out;
 352         }
 353         rte_atomic64_init(&rxq->rx_mbuf_alloc_fail);
 354
 355         /* rxq 0 must not be stopped when used as async CPR */
 356         if (!BNXT_NUM_ASYNC_CPR(bp) && queue_idx == 0)
 357                 rxq->rx_deferred_start = false;
 358         else
 359                 rxq->rx_deferred_start = rx_conf->rx_deferred_start;
 360
 361         if (rxq->rx_deferred_start) {
 362                 queue_state = RTE_ETH_QUEUE_STATE_STOPPED;
 363                 rxq->rx_started = false;
 364         } else {
 365                 queue_state = RTE_ETH_QUEUE_STATE_STARTED;
 366                 rxq->rx_started = true;
 367         }
 368         eth_dev->data->rx_queue_state[queue_idx] = queue_state;
 369         rte_spinlock_init(&rxq->lock);
 370
 371         /* Configure mtu if it is different from what was configured before */
 372         if (!queue_idx)
 373                 bnxt_mtu_set_op(eth_dev, eth_dev->data->mtu);
 374
 375 out:
 376         return rc;
 377 }
 378
 379 int
 380 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 381 {
 382         struct bnxt *bp = eth_dev->data->dev_private;
 383         struct bnxt_rx_queue *rxq;
 384         struct bnxt_cp_ring_info *cpr;
 385         int rc = 0;
 386
 387         rc = is_bnxt_in_error(bp);
 388         if (rc)
 389                 return rc;
 390
 391         if (eth_dev->data->rx_queues) {
 392                 rxq = eth_dev->data->rx_queues[queue_id];
 393                 if (!rxq)
 394                         return -EINVAL;
 395
 396                 cpr = rxq->cp_ring;
 397                 B_CP_DB_REARM(cpr, cpr->cp_raw_cons);
 398         }
 399         return rc;
 400 }
 401
 402 int
 403 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 404 {
 405         struct bnxt *bp = eth_dev->data->dev_private;
 406         struct bnxt_rx_queue *rxq;
 407         struct bnxt_cp_ring_info *cpr;
 408         int rc = 0;
 409
 410         rc = is_bnxt_in_error(bp);
 411         if (rc)
 412                 return rc;
 413
 414         if (eth_dev->data->rx_queues) {
 415                 rxq = eth_dev->data->rx_queues[queue_id];
 416                 if (!rxq)
 417                         return -EINVAL;
 418
 419                 cpr = rxq->cp_ring;
 420                 B_CP_DB_DISARM(cpr);
 421         }
 422         return rc;
 423 }
 424
 425 int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 426 {
 427         struct bnxt *bp = dev->data->dev_private;
 428         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 429         struct bnxt_rx_queue *rxq = bp->rx_queues[rx_queue_id];
 430         struct bnxt_vnic_info *vnic = NULL;
 431         int rc = 0;
 432
 433         rc = is_bnxt_in_error(bp);
 434         if (rc)
 435                 return rc;
 436
 437         if (rxq == NULL) {
 438                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 439                 return -EINVAL;
 440         }
 441
 442         /* Set the queue state to started here.
 443          * We check the status of the queue while posting buffer.
 444          * If queue is it started, we do not post buffers for Rx.
 445          */
 446         rxq->rx_started = true;
 447         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 448
 449         bnxt_free_hwrm_rx_ring(bp, rx_queue_id);
 450         rc = bnxt_alloc_hwrm_rx_ring(bp, rx_queue_id);
 451         if (rc)
 452                 return rc;
 453
 454         if (BNXT_CHIP_THOR(bp)) {
 455                 /* Reconfigure default receive ring and MRU. */
 456                 bnxt_hwrm_vnic_cfg(bp, rxq->vnic);
 457         }
 458         PMD_DRV_LOG(INFO, "Rx queue started %d\n", rx_queue_id);
 459
 460         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 461                 vnic = rxq->vnic;
 462
 463                 if (BNXT_HAS_RING_GRPS(bp)) {
 464                         if (vnic->fw_grp_ids[rx_queue_id] != INVALID_HW_RING_ID)
 465                                 return 0;
 466
 467                         vnic->fw_grp_ids[rx_queue_id] =
 468                                         bp->grp_info[rx_queue_id].fw_grp_id;
 469                         PMD_DRV_LOG(DEBUG,
 470                                     "vnic = %p fw_grp_id = %d\n",
 471                                     vnic, bp->grp_info[rx_queue_id].fw_grp_id);
 472                 }
 473
 474                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 475                 rc = bnxt_vnic_rss_configure(bp, vnic);
 476         }
 477
 478         if (rc != 0) {
 479                 dev->data->rx_queue_state[rx_queue_id] =
 480                                 RTE_ETH_QUEUE_STATE_STOPPED;
 481                 rxq->rx_started = false;
 482         }
 483
 484         PMD_DRV_LOG(INFO,
 485                     "queue %d, rx_deferred_start %d, state %d!\n",
 486                     rx_queue_id, rxq->rx_deferred_start,
 487                     bp->eth_dev->data->rx_queue_state[rx_queue_id]);
 488
 489         return rc;
 490 }
 491
 492 int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 493 {
 494         struct bnxt *bp = dev->data->dev_private;
 495         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 496         struct bnxt_vnic_info *vnic = NULL;
 497         struct bnxt_rx_queue *rxq = NULL;
 498         int active_queue_cnt = 0;
 499         int i, rc = 0;
 500
 501         rc = is_bnxt_in_error(bp);
 502         if (rc)
 503                 return rc;
 504
 505         /* For the stingray platform and other platforms needing tighter
 506          * control of resource utilization, Rx CQ 0 also works as
 507          * Default CQ for async notifications
 508          */
 509         if (!BNXT_NUM_ASYNC_CPR(bp) && !rx_queue_id) {
 510                 PMD_DRV_LOG(ERR, "Cannot stop Rx queue id %d\n", rx_queue_id);
 511                 return -EINVAL;
 512         }
 513
 514         rxq = bp->rx_queues[rx_queue_id];
 515         vnic = rxq->vnic;
 516
 517         if (!rxq || !vnic) {
 518                 PMD_DRV_LOG(ERR, "Invalid Rx queue %d\n", rx_queue_id);
 519                 return -EINVAL;
 520         }
 521
 522         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 523         rxq->rx_started = false;
 524         PMD_DRV_LOG(DEBUG, "Rx queue stopped\n");
 525
 526         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 527                 if (BNXT_HAS_RING_GRPS(bp))
 528                         vnic->fw_grp_ids[rx_queue_id] = INVALID_HW_RING_ID;
 529
 530                 PMD_DRV_LOG(DEBUG, "Rx Queue Count %d\n", vnic->rx_queue_cnt);
 531                 rc = bnxt_vnic_rss_configure(bp, vnic);
 532         }
 533
 534         if (BNXT_CHIP_THOR(bp)) {
 535                 /* Compute current number of active receive queues. */
 536                 for (i = vnic->start_grp_id; i < vnic->end_grp_id; i++)
 537                         if (bp->rx_queues[i]->rx_started)
 538                                 active_queue_cnt++;
 539
 540                 /*
 541                  * For Thor, we need to ensure that the VNIC default receive
 542                  * ring corresponds to an active receive queue. When no queue
 543                  * is active, we need to temporarily set the MRU to zero so
 544                  * that packets are dropped early in the receive pipeline in
 545                  * order to prevent the VNIC default receive ring from being
 546                  * accessed.
 547                  */
 548                 if (active_queue_cnt == 0) {
 549                         uint16_t saved_mru = vnic->mru;
 550
 551                         vnic->mru = 0;
 552                         /* Reconfigure default receive ring and MRU. */
 553                         bnxt_hwrm_vnic_cfg(bp, vnic);
 554                         vnic->mru = saved_mru;
 555                 } else {
 556                         /* Reconfigure default receive ring. */
 557                         bnxt_hwrm_vnic_cfg(bp, vnic);
 558                 }
 559         }
 560
 561         if (rc == 0)
 562                 bnxt_rx_queue_release_mbufs(rxq);
 563
 564         return rc;
 565 }