drivers/net/bnxt/bnxt_rxq.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35
  36 #include <rte_malloc.h>
  37
  38 #include "bnxt.h"
  39 #include "bnxt_cpr.h"
  40 #include "bnxt_filter.h"
  41 #include "bnxt_hwrm.h"
  42 #include "bnxt_ring.h"
  43 #include "bnxt_rxq.h"
  44 #include "bnxt_rxr.h"
  45 #include "bnxt_vnic.h"
  46 #include "hsi_struct_def_dpdk.h"
  47
  48 /*
  49  * RX Queues
  50  */
  51
  52 void bnxt_free_rxq_stats(struct bnxt_rx_queue *rxq)
  53 {
  54         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
  55
  56         if (cpr->hw_stats)
  57                 cpr->hw_stats = NULL;
  58 }
  59
  60 int bnxt_mq_rx_configure(struct bnxt *bp)
  61 {
  62         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
  63         const struct rte_eth_vmdq_rx_conf *conf =
  64                     &dev_conf->rx_adv_conf.vmdq_rx_conf;
  65         unsigned int i, j, nb_q_per_grp = 1, ring_idx = 0;
  66         int start_grp_id, end_grp_id = 1, rc = 0;
  67         struct bnxt_vnic_info *vnic;
  68         struct bnxt_filter_info *filter;
  69         enum rte_eth_nb_pools pools = bp->rx_cp_nr_rings, max_pools = 0;
  70         struct bnxt_rx_queue *rxq;
  71
  72         bp->nr_vnics = 0;
  73
  74         /* Single queue mode */
  75         if (bp->rx_cp_nr_rings < 2) {
  76                 vnic = bnxt_alloc_vnic(bp);
  77                 if (!vnic) {
  78                         RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
  79                         rc = -ENOMEM;
  80                         goto err_out;
  81                 }
  82                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
  83                 STAILQ_INSERT_TAIL(&bp->ff_pool[0], vnic, next);
  84                 bp->nr_vnics++;
  85
  86                 rxq = bp->eth_dev->data->rx_queues[0];
  87                 rxq->vnic = vnic;
  88
  89                 vnic->func_default = true;
  90                 vnic->ff_pool_idx = 0;
  91                 vnic->start_grp_id = 0;
  92                 vnic->end_grp_id = vnic->start_grp_id;
  93                 filter = bnxt_alloc_filter(bp);
  94                 if (!filter) {
  95                         RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
  96                         rc = -ENOMEM;
  97                         goto err_out;
  98                 }
  99                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 100                 goto out;
 101         }
 102
 103         /* Multi-queue mode */
 104         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB_RSS) {
 105                 /* VMDq ONLY, VMDq+RSS, VMDq+DCB, VMDq+DCB+RSS */
 106
 107                 switch (dev_conf->rxmode.mq_mode) {
 108                 case ETH_MQ_RX_VMDQ_RSS:
 109                 case ETH_MQ_RX_VMDQ_ONLY:
 110                         /* ETH_8/64_POOLs */
 111                         pools = conf->nb_queue_pools;
 112                         /* For each pool, allocate MACVLAN CFA rule & VNIC */
 113                         max_pools = RTE_MIN(bp->max_vnics,
 114                                             RTE_MIN(bp->max_l2_ctx,
 115                                             RTE_MIN(bp->max_rsscos_ctx,
 116                                                     ETH_64_POOLS)));
 117                         if (pools > max_pools)
 118                                 pools = max_pools;
 119                         break;
 120                 case ETH_MQ_RX_RSS:
 121                         pools = bp->rx_cp_nr_rings;
 122                         break;
 123                 default:
 124                         RTE_LOG(ERR, PMD, "Unsupported mq_mod %d\n",
 125                                 dev_conf->rxmode.mq_mode);
 126                         rc = -EINVAL;
 127                         goto err_out;
 128                 }
 129         }
 130
 131         nb_q_per_grp = bp->rx_cp_nr_rings / pools;
 132         start_grp_id = 0;
 133         end_grp_id = nb_q_per_grp;
 134
 135         for (i = 0; i < pools; i++) {
 136                 vnic = bnxt_alloc_vnic(bp);
 137                 if (!vnic) {
 138                         RTE_LOG(ERR, PMD, "VNIC alloc failed\n");
 139                         rc = -ENOMEM;
 140                         goto err_out;
 141                 }
 142                 vnic->flags |= BNXT_VNIC_INFO_BCAST;
 143                 STAILQ_INSERT_TAIL(&bp->ff_pool[i], vnic, next);
 144                 bp->nr_vnics++;
 145
 146                 for (j = 0; j < nb_q_per_grp; j++, ring_idx++) {
 147                         rxq = bp->eth_dev->data->rx_queues[ring_idx];
 148                         rxq->vnic = vnic;
 149                 }
 150                 if (i == 0) {
 151                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB) {
 152                                 bp->eth_dev->data->promiscuous = 1;
 153                                 vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 154                         }
 155                         vnic->func_default = true;
 156                 }
 157                 vnic->ff_pool_idx = i;
 158                 vnic->start_grp_id = start_grp_id;
 159                 vnic->end_grp_id = end_grp_id;
 160
 161                 if (i) {
 162                         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_VMDQ_DCB ||
 163                             !(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS))
 164                                 vnic->rss_dflt_cr = true;
 165                         goto skip_filter_allocation;
 166                 }
 167                 filter = bnxt_alloc_filter(bp);
 168                 if (!filter) {
 169                         RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 170                         rc = -ENOMEM;
 171                         goto err_out;
 172                 }
 173                 for (j = 0; j < conf->nb_pool_maps; j++) {
 174                         if (conf->pool_map[j].pools & (1UL << i)) {
 175                                 RTE_LOG(ERR, PMD,
 176                                         "Add vlan %u to vmdq pool %u\n",
 177                                         conf->pool_map[j].vlan_id, i);
 178
 179                                 filter->l2_ivlan = conf->pool_map[j].vlan_id;
 180                                 filter->enables |=
 181                                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN;
 182                         }
 183                 }
 184                 /*
 185                  * TODO: Configure & associate CFA rule for
 186                  * each VNIC for each VMDq with MACVLAN, MACVLAN+TC
 187                  */
 188                 STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 189
 190 skip_filter_allocation:
 191                 start_grp_id = end_grp_id;
 192                 end_grp_id += nb_q_per_grp;
 193         }
 194
 195 out:
 196         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 197                 struct rte_eth_rss_conf *rss = &dev_conf->rx_adv_conf.rss_conf;
 198                 uint16_t hash_type = 0;
 199
 200                 if (bp->flags & BNXT_FLAG_UPDATE_HASH) {
 201                         rss = &bp->rss_conf;
 202                         bp->flags &= ~BNXT_FLAG_UPDATE_HASH;
 203                 }
 204
 205                 if (rss->rss_hf & ETH_RSS_IPV4)
 206                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 207                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 208                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 209                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 210                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 211                 if (rss->rss_hf & ETH_RSS_IPV6)
 212                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 213                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 214                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 215                 if (rss->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 216                         hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 217
 218                 for (i = 0; i < bp->nr_vnics; i++) {
 219                         STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 220                         vnic->hash_type |= hash_type;
 221
 222                         /*
 223                          * Use the supplied key if the key length is
 224                          * acceptable and the rss_key is not NULL
 225                          */
 226                         if (rss->rss_key &&
 227                             rss->rss_key_len <= HW_HASH_KEY_SIZE)
 228                                 memcpy(vnic->rss_hash_key,
 229                                        rss->rss_key, rss->rss_key_len);
 230                         }
 231                 }
 232         }
 233
 234         return rc;
 235
 236 err_out:
 237         /* Free allocated vnic/filters */
 238
 239         return rc;
 240 }
 241
 242 static void bnxt_rx_queue_release_mbufs(struct bnxt_rx_queue *rxq)
 243 {
 244         struct bnxt_sw_rx_bd *sw_ring;
 245         struct bnxt_tpa_info *tpa_info;
 246         uint16_t i;
 247
 248         if (rxq) {
 249                 sw_ring = rxq->rx_ring->rx_buf_ring;
 250                 if (sw_ring) {
 251                         for (i = 0; i < rxq->nb_rx_desc; i++) {
 252                                 if (sw_ring[i].mbuf) {
 253                                         rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 254                                         sw_ring[i].mbuf = NULL;
 255                                 }
 256                         }
 257                 }
 258                 /* Free up mbufs in Agg ring */
 259                 sw_ring = rxq->rx_ring->ag_buf_ring;
 260                 if (sw_ring) {
 261                         for (i = 0; i < rxq->nb_rx_desc; i++) {
 262                                 if (sw_ring[i].mbuf) {
 263                                         rte_pktmbuf_free_seg(sw_ring[i].mbuf);
 264                                         sw_ring[i].mbuf = NULL;
 265                                 }
 266                         }
 267                 }
 268
 269                 /* Free up mbufs in TPA */
 270                 tpa_info = rxq->rx_ring->tpa_info;
 271                 if (tpa_info) {
 272                         for (i = 0; i < BNXT_TPA_MAX; i++) {
 273                                 if (tpa_info[i].mbuf) {
 274                                         rte_pktmbuf_free_seg(tpa_info[i].mbuf);
 275                                         tpa_info[i].mbuf = NULL;
 276                                 }
 277                         }
 278                 }
 279         }
 280 }
 281
 282 void bnxt_free_rx_mbufs(struct bnxt *bp)
 283 {
 284         struct bnxt_rx_queue *rxq;
 285         int i;
 286
 287         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 288                 rxq = bp->rx_queues[i];
 289                 bnxt_rx_queue_release_mbufs(rxq);
 290         }
 291 }
 292
 293 void bnxt_rx_queue_release_op(void *rx_queue)
 294 {
 295         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
 296
 297         if (rxq) {
 298                 bnxt_rx_queue_release_mbufs(rxq);
 299
 300                 /* Free RX ring hardware descriptors */
 301                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 302                 /* Free RX Agg ring hardware descriptors */
 303                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 304
 305                 /* Free RX completion ring hardware descriptors */
 306                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 307
 308                 bnxt_free_rxq_stats(rxq);
 309
 310                 rte_free(rxq);
 311         }
 312 }
 313
 314 int bnxt_rx_queue_setup_op(struct rte_eth_dev *eth_dev,
 315                                uint16_t queue_idx,
 316                                uint16_t nb_desc,
 317                                unsigned int socket_id,
 318                                const struct rte_eth_rxconf *rx_conf,
 319                                struct rte_mempool *mp)
 320 {
 321         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 322         struct bnxt_rx_queue *rxq;
 323         int rc = 0;
 324
 325         if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) {
 326                 RTE_LOG(ERR, PMD, "nb_desc %d is invalid\n", nb_desc);
 327                 rc = -EINVAL;
 328                 goto out;
 329         }
 330
 331         if (eth_dev->data->rx_queues) {
 332                 rxq = eth_dev->data->rx_queues[queue_idx];
 333                 if (rxq)
 334                         bnxt_rx_queue_release_op(rxq);
 335         }
 336         rxq = rte_zmalloc_socket("bnxt_rx_queue", sizeof(struct bnxt_rx_queue),
 337                                  RTE_CACHE_LINE_SIZE, socket_id);
 338         if (!rxq) {
 339                 RTE_LOG(ERR, PMD, "bnxt_rx_queue allocation failed!\n");
 340                 rc = -ENOMEM;
 341                 goto out;
 342         }
 343         rxq->bp = bp;
 344         rxq->mb_pool = mp;
 345         rxq->nb_rx_desc = nb_desc;
 346         rxq->rx_free_thresh = rx_conf->rx_free_thresh;
 347
 348         RTE_LOG(DEBUG, PMD, "RX Buf size is %d\n", rxq->rx_buf_use_size);
 349         RTE_LOG(DEBUG, PMD, "RX Buf MTU %d\n", eth_dev->data->mtu);
 350
 351         rc = bnxt_init_rx_ring_struct(rxq, socket_id);
 352         if (rc)
 353                 goto out;
 354
 355         rxq->queue_id = queue_idx;
 356         rxq->port_id = eth_dev->data->port_id;
 357         rxq->crc_len = (uint8_t)((eth_dev->data->dev_conf.rxmode.hw_strip_crc) ?
 358                                 0 : ETHER_CRC_LEN);
 359
 360         eth_dev->data->rx_queues[queue_idx] = rxq;
 361         /* Allocate RX ring hardware descriptors */
 362         if (bnxt_alloc_rings(bp, queue_idx, NULL, rxq->rx_ring, rxq->cp_ring,
 363                         "rxr")) {
 364                 RTE_LOG(ERR, PMD,
 365                         "ring_dma_zone_reserve for rx_ring failed!\n");
 366                 bnxt_rx_queue_release_op(rxq);
 367                 rc = -ENOMEM;
 368                 goto out;
 369         }
 370
 371 out:
 372         return rc;
 373 }
 374
 375 int
 376 bnxt_rx_queue_intr_enable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 377 {
 378         struct bnxt_rx_queue *rxq;
 379         struct bnxt_cp_ring_info *cpr;
 380         int rc = 0;
 381
 382         if (eth_dev->data->rx_queues) {
 383                 rxq = eth_dev->data->rx_queues[queue_id];
 384                 if (!rxq) {
 385                         rc = -EINVAL;
 386                         return rc;
 387                 }
 388                 cpr = rxq->cp_ring;
 389                 B_CP_DB_ARM(cpr);
 390         }
 391         return rc;
 392 }
 393
 394 int
 395 bnxt_rx_queue_intr_disable_op(struct rte_eth_dev *eth_dev, uint16_t queue_id)
 396 {
 397         struct bnxt_rx_queue *rxq;
 398         struct bnxt_cp_ring_info *cpr;
 399         int rc = 0;
 400
 401         if (eth_dev->data->rx_queues) {
 402                 rxq = eth_dev->data->rx_queues[queue_id];
 403                 if (!rxq) {
 404                         rc = -EINVAL;
 405                         return rc;
 406                 }
 407                 cpr = rxq->cp_ring;
 408                 B_CP_DB_DISARM(cpr);
 409         }
 410         return rc;
 411 }