03dae571b6df2b034e18ca9478fb642716777803
[dpdk.git] / drivers / net / bnxt / bnxt_rxr.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2018 Broadcom
3  * All rights reserved.
4  */
5
6 #include <inttypes.h>
7 #include <stdbool.h>
8
9 #include <rte_bitmap.h>
10 #include <rte_byteorder.h>
11 #include <rte_malloc.h>
12 #include <rte_memory.h>
13
14 #include "bnxt.h"
15 #include "bnxt_ring.h"
16 #include "bnxt_rxr.h"
17 #include "bnxt_rxq.h"
18 #include "hsi_struct_def_dpdk.h"
19 #ifdef RTE_LIBRTE_IEEE1588
20 #include "bnxt_hwrm.h"
21 #endif
22
23 /*
24  * RX Ring handling
25  */
26
27 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
28 {
29         struct rte_mbuf *data;
30
31         data = rte_mbuf_raw_alloc(mb);
32
33         return data;
34 }
35
36 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
37                                      struct bnxt_rx_ring_info *rxr,
38                                      uint16_t prod)
39 {
40         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
41         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[prod];
42         struct rte_mbuf *mbuf;
43
44         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
45         if (!mbuf) {
46                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
47                 return -ENOMEM;
48         }
49
50         rx_buf->mbuf = mbuf;
51         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
52
53         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
54
55         return 0;
56 }
57
58 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
59                                      struct bnxt_rx_ring_info *rxr,
60                                      uint16_t prod)
61 {
62         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
63         struct bnxt_sw_rx_bd *rx_buf = &rxr->ag_buf_ring[prod];
64         struct rte_mbuf *mbuf;
65
66         if (rxbd == NULL) {
67                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
68                 return -EINVAL;
69         }
70
71         if (rx_buf == NULL) {
72                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
73                 return -EINVAL;
74         }
75
76         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
77         if (!mbuf) {
78                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
79                 return -ENOMEM;
80         }
81
82         rx_buf->mbuf = mbuf;
83         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
84
85         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
86
87         return 0;
88 }
89
90 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
91                                struct rte_mbuf *mbuf)
92 {
93         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
94         struct bnxt_sw_rx_bd *prod_rx_buf;
95         struct rx_prod_pkt_bd *prod_bd;
96
97         prod_rx_buf = &rxr->rx_buf_ring[prod];
98
99         RTE_ASSERT(prod_rx_buf->mbuf == NULL);
100         RTE_ASSERT(mbuf != NULL);
101
102         prod_rx_buf->mbuf = mbuf;
103
104         prod_bd = &rxr->rx_desc_ring[prod];
105
106         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
107
108         rxr->rx_prod = prod;
109 }
110
111 static inline
112 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
113                                      uint16_t cons)
114 {
115         struct bnxt_sw_rx_bd *cons_rx_buf;
116         struct rte_mbuf *mbuf;
117
118         cons_rx_buf = &rxr->rx_buf_ring[cons];
119         RTE_ASSERT(cons_rx_buf->mbuf != NULL);
120         mbuf = cons_rx_buf->mbuf;
121         cons_rx_buf->mbuf = NULL;
122         return mbuf;
123 }
124
125 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
126                            struct rx_tpa_start_cmpl *tpa_start,
127                            struct rx_tpa_start_cmpl_hi *tpa_start1)
128 {
129         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
130         uint16_t agg_id;
131         uint16_t data_cons;
132         struct bnxt_tpa_info *tpa_info;
133         struct rte_mbuf *mbuf;
134
135         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
136
137         data_cons = tpa_start->opaque;
138         tpa_info = &rxr->tpa_info[agg_id];
139
140         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
141
142         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
143
144         tpa_info->agg_count = 0;
145         tpa_info->mbuf = mbuf;
146         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
147
148         mbuf->nb_segs = 1;
149         mbuf->next = NULL;
150         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
151         mbuf->data_len = mbuf->pkt_len;
152         mbuf->port = rxq->port_id;
153         mbuf->ol_flags = PKT_RX_LRO;
154         if (likely(tpa_start->flags_type &
155                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
156                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
157                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
158         } else {
159                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
160                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
161         }
162         if (tpa_start1->flags2 &
163             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
164                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
165                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
166         }
167         if (likely(tpa_start1->flags2 &
168                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
169                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
170
171         /* recycle next mbuf */
172         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
173         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
174 }
175
176 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
177                 uint8_t agg_bufs, uint32_t raw_cp_cons)
178 {
179         uint16_t last_cp_cons;
180         struct rx_pkt_cmpl *agg_cmpl;
181
182         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
183         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
184         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
185         cpr->valid = FLIP_VALID(raw_cp_cons,
186                                 cpr->cp_ring_struct->ring_mask,
187                                 cpr->valid);
188         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
189 }
190
191 /* TPA consume agg buffer out of order, allocate connected data only */
192 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
193 {
194         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
195         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
196
197         /* TODO batch allocation for better performance */
198         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
199                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
200                         PMD_DRV_LOG(ERR,
201                                 "agg mbuf alloc failed: prod=0x%x\n", next);
202                         break;
203                 }
204                 rte_bitmap_clear(rxr->ag_bitmap, next);
205                 rxr->ag_prod = next;
206                 next = RING_NEXT(rxr->ag_ring_struct, next);
207         }
208
209         return 0;
210 }
211
212 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
213                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
214                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
215 {
216         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
217         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
218         int i;
219         uint16_t cp_cons, ag_cons;
220         struct rx_pkt_cmpl *rxcmp;
221         struct rte_mbuf *last = mbuf;
222         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
223
224         for (i = 0; i < agg_buf; i++) {
225                 struct bnxt_sw_rx_bd *ag_buf;
226                 struct rte_mbuf *ag_mbuf;
227
228                 if (is_thor_tpa) {
229                         rxcmp = (void *)&tpa_info->agg_arr[i];
230                 } else {
231                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
232                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
233                         rxcmp = (struct rx_pkt_cmpl *)
234                                         &cpr->cp_desc_ring[cp_cons];
235                 }
236
237 #ifdef BNXT_DEBUG
238                 bnxt_dump_cmpl(cp_cons, rxcmp);
239 #endif
240
241                 ag_cons = rxcmp->opaque;
242                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
243                 ag_buf = &rxr->ag_buf_ring[ag_cons];
244                 ag_mbuf = ag_buf->mbuf;
245                 RTE_ASSERT(ag_mbuf != NULL);
246
247                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
248
249                 mbuf->nb_segs++;
250                 mbuf->pkt_len += ag_mbuf->data_len;
251
252                 last->next = ag_mbuf;
253                 last = ag_mbuf;
254
255                 ag_buf->mbuf = NULL;
256
257                 /*
258                  * As aggregation buffer consumed out of order in TPA module,
259                  * use bitmap to track freed slots to be allocated and notified
260                  * to NIC
261                  */
262                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
263         }
264         bnxt_prod_ag_mbuf(rxq);
265         return 0;
266 }
267
268 static inline struct rte_mbuf *bnxt_tpa_end(
269                 struct bnxt_rx_queue *rxq,
270                 uint32_t *raw_cp_cons,
271                 struct rx_tpa_end_cmpl *tpa_end,
272                 struct rx_tpa_end_cmpl_hi *tpa_end1)
273 {
274         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
275         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
276         uint16_t agg_id;
277         struct rte_mbuf *mbuf;
278         uint8_t agg_bufs;
279         uint8_t payload_offset;
280         struct bnxt_tpa_info *tpa_info;
281
282         if (BNXT_CHIP_THOR(rxq->bp)) {
283                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
284                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
285
286                 th_tpa_end = (void *)tpa_end;
287                 th_tpa_end1 = (void *)tpa_end1;
288                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
289                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
290                 payload_offset = th_tpa_end1->payload_offset;
291         } else {
292                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
293                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
294                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
295                         return NULL;
296                 payload_offset = tpa_end->payload_offset;
297         }
298
299         tpa_info = &rxr->tpa_info[agg_id];
300         mbuf = tpa_info->mbuf;
301         RTE_ASSERT(mbuf != NULL);
302
303         rte_prefetch0(mbuf);
304         if (agg_bufs) {
305                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
306         }
307         mbuf->l4_len = payload_offset;
308
309         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
310         RTE_ASSERT(new_data != NULL);
311         if (!new_data) {
312                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
313                 return NULL;
314         }
315         tpa_info->mbuf = new_data;
316
317         return mbuf;
318 }
319
320 static uint32_t
321 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
322 {
323         uint32_t l3, pkt_type = 0;
324         uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
325         uint32_t flags_type;
326
327         vlan = !!(rxcmp1->flags2 &
328                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
329         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
330
331         t_ipcs = !!(rxcmp1->flags2 &
332                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
333         ip6 = !!(rxcmp1->flags2 &
334                  rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
335
336         flags_type = rxcmp->flags_type &
337                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
338
339         if (!t_ipcs && !ip6)
340                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
341         else if (!t_ipcs && ip6)
342                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
343         else if (t_ipcs && !ip6)
344                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
345         else
346                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
347
348         switch (flags_type) {
349         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
350                 if (!t_ipcs)
351                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
352                 else
353                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
354                 break;
355
356         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
357                 if (!t_ipcs)
358                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
359                 else
360                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
361                 break;
362
363         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
364                 if (!t_ipcs)
365                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
366                 else
367                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
368                 break;
369
370         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
371                 pkt_type |= l3;
372                 break;
373         }
374
375         return pkt_type;
376 }
377
378 #ifdef RTE_LIBRTE_IEEE1588
379 static void
380 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
381 {
382         uint64_t systime_cycles = 0;
383
384         if (!BNXT_CHIP_THOR(bp))
385                 return;
386
387         /* On Thor, Rx timestamps are provided directly in the
388          * Rx completion records to the driver. Only 32 bits of
389          * the timestamp is present in the completion. Driver needs
390          * to read the current 48 bit free running timer using the
391          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
392          * from the HWRM response with the lower 32 bits in the
393          * Rx completion to produce the 48 bit timestamp for the Rx packet
394          */
395         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
396                                 &systime_cycles);
397         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
398         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
399 }
400 #endif
401
402 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
403                             struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
404 {
405         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
406         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
407         struct rx_pkt_cmpl *rxcmp;
408         struct rx_pkt_cmpl_hi *rxcmp1;
409         uint32_t tmp_raw_cons = *raw_cons;
410         uint16_t cons, prod, cp_cons =
411             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
412         struct rte_mbuf *mbuf;
413         int rc = 0;
414         uint8_t agg_buf = 0;
415         uint16_t cmp_type;
416         uint32_t flags2_f = 0;
417         uint16_t flags_type;
418
419         rxcmp = (struct rx_pkt_cmpl *)
420             &cpr->cp_desc_ring[cp_cons];
421
422         cmp_type = CMP_TYPE(rxcmp);
423
424         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
425                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
426                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
427                 struct bnxt_tpa_info *tpa_info;
428
429                 tpa_info = &rxr->tpa_info[agg_id];
430                 RTE_ASSERT(tpa_info->agg_count < 16);
431                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
432                 rc = -EINVAL; /* Continue w/o new mbuf */
433                 goto next_rx;
434         }
435
436         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
437         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
438         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
439
440         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
441                 return -EBUSY;
442
443         cpr->valid = FLIP_VALID(cp_cons,
444                                 cpr->cp_ring_struct->ring_mask,
445                                 cpr->valid);
446
447         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
448                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
449                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
450                 rc = -EINVAL; /* Continue w/o new mbuf */
451                 goto next_rx;
452         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
453                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
454                                    (struct rx_tpa_end_cmpl *)rxcmp,
455                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
456                 if (unlikely(!mbuf))
457                         return -EBUSY;
458                 *rx_pkt = mbuf;
459                 goto next_rx;
460         } else if (cmp_type != 0x11) {
461                 rc = -EINVAL;
462                 goto next_rx;
463         }
464
465         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
466                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
467         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
468                 return -EBUSY;
469
470         prod = rxr->rx_prod;
471
472         cons = rxcmp->opaque;
473         mbuf = bnxt_consume_rx_buf(rxr, cons);
474         if (mbuf == NULL)
475                 return -EBUSY;
476
477         rte_prefetch0(mbuf);
478
479         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
480         mbuf->nb_segs = 1;
481         mbuf->next = NULL;
482         mbuf->pkt_len = rxcmp->len;
483         mbuf->data_len = mbuf->pkt_len;
484         mbuf->port = rxq->port_id;
485         mbuf->ol_flags = 0;
486
487         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
488         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
489                 mbuf->hash.rss = rxcmp->rss_hash;
490                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
491         } else {
492                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
493                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
494         }
495 #ifdef RTE_LIBRTE_IEEE1588
496         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
497                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
498                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
499                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
500         }
501 #endif
502         if (agg_buf)
503                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
504
505         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
506                 mbuf->vlan_tci = rxcmp1->metadata &
507                         (RX_PKT_CMPL_METADATA_VID_MASK |
508                         RX_PKT_CMPL_METADATA_DE |
509                         RX_PKT_CMPL_METADATA_PRI_MASK);
510                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
511         }
512
513         flags2_f = flags2_0xf(rxcmp1);
514         /* IP Checksum */
515         if (unlikely(((IS_IP_NONTUNNEL_PKT(flags2_f)) &&
516                       (RX_CMP_IP_CS_ERROR(rxcmp1))) ||
517                      (IS_IP_TUNNEL_PKT(flags2_f) &&
518                       (RX_CMP_IP_OUTER_CS_ERROR(rxcmp1))))) {
519                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
520         } else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1))) {
521                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
522         } else {
523                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
524         }
525
526         /* L4 Checksum */
527         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
528                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
529                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
530                 else
531                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
532         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
533                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
534                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
535                 else
536                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
537                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
538                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
539                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
540                                     (flags2_f))) {
541                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
542                 } else {
543                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
544                 }
545         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
546                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
547         }
548
549         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
550
551 #ifdef BNXT_DEBUG
552         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
553                 /* Re-install the mbuf back to the rx ring */
554                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
555
556                 rc = -EIO;
557                 goto next_rx;
558         }
559 #endif
560         /*
561          * TODO: Redesign this....
562          * If the allocation fails, the packet does not get received.
563          * Simply returning this will result in slowly falling behind
564          * on the producer ring buffers.
565          * Instead, "filling up" the producer just before ringing the
566          * doorbell could be a better solution since it will let the
567          * producer ring starve until memory is available again pushing
568          * the drops into hardware and getting them out of the driver
569          * allowing recovery to a full producer ring.
570          *
571          * This could also help with cache usage by preventing per-packet
572          * calls in favour of a tight loop with the same function being called
573          * in it.
574          */
575         prod = RING_NEXT(rxr->rx_ring_struct, prod);
576         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
577                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
578                 rc = -ENOMEM;
579                 goto rx;
580         }
581         rxr->rx_prod = prod;
582         /*
583          * All MBUFs are allocated with the same size under DPDK,
584          * no optimization for rx_copy_thresh
585          */
586 rx:
587         *rx_pkt = mbuf;
588
589 next_rx:
590
591         *raw_cons = tmp_raw_cons;
592
593         return rc;
594 }
595
596 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
597                                uint16_t nb_pkts)
598 {
599         struct bnxt_rx_queue *rxq = rx_queue;
600         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
601         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
602         uint32_t raw_cons = cpr->cp_raw_cons;
603         uint32_t cons;
604         int nb_rx_pkts = 0;
605         struct rx_pkt_cmpl *rxcmp;
606         uint16_t prod = rxr->rx_prod;
607         uint16_t ag_prod = rxr->ag_prod;
608         int rc = 0;
609         bool evt = false;
610
611         if (unlikely(is_bnxt_in_error(rxq->bp)))
612                 return 0;
613
614         /* If Rx Q was stopped return */
615         if (unlikely(!rxq->rx_started ||
616                      !rte_spinlock_trylock(&rxq->lock)))
617                 return 0;
618
619         /* Handle RX burst request */
620         while (1) {
621                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
622                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
623                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
624
625                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
626                         break;
627                 cpr->valid = FLIP_VALID(cons,
628                                         cpr->cp_ring_struct->ring_mask,
629                                         cpr->valid);
630
631                 /* TODO: Avoid magic numbers... */
632                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
633                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
634                         if (likely(!rc) || rc == -ENOMEM)
635                                 nb_rx_pkts++;
636                         if (rc == -EBUSY)       /* partial completion */
637                                 break;
638                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
639                         evt =
640                         bnxt_event_hwrm_resp_handler(rxq->bp,
641                                                      (struct cmpl_base *)rxcmp);
642                 }
643
644                 raw_cons = NEXT_RAW_CMP(raw_cons);
645                 if (nb_rx_pkts == nb_pkts || evt)
646                         break;
647                 /* Post some Rx buf early in case of larger burst processing */
648                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
649                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
650         }
651
652         cpr->cp_raw_cons = raw_cons;
653         if (!nb_rx_pkts && !evt) {
654                 /*
655                  * For PMD, there is no need to keep on pushing to REARM
656                  * the doorbell if there are no new completions
657                  */
658                 goto done;
659         }
660
661         if (prod != rxr->rx_prod)
662                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
663
664         /* Ring the AGG ring DB */
665         if (ag_prod != rxr->ag_prod)
666                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
667
668         bnxt_db_cq(cpr);
669
670         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
671         if (rc == -ENOMEM) {
672                 int i;
673
674                 for (i = prod; i <= nb_rx_pkts;
675                         i = RING_NEXT(rxr->rx_ring_struct, i)) {
676                         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];
677
678                         /* Buffer already allocated for this index. */
679                         if (rx_buf->mbuf != NULL)
680                                 continue;
681
682                         /* This slot is empty. Alloc buffer for Rx */
683                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
684                                 rxr->rx_prod = i;
685                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
686                         } else {
687                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
688                                 break;
689                         }
690                 }
691         }
692
693 done:
694         rte_spinlock_unlock(&rxq->lock);
695
696         return nb_rx_pkts;
697 }
698
699 /*
700  * Dummy DPDK callback for RX.
701  *
702  * This function is used to temporarily replace the real callback during
703  * unsafe control operations on the queue, or in case of error.
704  */
705 uint16_t
706 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
707                      struct rte_mbuf **rx_pkts __rte_unused,
708                      uint16_t nb_pkts __rte_unused)
709 {
710         return 0;
711 }
712
713 void bnxt_free_rx_rings(struct bnxt *bp)
714 {
715         int i;
716         struct bnxt_rx_queue *rxq;
717
718         if (!bp->rx_queues)
719                 return;
720
721         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
722                 rxq = bp->rx_queues[i];
723                 if (!rxq)
724                         continue;
725
726                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
727                 rte_free(rxq->rx_ring->rx_ring_struct);
728
729                 /* Free the Aggregator ring */
730                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
731                 rte_free(rxq->rx_ring->ag_ring_struct);
732                 rxq->rx_ring->ag_ring_struct = NULL;
733
734                 rte_free(rxq->rx_ring);
735
736                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
737                 rte_free(rxq->cp_ring->cp_ring_struct);
738                 rte_free(rxq->cp_ring);
739
740                 rte_free(rxq);
741                 bp->rx_queues[i] = NULL;
742         }
743 }
744
745 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
746 {
747         struct bnxt_cp_ring_info *cpr;
748         struct bnxt_rx_ring_info *rxr;
749         struct bnxt_ring *ring;
750
751         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
752
753         rxr = rte_zmalloc_socket("bnxt_rx_ring",
754                                  sizeof(struct bnxt_rx_ring_info),
755                                  RTE_CACHE_LINE_SIZE, socket_id);
756         if (rxr == NULL)
757                 return -ENOMEM;
758         rxq->rx_ring = rxr;
759
760         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
761                                    sizeof(struct bnxt_ring),
762                                    RTE_CACHE_LINE_SIZE, socket_id);
763         if (ring == NULL)
764                 return -ENOMEM;
765         rxr->rx_ring_struct = ring;
766         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
767         ring->ring_mask = ring->ring_size - 1;
768         ring->bd = (void *)rxr->rx_desc_ring;
769         ring->bd_dma = rxr->rx_desc_mapping;
770         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
771         ring->vmem = (void **)&rxr->rx_buf_ring;
772
773         cpr = rte_zmalloc_socket("bnxt_rx_ring",
774                                  sizeof(struct bnxt_cp_ring_info),
775                                  RTE_CACHE_LINE_SIZE, socket_id);
776         if (cpr == NULL)
777                 return -ENOMEM;
778         rxq->cp_ring = cpr;
779
780         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
781                                    sizeof(struct bnxt_ring),
782                                    RTE_CACHE_LINE_SIZE, socket_id);
783         if (ring == NULL)
784                 return -ENOMEM;
785         cpr->cp_ring_struct = ring;
786         ring->ring_size = rte_align32pow2(rxr->rx_ring_struct->ring_size *
787                                           (2 + AGG_RING_SIZE_FACTOR));
788         ring->ring_mask = ring->ring_size - 1;
789         ring->bd = (void *)cpr->cp_desc_ring;
790         ring->bd_dma = cpr->cp_desc_mapping;
791         ring->vmem_size = 0;
792         ring->vmem = NULL;
793
794         /* Allocate Aggregator rings */
795         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
796                                    sizeof(struct bnxt_ring),
797                                    RTE_CACHE_LINE_SIZE, socket_id);
798         if (ring == NULL)
799                 return -ENOMEM;
800         rxr->ag_ring_struct = ring;
801         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
802                                           AGG_RING_SIZE_FACTOR);
803         ring->ring_mask = ring->ring_size - 1;
804         ring->bd = (void *)rxr->ag_desc_ring;
805         ring->bd_dma = rxr->ag_desc_mapping;
806         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
807         ring->vmem = (void **)&rxr->ag_buf_ring;
808
809         return 0;
810 }
811
812 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
813                             uint16_t len)
814 {
815         uint32_t j;
816         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
817
818         if (!rx_bd_ring)
819                 return;
820         for (j = 0; j < ring->ring_size; j++) {
821                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
822                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
823                 rx_bd_ring[j].opaque = j;
824         }
825 }
826
827 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
828 {
829         struct bnxt_rx_ring_info *rxr;
830         struct bnxt_ring *ring;
831         uint32_t prod, type;
832         unsigned int i;
833         uint16_t size;
834
835         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
836         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
837
838         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
839
840         rxr = rxq->rx_ring;
841         ring = rxr->rx_ring_struct;
842         bnxt_init_rxbds(ring, type, size);
843
844         prod = rxr->rx_prod;
845         for (i = 0; i < ring->ring_size; i++) {
846                 if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
847                         PMD_DRV_LOG(WARNING,
848                                 "init'ed rx ring %d with %d/%d mbufs only\n",
849                                 rxq->queue_id, i, ring->ring_size);
850                         break;
851                 }
852                 rxr->rx_prod = prod;
853                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
854         }
855
856         ring = rxr->ag_ring_struct;
857         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
858         bnxt_init_rxbds(ring, type, size);
859         prod = rxr->ag_prod;
860
861         for (i = 0; i < ring->ring_size; i++) {
862                 if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
863                         PMD_DRV_LOG(WARNING,
864                         "init'ed AG ring %d with %d/%d mbufs only\n",
865                         rxq->queue_id, i, ring->ring_size);
866                         break;
867                 }
868                 rxr->ag_prod = prod;
869                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
870         }
871         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
872
873         if (rxr->tpa_info) {
874                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
875
876                 for (i = 0; i < max_aggs; i++) {
877                         rxr->tpa_info[i].mbuf =
878                                 __bnxt_alloc_rx_data(rxq->mb_pool);
879                         if (!rxr->tpa_info[i].mbuf) {
880                                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
881                                 return -ENOMEM;
882                         }
883                 }
884         }
885         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
886
887         return 0;
888 }