drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_ring.h"
  16 #include "bnxt_rxr.h"
  17 #include "bnxt_rxq.h"
  18 #include "hsi_struct_def_dpdk.h"
  19 #ifdef RTE_LIBRTE_IEEE1588
  20 #include "bnxt_hwrm.h"
  21 #endif
  22
  23 #include <bnxt_tf_common.h>
  24 #include <ulp_mark_mgr.h>
  25
  26 /*
  27  * RX Ring handling
  28  */
  29
  30 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  31 {
  32         struct rte_mbuf *data;
  33
  34         data = rte_mbuf_raw_alloc(mb);
  35
  36         return data;
  37 }
  38
  39 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  40                                      struct bnxt_rx_ring_info *rxr,
  41                                      uint16_t prod)
  42 {
  43         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
  44         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[prod];
  45         struct rte_mbuf *mbuf;
  46
  47         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  48         if (!mbuf) {
  49                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  50                 return -ENOMEM;
  51         }
  52
  53         rx_buf->mbuf = mbuf;
  54         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  55
  56         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  57
  58         return 0;
  59 }
  60
  61 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  62                                      struct bnxt_rx_ring_info *rxr,
  63                                      uint16_t prod)
  64 {
  65         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
  66         struct bnxt_sw_rx_bd *rx_buf = &rxr->ag_buf_ring[prod];
  67         struct rte_mbuf *mbuf;
  68
  69         if (rxbd == NULL) {
  70                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  71                 return -EINVAL;
  72         }
  73
  74         if (rx_buf == NULL) {
  75                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  76                 return -EINVAL;
  77         }
  78
  79         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  80         if (!mbuf) {
  81                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  82                 return -ENOMEM;
  83         }
  84
  85         rx_buf->mbuf = mbuf;
  86         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  87
  88         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  89
  90         return 0;
  91 }
  92
  93 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
  94                                struct rte_mbuf *mbuf)
  95 {
  96         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
  97         struct bnxt_sw_rx_bd *prod_rx_buf;
  98         struct rx_prod_pkt_bd *prod_bd;
  99
 100         prod_rx_buf = &rxr->rx_buf_ring[prod];
 101
 102         RTE_ASSERT(prod_rx_buf->mbuf == NULL);
 103         RTE_ASSERT(mbuf != NULL);
 104
 105         prod_rx_buf->mbuf = mbuf;
 106
 107         prod_bd = &rxr->rx_desc_ring[prod];
 108
 109         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 110
 111         rxr->rx_prod = prod;
 112 }
 113
 114 static inline
 115 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 116                                      uint16_t cons)
 117 {
 118         struct bnxt_sw_rx_bd *cons_rx_buf;
 119         struct rte_mbuf *mbuf;
 120
 121         cons_rx_buf = &rxr->rx_buf_ring[cons];
 122         RTE_ASSERT(cons_rx_buf->mbuf != NULL);
 123         mbuf = cons_rx_buf->mbuf;
 124         cons_rx_buf->mbuf = NULL;
 125         return mbuf;
 126 }
 127
 128 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 129                            struct rx_tpa_start_cmpl *tpa_start,
 130                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 131 {
 132         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 133         uint16_t agg_id;
 134         uint16_t data_cons;
 135         struct bnxt_tpa_info *tpa_info;
 136         struct rte_mbuf *mbuf;
 137
 138         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 139
 140         data_cons = tpa_start->opaque;
 141         tpa_info = &rxr->tpa_info[agg_id];
 142
 143         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 144
 145         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 146
 147         tpa_info->agg_count = 0;
 148         tpa_info->mbuf = mbuf;
 149         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 150
 151         mbuf->nb_segs = 1;
 152         mbuf->next = NULL;
 153         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 154         mbuf->data_len = mbuf->pkt_len;
 155         mbuf->port = rxq->port_id;
 156         mbuf->ol_flags = PKT_RX_LRO;
 157         if (likely(tpa_start->flags_type &
 158                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 159                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 160                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 161         } else {
 162                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 163                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 164         }
 165         if (tpa_start1->flags2 &
 166             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 167                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 168                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 169         }
 170         if (likely(tpa_start1->flags2 &
 171                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 172                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 173
 174         /* recycle next mbuf */
 175         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
 176         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 177 }
 178
 179 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 180                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 181 {
 182         uint16_t last_cp_cons;
 183         struct rx_pkt_cmpl *agg_cmpl;
 184
 185         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 186         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 187         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 188         cpr->valid = FLIP_VALID(raw_cp_cons,
 189                                 cpr->cp_ring_struct->ring_mask,
 190                                 cpr->valid);
 191         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 192 }
 193
 194 /* TPA consume agg buffer out of order, allocate connected data only */
 195 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 196 {
 197         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 198         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
 199
 200         /* TODO batch allocation for better performance */
 201         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
 202                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
 203                         PMD_DRV_LOG(ERR,
 204                                 "agg mbuf alloc failed: prod=0x%x\n", next);
 205                         break;
 206                 }
 207                 rte_bitmap_clear(rxr->ag_bitmap, next);
 208                 rxr->ag_prod = next;
 209                 next = RING_NEXT(rxr->ag_ring_struct, next);
 210         }
 211
 212         return 0;
 213 }
 214
 215 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 216                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 217                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 218 {
 219         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 220         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 221         int i;
 222         uint16_t cp_cons, ag_cons;
 223         struct rx_pkt_cmpl *rxcmp;
 224         struct rte_mbuf *last = mbuf;
 225         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
 226
 227         for (i = 0; i < agg_buf; i++) {
 228                 struct bnxt_sw_rx_bd *ag_buf;
 229                 struct rte_mbuf *ag_mbuf;
 230
 231                 if (is_thor_tpa) {
 232                         rxcmp = (void *)&tpa_info->agg_arr[i];
 233                 } else {
 234                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 235                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 236                         rxcmp = (struct rx_pkt_cmpl *)
 237                                         &cpr->cp_desc_ring[cp_cons];
 238                 }
 239
 240 #ifdef BNXT_DEBUG
 241                 bnxt_dump_cmpl(cp_cons, rxcmp);
 242 #endif
 243
 244                 ag_cons = rxcmp->opaque;
 245                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 246                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 247                 ag_mbuf = ag_buf->mbuf;
 248                 RTE_ASSERT(ag_mbuf != NULL);
 249
 250                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 251
 252                 mbuf->nb_segs++;
 253                 mbuf->pkt_len += ag_mbuf->data_len;
 254
 255                 last->next = ag_mbuf;
 256                 last = ag_mbuf;
 257
 258                 ag_buf->mbuf = NULL;
 259
 260                 /*
 261                  * As aggregation buffer consumed out of order in TPA module,
 262                  * use bitmap to track freed slots to be allocated and notified
 263                  * to NIC
 264                  */
 265                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 266         }
 267         bnxt_prod_ag_mbuf(rxq);
 268         return 0;
 269 }
 270
 271 static inline struct rte_mbuf *bnxt_tpa_end(
 272                 struct bnxt_rx_queue *rxq,
 273                 uint32_t *raw_cp_cons,
 274                 struct rx_tpa_end_cmpl *tpa_end,
 275                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 276 {
 277         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 278         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 279         uint16_t agg_id;
 280         struct rte_mbuf *mbuf;
 281         uint8_t agg_bufs;
 282         uint8_t payload_offset;
 283         struct bnxt_tpa_info *tpa_info;
 284
 285         if (BNXT_CHIP_THOR(rxq->bp)) {
 286                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 287                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 288
 289                 th_tpa_end = (void *)tpa_end;
 290                 th_tpa_end1 = (void *)tpa_end1;
 291                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 292                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 293                 payload_offset = th_tpa_end1->payload_offset;
 294         } else {
 295                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 296                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 297                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 298                         return NULL;
 299                 payload_offset = tpa_end->payload_offset;
 300         }
 301
 302         tpa_info = &rxr->tpa_info[agg_id];
 303         mbuf = tpa_info->mbuf;
 304         RTE_ASSERT(mbuf != NULL);
 305
 306         rte_prefetch0(mbuf);
 307         if (agg_bufs) {
 308                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 309         }
 310         mbuf->l4_len = payload_offset;
 311
 312         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 313         RTE_ASSERT(new_data != NULL);
 314         if (!new_data) {
 315                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 316                 return NULL;
 317         }
 318         tpa_info->mbuf = new_data;
 319
 320         return mbuf;
 321 }
 322
 323 static uint32_t
 324 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 325 {
 326         uint32_t l3, pkt_type = 0;
 327         uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
 328         uint32_t flags_type;
 329
 330         vlan = !!(rxcmp1->flags2 &
 331                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
 332         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 333
 334         t_ipcs = !!(rxcmp1->flags2 &
 335                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
 336         ip6 = !!(rxcmp1->flags2 &
 337                  rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
 338
 339         flags_type = rxcmp->flags_type &
 340                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 341
 342         if (!t_ipcs && !ip6)
 343                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 344         else if (!t_ipcs && ip6)
 345                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 346         else if (t_ipcs && !ip6)
 347                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 348         else
 349                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 350
 351         switch (flags_type) {
 352         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
 353                 if (!t_ipcs)
 354                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 355                 else
 356                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 357                 break;
 358
 359         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
 360                 if (!t_ipcs)
 361                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 362                 else
 363                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 364                 break;
 365
 366         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
 367                 if (!t_ipcs)
 368                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 369                 else
 370                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 371                 break;
 372
 373         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
 374                 pkt_type |= l3;
 375                 break;
 376         }
 377
 378         return pkt_type;
 379 }
 380
 381 #ifdef RTE_LIBRTE_IEEE1588
 382 static void
 383 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
 384 {
 385         uint64_t systime_cycles = 0;
 386
 387         if (!BNXT_CHIP_THOR(bp))
 388                 return;
 389
 390         /* On Thor, Rx timestamps are provided directly in the
 391          * Rx completion records to the driver. Only 32 bits of
 392          * the timestamp is present in the completion. Driver needs
 393          * to read the current 48 bit free running timer using the
 394          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 395          * from the HWRM response with the lower 32 bits in the
 396          * Rx completion to produce the 48 bit timestamp for the Rx packet
 397          */
 398         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 399                                 &systime_cycles);
 400         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 401         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 402 }
 403 #endif
 404
 405 static void
 406 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 407                           struct rte_mbuf *mbuf)
 408 {
 409         uint32_t cfa_code;
 410         uint32_t meta_fmt;
 411         uint32_t meta;
 412         bool gfid = false;
 413         uint32_t mark_id;
 414         uint32_t flags2;
 415         uint32_t gfid_support = 0;
 416         int rc;
 417         uint32_t vfr_flag;
 418
 419
 420         if (BNXT_GFID_ENABLED(bp))
 421                 gfid_support = 1;
 422
 423         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 424         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 425         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 426
 427         /*
 428          * The flags field holds extra bits of info from [6:4]
 429          * which indicate if the flow is in TCAM or EM or EEM
 430          */
 431         meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 432                 BNXT_CFA_META_FMT_SHFT;
 433
 434         switch (meta_fmt) {
 435         case 0:
 436                 if (gfid_support) {
 437                         /* Not an LFID or GFID, a flush cmd. */
 438                         goto skip_mark;
 439                 } else {
 440                         /* LFID mode, no vlan scenario */
 441                         gfid = false;
 442                 }
 443                 break;
 444         case 4:
 445         case 5:
 446                 /*
 447                  * EM/TCAM case
 448                  * Assume that EM doesn't support Mark due to GFID
 449                  * collisions with EEM.  Simply return without setting the mark
 450                  * in the mbuf.
 451                  */
 452                 if (BNXT_CFA_META_EM_TEST(meta)) {
 453                         /*This is EM hit {EM(1), GFID[27:16], 19'd0 or vtag } */
 454                         gfid = true;
 455                         meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 456                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 457                 } else {
 458                         /*
 459                          * It is a TCAM entry, so it is an LFID.
 460                          * The TCAM IDX and Mode can also be determined
 461                          * by decoding the meta_data. We are not
 462                          * using these for now.
 463                          */
 464                 }
 465                 break;
 466         case 6:
 467         case 7:
 468                 /* EEM Case, only using gfid in EEM for now. */
 469                 gfid = true;
 470
 471                 /*
 472                  * For EEM flows, The first part of cfa_code is 16 bits.
 473                  * The second part is embedded in the
 474                  * metadata field from bit 19 onwards. The driver needs to
 475                  * ignore the first 19 bits of metadata and use the next 12
 476                  * bits as higher 12 bits of cfa_code.
 477                  */
 478                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 479                 cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 480                 break;
 481         default:
 482                 /* For other values, the cfa_code is assumed to be an LFID. */
 483                 break;
 484         }
 485
 486         rc = ulp_mark_db_mark_get(bp->ulp_ctx, gfid,
 487                                   cfa_code, &vfr_flag, &mark_id);
 488         if (!rc) {
 489                 /* Got the mark, write it to the mbuf and return */
 490                 mbuf->hash.fdir.hi = mark_id;
 491                 mbuf->udata64 = (cfa_code & 0xffffffffull) << 32;
 492                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 493                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 494                 return;
 495         }
 496
 497 skip_mark:
 498         mbuf->hash.fdir.hi = 0;
 499         mbuf->hash.fdir.id = 0;
 500 }
 501
 502 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 503                            struct rx_pkt_cmpl_hi *rxcmp1,
 504                            struct rte_mbuf *mbuf)
 505 {
 506         uint32_t cfa_code = 0;
 507         uint8_t meta_fmt = 0;
 508         uint16_t flags2 = 0;
 509         uint32_t meta =  0;
 510
 511         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 512         if (!cfa_code)
 513                 return;
 514
 515         if (cfa_code && !bp->mark_table[cfa_code].valid)
 516                 return;
 517
 518         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 519         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 520         if (meta) {
 521                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 522
 523                 /* The flags field holds extra bits of info from [6:4]
 524                  * which indicate if the flow is in TCAM or EM or EEM
 525                  */
 526                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 527                            BNXT_CFA_META_FMT_SHFT;
 528
 529                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 530                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 531                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 532                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 533                  */
 534                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 535         }
 536
 537         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 538         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 539 }
 540
 541 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 542                             struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 543 {
 544         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 545         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 546         struct rx_pkt_cmpl *rxcmp;
 547         struct rx_pkt_cmpl_hi *rxcmp1;
 548         uint32_t tmp_raw_cons = *raw_cons;
 549         uint16_t cons, prod, cp_cons =
 550             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 551         struct rte_mbuf *mbuf;
 552         int rc = 0;
 553         uint8_t agg_buf = 0;
 554         uint16_t cmp_type;
 555         uint32_t flags2_f = 0;
 556         uint16_t flags_type;
 557         struct bnxt *bp = rxq->bp;
 558
 559         rxcmp = (struct rx_pkt_cmpl *)
 560             &cpr->cp_desc_ring[cp_cons];
 561
 562         cmp_type = CMP_TYPE(rxcmp);
 563
 564         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 565                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 566                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 567                 struct bnxt_tpa_info *tpa_info;
 568
 569                 tpa_info = &rxr->tpa_info[agg_id];
 570                 RTE_ASSERT(tpa_info->agg_count < 16);
 571                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 572                 rc = -EINVAL; /* Continue w/o new mbuf */
 573                 goto next_rx;
 574         }
 575
 576         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 577         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 578         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 579
 580         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 581                 return -EBUSY;
 582
 583         cpr->valid = FLIP_VALID(cp_cons,
 584                                 cpr->cp_ring_struct->ring_mask,
 585                                 cpr->valid);
 586
 587         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 588                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 589                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 590                 rc = -EINVAL; /* Continue w/o new mbuf */
 591                 goto next_rx;
 592         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 593                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 594                                    (struct rx_tpa_end_cmpl *)rxcmp,
 595                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 596                 if (unlikely(!mbuf))
 597                         return -EBUSY;
 598                 *rx_pkt = mbuf;
 599                 goto next_rx;
 600         } else if (cmp_type != 0x11) {
 601                 rc = -EINVAL;
 602                 goto next_rx;
 603         }
 604
 605         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 606                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 607         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 608                 return -EBUSY;
 609
 610         prod = rxr->rx_prod;
 611
 612         cons = rxcmp->opaque;
 613         mbuf = bnxt_consume_rx_buf(rxr, cons);
 614         if (mbuf == NULL)
 615                 return -EBUSY;
 616
 617         rte_prefetch0(mbuf);
 618
 619         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 620         mbuf->nb_segs = 1;
 621         mbuf->next = NULL;
 622         mbuf->pkt_len = rxcmp->len;
 623         mbuf->data_len = mbuf->pkt_len;
 624         mbuf->port = rxq->port_id;
 625         mbuf->ol_flags = 0;
 626
 627         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 628         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 629                 mbuf->hash.rss = rxcmp->rss_hash;
 630                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 631         }
 632
 633         if (BNXT_TRUFLOW_EN(bp))
 634                 bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 635         else
 636                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 637
 638 #ifdef RTE_LIBRTE_IEEE1588
 639         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
 640                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 641                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 642                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
 643         }
 644 #endif
 645         if (agg_buf)
 646                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 647
 648         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
 649                 mbuf->vlan_tci = rxcmp1->metadata &
 650                         (RX_PKT_CMPL_METADATA_VID_MASK |
 651                         RX_PKT_CMPL_METADATA_DE |
 652                         RX_PKT_CMPL_METADATA_PRI_MASK);
 653                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 654         }
 655
 656         flags2_f = flags2_0xf(rxcmp1);
 657         /* IP Checksum */
 658         if (likely(IS_IP_NONTUNNEL_PKT(flags2_f))) {
 659                 if (unlikely(RX_CMP_IP_CS_ERROR(rxcmp1)))
 660                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 661                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 662                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 663                 else
 664                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 665         } else if (IS_IP_TUNNEL_PKT(flags2_f)) {
 666                 if (unlikely(RX_CMP_IP_OUTER_CS_ERROR(rxcmp1) ||
 667                              RX_CMP_IP_CS_ERROR(rxcmp1)))
 668                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 669                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 670                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 671                 else
 672                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 673         }
 674
 675         /* L4 Checksum */
 676         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
 677                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 678                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 679                 else
 680                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 681         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
 682                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 683                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 684                 else
 685                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 686                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
 687                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 688                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
 689                                     (flags2_f))) {
 690                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 691                 } else {
 692                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 693                 }
 694         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
 695                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 696         }
 697
 698         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 699
 700 #ifdef BNXT_DEBUG
 701         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 702                 /* Re-install the mbuf back to the rx ring */
 703                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 704
 705                 rc = -EIO;
 706                 goto next_rx;
 707         }
 708 #endif
 709         /*
 710          * TODO: Redesign this....
 711          * If the allocation fails, the packet does not get received.
 712          * Simply returning this will result in slowly falling behind
 713          * on the producer ring buffers.
 714          * Instead, "filling up" the producer just before ringing the
 715          * doorbell could be a better solution since it will let the
 716          * producer ring starve until memory is available again pushing
 717          * the drops into hardware and getting them out of the driver
 718          * allowing recovery to a full producer ring.
 719          *
 720          * This could also help with cache usage by preventing per-packet
 721          * calls in favour of a tight loop with the same function being called
 722          * in it.
 723          */
 724         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 725         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
 726                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
 727                 rc = -ENOMEM;
 728                 goto rx;
 729         }
 730         rxr->rx_prod = prod;
 731         /*
 732          * All MBUFs are allocated with the same size under DPDK,
 733          * no optimization for rx_copy_thresh
 734          */
 735 rx:
 736         *rx_pkt = mbuf;
 737
 738 next_rx:
 739
 740         *raw_cons = tmp_raw_cons;
 741
 742         return rc;
 743 }
 744
 745 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 746                                uint16_t nb_pkts)
 747 {
 748         struct bnxt_rx_queue *rxq = rx_queue;
 749         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 750         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 751         uint32_t raw_cons = cpr->cp_raw_cons;
 752         uint32_t cons;
 753         int nb_rx_pkts = 0;
 754         struct rx_pkt_cmpl *rxcmp;
 755         uint16_t prod = rxr->rx_prod;
 756         uint16_t ag_prod = rxr->ag_prod;
 757         int rc = 0;
 758         bool evt = false;
 759
 760         if (unlikely(is_bnxt_in_error(rxq->bp)))
 761                 return 0;
 762
 763         /* If Rx Q was stopped return */
 764         if (unlikely(!rxq->rx_started ||
 765                      !rte_spinlock_trylock(&rxq->lock)))
 766                 return 0;
 767
 768         /* Handle RX burst request */
 769         while (1) {
 770                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 771                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
 772                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 773
 774                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 775                         break;
 776                 cpr->valid = FLIP_VALID(cons,
 777                                         cpr->cp_ring_struct->ring_mask,
 778                                         cpr->valid);
 779
 780                 /* TODO: Avoid magic numbers... */
 781                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 782                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 783                         if (likely(!rc) || rc == -ENOMEM)
 784                                 nb_rx_pkts++;
 785                         if (rc == -EBUSY)       /* partial completion */
 786                                 break;
 787                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 788                         evt =
 789                         bnxt_event_hwrm_resp_handler(rxq->bp,
 790                                                      (struct cmpl_base *)rxcmp);
 791                         /* If the async event is Fatal error, return */
 792                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 793                                 goto done;
 794                 }
 795
 796                 raw_cons = NEXT_RAW_CMP(raw_cons);
 797                 if (nb_rx_pkts == nb_pkts || evt)
 798                         break;
 799                 /* Post some Rx buf early in case of larger burst processing */
 800                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 801                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 802         }
 803
 804         cpr->cp_raw_cons = raw_cons;
 805         if (!nb_rx_pkts && !evt) {
 806                 /*
 807                  * For PMD, there is no need to keep on pushing to REARM
 808                  * the doorbell if there are no new completions
 809                  */
 810                 goto done;
 811         }
 812
 813         if (prod != rxr->rx_prod)
 814                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 815
 816         /* Ring the AGG ring DB */
 817         if (ag_prod != rxr->ag_prod)
 818                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 819
 820         bnxt_db_cq(cpr);
 821
 822         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 823         if (rc == -ENOMEM) {
 824                 int i = RING_NEXT(rxr->rx_ring_struct, prod);
 825                 int cnt = nb_rx_pkts;
 826
 827                 for (; cnt;
 828                         i = RING_NEXT(rxr->rx_ring_struct, i), cnt--) {
 829                         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];
 830
 831                         /* Buffer already allocated for this index. */
 832                         if (rx_buf->mbuf != NULL)
 833                                 continue;
 834
 835                         /* This slot is empty. Alloc buffer for Rx */
 836                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
 837                                 rxr->rx_prod = i;
 838                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 839                         } else {
 840                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 841                                 break;
 842                         }
 843                 }
 844         }
 845
 846 done:
 847         rte_spinlock_unlock(&rxq->lock);
 848
 849         return nb_rx_pkts;
 850 }
 851
 852 /*
 853  * Dummy DPDK callback for RX.
 854  *
 855  * This function is used to temporarily replace the real callback during
 856  * unsafe control operations on the queue, or in case of error.
 857  */
 858 uint16_t
 859 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 860                      struct rte_mbuf **rx_pkts __rte_unused,
 861                      uint16_t nb_pkts __rte_unused)
 862 {
 863         return 0;
 864 }
 865
 866 void bnxt_free_rx_rings(struct bnxt *bp)
 867 {
 868         int i;
 869         struct bnxt_rx_queue *rxq;
 870
 871         if (!bp->rx_queues)
 872                 return;
 873
 874         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 875                 rxq = bp->rx_queues[i];
 876                 if (!rxq)
 877                         continue;
 878
 879                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 880                 rte_free(rxq->rx_ring->rx_ring_struct);
 881
 882                 /* Free the Aggregator ring */
 883                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 884                 rte_free(rxq->rx_ring->ag_ring_struct);
 885                 rxq->rx_ring->ag_ring_struct = NULL;
 886
 887                 rte_free(rxq->rx_ring);
 888
 889                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 890                 rte_free(rxq->cp_ring->cp_ring_struct);
 891                 rte_free(rxq->cp_ring);
 892
 893                 rte_free(rxq);
 894                 bp->rx_queues[i] = NULL;
 895         }
 896 }
 897
 898 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
 899 {
 900         struct bnxt_cp_ring_info *cpr;
 901         struct bnxt_rx_ring_info *rxr;
 902         struct bnxt_ring *ring;
 903
 904         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
 905
 906         rxr = rte_zmalloc_socket("bnxt_rx_ring",
 907                                  sizeof(struct bnxt_rx_ring_info),
 908                                  RTE_CACHE_LINE_SIZE, socket_id);
 909         if (rxr == NULL)
 910                 return -ENOMEM;
 911         rxq->rx_ring = rxr;
 912
 913         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 914                                    sizeof(struct bnxt_ring),
 915                                    RTE_CACHE_LINE_SIZE, socket_id);
 916         if (ring == NULL)
 917                 return -ENOMEM;
 918         rxr->rx_ring_struct = ring;
 919         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
 920         ring->ring_mask = ring->ring_size - 1;
 921         ring->bd = (void *)rxr->rx_desc_ring;
 922         ring->bd_dma = rxr->rx_desc_mapping;
 923         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 924         ring->vmem = (void **)&rxr->rx_buf_ring;
 925
 926         cpr = rte_zmalloc_socket("bnxt_rx_ring",
 927                                  sizeof(struct bnxt_cp_ring_info),
 928                                  RTE_CACHE_LINE_SIZE, socket_id);
 929         if (cpr == NULL)
 930                 return -ENOMEM;
 931         rxq->cp_ring = cpr;
 932
 933         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 934                                    sizeof(struct bnxt_ring),
 935                                    RTE_CACHE_LINE_SIZE, socket_id);
 936         if (ring == NULL)
 937                 return -ENOMEM;
 938         cpr->cp_ring_struct = ring;
 939         ring->ring_size = rte_align32pow2(rxr->rx_ring_struct->ring_size *
 940                                           (2 + AGG_RING_SIZE_FACTOR));
 941         ring->ring_mask = ring->ring_size - 1;
 942         ring->bd = (void *)cpr->cp_desc_ring;
 943         ring->bd_dma = cpr->cp_desc_mapping;
 944         ring->vmem_size = 0;
 945         ring->vmem = NULL;
 946
 947         /* Allocate Aggregator rings */
 948         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 949                                    sizeof(struct bnxt_ring),
 950                                    RTE_CACHE_LINE_SIZE, socket_id);
 951         if (ring == NULL)
 952                 return -ENOMEM;
 953         rxr->ag_ring_struct = ring;
 954         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
 955                                           AGG_RING_SIZE_FACTOR);
 956         ring->ring_mask = ring->ring_size - 1;
 957         ring->bd = (void *)rxr->ag_desc_ring;
 958         ring->bd_dma = rxr->ag_desc_mapping;
 959         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 960         ring->vmem = (void **)&rxr->ag_buf_ring;
 961
 962         return 0;
 963 }
 964
 965 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
 966                             uint16_t len)
 967 {
 968         uint32_t j;
 969         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
 970
 971         if (!rx_bd_ring)
 972                 return;
 973         for (j = 0; j < ring->ring_size; j++) {
 974                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
 975                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
 976                 rx_bd_ring[j].opaque = j;
 977         }
 978 }
 979
 980 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
 981 {
 982         struct bnxt_rx_ring_info *rxr;
 983         struct bnxt_ring *ring;
 984         uint32_t prod, type;
 985         unsigned int i;
 986         uint16_t size;
 987
 988         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
 989         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
 990
 991         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
 992
 993         rxr = rxq->rx_ring;
 994         ring = rxr->rx_ring_struct;
 995         bnxt_init_rxbds(ring, type, size);
 996
 997         prod = rxr->rx_prod;
 998         for (i = 0; i < ring->ring_size; i++) {
 999                 if (unlikely(!rxr->rx_buf_ring[i].mbuf)) {
1000                         if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
1001                                 PMD_DRV_LOG(WARNING,
1002                                             "init'ed rx ring %d with %d/%d mbufs only\n",
1003                                             rxq->queue_id, i, ring->ring_size);
1004                                 break;
1005                         }
1006                 }
1007                 rxr->rx_prod = prod;
1008                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
1009         }
1010
1011         ring = rxr->ag_ring_struct;
1012         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
1013         bnxt_init_rxbds(ring, type, size);
1014         prod = rxr->ag_prod;
1015
1016         for (i = 0; i < ring->ring_size; i++) {
1017                 if (unlikely(!rxr->ag_buf_ring[i].mbuf)) {
1018                         if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
1019                                 PMD_DRV_LOG(WARNING,
1020                                             "init'ed AG ring %d with %d/%d mbufs only\n",
1021                                             rxq->queue_id, i, ring->ring_size);
1022                                 break;
1023                         }
1024                 }
1025                 rxr->ag_prod = prod;
1026                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
1027         }
1028         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
1029
1030         if (rxr->tpa_info) {
1031                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
1032
1033                 for (i = 0; i < max_aggs; i++) {
1034                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1035                                 rxr->tpa_info[i].mbuf =
1036                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1037                                 if (!rxr->tpa_info[i].mbuf) {
1038                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1039                                         return -ENOMEM;
1040                                 }
1041                         }
1042                 }
1043         }
1044         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1045
1046         return 0;
1047 }