drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_ring.h"
  16 #include "bnxt_rxr.h"
  17 #include "bnxt_rxq.h"
  18 #include "hsi_struct_def_dpdk.h"
  19 #ifdef RTE_LIBRTE_IEEE1588
  20 #include "bnxt_hwrm.h"
  21 #endif
  22
  23 #include <bnxt_tf_common.h>
  24 #include <ulp_mark_mgr.h>
  25
  26 /*
  27  * RX Ring handling
  28  */
  29
  30 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  31 {
  32         struct rte_mbuf *data;
  33
  34         data = rte_mbuf_raw_alloc(mb);
  35
  36         return data;
  37 }
  38
  39 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  40                                      struct bnxt_rx_ring_info *rxr,
  41                                      uint16_t prod)
  42 {
  43         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
  44         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[prod];
  45         struct rte_mbuf *mbuf;
  46
  47         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  48         if (!mbuf) {
  49                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  50                 return -ENOMEM;
  51         }
  52
  53         rx_buf->mbuf = mbuf;
  54         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  55
  56         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  57
  58         return 0;
  59 }
  60
  61 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  62                                      struct bnxt_rx_ring_info *rxr,
  63                                      uint16_t prod)
  64 {
  65         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
  66         struct bnxt_sw_rx_bd *rx_buf = &rxr->ag_buf_ring[prod];
  67         struct rte_mbuf *mbuf;
  68
  69         if (rxbd == NULL) {
  70                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  71                 return -EINVAL;
  72         }
  73
  74         if (rx_buf == NULL) {
  75                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  76                 return -EINVAL;
  77         }
  78
  79         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  80         if (!mbuf) {
  81                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  82                 return -ENOMEM;
  83         }
  84
  85         rx_buf->mbuf = mbuf;
  86         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  87
  88         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  89
  90         return 0;
  91 }
  92
  93 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
  94                                struct rte_mbuf *mbuf)
  95 {
  96         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
  97         struct bnxt_sw_rx_bd *prod_rx_buf;
  98         struct rx_prod_pkt_bd *prod_bd;
  99
 100         prod_rx_buf = &rxr->rx_buf_ring[prod];
 101
 102         RTE_ASSERT(prod_rx_buf->mbuf == NULL);
 103         RTE_ASSERT(mbuf != NULL);
 104
 105         prod_rx_buf->mbuf = mbuf;
 106
 107         prod_bd = &rxr->rx_desc_ring[prod];
 108
 109         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 110
 111         rxr->rx_prod = prod;
 112 }
 113
 114 static inline
 115 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 116                                      uint16_t cons)
 117 {
 118         struct bnxt_sw_rx_bd *cons_rx_buf;
 119         struct rte_mbuf *mbuf;
 120
 121         cons_rx_buf = &rxr->rx_buf_ring[cons];
 122         RTE_ASSERT(cons_rx_buf->mbuf != NULL);
 123         mbuf = cons_rx_buf->mbuf;
 124         cons_rx_buf->mbuf = NULL;
 125         return mbuf;
 126 }
 127
 128 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 129                            struct rx_tpa_start_cmpl *tpa_start,
 130                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 131 {
 132         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 133         uint16_t agg_id;
 134         uint16_t data_cons;
 135         struct bnxt_tpa_info *tpa_info;
 136         struct rte_mbuf *mbuf;
 137
 138         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 139
 140         data_cons = tpa_start->opaque;
 141         tpa_info = &rxr->tpa_info[agg_id];
 142
 143         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 144
 145         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 146
 147         tpa_info->agg_count = 0;
 148         tpa_info->mbuf = mbuf;
 149         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 150
 151         mbuf->nb_segs = 1;
 152         mbuf->next = NULL;
 153         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 154         mbuf->data_len = mbuf->pkt_len;
 155         mbuf->port = rxq->port_id;
 156         mbuf->ol_flags = PKT_RX_LRO;
 157         if (likely(tpa_start->flags_type &
 158                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 159                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 160                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 161         } else {
 162                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 163                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 164         }
 165         if (tpa_start1->flags2 &
 166             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 167                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 168                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 169         }
 170         if (likely(tpa_start1->flags2 &
 171                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 172                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 173
 174         /* recycle next mbuf */
 175         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
 176         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 177 }
 178
 179 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 180                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 181 {
 182         uint16_t last_cp_cons;
 183         struct rx_pkt_cmpl *agg_cmpl;
 184
 185         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 186         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 187         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 188         cpr->valid = FLIP_VALID(raw_cp_cons,
 189                                 cpr->cp_ring_struct->ring_mask,
 190                                 cpr->valid);
 191         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 192 }
 193
 194 /* TPA consume agg buffer out of order, allocate connected data only */
 195 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 196 {
 197         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 198         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
 199
 200         /* TODO batch allocation for better performance */
 201         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
 202                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
 203                         PMD_DRV_LOG(ERR,
 204                                 "agg mbuf alloc failed: prod=0x%x\n", next);
 205                         break;
 206                 }
 207                 rte_bitmap_clear(rxr->ag_bitmap, next);
 208                 rxr->ag_prod = next;
 209                 next = RING_NEXT(rxr->ag_ring_struct, next);
 210         }
 211
 212         return 0;
 213 }
 214
 215 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 216                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 217                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 218 {
 219         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 220         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 221         int i;
 222         uint16_t cp_cons, ag_cons;
 223         struct rx_pkt_cmpl *rxcmp;
 224         struct rte_mbuf *last = mbuf;
 225         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
 226
 227         for (i = 0; i < agg_buf; i++) {
 228                 struct bnxt_sw_rx_bd *ag_buf;
 229                 struct rte_mbuf *ag_mbuf;
 230
 231                 if (is_thor_tpa) {
 232                         rxcmp = (void *)&tpa_info->agg_arr[i];
 233                 } else {
 234                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 235                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 236                         rxcmp = (struct rx_pkt_cmpl *)
 237                                         &cpr->cp_desc_ring[cp_cons];
 238                 }
 239
 240 #ifdef BNXT_DEBUG
 241                 bnxt_dump_cmpl(cp_cons, rxcmp);
 242 #endif
 243
 244                 ag_cons = rxcmp->opaque;
 245                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 246                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 247                 ag_mbuf = ag_buf->mbuf;
 248                 RTE_ASSERT(ag_mbuf != NULL);
 249
 250                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 251
 252                 mbuf->nb_segs++;
 253                 mbuf->pkt_len += ag_mbuf->data_len;
 254
 255                 last->next = ag_mbuf;
 256                 last = ag_mbuf;
 257
 258                 ag_buf->mbuf = NULL;
 259
 260                 /*
 261                  * As aggregation buffer consumed out of order in TPA module,
 262                  * use bitmap to track freed slots to be allocated and notified
 263                  * to NIC
 264                  */
 265                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 266         }
 267         bnxt_prod_ag_mbuf(rxq);
 268         return 0;
 269 }
 270
 271 static inline struct rte_mbuf *bnxt_tpa_end(
 272                 struct bnxt_rx_queue *rxq,
 273                 uint32_t *raw_cp_cons,
 274                 struct rx_tpa_end_cmpl *tpa_end,
 275                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 276 {
 277         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 278         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 279         uint16_t agg_id;
 280         struct rte_mbuf *mbuf;
 281         uint8_t agg_bufs;
 282         uint8_t payload_offset;
 283         struct bnxt_tpa_info *tpa_info;
 284
 285         if (BNXT_CHIP_THOR(rxq->bp)) {
 286                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 287                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 288
 289                 th_tpa_end = (void *)tpa_end;
 290                 th_tpa_end1 = (void *)tpa_end1;
 291                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 292                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 293                 payload_offset = th_tpa_end1->payload_offset;
 294         } else {
 295                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 296                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 297                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 298                         return NULL;
 299                 payload_offset = tpa_end->payload_offset;
 300         }
 301
 302         tpa_info = &rxr->tpa_info[agg_id];
 303         mbuf = tpa_info->mbuf;
 304         RTE_ASSERT(mbuf != NULL);
 305
 306         rte_prefetch0(mbuf);
 307         if (agg_bufs) {
 308                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 309         }
 310         mbuf->l4_len = payload_offset;
 311
 312         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 313         RTE_ASSERT(new_data != NULL);
 314         if (!new_data) {
 315                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 316                 return NULL;
 317         }
 318         tpa_info->mbuf = new_data;
 319
 320         return mbuf;
 321 }
 322
 323 static uint32_t
 324 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 325 {
 326         uint32_t l3, pkt_type = 0;
 327         uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
 328         uint32_t flags_type;
 329
 330         vlan = !!(rxcmp1->flags2 &
 331                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
 332         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 333
 334         t_ipcs = !!(rxcmp1->flags2 &
 335                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
 336         ip6 = !!(rxcmp1->flags2 &
 337                  rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
 338
 339         flags_type = rxcmp->flags_type &
 340                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 341
 342         if (!t_ipcs && !ip6)
 343                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 344         else if (!t_ipcs && ip6)
 345                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 346         else if (t_ipcs && !ip6)
 347                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 348         else
 349                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 350
 351         switch (flags_type) {
 352         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
 353                 if (!t_ipcs)
 354                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 355                 else
 356                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 357                 break;
 358
 359         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
 360                 if (!t_ipcs)
 361                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 362                 else
 363                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 364                 break;
 365
 366         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
 367                 if (!t_ipcs)
 368                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 369                 else
 370                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 371                 break;
 372
 373         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
 374                 pkt_type |= l3;
 375                 break;
 376         }
 377
 378         return pkt_type;
 379 }
 380
 381 #ifdef RTE_LIBRTE_IEEE1588
 382 static void
 383 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
 384 {
 385         uint64_t systime_cycles = 0;
 386
 387         if (!BNXT_CHIP_THOR(bp))
 388                 return;
 389
 390         /* On Thor, Rx timestamps are provided directly in the
 391          * Rx completion records to the driver. Only 32 bits of
 392          * the timestamp is present in the completion. Driver needs
 393          * to read the current 48 bit free running timer using the
 394          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 395          * from the HWRM response with the lower 32 bits in the
 396          * Rx completion to produce the 48 bit timestamp for the Rx packet
 397          */
 398         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 399                                 &systime_cycles);
 400         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 401         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 402 }
 403 #endif
 404
 405 static void
 406 bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
 407                           struct rte_mbuf *mbuf)
 408 {
 409         uint32_t cfa_code;
 410         uint32_t meta_fmt;
 411         uint32_t meta;
 412         uint32_t eem = 0;
 413         uint32_t mark_id;
 414         uint32_t flags2;
 415         int rc;
 416
 417         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 418         flags2 = rte_le_to_cpu_32(rxcmp1->flags2);
 419         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 420         if (meta) {
 421                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 422
 423                 /* The flags field holds extra bits of info from [6:4]
 424                  * which indicate if the flow is in TCAM or EM or EEM
 425                  */
 426                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 427                             BNXT_CFA_META_FMT_SHFT;
 428                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 429                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 430                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 431                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 432                  */
 433                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 434
 435                 eem = meta_fmt == BNXT_CFA_META_FMT_EEM;
 436
 437                 /* For EEM flows, The first part of cfa_code is 16 bits.
 438                  * The second part is embedded in the
 439                  * metadata field from bit 19 onwards. The driver needs to
 440                  * ignore the first 19 bits of metadata and use the next 12
 441                  * bits as higher 12 bits of cfa_code.
 442                  */
 443                 if (eem)
 444                         cfa_code |= meta << BNXT_CFA_CODE_META_SHIFT;
 445         }
 446
 447         if (cfa_code) {
 448                 mbuf->hash.fdir.hi = 0;
 449                 mbuf->hash.fdir.id = 0;
 450                 if (eem)
 451                         rc = ulp_mark_db_mark_get(&bp->ulp_ctx, true,
 452                                                   cfa_code, &mark_id);
 453                 else
 454                         rc = ulp_mark_db_mark_get(&bp->ulp_ctx, false,
 455                                                   cfa_code, &mark_id);
 456                 /* If the above fails, simply return and don't add the mark to
 457                  * mbuf
 458                  */
 459                 if (rc)
 460                         return;
 461
 462                 mbuf->hash.fdir.hi      = mark_id;
 463                 mbuf->udata64           = (cfa_code & 0xffffffffull) << 32;
 464                 mbuf->hash.fdir.id      = rxcmp1->cfa_code;
 465                 mbuf->ol_flags          |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 466         }
 467 }
 468
 469 void bnxt_set_mark_in_mbuf(struct bnxt *bp,
 470                            struct rx_pkt_cmpl_hi *rxcmp1,
 471                            struct rte_mbuf *mbuf)
 472 {
 473         uint32_t cfa_code = 0;
 474         uint8_t meta_fmt = 0;
 475         uint16_t flags2 = 0;
 476         uint32_t meta =  0;
 477
 478         cfa_code = rte_le_to_cpu_16(rxcmp1->cfa_code);
 479         if (!cfa_code)
 480                 return;
 481
 482         if (cfa_code && !bp->mark_table[cfa_code].valid)
 483                 return;
 484
 485         flags2 = rte_le_to_cpu_16(rxcmp1->flags2);
 486         meta = rte_le_to_cpu_32(rxcmp1->metadata);
 487         if (meta) {
 488                 meta >>= BNXT_RX_META_CFA_CODE_SHIFT;
 489
 490                 /* The flags field holds extra bits of info from [6:4]
 491                  * which indicate if the flow is in TCAM or EM or EEM
 492                  */
 493                 meta_fmt = (flags2 & BNXT_CFA_META_FMT_MASK) >>
 494                            BNXT_CFA_META_FMT_SHFT;
 495
 496                 /* meta_fmt == 4 => 'b100 => 'b10x => EM.
 497                  * meta_fmt == 5 => 'b101 => 'b10x => EM + VLAN
 498                  * meta_fmt == 6 => 'b110 => 'b11x => EEM
 499                  * meta_fmt == 7 => 'b111 => 'b11x => EEM + VLAN.
 500                  */
 501                 meta_fmt >>= BNXT_CFA_META_FMT_EM_EEM_SHFT;
 502         }
 503
 504         mbuf->hash.fdir.hi = bp->mark_table[cfa_code].mark_id;
 505         mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 506 }
 507
 508 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 509                             struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 510 {
 511         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 512         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 513         struct rx_pkt_cmpl *rxcmp;
 514         struct rx_pkt_cmpl_hi *rxcmp1;
 515         uint32_t tmp_raw_cons = *raw_cons;
 516         uint16_t cons, prod, cp_cons =
 517             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 518         struct rte_mbuf *mbuf;
 519         int rc = 0;
 520         uint8_t agg_buf = 0;
 521         uint16_t cmp_type;
 522         uint32_t flags2_f = 0;
 523         uint16_t flags_type;
 524         struct bnxt *bp = rxq->bp;
 525
 526         rxcmp = (struct rx_pkt_cmpl *)
 527             &cpr->cp_desc_ring[cp_cons];
 528
 529         cmp_type = CMP_TYPE(rxcmp);
 530
 531         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 532                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 533                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 534                 struct bnxt_tpa_info *tpa_info;
 535
 536                 tpa_info = &rxr->tpa_info[agg_id];
 537                 RTE_ASSERT(tpa_info->agg_count < 16);
 538                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 539                 rc = -EINVAL; /* Continue w/o new mbuf */
 540                 goto next_rx;
 541         }
 542
 543         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 544         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 545         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 546
 547         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 548                 return -EBUSY;
 549
 550         cpr->valid = FLIP_VALID(cp_cons,
 551                                 cpr->cp_ring_struct->ring_mask,
 552                                 cpr->valid);
 553
 554         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 555                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 556                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 557                 rc = -EINVAL; /* Continue w/o new mbuf */
 558                 goto next_rx;
 559         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 560                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 561                                    (struct rx_tpa_end_cmpl *)rxcmp,
 562                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 563                 if (unlikely(!mbuf))
 564                         return -EBUSY;
 565                 *rx_pkt = mbuf;
 566                 goto next_rx;
 567         } else if (cmp_type != 0x11) {
 568                 rc = -EINVAL;
 569                 goto next_rx;
 570         }
 571
 572         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 573                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 574         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 575                 return -EBUSY;
 576
 577         prod = rxr->rx_prod;
 578
 579         cons = rxcmp->opaque;
 580         mbuf = bnxt_consume_rx_buf(rxr, cons);
 581         if (mbuf == NULL)
 582                 return -EBUSY;
 583
 584         rte_prefetch0(mbuf);
 585
 586         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 587         mbuf->nb_segs = 1;
 588         mbuf->next = NULL;
 589         mbuf->pkt_len = rxcmp->len;
 590         mbuf->data_len = mbuf->pkt_len;
 591         mbuf->port = rxq->port_id;
 592         mbuf->ol_flags = 0;
 593
 594         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 595         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 596                 mbuf->hash.rss = rxcmp->rss_hash;
 597                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 598         }
 599
 600         if (bp->truflow)
 601                 bnxt_ulp_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 602         else
 603                 bnxt_set_mark_in_mbuf(rxq->bp, rxcmp1, mbuf);
 604
 605 #ifdef RTE_LIBRTE_IEEE1588
 606         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
 607                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 608                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 609                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
 610         }
 611 #endif
 612         if (agg_buf)
 613                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 614
 615         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
 616                 mbuf->vlan_tci = rxcmp1->metadata &
 617                         (RX_PKT_CMPL_METADATA_VID_MASK |
 618                         RX_PKT_CMPL_METADATA_DE |
 619                         RX_PKT_CMPL_METADATA_PRI_MASK);
 620                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 621         }
 622
 623         flags2_f = flags2_0xf(rxcmp1);
 624         /* IP Checksum */
 625         if (likely(IS_IP_NONTUNNEL_PKT(flags2_f))) {
 626                 if (unlikely(RX_CMP_IP_CS_ERROR(rxcmp1)))
 627                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 628                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 629                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 630                 else
 631                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 632         } else if (IS_IP_TUNNEL_PKT(flags2_f)) {
 633                 if (unlikely(RX_CMP_IP_OUTER_CS_ERROR(rxcmp1) ||
 634                              RX_CMP_IP_CS_ERROR(rxcmp1)))
 635                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 636                 else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1)))
 637                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 638                 else
 639                         mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 640         }
 641
 642         /* L4 Checksum */
 643         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
 644                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 645                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 646                 else
 647                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 648         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
 649                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 650                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 651                 else
 652                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 653                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
 654                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 655                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
 656                                     (flags2_f))) {
 657                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 658                 } else {
 659                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 660                 }
 661         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
 662                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 663         }
 664
 665         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 666
 667 #ifdef BNXT_DEBUG
 668         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 669                 /* Re-install the mbuf back to the rx ring */
 670                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 671
 672                 rc = -EIO;
 673                 goto next_rx;
 674         }
 675 #endif
 676         /*
 677          * TODO: Redesign this....
 678          * If the allocation fails, the packet does not get received.
 679          * Simply returning this will result in slowly falling behind
 680          * on the producer ring buffers.
 681          * Instead, "filling up" the producer just before ringing the
 682          * doorbell could be a better solution since it will let the
 683          * producer ring starve until memory is available again pushing
 684          * the drops into hardware and getting them out of the driver
 685          * allowing recovery to a full producer ring.
 686          *
 687          * This could also help with cache usage by preventing per-packet
 688          * calls in favour of a tight loop with the same function being called
 689          * in it.
 690          */
 691         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 692         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
 693                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
 694                 rc = -ENOMEM;
 695                 goto rx;
 696         }
 697         rxr->rx_prod = prod;
 698         /*
 699          * All MBUFs are allocated with the same size under DPDK,
 700          * no optimization for rx_copy_thresh
 701          */
 702 rx:
 703         *rx_pkt = mbuf;
 704
 705 next_rx:
 706
 707         *raw_cons = tmp_raw_cons;
 708
 709         return rc;
 710 }
 711
 712 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 713                                uint16_t nb_pkts)
 714 {
 715         struct bnxt_rx_queue *rxq = rx_queue;
 716         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 717         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 718         uint32_t raw_cons = cpr->cp_raw_cons;
 719         uint32_t cons;
 720         int nb_rx_pkts = 0;
 721         struct rx_pkt_cmpl *rxcmp;
 722         uint16_t prod = rxr->rx_prod;
 723         uint16_t ag_prod = rxr->ag_prod;
 724         int rc = 0;
 725         bool evt = false;
 726
 727         if (unlikely(is_bnxt_in_error(rxq->bp)))
 728                 return 0;
 729
 730         /* If Rx Q was stopped return */
 731         if (unlikely(!rxq->rx_started ||
 732                      !rte_spinlock_trylock(&rxq->lock)))
 733                 return 0;
 734
 735         /* Handle RX burst request */
 736         while (1) {
 737                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 738                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
 739                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 740
 741                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 742                         break;
 743                 cpr->valid = FLIP_VALID(cons,
 744                                         cpr->cp_ring_struct->ring_mask,
 745                                         cpr->valid);
 746
 747                 /* TODO: Avoid magic numbers... */
 748                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 749                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 750                         if (likely(!rc) || rc == -ENOMEM)
 751                                 nb_rx_pkts++;
 752                         if (rc == -EBUSY)       /* partial completion */
 753                                 break;
 754                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 755                         evt =
 756                         bnxt_event_hwrm_resp_handler(rxq->bp,
 757                                                      (struct cmpl_base *)rxcmp);
 758                         /* If the async event is Fatal error, return */
 759                         if (unlikely(is_bnxt_in_error(rxq->bp)))
 760                                 goto done;
 761                 }
 762
 763                 raw_cons = NEXT_RAW_CMP(raw_cons);
 764                 if (nb_rx_pkts == nb_pkts || evt)
 765                         break;
 766                 /* Post some Rx buf early in case of larger burst processing */
 767                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 768                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 769         }
 770
 771         cpr->cp_raw_cons = raw_cons;
 772         if (!nb_rx_pkts && !evt) {
 773                 /*
 774                  * For PMD, there is no need to keep on pushing to REARM
 775                  * the doorbell if there are no new completions
 776                  */
 777                 goto done;
 778         }
 779
 780         if (prod != rxr->rx_prod)
 781                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 782
 783         /* Ring the AGG ring DB */
 784         if (ag_prod != rxr->ag_prod)
 785                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 786
 787         bnxt_db_cq(cpr);
 788
 789         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 790         if (rc == -ENOMEM) {
 791                 int i = RING_NEXT(rxr->rx_ring_struct, prod);
 792                 int cnt = nb_rx_pkts;
 793
 794                 for (; cnt;
 795                         i = RING_NEXT(rxr->rx_ring_struct, i), cnt--) {
 796                         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];
 797
 798                         /* Buffer already allocated for this index. */
 799                         if (rx_buf->mbuf != NULL)
 800                                 continue;
 801
 802                         /* This slot is empty. Alloc buffer for Rx */
 803                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
 804                                 rxr->rx_prod = i;
 805                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 806                         } else {
 807                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 808                                 break;
 809                         }
 810                 }
 811         }
 812
 813 done:
 814         rte_spinlock_unlock(&rxq->lock);
 815
 816         return nb_rx_pkts;
 817 }
 818
 819 /*
 820  * Dummy DPDK callback for RX.
 821  *
 822  * This function is used to temporarily replace the real callback during
 823  * unsafe control operations on the queue, or in case of error.
 824  */
 825 uint16_t
 826 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 827                      struct rte_mbuf **rx_pkts __rte_unused,
 828                      uint16_t nb_pkts __rte_unused)
 829 {
 830         return 0;
 831 }
 832
 833 void bnxt_free_rx_rings(struct bnxt *bp)
 834 {
 835         int i;
 836         struct bnxt_rx_queue *rxq;
 837
 838         if (!bp->rx_queues)
 839                 return;
 840
 841         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 842                 rxq = bp->rx_queues[i];
 843                 if (!rxq)
 844                         continue;
 845
 846                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 847                 rte_free(rxq->rx_ring->rx_ring_struct);
 848
 849                 /* Free the Aggregator ring */
 850                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 851                 rte_free(rxq->rx_ring->ag_ring_struct);
 852                 rxq->rx_ring->ag_ring_struct = NULL;
 853
 854                 rte_free(rxq->rx_ring);
 855
 856                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 857                 rte_free(rxq->cp_ring->cp_ring_struct);
 858                 rte_free(rxq->cp_ring);
 859
 860                 rte_free(rxq);
 861                 bp->rx_queues[i] = NULL;
 862         }
 863 }
 864
 865 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
 866 {
 867         struct bnxt_cp_ring_info *cpr;
 868         struct bnxt_rx_ring_info *rxr;
 869         struct bnxt_ring *ring;
 870
 871         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
 872
 873         rxr = rte_zmalloc_socket("bnxt_rx_ring",
 874                                  sizeof(struct bnxt_rx_ring_info),
 875                                  RTE_CACHE_LINE_SIZE, socket_id);
 876         if (rxr == NULL)
 877                 return -ENOMEM;
 878         rxq->rx_ring = rxr;
 879
 880         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 881                                    sizeof(struct bnxt_ring),
 882                                    RTE_CACHE_LINE_SIZE, socket_id);
 883         if (ring == NULL)
 884                 return -ENOMEM;
 885         rxr->rx_ring_struct = ring;
 886         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
 887         ring->ring_mask = ring->ring_size - 1;
 888         ring->bd = (void *)rxr->rx_desc_ring;
 889         ring->bd_dma = rxr->rx_desc_mapping;
 890         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 891         ring->vmem = (void **)&rxr->rx_buf_ring;
 892
 893         cpr = rte_zmalloc_socket("bnxt_rx_ring",
 894                                  sizeof(struct bnxt_cp_ring_info),
 895                                  RTE_CACHE_LINE_SIZE, socket_id);
 896         if (cpr == NULL)
 897                 return -ENOMEM;
 898         rxq->cp_ring = cpr;
 899
 900         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 901                                    sizeof(struct bnxt_ring),
 902                                    RTE_CACHE_LINE_SIZE, socket_id);
 903         if (ring == NULL)
 904                 return -ENOMEM;
 905         cpr->cp_ring_struct = ring;
 906         ring->ring_size = rte_align32pow2(rxr->rx_ring_struct->ring_size *
 907                                           (2 + AGG_RING_SIZE_FACTOR));
 908         ring->ring_mask = ring->ring_size - 1;
 909         ring->bd = (void *)cpr->cp_desc_ring;
 910         ring->bd_dma = cpr->cp_desc_mapping;
 911         ring->vmem_size = 0;
 912         ring->vmem = NULL;
 913
 914         /* Allocate Aggregator rings */
 915         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 916                                    sizeof(struct bnxt_ring),
 917                                    RTE_CACHE_LINE_SIZE, socket_id);
 918         if (ring == NULL)
 919                 return -ENOMEM;
 920         rxr->ag_ring_struct = ring;
 921         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
 922                                           AGG_RING_SIZE_FACTOR);
 923         ring->ring_mask = ring->ring_size - 1;
 924         ring->bd = (void *)rxr->ag_desc_ring;
 925         ring->bd_dma = rxr->ag_desc_mapping;
 926         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 927         ring->vmem = (void **)&rxr->ag_buf_ring;
 928
 929         return 0;
 930 }
 931
 932 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
 933                             uint16_t len)
 934 {
 935         uint32_t j;
 936         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
 937
 938         if (!rx_bd_ring)
 939                 return;
 940         for (j = 0; j < ring->ring_size; j++) {
 941                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
 942                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
 943                 rx_bd_ring[j].opaque = j;
 944         }
 945 }
 946
 947 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
 948 {
 949         struct bnxt_rx_ring_info *rxr;
 950         struct bnxt_ring *ring;
 951         uint32_t prod, type;
 952         unsigned int i;
 953         uint16_t size;
 954
 955         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
 956         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
 957
 958         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
 959
 960         rxr = rxq->rx_ring;
 961         ring = rxr->rx_ring_struct;
 962         bnxt_init_rxbds(ring, type, size);
 963
 964         prod = rxr->rx_prod;
 965         for (i = 0; i < ring->ring_size; i++) {
 966                 if (unlikely(!rxr->rx_buf_ring[i].mbuf)) {
 967                         if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
 968                                 PMD_DRV_LOG(WARNING,
 969                                             "init'ed rx ring %d with %d/%d mbufs only\n",
 970                                             rxq->queue_id, i, ring->ring_size);
 971                                 break;
 972                         }
 973                         rxr->rx_prod = prod;
 974                         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 975                 }
 976         }
 977
 978         ring = rxr->ag_ring_struct;
 979         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
 980         bnxt_init_rxbds(ring, type, size);
 981         prod = rxr->ag_prod;
 982
 983         for (i = 0; i < ring->ring_size; i++) {
 984                 if (unlikely(!rxr->ag_buf_ring[i].mbuf)) {
 985                         if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
 986                                 PMD_DRV_LOG(WARNING,
 987                                             "init'ed AG ring %d with %d/%d mbufs only\n",
 988                                             rxq->queue_id, i, ring->ring_size);
 989                                 break;
 990                         }
 991                         rxr->ag_prod = prod;
 992                         prod = RING_NEXT(rxr->ag_ring_struct, prod);
 993                 }
 994         }
 995         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
 996
 997         if (rxr->tpa_info) {
 998                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 999
1000                 for (i = 0; i < max_aggs; i++) {
1001                         if (unlikely(!rxr->tpa_info[i].mbuf)) {
1002                                 rxr->tpa_info[i].mbuf =
1003                                         __bnxt_alloc_rx_data(rxq->mb_pool);
1004                                 if (!rxr->tpa_info[i].mbuf) {
1005                                         rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
1006                                         return -ENOMEM;
1007                                 }
1008                         }
1009                 }
1010         }
1011         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
1012
1013         return 0;
1014 }