drivers/net/bnxt/bnxt_rxr.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Broadcom
   3  * All rights reserved.
   4  */
   5
   6 #include <inttypes.h>
   7 #include <stdbool.h>
   8
   9 #include <rte_bitmap.h>
  10 #include <rte_byteorder.h>
  11 #include <rte_malloc.h>
  12 #include <rte_memory.h>
  13
  14 #include "bnxt.h"
  15 #include "bnxt_ring.h"
  16 #include "bnxt_rxr.h"
  17 #include "bnxt_rxq.h"
  18 #include "hsi_struct_def_dpdk.h"
  19 #ifdef RTE_LIBRTE_IEEE1588
  20 #include "bnxt_hwrm.h"
  21 #endif
  22
  23 /*
  24  * RX Ring handling
  25  */
  26
  27 static inline struct rte_mbuf *__bnxt_alloc_rx_data(struct rte_mempool *mb)
  28 {
  29         struct rte_mbuf *data;
  30
  31         data = rte_mbuf_raw_alloc(mb);
  32
  33         return data;
  34 }
  35
  36 static inline int bnxt_alloc_rx_data(struct bnxt_rx_queue *rxq,
  37                                      struct bnxt_rx_ring_info *rxr,
  38                                      uint16_t prod)
  39 {
  40         struct rx_prod_pkt_bd *rxbd = &rxr->rx_desc_ring[prod];
  41         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[prod];
  42         struct rte_mbuf *mbuf;
  43
  44         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  45         if (!mbuf) {
  46                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  47                 return -ENOMEM;
  48         }
  49
  50         rx_buf->mbuf = mbuf;
  51         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  52
  53         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  54
  55         return 0;
  56 }
  57
  58 static inline int bnxt_alloc_ag_data(struct bnxt_rx_queue *rxq,
  59                                      struct bnxt_rx_ring_info *rxr,
  60                                      uint16_t prod)
  61 {
  62         struct rx_prod_pkt_bd *rxbd = &rxr->ag_desc_ring[prod];
  63         struct bnxt_sw_rx_bd *rx_buf = &rxr->ag_buf_ring[prod];
  64         struct rte_mbuf *mbuf;
  65
  66         mbuf = __bnxt_alloc_rx_data(rxq->mb_pool);
  67         if (!mbuf) {
  68                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
  69                 return -ENOMEM;
  70         }
  71
  72         if (rxbd == NULL)
  73                 PMD_DRV_LOG(ERR, "Jumbo Frame. rxbd is NULL\n");
  74         if (rx_buf == NULL)
  75                 PMD_DRV_LOG(ERR, "Jumbo Frame. rx_buf is NULL\n");
  76
  77
  78         rx_buf->mbuf = mbuf;
  79         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
  80
  81         rxbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
  82
  83         return 0;
  84 }
  85
  86 static inline void bnxt_reuse_rx_mbuf(struct bnxt_rx_ring_info *rxr,
  87                                struct rte_mbuf *mbuf)
  88 {
  89         uint16_t prod = RING_NEXT(rxr->rx_ring_struct, rxr->rx_prod);
  90         struct bnxt_sw_rx_bd *prod_rx_buf;
  91         struct rx_prod_pkt_bd *prod_bd;
  92
  93         prod_rx_buf = &rxr->rx_buf_ring[prod];
  94
  95         RTE_ASSERT(prod_rx_buf->mbuf == NULL);
  96         RTE_ASSERT(mbuf != NULL);
  97
  98         prod_rx_buf->mbuf = mbuf;
  99
 100         prod_bd = &rxr->rx_desc_ring[prod];
 101
 102         prod_bd->address = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 103
 104         rxr->rx_prod = prod;
 105 }
 106
 107 static inline
 108 struct rte_mbuf *bnxt_consume_rx_buf(struct bnxt_rx_ring_info *rxr,
 109                                      uint16_t cons)
 110 {
 111         struct bnxt_sw_rx_bd *cons_rx_buf;
 112         struct rte_mbuf *mbuf;
 113
 114         cons_rx_buf = &rxr->rx_buf_ring[cons];
 115         RTE_ASSERT(cons_rx_buf->mbuf != NULL);
 116         mbuf = cons_rx_buf->mbuf;
 117         cons_rx_buf->mbuf = NULL;
 118         return mbuf;
 119 }
 120
 121 static void bnxt_tpa_start(struct bnxt_rx_queue *rxq,
 122                            struct rx_tpa_start_cmpl *tpa_start,
 123                            struct rx_tpa_start_cmpl_hi *tpa_start1)
 124 {
 125         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 126         uint16_t agg_id;
 127         uint16_t data_cons;
 128         struct bnxt_tpa_info *tpa_info;
 129         struct rte_mbuf *mbuf;
 130
 131         agg_id = bnxt_tpa_start_agg_id(rxq->bp, tpa_start);
 132
 133         data_cons = tpa_start->opaque;
 134         tpa_info = &rxr->tpa_info[agg_id];
 135
 136         mbuf = bnxt_consume_rx_buf(rxr, data_cons);
 137
 138         bnxt_reuse_rx_mbuf(rxr, tpa_info->mbuf);
 139
 140         tpa_info->agg_count = 0;
 141         tpa_info->mbuf = mbuf;
 142         tpa_info->len = rte_le_to_cpu_32(tpa_start->len);
 143
 144         mbuf->nb_segs = 1;
 145         mbuf->next = NULL;
 146         mbuf->pkt_len = rte_le_to_cpu_32(tpa_start->len);
 147         mbuf->data_len = mbuf->pkt_len;
 148         mbuf->port = rxq->port_id;
 149         mbuf->ol_flags = PKT_RX_LRO;
 150         if (likely(tpa_start->flags_type &
 151                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS_RSS_VALID))) {
 152                 mbuf->hash.rss = rte_le_to_cpu_32(tpa_start->rss_hash);
 153                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 154         } else {
 155                 mbuf->hash.fdir.id = rte_le_to_cpu_16(tpa_start1->cfa_code);
 156                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 157         }
 158         if (tpa_start1->flags2 &
 159             rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN)) {
 160                 mbuf->vlan_tci = rte_le_to_cpu_32(tpa_start1->metadata);
 161                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 162         }
 163         if (likely(tpa_start1->flags2 &
 164                    rte_cpu_to_le_32(RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC)))
 165                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 166
 167         /* recycle next mbuf */
 168         data_cons = RING_NEXT(rxr->rx_ring_struct, data_cons);
 169         bnxt_reuse_rx_mbuf(rxr, bnxt_consume_rx_buf(rxr, data_cons));
 170 }
 171
 172 static int bnxt_agg_bufs_valid(struct bnxt_cp_ring_info *cpr,
 173                 uint8_t agg_bufs, uint32_t raw_cp_cons)
 174 {
 175         uint16_t last_cp_cons;
 176         struct rx_pkt_cmpl *agg_cmpl;
 177
 178         raw_cp_cons = ADV_RAW_CMP(raw_cp_cons, agg_bufs);
 179         last_cp_cons = RING_CMP(cpr->cp_ring_struct, raw_cp_cons);
 180         agg_cmpl = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[last_cp_cons];
 181         cpr->valid = FLIP_VALID(raw_cp_cons,
 182                                 cpr->cp_ring_struct->ring_mask,
 183                                 cpr->valid);
 184         return CMP_VALID(agg_cmpl, raw_cp_cons, cpr->cp_ring_struct);
 185 }
 186
 187 /* TPA consume agg buffer out of order, allocate connected data only */
 188 static int bnxt_prod_ag_mbuf(struct bnxt_rx_queue *rxq)
 189 {
 190         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 191         uint16_t next = RING_NEXT(rxr->ag_ring_struct, rxr->ag_prod);
 192
 193         /* TODO batch allocation for better performance */
 194         while (rte_bitmap_get(rxr->ag_bitmap, next)) {
 195                 if (unlikely(bnxt_alloc_ag_data(rxq, rxr, next))) {
 196                         PMD_DRV_LOG(ERR,
 197                                 "agg mbuf alloc failed: prod=0x%x\n", next);
 198                         break;
 199                 }
 200                 rte_bitmap_clear(rxr->ag_bitmap, next);
 201                 rxr->ag_prod = next;
 202                 next = RING_NEXT(rxr->ag_ring_struct, next);
 203         }
 204
 205         return 0;
 206 }
 207
 208 static int bnxt_rx_pages(struct bnxt_rx_queue *rxq,
 209                          struct rte_mbuf *mbuf, uint32_t *tmp_raw_cons,
 210                          uint8_t agg_buf, struct bnxt_tpa_info *tpa_info)
 211 {
 212         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 213         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 214         int i;
 215         uint16_t cp_cons, ag_cons;
 216         struct rx_pkt_cmpl *rxcmp;
 217         struct rte_mbuf *last = mbuf;
 218         bool is_thor_tpa = tpa_info && BNXT_CHIP_THOR(rxq->bp);
 219
 220         for (i = 0; i < agg_buf; i++) {
 221                 struct bnxt_sw_rx_bd *ag_buf;
 222                 struct rte_mbuf *ag_mbuf;
 223
 224                 if (is_thor_tpa) {
 225                         rxcmp = (void *)&tpa_info->agg_arr[i];
 226                 } else {
 227                         *tmp_raw_cons = NEXT_RAW_CMP(*tmp_raw_cons);
 228                         cp_cons = RING_CMP(cpr->cp_ring_struct, *tmp_raw_cons);
 229                         rxcmp = (struct rx_pkt_cmpl *)
 230                                         &cpr->cp_desc_ring[cp_cons];
 231                 }
 232
 233 #ifdef BNXT_DEBUG
 234                 bnxt_dump_cmpl(cp_cons, rxcmp);
 235 #endif
 236
 237                 ag_cons = rxcmp->opaque;
 238                 RTE_ASSERT(ag_cons <= rxr->ag_ring_struct->ring_mask);
 239                 ag_buf = &rxr->ag_buf_ring[ag_cons];
 240                 ag_mbuf = ag_buf->mbuf;
 241                 RTE_ASSERT(ag_mbuf != NULL);
 242
 243                 ag_mbuf->data_len = rte_le_to_cpu_16(rxcmp->len);
 244
 245                 mbuf->nb_segs++;
 246                 mbuf->pkt_len += ag_mbuf->data_len;
 247
 248                 last->next = ag_mbuf;
 249                 last = ag_mbuf;
 250
 251                 ag_buf->mbuf = NULL;
 252
 253                 /*
 254                  * As aggregation buffer consumed out of order in TPA module,
 255                  * use bitmap to track freed slots to be allocated and notified
 256                  * to NIC
 257                  */
 258                 rte_bitmap_set(rxr->ag_bitmap, ag_cons);
 259         }
 260         bnxt_prod_ag_mbuf(rxq);
 261         return 0;
 262 }
 263
 264 static inline struct rte_mbuf *bnxt_tpa_end(
 265                 struct bnxt_rx_queue *rxq,
 266                 uint32_t *raw_cp_cons,
 267                 struct rx_tpa_end_cmpl *tpa_end,
 268                 struct rx_tpa_end_cmpl_hi *tpa_end1)
 269 {
 270         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 271         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 272         uint16_t agg_id;
 273         struct rte_mbuf *mbuf;
 274         uint8_t agg_bufs;
 275         uint8_t payload_offset;
 276         struct bnxt_tpa_info *tpa_info;
 277
 278         if (BNXT_CHIP_THOR(rxq->bp)) {
 279                 struct rx_tpa_v2_end_cmpl *th_tpa_end;
 280                 struct rx_tpa_v2_end_cmpl_hi *th_tpa_end1;
 281
 282                 th_tpa_end = (void *)tpa_end;
 283                 th_tpa_end1 = (void *)tpa_end1;
 284                 agg_id = BNXT_TPA_END_AGG_ID_TH(th_tpa_end);
 285                 agg_bufs = BNXT_TPA_END_AGG_BUFS_TH(th_tpa_end1);
 286                 payload_offset = th_tpa_end1->payload_offset;
 287         } else {
 288                 agg_id = BNXT_TPA_END_AGG_ID(tpa_end);
 289                 agg_bufs = BNXT_TPA_END_AGG_BUFS(tpa_end);
 290                 if (!bnxt_agg_bufs_valid(cpr, agg_bufs, *raw_cp_cons))
 291                         return NULL;
 292                 payload_offset = tpa_end->payload_offset;
 293         }
 294
 295         tpa_info = &rxr->tpa_info[agg_id];
 296         mbuf = tpa_info->mbuf;
 297         RTE_ASSERT(mbuf != NULL);
 298
 299         rte_prefetch0(mbuf);
 300         if (agg_bufs) {
 301                 bnxt_rx_pages(rxq, mbuf, raw_cp_cons, agg_bufs, tpa_info);
 302         }
 303         mbuf->l4_len = payload_offset;
 304
 305         struct rte_mbuf *new_data = __bnxt_alloc_rx_data(rxq->mb_pool);
 306         RTE_ASSERT(new_data != NULL);
 307         if (!new_data) {
 308                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 309                 return NULL;
 310         }
 311         tpa_info->mbuf = new_data;
 312
 313         return mbuf;
 314 }
 315
 316 static uint32_t
 317 bnxt_parse_pkt_type(struct rx_pkt_cmpl *rxcmp, struct rx_pkt_cmpl_hi *rxcmp1)
 318 {
 319         uint32_t l3, pkt_type = 0;
 320         uint32_t t_ipcs = 0, ip6 = 0, vlan = 0;
 321         uint32_t flags_type;
 322
 323         vlan = !!(rxcmp1->flags2 &
 324                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN));
 325         pkt_type |= vlan ? RTE_PTYPE_L2_ETHER_VLAN : RTE_PTYPE_L2_ETHER;
 326
 327         t_ipcs = !!(rxcmp1->flags2 &
 328                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC));
 329         ip6 = !!(rxcmp1->flags2 &
 330                  rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_TYPE));
 331
 332         flags_type = rxcmp->flags_type &
 333                 rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS_ITYPE_MASK);
 334
 335         if (!t_ipcs && !ip6)
 336                 l3 = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
 337         else if (!t_ipcs && ip6)
 338                 l3 = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
 339         else if (t_ipcs && !ip6)
 340                 l3 = RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
 341         else
 342                 l3 = RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
 343
 344         switch (flags_type) {
 345         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_ICMP):
 346                 if (!t_ipcs)
 347                         pkt_type |= l3 | RTE_PTYPE_L4_ICMP;
 348                 else
 349                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_ICMP;
 350                 break;
 351
 352         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_TCP):
 353                 if (!t_ipcs)
 354                         pkt_type |= l3 | RTE_PTYPE_L4_TCP;
 355                 else
 356                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_TCP;
 357                 break;
 358
 359         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_UDP):
 360                 if (!t_ipcs)
 361                         pkt_type |= l3 | RTE_PTYPE_L4_UDP;
 362                 else
 363                         pkt_type |= l3 | RTE_PTYPE_INNER_L4_UDP;
 364                 break;
 365
 366         case RTE_LE32(RX_PKT_CMPL_FLAGS_ITYPE_IP):
 367                 pkt_type |= l3;
 368                 break;
 369         }
 370
 371         return pkt_type;
 372 }
 373
 374 #ifdef RTE_LIBRTE_IEEE1588
 375 static void
 376 bnxt_get_rx_ts_thor(struct bnxt *bp, uint32_t rx_ts_cmpl)
 377 {
 378         uint64_t systime_cycles = 0;
 379
 380         if (!BNXT_CHIP_THOR(bp))
 381                 return;
 382
 383         /* On Thor, Rx timestamps are provided directly in the
 384          * Rx completion records to the driver. Only 32 bits of
 385          * the timestamp is present in the completion. Driver needs
 386          * to read the current 48 bit free running timer using the
 387          * HWRM_PORT_TS_QUERY command and combine the upper 16 bits
 388          * from the HWRM response with the lower 32 bits in the
 389          * Rx completion to produce the 48 bit timestamp for the Rx packet
 390          */
 391         bnxt_hwrm_port_ts_query(bp, BNXT_PTP_FLAGS_CURRENT_TIME,
 392                                 &systime_cycles);
 393         bp->ptp_cfg->rx_timestamp = (systime_cycles & 0xFFFF00000000);
 394         bp->ptp_cfg->rx_timestamp |= rx_ts_cmpl;
 395 }
 396 #endif
 397
 398 static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
 399                             struct bnxt_rx_queue *rxq, uint32_t *raw_cons)
 400 {
 401         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 402         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 403         struct rx_pkt_cmpl *rxcmp;
 404         struct rx_pkt_cmpl_hi *rxcmp1;
 405         uint32_t tmp_raw_cons = *raw_cons;
 406         uint16_t cons, prod, cp_cons =
 407             RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 408         struct rte_mbuf *mbuf;
 409         int rc = 0;
 410         uint8_t agg_buf = 0;
 411         uint16_t cmp_type;
 412         uint32_t flags2_f = 0;
 413         uint16_t flags_type;
 414
 415         rxcmp = (struct rx_pkt_cmpl *)
 416             &cpr->cp_desc_ring[cp_cons];
 417
 418         cmp_type = CMP_TYPE(rxcmp);
 419
 420         if (cmp_type == RX_TPA_V2_ABUF_CMPL_TYPE_RX_TPA_AGG) {
 421                 struct rx_tpa_v2_abuf_cmpl *rx_agg = (void *)rxcmp;
 422                 uint16_t agg_id = rte_cpu_to_le_16(rx_agg->agg_id);
 423                 struct bnxt_tpa_info *tpa_info;
 424
 425                 tpa_info = &rxr->tpa_info[agg_id];
 426                 RTE_ASSERT(tpa_info->agg_count < 16);
 427                 tpa_info->agg_arr[tpa_info->agg_count++] = *rx_agg;
 428                 rc = -EINVAL; /* Continue w/o new mbuf */
 429                 goto next_rx;
 430         }
 431
 432         tmp_raw_cons = NEXT_RAW_CMP(tmp_raw_cons);
 433         cp_cons = RING_CMP(cpr->cp_ring_struct, tmp_raw_cons);
 434         rxcmp1 = (struct rx_pkt_cmpl_hi *)&cpr->cp_desc_ring[cp_cons];
 435
 436         if (!CMP_VALID(rxcmp1, tmp_raw_cons, cpr->cp_ring_struct))
 437                 return -EBUSY;
 438
 439         cpr->valid = FLIP_VALID(cp_cons,
 440                                 cpr->cp_ring_struct->ring_mask,
 441                                 cpr->valid);
 442
 443         if (cmp_type == RX_TPA_START_CMPL_TYPE_RX_TPA_START) {
 444                 bnxt_tpa_start(rxq, (struct rx_tpa_start_cmpl *)rxcmp,
 445                                (struct rx_tpa_start_cmpl_hi *)rxcmp1);
 446                 rc = -EINVAL; /* Continue w/o new mbuf */
 447                 goto next_rx;
 448         } else if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
 449                 mbuf = bnxt_tpa_end(rxq, &tmp_raw_cons,
 450                                    (struct rx_tpa_end_cmpl *)rxcmp,
 451                                    (struct rx_tpa_end_cmpl_hi *)rxcmp1);
 452                 if (unlikely(!mbuf))
 453                         return -EBUSY;
 454                 *rx_pkt = mbuf;
 455                 goto next_rx;
 456         } else if (cmp_type != 0x11) {
 457                 rc = -EINVAL;
 458                 goto next_rx;
 459         }
 460
 461         agg_buf = (rxcmp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK)
 462                         >> RX_PKT_CMPL_AGG_BUFS_SFT;
 463         if (agg_buf && !bnxt_agg_bufs_valid(cpr, agg_buf, tmp_raw_cons))
 464                 return -EBUSY;
 465
 466         prod = rxr->rx_prod;
 467
 468         cons = rxcmp->opaque;
 469         mbuf = bnxt_consume_rx_buf(rxr, cons);
 470         if (mbuf == NULL)
 471                 return -EBUSY;
 472
 473         rte_prefetch0(mbuf);
 474
 475         mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 476         mbuf->nb_segs = 1;
 477         mbuf->next = NULL;
 478         mbuf->pkt_len = rxcmp->len;
 479         mbuf->data_len = mbuf->pkt_len;
 480         mbuf->port = rxq->port_id;
 481         mbuf->ol_flags = 0;
 482
 483         flags_type = rte_le_to_cpu_16(rxcmp->flags_type);
 484         if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
 485                 mbuf->hash.rss = rxcmp->rss_hash;
 486                 mbuf->ol_flags |= PKT_RX_RSS_HASH;
 487         } else {
 488                 mbuf->hash.fdir.id = rxcmp1->cfa_code;
 489                 mbuf->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
 490         }
 491 #ifdef RTE_LIBRTE_IEEE1588
 492         if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
 493                      RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP)) {
 494                 mbuf->ol_flags |= PKT_RX_IEEE1588_PTP | PKT_RX_IEEE1588_TMST;
 495                 bnxt_get_rx_ts_thor(rxq->bp, rxcmp1->reorder);
 496         }
 497 #endif
 498         if (agg_buf)
 499                 bnxt_rx_pages(rxq, mbuf, &tmp_raw_cons, agg_buf, NULL);
 500
 501         if (rxcmp1->flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
 502                 mbuf->vlan_tci = rxcmp1->metadata &
 503                         (RX_PKT_CMPL_METADATA_VID_MASK |
 504                         RX_PKT_CMPL_METADATA_DE |
 505                         RX_PKT_CMPL_METADATA_PRI_MASK);
 506                 mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 507         }
 508
 509         flags2_f = flags2_0xf(rxcmp1);
 510         /* IP Checksum */
 511         if (unlikely(((IS_IP_NONTUNNEL_PKT(flags2_f)) &&
 512                       (RX_CMP_IP_CS_ERROR(rxcmp1))) ||
 513                      (IS_IP_TUNNEL_PKT(flags2_f) &&
 514                       (RX_CMP_IP_OUTER_CS_ERROR(rxcmp1))))) {
 515                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 516         } else if (unlikely(RX_CMP_IP_CS_UNKNOWN(rxcmp1))) {
 517                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
 518         } else {
 519                 mbuf->ol_flags |= PKT_RX_IP_CKSUM_GOOD;
 520         }
 521
 522         /* L4 Checksum */
 523         if (likely(IS_L4_NONTUNNEL_PKT(flags2_f))) {
 524                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 525                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 526                 else
 527                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 528         } else if (IS_L4_TUNNEL_PKT(flags2_f)) {
 529                 if (unlikely(RX_CMP_L4_INNER_CS_ERR2(rxcmp1)))
 530                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 531                 else
 532                         mbuf->ol_flags |= PKT_RX_L4_CKSUM_GOOD;
 533                 if (unlikely(RX_CMP_L4_OUTER_CS_ERR2(rxcmp1))) {
 534                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_BAD;
 535                 } else if (unlikely(IS_L4_TUNNEL_PKT_ONLY_INNER_L4_CS
 536                                     (flags2_f))) {
 537                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_UNKNOWN;
 538                 } else {
 539                         mbuf->ol_flags |= PKT_RX_OUTER_L4_CKSUM_GOOD;
 540                 }
 541         } else if (unlikely(RX_CMP_L4_CS_UNKNOWN(rxcmp1))) {
 542                 mbuf->ol_flags |= PKT_RX_L4_CKSUM_UNKNOWN;
 543         }
 544
 545         mbuf->packet_type = bnxt_parse_pkt_type(rxcmp, rxcmp1);
 546
 547 #ifdef BNXT_DEBUG
 548         if (rxcmp1->errors_v2 & RX_CMP_L2_ERRORS) {
 549                 /* Re-install the mbuf back to the rx ring */
 550                 bnxt_reuse_rx_mbuf(rxr, cons, mbuf);
 551
 552                 rc = -EIO;
 553                 goto next_rx;
 554         }
 555 #endif
 556         /*
 557          * TODO: Redesign this....
 558          * If the allocation fails, the packet does not get received.
 559          * Simply returning this will result in slowly falling behind
 560          * on the producer ring buffers.
 561          * Instead, "filling up" the producer just before ringing the
 562          * doorbell could be a better solution since it will let the
 563          * producer ring starve until memory is available again pushing
 564          * the drops into hardware and getting them out of the driver
 565          * allowing recovery to a full producer ring.
 566          *
 567          * This could also help with cache usage by preventing per-packet
 568          * calls in favour of a tight loop with the same function being called
 569          * in it.
 570          */
 571         prod = RING_NEXT(rxr->rx_ring_struct, prod);
 572         if (bnxt_alloc_rx_data(rxq, rxr, prod)) {
 573                 PMD_DRV_LOG(ERR, "mbuf alloc failed with prod=0x%x\n", prod);
 574                 rc = -ENOMEM;
 575                 goto rx;
 576         }
 577         rxr->rx_prod = prod;
 578         /*
 579          * All MBUFs are allocated with the same size under DPDK,
 580          * no optimization for rx_copy_thresh
 581          */
 582 rx:
 583         *rx_pkt = mbuf;
 584
 585 next_rx:
 586
 587         *raw_cons = tmp_raw_cons;
 588
 589         return rc;
 590 }
 591
 592 uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 593                                uint16_t nb_pkts)
 594 {
 595         struct bnxt_rx_queue *rxq = rx_queue;
 596         struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
 597         struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
 598         uint32_t raw_cons = cpr->cp_raw_cons;
 599         uint32_t cons;
 600         int nb_rx_pkts = 0;
 601         struct rx_pkt_cmpl *rxcmp;
 602         uint16_t prod = rxr->rx_prod;
 603         uint16_t ag_prod = rxr->ag_prod;
 604         int rc = 0;
 605         bool evt = false;
 606
 607         if (unlikely(is_bnxt_in_error(rxq->bp)))
 608                 return 0;
 609
 610         /* If Rx Q was stopped return */
 611         if (unlikely(!rxq->rx_started ||
 612                      !rte_spinlock_trylock(&rxq->lock)))
 613                 return 0;
 614
 615         /* Handle RX burst request */
 616         while (1) {
 617                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
 618                 rte_prefetch0(&cpr->cp_desc_ring[cons]);
 619                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
 620
 621                 if (!CMP_VALID(rxcmp, raw_cons, cpr->cp_ring_struct))
 622                         break;
 623                 cpr->valid = FLIP_VALID(cons,
 624                                         cpr->cp_ring_struct->ring_mask,
 625                                         cpr->valid);
 626
 627                 /* TODO: Avoid magic numbers... */
 628                 if ((CMP_TYPE(rxcmp) & 0x30) == 0x10) {
 629                         rc = bnxt_rx_pkt(&rx_pkts[nb_rx_pkts], rxq, &raw_cons);
 630                         if (likely(!rc) || rc == -ENOMEM)
 631                                 nb_rx_pkts++;
 632                         if (rc == -EBUSY)       /* partial completion */
 633                                 break;
 634                 } else if (!BNXT_NUM_ASYNC_CPR(rxq->bp)) {
 635                         evt =
 636                         bnxt_event_hwrm_resp_handler(rxq->bp,
 637                                                      (struct cmpl_base *)rxcmp);
 638                 }
 639
 640                 raw_cons = NEXT_RAW_CMP(raw_cons);
 641                 if (nb_rx_pkts == nb_pkts || evt)
 642                         break;
 643                 /* Post some Rx buf early in case of larger burst processing */
 644                 if (nb_rx_pkts == BNXT_RX_POST_THRESH)
 645                         bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 646         }
 647
 648         cpr->cp_raw_cons = raw_cons;
 649         if (!nb_rx_pkts && !evt) {
 650                 /*
 651                  * For PMD, there is no need to keep on pushing to REARM
 652                  * the doorbell if there are no new completions
 653                  */
 654                 goto done;
 655         }
 656
 657         if (prod != rxr->rx_prod)
 658                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 659
 660         /* Ring the AGG ring DB */
 661         if (ag_prod != rxr->ag_prod)
 662                 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
 663
 664         bnxt_db_cq(cpr);
 665
 666         /* Attempt to alloc Rx buf in case of a previous allocation failure. */
 667         if (rc == -ENOMEM) {
 668                 int i;
 669
 670                 for (i = prod; i <= nb_rx_pkts;
 671                         i = RING_NEXT(rxr->rx_ring_struct, i)) {
 672                         struct bnxt_sw_rx_bd *rx_buf = &rxr->rx_buf_ring[i];
 673
 674                         /* Buffer already allocated for this index. */
 675                         if (rx_buf->mbuf != NULL)
 676                                 continue;
 677
 678                         /* This slot is empty. Alloc buffer for Rx */
 679                         if (!bnxt_alloc_rx_data(rxq, rxr, i)) {
 680                                 rxr->rx_prod = i;
 681                                 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
 682                         } else {
 683                                 PMD_DRV_LOG(ERR, "Alloc  mbuf failed\n");
 684                                 break;
 685                         }
 686                 }
 687         }
 688
 689 done:
 690         rte_spinlock_unlock(&rxq->lock);
 691
 692         return nb_rx_pkts;
 693 }
 694
 695 /*
 696  * Dummy DPDK callback for RX.
 697  *
 698  * This function is used to temporarily replace the real callback during
 699  * unsafe control operations on the queue, or in case of error.
 700  */
 701 uint16_t
 702 bnxt_dummy_recv_pkts(void *rx_queue __rte_unused,
 703                      struct rte_mbuf **rx_pkts __rte_unused,
 704                      uint16_t nb_pkts __rte_unused)
 705 {
 706         return 0;
 707 }
 708
 709 void bnxt_free_rx_rings(struct bnxt *bp)
 710 {
 711         int i;
 712         struct bnxt_rx_queue *rxq;
 713
 714         if (!bp->rx_queues)
 715                 return;
 716
 717         for (i = 0; i < (int)bp->rx_nr_rings; i++) {
 718                 rxq = bp->rx_queues[i];
 719                 if (!rxq)
 720                         continue;
 721
 722                 bnxt_free_ring(rxq->rx_ring->rx_ring_struct);
 723                 rte_free(rxq->rx_ring->rx_ring_struct);
 724
 725                 /* Free the Aggregator ring */
 726                 bnxt_free_ring(rxq->rx_ring->ag_ring_struct);
 727                 rte_free(rxq->rx_ring->ag_ring_struct);
 728                 rxq->rx_ring->ag_ring_struct = NULL;
 729
 730                 rte_free(rxq->rx_ring);
 731
 732                 bnxt_free_ring(rxq->cp_ring->cp_ring_struct);
 733                 rte_free(rxq->cp_ring->cp_ring_struct);
 734                 rte_free(rxq->cp_ring);
 735
 736                 rte_free(rxq);
 737                 bp->rx_queues[i] = NULL;
 738         }
 739 }
 740
 741 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id)
 742 {
 743         struct bnxt_cp_ring_info *cpr;
 744         struct bnxt_rx_ring_info *rxr;
 745         struct bnxt_ring *ring;
 746
 747         rxq->rx_buf_size = BNXT_MAX_PKT_LEN + sizeof(struct rte_mbuf);
 748
 749         rxr = rte_zmalloc_socket("bnxt_rx_ring",
 750                                  sizeof(struct bnxt_rx_ring_info),
 751                                  RTE_CACHE_LINE_SIZE, socket_id);
 752         if (rxr == NULL)
 753                 return -ENOMEM;
 754         rxq->rx_ring = rxr;
 755
 756         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 757                                    sizeof(struct bnxt_ring),
 758                                    RTE_CACHE_LINE_SIZE, socket_id);
 759         if (ring == NULL)
 760                 return -ENOMEM;
 761         rxr->rx_ring_struct = ring;
 762         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc);
 763         ring->ring_mask = ring->ring_size - 1;
 764         ring->bd = (void *)rxr->rx_desc_ring;
 765         ring->bd_dma = rxr->rx_desc_mapping;
 766         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 767         ring->vmem = (void **)&rxr->rx_buf_ring;
 768
 769         cpr = rte_zmalloc_socket("bnxt_rx_ring",
 770                                  sizeof(struct bnxt_cp_ring_info),
 771                                  RTE_CACHE_LINE_SIZE, socket_id);
 772         if (cpr == NULL)
 773                 return -ENOMEM;
 774         rxq->cp_ring = cpr;
 775
 776         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 777                                    sizeof(struct bnxt_ring),
 778                                    RTE_CACHE_LINE_SIZE, socket_id);
 779         if (ring == NULL)
 780                 return -ENOMEM;
 781         cpr->cp_ring_struct = ring;
 782         ring->ring_size = rte_align32pow2(rxr->rx_ring_struct->ring_size *
 783                                           (2 + AGG_RING_SIZE_FACTOR));
 784         ring->ring_mask = ring->ring_size - 1;
 785         ring->bd = (void *)cpr->cp_desc_ring;
 786         ring->bd_dma = cpr->cp_desc_mapping;
 787         ring->vmem_size = 0;
 788         ring->vmem = NULL;
 789
 790         /* Allocate Aggregator rings */
 791         ring = rte_zmalloc_socket("bnxt_rx_ring_struct",
 792                                    sizeof(struct bnxt_ring),
 793                                    RTE_CACHE_LINE_SIZE, socket_id);
 794         if (ring == NULL)
 795                 return -ENOMEM;
 796         rxr->ag_ring_struct = ring;
 797         ring->ring_size = rte_align32pow2(rxq->nb_rx_desc *
 798                                           AGG_RING_SIZE_FACTOR);
 799         ring->ring_mask = ring->ring_size - 1;
 800         ring->bd = (void *)rxr->ag_desc_ring;
 801         ring->bd_dma = rxr->ag_desc_mapping;
 802         ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_rx_bd);
 803         ring->vmem = (void **)&rxr->ag_buf_ring;
 804
 805         return 0;
 806 }
 807
 808 static void bnxt_init_rxbds(struct bnxt_ring *ring, uint32_t type,
 809                             uint16_t len)
 810 {
 811         uint32_t j;
 812         struct rx_prod_pkt_bd *rx_bd_ring = (struct rx_prod_pkt_bd *)ring->bd;
 813
 814         if (!rx_bd_ring)
 815                 return;
 816         for (j = 0; j < ring->ring_size; j++) {
 817                 rx_bd_ring[j].flags_type = rte_cpu_to_le_16(type);
 818                 rx_bd_ring[j].len = rte_cpu_to_le_16(len);
 819                 rx_bd_ring[j].opaque = j;
 820         }
 821 }
 822
 823 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq)
 824 {
 825         struct bnxt_rx_ring_info *rxr;
 826         struct bnxt_ring *ring;
 827         uint32_t prod, type;
 828         unsigned int i;
 829         uint16_t size;
 830
 831         size = rte_pktmbuf_data_room_size(rxq->mb_pool) - RTE_PKTMBUF_HEADROOM;
 832         size = RTE_MIN(BNXT_MAX_PKT_LEN, size);
 833
 834         type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT | RX_PROD_PKT_BD_FLAGS_EOP_PAD;
 835
 836         rxr = rxq->rx_ring;
 837         ring = rxr->rx_ring_struct;
 838         bnxt_init_rxbds(ring, type, size);
 839
 840         prod = rxr->rx_prod;
 841         for (i = 0; i < ring->ring_size; i++) {
 842                 if (bnxt_alloc_rx_data(rxq, rxr, prod) != 0) {
 843                         PMD_DRV_LOG(WARNING,
 844                                 "init'ed rx ring %d with %d/%d mbufs only\n",
 845                                 rxq->queue_id, i, ring->ring_size);
 846                         break;
 847                 }
 848                 rxr->rx_prod = prod;
 849                 prod = RING_NEXT(rxr->rx_ring_struct, prod);
 850         }
 851
 852         ring = rxr->ag_ring_struct;
 853         type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
 854         bnxt_init_rxbds(ring, type, size);
 855         prod = rxr->ag_prod;
 856
 857         for (i = 0; i < ring->ring_size; i++) {
 858                 if (bnxt_alloc_ag_data(rxq, rxr, prod) != 0) {
 859                         PMD_DRV_LOG(WARNING,
 860                         "init'ed AG ring %d with %d/%d mbufs only\n",
 861                         rxq->queue_id, i, ring->ring_size);
 862                         break;
 863                 }
 864                 rxr->ag_prod = prod;
 865                 prod = RING_NEXT(rxr->ag_ring_struct, prod);
 866         }
 867         PMD_DRV_LOG(DEBUG, "AGG Done!\n");
 868
 869         if (rxr->tpa_info) {
 870                 unsigned int max_aggs = BNXT_TPA_MAX_AGGS(rxq->bp);
 871
 872                 for (i = 0; i < max_aggs; i++) {
 873                         rxr->tpa_info[i].mbuf =
 874                                 __bnxt_alloc_rx_data(rxq->mb_pool);
 875                         if (!rxr->tpa_info[i].mbuf) {
 876                                 rte_atomic64_inc(&rxq->rx_mbuf_alloc_fail);
 877                                 return -ENOMEM;
 878                         }
 879                 }
 880         }
 881         PMD_DRV_LOG(DEBUG, "TPA alloc Done!\n");
 882
 883         return 0;
 884 }