1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
8 #include <rte_byteorder.h>
9 #include <rte_malloc.h>
13 #include "bnxt_ring.h"
16 #include "hsi_struct_def_dpdk.h"
23 void bnxt_free_tx_rings(struct bnxt *bp)
27 for (i = 0; i < (int)bp->tx_nr_rings; i++) {
28 struct bnxt_tx_queue *txq = bp->tx_queues[i];
33 bnxt_free_ring(txq->tx_ring->tx_ring_struct);
34 rte_free(txq->tx_ring->tx_ring_struct);
35 rte_free(txq->tx_ring);
37 bnxt_free_ring(txq->cp_ring->cp_ring_struct);
38 rte_free(txq->cp_ring->cp_ring_struct);
39 rte_free(txq->cp_ring);
42 bp->tx_queues[i] = NULL;
46 int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq)
48 struct bnxt_tx_ring_info *txr = txq->tx_ring;
49 struct bnxt_ring *ring = txr->tx_ring_struct;
51 txq->tx_wake_thresh = ring->ring_size / 2;
52 ring->fw_ring_id = INVALID_HW_RING_ID;
57 int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id)
59 struct bnxt_cp_ring_info *cpr;
60 struct bnxt_tx_ring_info *txr;
61 struct bnxt_ring *ring;
63 txr = rte_zmalloc_socket("bnxt_tx_ring",
64 sizeof(struct bnxt_tx_ring_info),
65 RTE_CACHE_LINE_SIZE, socket_id);
70 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
71 sizeof(struct bnxt_ring),
72 RTE_CACHE_LINE_SIZE, socket_id);
75 txr->tx_ring_struct = ring;
76 ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
77 ring->ring_mask = ring->ring_size - 1;
78 ring->bd = (void *)txr->tx_desc_ring;
79 ring->bd_dma = txr->tx_desc_mapping;
80 ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd);
81 ring->vmem = (void **)&txr->tx_buf_ring;
83 cpr = rte_zmalloc_socket("bnxt_tx_ring",
84 sizeof(struct bnxt_cp_ring_info),
85 RTE_CACHE_LINE_SIZE, socket_id);
90 ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
91 sizeof(struct bnxt_ring),
92 RTE_CACHE_LINE_SIZE, socket_id);
95 cpr->cp_ring_struct = ring;
96 ring->ring_size = txr->tx_ring_struct->ring_size;
97 ring->ring_mask = ring->ring_size - 1;
98 ring->bd = (void *)cpr->cp_desc_ring;
99 ring->bd_dma = cpr->cp_desc_mapping;
106 static inline uint32_t bnxt_tx_avail(struct bnxt_tx_ring_info *txr)
108 /* Tell compiler to fetch tx indices from memory. */
109 rte_compiler_barrier();
111 return txr->tx_ring_struct->ring_size -
112 ((txr->tx_prod - txr->tx_cons) &
113 txr->tx_ring_struct->ring_mask) - 1;
116 static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
117 struct bnxt_tx_queue *txq,
121 struct bnxt_tx_ring_info *txr = txq->tx_ring;
122 struct tx_bd_long *txbd;
123 struct tx_bd_long_hi *txbd1 = NULL;
124 uint32_t vlan_tag_flags, cfa_action;
125 bool long_bd = false;
126 struct rte_mbuf *m_seg;
127 struct bnxt_sw_tx_bd *tx_buf;
128 static const uint32_t lhint_arr[4] = {
129 TX_BD_LONG_FLAGS_LHINT_LT512,
130 TX_BD_LONG_FLAGS_LHINT_LT1K,
131 TX_BD_LONG_FLAGS_LHINT_LT2K,
132 TX_BD_LONG_FLAGS_LHINT_LT2K
135 if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM |
136 PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |
137 PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |
138 PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |
139 PKT_TX_TUNNEL_GENEVE))
142 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
143 tx_buf->mbuf = tx_pkt;
144 tx_buf->nr_bds = long_bd + tx_pkt->nb_segs;
146 if (unlikely(bnxt_tx_avail(txr) < tx_buf->nr_bds))
149 txbd = &txr->tx_desc_ring[txr->tx_prod];
150 txbd->opaque = *coal_pkts;
151 txbd->flags_type = tx_buf->nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT;
152 txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW;
154 txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL;
159 txbd->len = tx_pkt->data_len;
160 if (tx_pkt->pkt_len >= 2014)
161 txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
163 txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
164 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
167 txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
170 if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
171 /* shurd: Should this mask at
172 * TX_BD_LONG_CFA_META_VLAN_VID_MASK?
174 vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
175 tx_buf->mbuf->vlan_tci;
176 /* Currently supports 8021Q, 8021AD vlan offloads
177 * QINQ1, QINQ2, QINQ3 vlan headers are deprecated
179 /* DPDK only supports 802.11q VLAN packets */
181 TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
184 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
186 txbd1 = (struct tx_bd_long_hi *)
187 &txr->tx_desc_ring[txr->tx_prod];
189 txbd1->cfa_meta = vlan_tag_flags;
190 txbd1->cfa_action = cfa_action;
192 if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) {
196 txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO;
197 hdr_size = tx_pkt->l2_len + tx_pkt->l3_len +
198 tx_pkt->l4_len + tx_pkt->outer_l2_len +
199 tx_pkt->outer_l3_len;
200 /* The hdr_size is multiple of 16bit units not 8bit.
203 txbd1->hdr_size = hdr_size >> 1;
204 txbd1->mss = tx_pkt->tso_segsz;
206 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) ==
207 PKT_TX_OIP_IIP_TCP_UDP_CKSUM) {
208 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
209 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
211 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) ==
212 PKT_TX_OIP_IIP_TCP_CKSUM) {
213 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
214 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
216 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) ==
217 PKT_TX_OIP_IIP_UDP_CKSUM) {
218 /* Outer IP, Inner IP, Inner TCP/UDP CSO */
219 txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
221 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) ==
222 PKT_TX_IIP_TCP_UDP_CKSUM) {
223 /* (Inner) IP, (Inner) TCP/UDP CSO */
224 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
226 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) ==
227 PKT_TX_IIP_UDP_CKSUM) {
228 /* (Inner) IP, (Inner) TCP/UDP CSO */
229 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
231 } else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) ==
232 PKT_TX_IIP_TCP_CKSUM) {
233 /* (Inner) IP, (Inner) TCP/UDP CSO */
234 txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
236 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) ==
237 PKT_TX_OIP_TCP_UDP_CKSUM) {
238 /* Outer IP, (Inner) TCP/UDP CSO */
239 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
241 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) ==
242 PKT_TX_OIP_UDP_CKSUM) {
243 /* Outer IP, (Inner) TCP/UDP CSO */
244 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
246 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) ==
247 PKT_TX_OIP_TCP_CKSUM) {
248 /* Outer IP, (Inner) TCP/UDP CSO */
249 txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
251 } else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) ==
252 PKT_TX_OIP_IIP_CKSUM) {
253 /* Outer IP, Inner IP CSO */
254 txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM;
256 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) ==
257 PKT_TX_TCP_UDP_CKSUM) {
259 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
261 } else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) ==
264 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
266 } else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) ==
269 txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
271 } else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) ==
274 txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
276 } else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) ==
277 PKT_TX_OUTER_IP_CKSUM) {
279 txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;
283 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
286 m_seg = tx_pkt->next;
287 /* i is set at the end of the if(long_bd) block */
289 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
290 tx_buf = &txr->tx_buf_ring[txr->tx_prod];
292 txbd = &txr->tx_desc_ring[txr->tx_prod];
293 txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
294 txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
295 txbd->len = m_seg->data_len;
300 txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END;
302 txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
307 static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
309 struct bnxt_tx_ring_info *txr = txq->tx_ring;
310 uint16_t cons = txr->tx_cons;
313 for (i = 0; i < nr_pkts; i++) {
314 struct bnxt_sw_tx_bd *tx_buf;
315 struct rte_mbuf *mbuf;
317 tx_buf = &txr->tx_buf_ring[cons];
318 cons = RING_NEXT(txr->tx_ring_struct, cons);
322 /* EW - no need to unmap DMA memory? */
324 for (j = 1; j < tx_buf->nr_bds; j++)
325 cons = RING_NEXT(txr->tx_ring_struct, cons);
326 rte_pktmbuf_free(mbuf);
332 static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
334 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
335 uint32_t raw_cons = cpr->cp_raw_cons;
337 uint32_t nb_tx_pkts = 0;
338 struct tx_cmpl *txcmp;
339 struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
340 struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
341 uint32_t ring_mask = cp_ring_struct->ring_mask;
344 if (((txq->tx_ring->tx_prod - txq->tx_ring->tx_cons) &
345 txq->tx_ring->tx_ring_struct->ring_mask) < txq->tx_free_thresh)
349 cons = RING_CMPL(ring_mask, raw_cons);
350 txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons];
351 rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) &
354 if (!CMPL_VALID(txcmp, cpr->valid))
356 opaque = rte_cpu_to_le_32(txcmp->opaque);
357 NEXT_CMPL(cpr, cons, cpr->valid, 1);
358 rte_prefetch0(&cp_desc_ring[cons]);
360 if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
361 nb_tx_pkts += opaque;
364 "Unhandled CMP type %02x\n",
367 } while (nb_tx_pkts < ring_mask);
370 bnxt_tx_cmp(txq, nb_tx_pkts);
371 cpr->cp_raw_cons = raw_cons;
372 B_CP_DB(cpr, cpr->cp_raw_cons, ring_mask);
378 uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
381 struct bnxt_tx_queue *txq = tx_queue;
382 uint16_t nb_tx_pkts = 0;
383 uint16_t coal_pkts = 0;
384 uint16_t cmpl_next = txq->cmpl_next;
386 /* Handle TX completions */
387 bnxt_handle_tx_cp(txq);
389 /* Tx queue was stopped; wait for it to be restarted */
390 if (txq->tx_deferred_start) {
391 PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
396 /* Handle TX burst request */
397 for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) {
400 /* Request a completion on first and last packet */
401 cmpl_next |= (nb_pkts == nb_tx_pkts + 1);
403 rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq,
404 &coal_pkts, &cmpl_next);
407 /* Request a completion in next cycle */
414 B_TX_DB(txq->tx_ring->tx_doorbell, txq->tx_ring->tx_prod);
419 int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
421 struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
422 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
424 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
425 txq->tx_deferred_start = false;
426 PMD_DRV_LOG(DEBUG, "Tx queue started\n");
431 int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
433 struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
434 struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
436 /* Handle TX completions */
437 bnxt_handle_tx_cp(txq);
439 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
440 txq->tx_deferred_start = true;
441 PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");