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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
66 /* HW Resource Manager Specification 1.2.0 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 2
69 #define HWRM_VERSION_UPDATE 0
72 * Following is the signature for HWRM message field that indicates not
73 * applicable (All F's). Need to cast it the size of the field if needed.
75 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
76 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
77 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
78 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
79 #define HW_HASH_KEY_SIZE 40
80 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
85 #define HWRM_VER_GET (UINT32_C(0x0))
86 #define HWRM_FUNC_RESET (UINT32_C(0x11))
87 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
88 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
89 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
90 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
91 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
92 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
93 #define HWRM_VNIC_FREE (UINT32_C(0x41))
94 #define HWRM_VNIC_CFG (UINT32_C(0x42))
95 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
96 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
97 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
98 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
99 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
100 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
101 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
102 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
105 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
106 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
108 /* Short TX BD (16 bytes) */
111 * All bits in this field must be valid on the first BD of a packet.
112 * Only the packet_end bit must be valid for the remaining BDs of a
115 /* This value identifies the type of buffer descriptor. */
116 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
117 #define TX_BD_SHORT_TYPE_SFT 0
119 * Indicates that this BD is 16B long and is used for normal L2
120 * packet transmission.
122 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
124 * If set to 1, the packet ends with the data in the buffer pointed to
125 * by this descriptor. This flag must be valid on every BD.
127 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
129 * If set to 1, the device will not generate a completion for this
130 * transmit packet unless there is an error in it's processing. If this
131 * bit is set to 0, then the packet will be completed normally. This bit
132 * must be valid only on the first BD of a packet.
134 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
136 * This value indicates how many 16B BD locations are consumed in the
137 * ring by this packet. A value of 1 indicates that this BD is the only
138 * BD (and that the it is a short BD). A value of 3 indicates either 3
139 * short BDs or 1 long BD and one short BD in the packet. A value of 0
140 * indicates that there are 32 BD locations in the packet (the maximum).
141 * This field is valid only on the first BD of a packet.
143 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
144 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
146 * This value is a hint for the length of the entire packet. It is used
147 * by the chip to optimize internal processing. The packet will be
148 * dropped if the hint is too short. This field is valid only on the
149 * first BD of a packet.
151 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
152 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
153 /* indicates packet length < 512B */
154 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
155 /* indicates 512 <= packet length < 1KB */
156 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
157 /* indicates 1KB <= packet length < 2KB */
158 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
159 /* indicates packet length >= 2KB */
160 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
161 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
163 * If set to 1, the device immediately updates the Send Consumer Index
164 * after the buffer associated with this descriptor has been transferred
165 * via DMA to NIC memory from host memory. An interrupt may or may not
166 * be generated according to the state of the interrupt avoidance
167 * mechanisms. If this bit is set to 0, then the Consumer Index is only
168 * updated as soon as one of the host interrupt coalescing conditions
169 * has been met. This bit must be valid on the first BD of a packet.
171 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
173 * All bits in this field must be valid on the first BD of a packet.
174 * Only the packet_end bit must be valid for the remaining BDs of a
177 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
178 #define TX_BD_SHORT_FLAGS_SFT 6
182 * This is the length of the host physical buffer this BD describes in
183 * bytes. This field must be valid on all BDs of a packet.
187 * The opaque data field is pass through to the completion and can be
188 * used for any data that the driver wants to associate with the
189 * transmit BD. This field must be valid on the first BD of a packet.
194 * This is the host physical address for the portion of the packet
195 * described by this TX BD. This value must be valid on all BDs of a
199 } __attribute__((packed));
201 /* Long TX BD (32 bytes split to 2 16-byte struct) */
204 * All bits in this field must be valid on the first BD of a packet.
205 * Only the packet_end bit must be valid for the remaining BDs of a
208 /* This value identifies the type of buffer descriptor. */
209 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
210 #define TX_BD_LONG_TYPE_SFT 0
212 * Indicates that this BD is 32B long and is used for normal L2
213 * packet transmission.
215 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
217 * If set to 1, the packet ends with the data in the buffer pointed to
218 * by this descriptor. This flag must be valid on every BD.
220 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
222 * If set to 1, the device will not generate a completion for this
223 * transmit packet unless there is an error in it's processing. If this
224 * bit is set to 0, then the packet will be completed normally. This bit
225 * must be valid only on the first BD of a packet.
227 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
229 * This value indicates how many 16B BD locations are consumed in the
230 * ring by this packet. A value of 1 indicates that this BD is the only
231 * BD (and that the it is a short BD). A value of 3 indicates either 3
232 * short BDs or 1 long BD and one short BD in the packet. A value of 0
233 * indicates that there are 32 BD locations in the packet (the maximum).
234 * This field is valid only on the first BD of a packet.
236 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
237 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
239 * This value is a hint for the length of the entire packet. It is used
240 * by the chip to optimize internal processing. The packet will be
241 * dropped if the hint is too short. This field is valid only on the
242 * first BD of a packet.
244 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
245 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
246 /* indicates packet length < 512B */
247 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
248 /* indicates 512 <= packet length < 1KB */
249 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
250 /* indicates 1KB <= packet length < 2KB */
251 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
252 /* indicates packet length >= 2KB */
253 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
254 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
256 * If set to 1, the device immediately updates the Send Consumer Index
257 * after the buffer associated with this descriptor has been transferred
258 * via DMA to NIC memory from host memory. An interrupt may or may not
259 * be generated according to the state of the interrupt avoidance
260 * mechanisms. If this bit is set to 0, then the Consumer Index is only
261 * updated as soon as one of the host interrupt coalescing conditions
262 * has been met. This bit must be valid on the first BD of a packet.
264 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
266 * All bits in this field must be valid on the first BD of a packet.
267 * Only the packet_end bit must be valid for the remaining BDs of a
270 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
271 #define TX_BD_LONG_FLAGS_SFT 6
275 * This is the length of the host physical buffer this BD describes in
276 * bytes. This field must be valid on all BDs of a packet.
281 * The opaque data field is pass through to the completion and can be
282 * used for any data that the driver wants to associate with the
283 * transmit BD. This field must be valid on the first BD of a packet.
288 * This is the host physical address for the portion of the packet
289 * described by this TX BD. This value must be valid on all BDs of a
293 } __attribute__((packed));
295 /* last 16 bytes of Long TX BD */
297 struct tx_bd_long_hi {
299 * All bits in this field must be valid on the first BD of a packet.
300 * Their value on other BDs of the packet will be ignored.
303 * If set to 1, the controller replaces the TCP/UPD checksum fields of
304 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
305 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
306 * checksum for the packet associated with this descriptor. This bit
307 * must be valid on the first BD of a packet.
309 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
311 * If set to 1, the controller replaces the IP checksum of the normal
312 * packets, or the inner IP checksum of the encapsulated packets with
313 * the hardware calculated IP checksum for the packet associated with
314 * this descriptor. This bit must be valid on the first BD of a packet.
316 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
318 * If set to 1, the controller will not append an Ethernet CRC to the
319 * end of the frame. This bit must be valid on the first BD of a packet.
320 * Packet must be 64B or longer when this flag is set. It is not useful
321 * to use this bit with any form of TX offload such as CSO or LSO. The
322 * intent is that the packet from the host already has a valid Ethernet
325 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
327 * If set to 1, the device will record the time at which the packet was
328 * actually transmitted at the TX MAC. This bit must be valid on the
329 * first BD of a packet.
331 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
333 * If set to 1, The controller replaces the tunnel IP checksum field
334 * with hardware calculated IP checksum for the IP header of the packet
335 * associated with this descriptor. In case of VXLAN, the controller
336 * also replaces the outer header UDP checksum with hardware calculated
337 * UDP checksum for the packet associated with this descriptor.
339 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
341 * If set to 1, the device will treat this packet with LSO(Large Send
342 * Offload) processing for both normal or encapsulated packets, which is
343 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
344 * fields must be valid. The driver doesn't need to set t_ip_chksum,
345 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
346 * the appropriate checksum fields for segmented packets. When this bit
347 * is 1, the hdr_size and mss fields must be valid.
349 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
351 * If set to zero when LSO is '1', then the IPID will be treated as a
352 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
353 * set to one when LSO is '1', then the IPID will be treated as a 15b
354 * number and will be wrapped if it exceeds a value 0f 0x7fff.
356 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
358 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
359 * will not be modified during LSO operations. If set to one when LSO is
360 * '1', then the IPID of the tunnel IP header will be incremented for
361 * each subsequent segment of an LSO operation.
363 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
365 * If set to '1', then the RoCE ICRC will be appended to the packet.
366 * Packet must be a valid RoCE format packet.
368 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
370 * If set to '1', then the FCoE CRC will be appended to the packet.
371 * Packet must be a valid FCoE format packet.
373 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
377 * When LSO is '1', this field must contain the offset of the TCP
378 * payload from the beginning of the packet in as 16b words. In case of
379 * encapsulated/tunneling packet, this field contains the offset of the
380 * inner TCP payload from beginning of the packet as 16-bit words. This
381 * value must be valid on the first BD of a packet.
383 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
384 #define TX_BD_LONG_HDR_SIZE_SFT 0
388 * This is the MSS value that will be used to do the LSO processing. The
389 * value is the length in bytes of the TCP payload for each segment
390 * generated by the LSO operation. This value must be valid on the first
393 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
394 #define TX_BD_LONG_MSS_SFT 0
400 * This value selects a CFA action to perform on the packet. Set this
401 * value to zero if no CFA action is desired. This value must be valid
402 * on the first BD of a packet.
407 * This value is action meta-data that defines CFA edit operations that
408 * are done in addition to any action editing.
410 /* When key=1, This is the VLAN tag VID value. */
411 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
412 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
413 /* When key=1, This is the VLAN tag DE value. */
414 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
415 /* When key=1, This is the VLAN tag PRI value. */
416 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
417 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
418 /* When key=1, This is the VLAN tag TPID select value. */
419 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
420 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
422 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
424 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
426 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
428 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
431 /* Value programmed in CFA VLANTPID register. */
432 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
433 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
434 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
435 /* When key=1, This is the VLAN tag TPID select value. */
436 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
437 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
439 * This field identifies the type of edit to be performed on the packet.
440 * This value must be valid on the first BD of a packet.
442 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
443 #define TX_BD_LONG_CFA_META_KEY_SFT 28
445 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
447 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
448 * - PRI/DE value. - meta[11:0] - VID value.
450 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
451 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
453 } __attribute__((packed));
455 /* RX Producer Packet BD (16 bytes) */
456 struct rx_prod_pkt_bd {
457 /* This value identifies the type of buffer descriptor. */
458 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
459 #define RX_PROD_PKT_BD_TYPE_SFT 0
461 * Indicates that this BD is 16B long and is an RX Producer (ie.
462 * empty) buffer descriptor.
464 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
466 * If set to 1, the packet will be placed at the address plus 2B. The 2
467 * Bytes of padding will be written as zero.
470 * This is intended to be used when the host buffer is cache-line
471 * aligned to produce packets that are easy to parse in host memory
472 * while still allowing writes to be cache line aligned.
474 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
476 * If set to 1, the packet write will be padded out to the nearest
477 * cache-line with zero value padding.
480 * If receive buffers start/end on cache-line boundaries, this feature
481 * will ensure that all data writes on the PCI bus start/end on cache
484 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
486 * This value is the number of additional buffers in the ring that
487 * describe the buffer space to be consumed for the this packet. If the
488 * value is zero, then the packet must fit within the space described by
489 * this BD. If this value is 1 or more, it indicates how many additional
490 * "buffer" BDs are in the ring immediately following this BD to be used
491 * for the same network packet. Even if the packet to be placed does not
492 * need all the additional buffers, they will be consumed anyway.
494 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
495 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
496 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
497 #define RX_PROD_PKT_BD_FLAGS_SFT 6
501 * This is the length in Bytes of the host physical buffer where data
502 * for the packet may be placed in host memory.
505 * While this is a Byte resolution value, it is often advantageous to
506 * ensure that the buffers provided end on a host cache line.
511 * The opaque data field is pass through to the completion and can be
512 * used for any data that the driver wants to associate with this
513 * receive buffer set.
518 * This is the host physical address where data for the packet may by
519 * placed in host memory.
522 * While this is a Byte resolution value, it is often advantageous to
523 * ensure that the buffers provide start on a host cache line.
526 } __attribute__((packed));
528 /* Completion Ring Structures */
529 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
530 /* Base Completion Record (16 bytes) */
534 * This field indicates the exact type of the completion. By convention,
535 * the LSB identifies the length of the record in 16B units. Even values
536 * indicate 16B records. Odd values indicate 32B records.
538 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
539 #define CMPL_BASE_TYPE_SFT 0
540 /* TX L2 completion: Completion of TX packet. Length = 16B */
541 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
543 * RX L2 completion: Completion of and L2 RX packet.
546 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
548 * RX Aggregation Buffer completion : Completion of an L2
549 * aggregation buffer in support of TPA, HDS, or Jumbo packet
550 * completion. Length = 16B
552 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
554 * RX L2 TPA Start Completion: Completion at the beginning of a
555 * TPA operation. Length = 32B
557 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
559 * RX L2 TPA End Completion: Completion at the end of a TPA
560 * operation. Length = 32B
562 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
564 * Statistics Ejection Completion: Completion of statistics data
565 * ejection buffer. Length = 16B
567 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
568 /* HWRM Command Completion: Completion of an HWRM command. */
569 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
570 /* Forwarded HWRM Request */
571 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
572 /* Forwarded HWRM Response */
573 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
574 /* HWRM Asynchronous Event Information */
575 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
576 /* CQ Notification */
577 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
578 /* SRQ Threshold Event */
579 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
580 /* DBQ Threshold Event */
581 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
582 /* QP Async Notification */
583 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
584 /* Function Async Notification */
585 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
592 * This value is written by the NIC such that it will be different for
593 * each pass through the completion queue. The even passes will write 1.
594 * The odd passes will write 0.
596 #define CMPL_BASE_V UINT32_C(0x1)
598 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
599 #define CMPL_BASE_INFO3_SFT 1
603 } __attribute__((packed));
605 /* TX Completion Record (16 bytes) */
608 * This field indicates the exact type of the completion. By convention,
609 * the LSB identifies the length of the record in 16B units. Even values
610 * indicate 16B records. Odd values indicate 32B records.
612 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
613 #define TX_CMPL_TYPE_SFT 0
614 /* TX L2 completion: Completion of TX packet. Length = 16B */
615 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
617 * When this bit is '1', it indicates a packet that has an error of some
618 * type. Type of error is indicated in error_flags.
620 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
622 * When this bit is '1', it indicates that the packet completed was
623 * transmitted using the push acceleration data provided by the driver.
624 * When this bit is '0', it indicates that the packet had not push
625 * acceleration data written or was executed as a normal packet even
626 * though push data was provided.
628 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
629 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
630 #define TX_CMPL_FLAGS_SFT 6
636 * This is a copy of the opaque field from the first TX BD of this
637 * transmitted packet.
642 * This value is written by the NIC such that it will be different for
643 * each pass through the completion queue. The even passes will write 1.
644 * The odd passes will write 0.
646 #define TX_CMPL_V UINT32_C(0x1)
648 * This error indicates that there was some sort of problem with the BDs
651 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
652 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
654 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
655 /* Bad Format: BDs were not formatted correctly. */
656 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
657 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
658 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
660 * When this bit is '1', it indicates that the length of the packet was
661 * zero. No packet was transmitted.
663 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
665 * When this bit is '1', it indicates that the packet was longer than
666 * the programmed limit in TDI. No packet was transmitted.
668 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
670 * When this bit is '1', it indicates that one or more of the BDs
671 * associated with this packet generated a PCI error. This probably
672 * means the address was not valid.
674 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
676 * When this bit is '1', it indicates that the packet was longer than
677 * indicated by the hint. No packet was transmitted.
679 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
681 * When this bit is '1', it indicates that the packet was dropped due to
682 * Poison TLP error on one or more of the TLPs in the PXP completion.
684 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
685 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
686 #define TX_CMPL_ERRORS_SFT 1
691 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
693 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
696 * This field indicates the exact type of the completion. By convention,
697 * the LSB identifies the length of the record in 16B units. Even values
698 * indicate 16B records. Odd values indicate 32B records.
700 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
701 #define RX_PKT_CMPL_TYPE_SFT 0
703 * RX L2 completion: Completion of and L2 RX packet.
706 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
708 * When this bit is '1', it indicates a packet that has an error of some
709 * type. Type of error is indicated in error_flags.
711 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
712 /* This field indicates how the packet was placed in the buffer. */
713 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
714 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
715 /* Normal: Packet was placed using normal algorithm. */
716 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
717 /* Jumbo: Packet was placed using jumbo algorithm. */
718 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
720 * Header/Data Separation: Packet was placed using Header/Data
721 * separation algorithm. The separation location is indicated by
724 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
725 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
726 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
727 /* This bit is '1' if the RSS field in this completion is valid. */
728 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
730 * This value indicates what the inner packet determined for the packet
733 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
734 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
735 /* Not Known: Indicates that the packet type was not known. */
736 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
738 * IP Packet: Indicates that the packet was an IP packet, but
739 * further classification was not possible.
741 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
743 * TCP Packet: Indicates that the packet was IP and TCP. This
744 * indicates that the payload_offset field is valid.
746 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
748 * UDP Packet: Indicates that the packet was IP and UDP. This
749 * indicates that the payload_offset field is valid.
751 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
753 * FCoE Packet: Indicates that the packet was recognized as a
754 * FCoE. This also indicates that the payload_offset field is
757 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
759 * RoCE Packet: Indicates that the packet was recognized as a
760 * RoCE. This also indicates that the payload_offset field is
763 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
765 * ICMP Packet: Indicates that the packet was recognized as
766 * ICMP. This indicates that the payload_offset field is valid.
768 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
770 * PtP packet wo/timestamp: Indicates that the packet was
771 * recognized as a PtP packet.
773 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
774 (UINT32_C(0x8) << 12)
776 * PtP packet w/timestamp: Indicates that the packet was
777 * recognized as a PtP packet and that a timestamp was taken for
780 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
781 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
782 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
783 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
784 #define RX_PKT_CMPL_FLAGS_SFT 6
788 * This is the length of the data for the packet stored in the buffer(s)
789 * identified by the opaque value. This includes the packet BD and any
790 * associated buffer BDs. This does not include the the length of any
791 * data places in aggregation BDs.
796 * This is a copy of the opaque field from the RX BD this completion
802 * This value is written by the NIC such that it will be different for
803 * each pass through the completion queue. The even passes will write 1.
804 * The odd passes will write 0.
806 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
808 * This value is the number of aggregation buffers that follow this
809 * entry in the completion ring that are a part of this packet. If the
810 * value is zero, then the packet is completely contained in the buffer
811 * space provided for the packet in the RX ring.
813 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
814 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
818 * This is the RSS hash type for the packet. The value is packed
819 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
821 uint8_t rss_hash_type;
824 * This value indicates the offset from the beginning of the packet
825 * where the inner payload starts. This value is valid for TCP, UDP,
826 * FCoE, and RoCE packets.
828 uint8_t payload_offset;
833 * This value is the RSS hash value calculated for the packet based on
834 * the mode bits and key value in the VNIC.
837 } __attribute__((packed));
839 /* last 16 bytes of RX Packet Completion Record */
840 struct rx_pkt_cmpl_hi {
842 * This indicates that the ip checksum was calculated for the inner
843 * packet and that the ip_cs_error field indicates if there was an
846 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
848 * This indicates that the TCP, UDP or ICMP checksum was calculated for
849 * the inner packet and that the l4_cs_error field indicates if there
852 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
854 * This indicates that the ip checksum was calculated for the tunnel
855 * header and that the t_ip_cs_error field indicates if there was an
858 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
860 * This indicates that the UDP checksum was calculated for the tunnel
861 * packet and that the t_l4_cs_error field indicates if there was an
864 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
865 /* This value indicates what format the metadata field is. */
866 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
867 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
868 /* No metadata informtaion. Value is zero. */
869 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
871 * The metadata field contains the VLAN tag and TPID value. -
872 * metadata[11:0] contains the vlan VID value. - metadata[12]
873 * contains the vlan DE value. - metadata[15:13] contains the
874 * vlan PRI value. - metadata[31:16] contains the vlan TPID
877 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
878 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
879 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
881 * This field indicates the IP type for the inner-most IP header. A
882 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
883 * value is only valid if itype indicates a packet with an IP header.
885 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
889 * This is data from the CFA block as indicated by the meta_format
892 /* When meta_format=1, this value is the VLAN VID. */
893 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
894 #define RX_PKT_CMPL_METADATA_VID_SFT 0
895 /* When meta_format=1, this value is the VLAN DE. */
896 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
897 /* When meta_format=1, this value is the VLAN PRI. */
898 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
899 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
900 /* When meta_format=1, this value is the VLAN TPID. */
901 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
902 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
906 * This value is written by the NIC such that it will be different for
907 * each pass through the completion queue. The even passes will write 1.
908 * The odd passes will write 0.
910 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
912 * This error indicates that there was some sort of problem with the BDs
913 * for the packet that was found after part of the packet was already
914 * placed. The packet should be treated as invalid.
916 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
917 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
918 /* No buffer error */
919 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
922 * Did Not Fit: Packet did not fit into packet buffer provided.
923 * For regular placement, this means the packet did not fit in
924 * the buffer provided. For HDS and jumbo placement, this means
925 * that the packet could not be placed into 7 physical buffers
928 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
931 * Not On Chip: All BDs needed for the packet were not on-chip
932 * when the packet arrived.
934 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
936 /* Bad Format: BDs were not formatted correctly. */
937 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
939 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
940 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
941 /* This indicates that there was an error in the IP header checksum. */
942 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
944 * This indicates that there was an error in the TCP, UDP or ICMP
947 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
949 * This indicates that there was an error in the tunnel IP header
952 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
953 /* This indicates that there was an error in the tunnel UDP checksum. */
954 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
956 * This indicates that there was a CRC error on either an FCoE or RoCE
957 * packet. The itype indicates the packet type.
959 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
961 * This indicates that there was an error in the tunnel portion of the
962 * packet when this field is non-zero.
964 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
965 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
967 * No additional error occurred on the tunnel portion of the
968 * packet of the packet does not have a tunnel.
970 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
972 * Indicates that IP header version does not match expectation
973 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
975 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
978 * Indicates that header length is out of range in the tunnel
979 * header. Valid for IPv4.
981 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
984 * Indicates that the physical packet is shorter than that
985 * claimed by the PPPoE header length for a tunnel PPPoE packet.
987 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
990 * Indicates that physical packet is shorter than that claimed
991 * by the tunnel l3 header length. Valid for IPv4, or IPv6
992 * tunnel packet packets.
994 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
997 * Indicates that the physical packet is shorter than that
998 * claimed by the tunnel UDP header length for a tunnel UDP
999 * packet that is not fragmented.
1001 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1002 (UINT32_C(0x5) << 9)
1004 * indicates that the IPv4 TTL or IPv6 hop limit check have
1005 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1008 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1009 (UINT32_C(0x6) << 9)
1010 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1011 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1013 * This indicates that there was an error in the inner portion of the
1014 * packet when this field is non-zero.
1016 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1017 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1019 * No additional error occurred on the tunnel portion of the
1020 * packet of the packet does not have a tunnel.
1022 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1024 * Indicates that IP header version does not match expectation
1025 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1026 * VFT was parsed on FCoE packet.
1028 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1029 (UINT32_C(0x1) << 12)
1031 * indicates that header length is out of range. Valid for IPv4
1034 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1035 (UINT32_C(0x2) << 12)
1037 * indicates that the IPv4 TTL or IPv6 hop limit check have
1038 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1040 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1042 * Indicates that physical packet is shorter than that claimed
1043 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1046 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1047 (UINT32_C(0x4) << 12)
1049 * Indicates that the physical packet is shorter than that
1050 * claimed by the UDP header length for a UDP packet that is not
1053 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1054 (UINT32_C(0x5) << 12)
1056 * Indicates that TCP header length > IP payload. Valid for TCP
1059 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1060 (UINT32_C(0x6) << 12)
1061 /* Indicates that TCP header length < 5. Valid for TCP. */
1062 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1063 (UINT32_C(0x7) << 12)
1065 * Indicates that TCP option headers result in a TCP header size
1066 * that does not match data offset in TCP header. Valid for TCP.
1068 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1069 (UINT32_C(0x8) << 12)
1070 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1071 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1072 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1073 #define RX_PKT_CMPL_ERRORS_SFT 1
1077 * This field identifies the CFA action rule that was used for this
1083 * This value holds the reordering sequence number for the packet. If
1084 * the reordering sequence is not valid, then this value is zero. The
1085 * reordering domain for the packet is in the bottom 8 to 10b of the
1086 * rss_hash value. The bottom 20b of this value contain the ordering
1087 * domain value for the packet.
1089 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1090 #define RX_PKT_CMPL_REORDER_SFT 0
1092 } __attribute__((packed));
1094 /* HWRM Forwarded Request (16 bytes) */
1095 struct hwrm_fwd_req_cmpl {
1096 /* Length of forwarded request in bytes. */
1098 * This field indicates the exact type of the completion. By convention,
1099 * the LSB identifies the length of the record in 16B units. Even values
1100 * indicate 16B records. Odd values indicate 32B records.
1102 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1103 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1104 /* Forwarded HWRM Request */
1105 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1106 /* Length of forwarded request in bytes. */
1107 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1108 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1109 uint16_t req_len_type;
1112 * Source ID of this request. Typically used in forwarding requests and
1113 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1114 * Reserved for internal processors 0xFFFF - HWRM
1120 /* Address of forwarded request. */
1122 * This value is written by the NIC such that it will be different for
1123 * each pass through the completion queue. The even passes will write 1.
1124 * The odd passes will write 0.
1126 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1127 /* Address of forwarded request. */
1128 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1129 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1130 uint64_t req_buf_addr_v;
1131 } __attribute__((packed));
1133 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1134 struct hwrm_async_event_cmpl {
1136 * This field indicates the exact type of the completion. By convention,
1137 * the LSB identifies the length of the record in 16B units. Even values
1138 * indicate 16B records. Odd values indicate 32B records.
1140 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1141 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1142 /* HWRM Asynchronous Event Information */
1143 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1144 (UINT32_C(0x2e) << 0)
1147 /* Identifiers of events. */
1148 /* Link status changed */
1149 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1150 (UINT32_C(0x0) << 0)
1151 /* Link MTU changed */
1152 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1153 (UINT32_C(0x1) << 0)
1154 /* Link speed changed */
1155 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1156 (UINT32_C(0x2) << 0)
1157 /* DCB Configuration changed */
1158 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1159 (UINT32_C(0x3) << 0)
1160 /* Port connection not allowed */
1161 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1162 (UINT32_C(0x4) << 0)
1163 /* Link speed configuration was not allowed */
1164 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1165 (UINT32_C(0x5) << 0)
1166 /* Function driver unloaded */
1167 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1168 (UINT32_C(0x10) << 0)
1169 /* Function driver loaded */
1170 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1171 (UINT32_C(0x11) << 0)
1172 /* PF driver unloaded */
1173 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1174 (UINT32_C(0x20) << 0)
1175 /* PF driver loaded */
1176 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1177 (UINT32_C(0x21) << 0)
1178 /* VF Function Level Reset (FLR) */
1179 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1180 /* VF MAC Address Change */
1181 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1182 (UINT32_C(0x31) << 0)
1183 /* PF-VF communication channel status change. */
1184 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1185 (UINT32_C(0x32) << 0)
1187 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1188 (UINT32_C(0xff) << 0)
1191 /* Event specific data */
1192 uint32_t event_data2;
1196 * This value is written by the NIC such that it will be different for
1197 * each pass through the completion queue. The even passes will write 1.
1198 * The odd passes will write 0.
1200 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1202 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1203 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1206 /* 8-lsb timestamp from POR (100-msec resolution) */
1207 uint8_t timestamp_lo;
1209 /* 16-lsb timestamp from POR (100-msec resolution) */
1210 uint16_t timestamp_hi;
1212 /* Event specific data */
1213 uint32_t event_data1;
1214 } __attribute__((packed));
1217 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1218 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1219 * processors inside the chip. This firmware is vital part of the chip's
1220 * hardware. The chip can not be used by driver without it.
1223 /* Input (16 bytes) */
1226 * This value indicates what type of request this is. The format for the
1227 * rest of the command is determined by this field.
1232 * This value indicates the what completion ring the request will be
1233 * optionally completed on. If the value is -1, then no CR completion
1234 * will be generated. Any other value must be a valid CR ring_id value
1235 * for this function.
1239 /* This value indicates the command sequence number. */
1243 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1244 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1249 * This is the host address where the response will be written when the
1250 * request is complete. This area must be 16B aligned and must be
1251 * cleared to zero before the request is made.
1254 } __attribute__((packed));
1256 /* Output (8 bytes) */
1259 * Pass/Fail or error type Note: receiver to verify the in parameters,
1260 * and fail the call with an error when appropriate
1262 uint16_t error_code;
1264 /* This field returns the type of original request. */
1267 /* This field provides original sequence number of the command. */
1271 * This field is the length of the response in bytes. The last byte of
1272 * the response is a valid flag that will read as '1' when the command
1273 * has been completely written to memory.
1276 } __attribute__((packed));
1278 /* hwrm_cfa_l2_filter_alloc */
1280 * A filter is used to identify traffic that contains a matching set of
1281 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1282 * other things which then allows the ASIC to direct the incoming traffic
1283 * to an appropriate VNIC or Rx ring.
1286 /* Input (96 bytes) */
1287 struct hwrm_cfa_l2_filter_alloc_input {
1289 * This value indicates what type of request this is. The format for the
1290 * rest of the command is determined by this field.
1295 * This value indicates the what completion ring the request will be
1296 * optionally completed on. If the value is -1, then no CR completion
1297 * will be generated. Any other value must be a valid CR ring_id value
1298 * for this function.
1302 /* This value indicates the command sequence number. */
1306 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1307 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1312 * This is the host address where the response will be written when the
1313 * request is complete. This area must be 16B aligned and must be
1314 * cleared to zero before the request is made.
1319 * Enumeration denoting the RX, TX type of the resource. This
1320 * enumeration is used for resources that are similar for both TX and RX
1321 * paths of the chip.
1323 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1326 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1327 (UINT32_C(0x0) << 0)
1329 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1330 (UINT32_C(0x1) << 0)
1331 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1332 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1334 * Setting of this flag indicates the applicability to the loopback
1337 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1340 * Setting of this flag indicates drop action. If this flag is not set,
1341 * then it should be considered accept action.
1343 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1346 * If this flag is set, all t_l2_* fields are invalid and they should
1347 * not be specified. If this flag is set, then l2_* fields refer to
1348 * fields of outermost L2 header.
1350 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1354 /* This bit must be '1' for the l2_addr field to be configured. */
1355 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1357 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1358 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1360 /* This bit must be '1' for the l2_ovlan field to be configured. */
1361 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1363 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1364 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1366 /* This bit must be '1' for the l2_ivlan field to be configured. */
1367 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1369 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1370 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1372 /* This bit must be '1' for the t_l2_addr field to be configured. */
1373 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1376 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1378 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1380 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1381 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1384 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1386 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1388 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1389 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1392 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1394 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1396 /* This bit must be '1' for the src_type field to be configured. */
1397 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1399 /* This bit must be '1' for the src_id field to be configured. */
1400 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1402 /* This bit must be '1' for the tunnel_type field to be configured. */
1403 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1405 /* This bit must be '1' for the dst_id field to be configured. */
1406 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1409 * This bit must be '1' for the mirror_vnic_id field to be configured.
1411 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1416 * This value sets the match value for the L2 MAC address. Destination
1417 * MAC address for RX path. Source MAC address for TX path.
1425 * This value sets the mask value for the L2 address. A value of 0 will
1426 * mask the corresponding bit from compare.
1428 uint8_t l2_addr_mask[6];
1430 /* This value sets VLAN ID value for outer VLAN. */
1434 * This value sets the mask value for the ovlan id. A value of 0 will
1435 * mask the corresponding bit from compare.
1437 uint16_t l2_ovlan_mask;
1439 /* This value sets VLAN ID value for inner VLAN. */
1443 * This value sets the mask value for the ivlan id. A value of 0 will
1444 * mask the corresponding bit from compare.
1446 uint16_t l2_ivlan_mask;
1452 * This value sets the match value for the tunnel L2 MAC address.
1453 * Destination MAC address for RX path. Source MAC address for TX path.
1455 uint8_t t_l2_addr[6];
1461 * This value sets the mask value for the tunnel L2 address. A value of
1462 * 0 will mask the corresponding bit from compare.
1464 uint8_t t_l2_addr_mask[6];
1466 /* This value sets VLAN ID value for tunnel outer VLAN. */
1467 uint16_t t_l2_ovlan;
1470 * This value sets the mask value for the tunnel ovlan id. A value of 0
1471 * will mask the corresponding bit from compare.
1473 uint16_t t_l2_ovlan_mask;
1475 /* This value sets VLAN ID value for tunnel inner VLAN. */
1476 uint16_t t_l2_ivlan;
1479 * This value sets the mask value for the tunnel ivlan id. A value of 0
1480 * will mask the corresponding bit from compare.
1482 uint16_t t_l2_ivlan_mask;
1484 /* This value identifies the type of source of the packet. */
1486 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1487 (UINT32_C(0x0) << 0)
1488 /* Physical function */
1489 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1490 (UINT32_C(0x1) << 0)
1491 /* Virtual function */
1492 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1493 (UINT32_C(0x2) << 0)
1494 /* Virtual NIC of a function */
1495 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1496 (UINT32_C(0x3) << 0)
1497 /* Embedded processor for CFA management */
1498 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1499 (UINT32_C(0x4) << 0)
1500 /* Embedded processor for OOB management */
1501 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1502 (UINT32_C(0x5) << 0)
1503 /* Embedded processor for RoCE */
1504 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1505 (UINT32_C(0x6) << 0)
1506 /* Embedded processor for network proxy functions */
1507 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1508 (UINT32_C(0x7) << 0)
1513 * This value is the id of the source. For a network port, it represents
1514 * port_id. For a physical function, it represents fid. For a virtual
1515 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1516 * embedded processors, this id is not valid. Notes: 1. The function ID
1517 * is implied if it src_id is not provided for a src_type that is either
1523 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1524 (UINT32_C(0x0) << 0)
1525 /* Virtual eXtensible Local Area Network (VXLAN) */
1526 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1527 (UINT32_C(0x1) << 0)
1529 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1531 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1532 (UINT32_C(0x2) << 0)
1534 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1536 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1537 (UINT32_C(0x3) << 0)
1539 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1540 (UINT32_C(0x4) << 0)
1541 /* Generic Network Virtualization Encapsulation (Geneve) */
1542 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1543 (UINT32_C(0x5) << 0)
1544 /* Multi-Protocol Lable Switching (MPLS) */
1545 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1546 (UINT32_C(0x6) << 0)
1547 /* Stateless Transport Tunnel (STT) */
1548 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1549 (UINT32_C(0x7) << 0)
1551 * Generic Routing Encapsulation (GRE) inside IP datagram
1554 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1555 (UINT32_C(0x8) << 0)
1556 /* Any tunneled traffic */
1557 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1558 (UINT32_C(0xff) << 0)
1559 uint8_t tunnel_type;
1564 * If set, this value shall represent the Logical VNIC ID of the
1565 * destination VNIC for the RX path and network port id of the
1566 * destination port for the TX path.
1570 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1571 uint16_t mirror_vnic_id;
1574 * This hint is provided to help in placing the filter in the filter
1578 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1579 (UINT32_C(0x0) << 0)
1580 /* Above the given filter */
1581 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1582 (UINT32_C(0x1) << 0)
1583 /* Below the given filter */
1584 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1585 (UINT32_C(0x2) << 0)
1586 /* As high as possible */
1587 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1588 (UINT32_C(0x3) << 0)
1589 /* As low as possible */
1590 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1591 (UINT32_C(0x4) << 0)
1598 * This is the ID of the filter that goes along with the pri_hint. This
1599 * field is valid only for the following values. 1 - Above the given
1600 * filter 2 - Below the given filter
1602 uint64_t l2_filter_id_hint;
1603 } __attribute__((packed));
1605 /* Output (24 bytes) */
1606 struct hwrm_cfa_l2_filter_alloc_output {
1608 * Pass/Fail or error type Note: receiver to verify the in parameters,
1609 * and fail the call with an error when appropriate
1611 uint16_t error_code;
1613 /* This field returns the type of original request. */
1616 /* This field provides original sequence number of the command. */
1620 * This field is the length of the response in bytes. The last byte of
1621 * the response is a valid flag that will read as '1' when the command
1622 * has been completely written to memory.
1627 * This value identifies a set of CFA data structures used for an L2
1630 uint64_t l2_filter_id;
1633 * This is the ID of the flow associated with this filter. This value
1634 * shall be used to match and associate the flow identifier returned in
1635 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1644 * This field is used in Output records to indicate that the output is
1645 * completely written to RAM. This field should be read as '1' to
1646 * indicate that the output has been completely written. When writing a
1647 * command completion or response to an internal processor, the order of
1648 * writes has to be such that this field is written last.
1651 } __attribute__((packed));
1653 /* hwrm_cfa_l2_filter_free */
1655 * Description: Free a L2 filter. The HWRM shall free all associated filter
1656 * resources with the L2 filter.
1659 /* Input (24 bytes) */
1660 struct hwrm_cfa_l2_filter_free_input {
1662 * This value indicates what type of request this is. The format for the
1663 * rest of the command is determined by this field.
1668 * This value indicates the what completion ring the request will be
1669 * optionally completed on. If the value is -1, then no CR completion
1670 * will be generated. Any other value must be a valid CR ring_id value
1671 * for this function.
1675 /* This value indicates the command sequence number. */
1679 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1680 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1685 * This is the host address where the response will be written when the
1686 * request is complete. This area must be 16B aligned and must be
1687 * cleared to zero before the request is made.
1692 * This value identifies a set of CFA data structures used for an L2
1695 uint64_t l2_filter_id;
1696 } __attribute__((packed));
1698 /* Output (16 bytes) */
1699 struct hwrm_cfa_l2_filter_free_output {
1701 * Pass/Fail or error type Note: receiver to verify the in parameters,
1702 * and fail the call with an error when appropriate
1704 uint16_t error_code;
1706 /* This field returns the type of original request. */
1709 /* This field provides original sequence number of the command. */
1713 * This field is the length of the response in bytes. The last byte of
1714 * the response is a valid flag that will read as '1' when the command
1715 * has been completely written to memory.
1725 * This field is used in Output records to indicate that the output is
1726 * completely written to RAM. This field should be read as '1' to
1727 * indicate that the output has been completely written. When writing a
1728 * command completion or response to an internal processor, the order of
1729 * writes has to be such that this field is written last.
1732 } __attribute__((packed));
1734 /* hwrm_exec_fwd_resp */
1736 * Description: This command is used to send an encapsulated request to the
1737 * HWRM. This command instructs the HWRM to execute the request and forward the
1738 * response of the encapsulated request to the location specified in the
1739 * original request that is encapsulated. The target id of this command shall be
1740 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1741 * acknowledge the receipt of the encapsulated request and forwarding of the
1745 /* Input (128 bytes) */
1746 struct hwrm_exec_fwd_resp_input {
1748 * This value indicates what type of request this is. The format for the
1749 * rest of the command is determined by this field.
1754 * This value indicates the what completion ring the request will be
1755 * optionally completed on. If the value is -1, then no CR completion
1756 * will be generated. Any other value must be a valid CR ring_id value
1757 * for this function.
1761 /* This value indicates the command sequence number. */
1765 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1766 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1771 * This is the host address where the response will be written when the
1772 * request is complete. This area must be 16B aligned and must be
1773 * cleared to zero before the request is made.
1778 * This is an encapsulated request. This request should be executed by
1779 * the HWRM and the response should be provided in the response buffer
1780 * inside the encapsulated request.
1782 uint32_t encap_request[26];
1785 * This value indicates the target id of the response to the
1786 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1787 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1789 uint16_t encap_resp_target_id;
1791 uint16_t unused_0[3];
1792 } __attribute__((packed));
1794 /* Output (16 bytes) */
1795 struct hwrm_exec_fwd_resp_output {
1797 * Pass/Fail or error type Note: receiver to verify the in parameters,
1798 * and fail the call with an error when appropriate
1800 uint16_t error_code;
1802 /* This field returns the type of original request. */
1805 /* This field provides original sequence number of the command. */
1809 * This field is the length of the response in bytes. The last byte of
1810 * the response is a valid flag that will read as '1' when the command
1811 * has been completely written to memory.
1821 * This field is used in Output records to indicate that the output is
1822 * completely written to RAM. This field should be read as '1' to
1823 * indicate that the output has been completely written. When writing a
1824 * command completion or response to an internal processor, the order of
1825 * writes has to be such that this field is written last.
1828 } __attribute__((packed));
1830 /* hwrm_func_qcaps */
1832 * Description: This command returns capabilities of a function. The input FID
1833 * value is used to indicate what function is being queried. This allows a
1834 * physical function driver to query virtual functions that are children of the
1835 * physical function. The output FID value is needed to configure Rings and
1836 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1839 /* Input (24 bytes) */
1840 struct hwrm_func_qcaps_input {
1842 * This value indicates what type of request this is. The format for the
1843 * rest of the command is determined by this field.
1848 * This value indicates the what completion ring the request will be
1849 * optionally completed on. If the value is -1, then no CR completion
1850 * will be generated. Any other value must be a valid CR ring_id value
1851 * for this function.
1855 /* This value indicates the command sequence number. */
1859 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1860 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1865 * This is the host address where the response will be written when the
1866 * request is complete. This area must be 16B aligned and must be
1867 * cleared to zero before the request is made.
1872 * Function ID of the function that is being queried. 0xFF... (All Fs)
1873 * if the query is for the requesting function.
1877 uint16_t unused_0[3];
1878 } __attribute__((packed));
1880 /* Output (80 bytes) */
1881 struct hwrm_func_qcaps_output {
1883 * Pass/Fail or error type Note: receiver to verify the in parameters,
1884 * and fail the call with an error when appropriate
1886 uint16_t error_code;
1888 /* This field returns the type of original request. */
1891 /* This field provides original sequence number of the command. */
1895 * This field is the length of the response in bytes. The last byte of
1896 * the response is a valid flag that will read as '1' when the command
1897 * has been completely written to memory.
1902 * FID value. This value is used to identify operations on the PCI bus
1903 * as belonging to a particular PCI function.
1908 * Port ID of port that this function is associated with. Valid only for
1909 * the PF. 0xFF... (All Fs) if this function is not associated with any
1910 * port. 0xFF... (All Fs) if this function is called from a VF.
1914 /* If 1, then Push mode is supported on this function. */
1915 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
1917 * If 1, then the global MSI-X auto-masking is enabled for the device.
1919 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
1922 * If 1, then the Precision Time Protocol (PTP) processing is supported
1923 * on this function. The HWRM should enable PTP on only a single
1924 * Physical Function (PF) per port.
1926 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
1930 * This value is current MAC address configured for this function. A
1931 * value of 00-00-00-00-00-00 indicates no MAC address is currently
1934 uint8_t perm_mac_address[6];
1937 * The maximum number of RSS/COS contexts that can be allocated to the
1940 uint16_t max_rsscos_ctx;
1943 * The maximum number of completion rings that can be allocated to the
1946 uint16_t max_cmpl_rings;
1949 * The maximum number of transmit rings that can be allocated to the
1952 uint16_t max_tx_rings;
1955 * The maximum number of receive rings that can be allocated to the
1958 uint16_t max_rx_rings;
1961 * The maximum number of L2 contexts that can be allocated to the
1964 uint16_t max_l2_ctxs;
1966 /* The maximum number of VNICs that can be allocated to the function. */
1970 * The identifier for the first VF enabled on a PF. This is valid only
1971 * on the PF with SR-IOV enabled. 0xFF... (All Fs) if this command is
1972 * called on a PF with SR-IOV disabled or on a VF.
1974 uint16_t first_vf_id;
1977 * The maximum number of VFs that can be allocated to the function. This
1978 * is valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if this
1979 * command is called on a PF with SR-IOV disabled or on a VF.
1984 * The maximum number of statistic contexts that can be allocated to the
1987 uint16_t max_stat_ctx;
1990 * The maximum number of Encapsulation records that can be offloaded by
1993 uint32_t max_encap_records;
1996 * The maximum number of decapsulation records that can be offloaded by
1999 uint32_t max_decap_records;
2002 * The maximum number of Exact Match (EM) flows that can be offloaded by
2003 * this function on the TX side.
2005 uint32_t max_tx_em_flows;
2008 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2009 * by this function on the TX side.
2011 uint32_t max_tx_wm_flows;
2014 * The maximum number of Exact Match (EM) flows that can be offloaded by
2015 * this function on the RX side.
2017 uint32_t max_rx_em_flows;
2020 * The maximum number of Wildcard Match (WM) flows that can be offloaded
2021 * by this function on the RX side.
2023 uint32_t max_rx_wm_flows;
2026 * The maximum number of multicast filters that can be supported by this
2027 * function on the RX side.
2029 uint32_t max_mcast_filters;
2032 * The maximum value of flow_id that can be supported in completion
2035 uint32_t max_flow_id;
2038 * The maximum number of HW ring groups that can be supported on this
2041 uint32_t max_hw_ring_grps;
2048 * This field is used in Output records to indicate that the output is
2049 * completely written to RAM. This field should be read as '1' to
2050 * indicate that the output has been completely written. When writing a
2051 * command completion or response to an internal processor, the order of
2052 * writes has to be such that this field is written last.
2055 } __attribute__((packed));
2057 /* hwrm_func_reset */
2059 * Description: This command resets a hardware function (PCIe function) and
2060 * frees any resources used by the function. This command shall be initiated by
2061 * the driver after an FLR has occurred to prepare the function for re-use. This
2062 * command may also be initiated by a driver prior to doing it's own
2063 * configuration. This command puts the function into the reset state. In the
2064 * reset state, global and port related features of the chip are not available.
2067 * Note: This command will reset a function that has already been disabled or
2068 * idled. The command returns all the resources owned by the function so a new
2069 * driver may allocate and configure resources normally.
2072 /* Input (24 bytes) */
2073 struct hwrm_func_reset_input {
2075 * This value indicates what type of request this is. The format for the
2076 * rest of the command is determined by this field.
2081 * This value indicates the what completion ring the request will be
2082 * optionally completed on. If the value is -1, then no CR completion
2083 * will be generated. Any other value must be a valid CR ring_id value
2084 * for this function.
2088 /* This value indicates the command sequence number. */
2092 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2093 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2098 * This is the host address where the response will be written when the
2099 * request is complete. This area must be 16B aligned and must be
2100 * cleared to zero before the request is made.
2104 /* This bit must be '1' for the vf_id_valid field to be configured. */
2105 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2110 * The ID of the VF that this PF is trying to reset. Only the parent PF
2111 * shall be allowed to reset a child VF. A parent PF driver shall use
2112 * this field only when a specific child VF is requested to be reset.
2116 /* This value indicates the level of a function reset. */
2118 * Reset the caller function and its children VFs (if any). If
2119 * no children functions exist, then reset the caller function
2122 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2123 (UINT32_C(0x0) << 0)
2124 /* Reset the caller function only */
2125 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2126 (UINT32_C(0x1) << 0)
2128 * Reset all children VFs of the caller function driver if the
2129 * caller is a PF driver. It is an error to specify this level
2130 * by a VF driver. It is an error to specify this level by a PF
2131 * driver with no children VFs.
2133 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2134 (UINT32_C(0x2) << 0)
2136 * Reset a specific VF of the caller function driver if the
2137 * caller is the parent PF driver. It is an error to specify
2138 * this level by a VF driver. It is an error to specify this
2139 * level by a PF driver that is not the parent of the VF that is
2140 * being requested to reset.
2142 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2143 (UINT32_C(0x3) << 0)
2144 uint8_t func_reset_level;
2147 } __attribute__((packed));
2149 /* Output (16 bytes) */
2150 struct hwrm_func_reset_output {
2152 * Pass/Fail or error type Note: receiver to verify the in parameters,
2153 * and fail the call with an error when appropriate
2155 uint16_t error_code;
2157 /* This field returns the type of original request. */
2160 /* This field provides original sequence number of the command. */
2164 * This field is the length of the response in bytes. The last byte of
2165 * the response is a valid flag that will read as '1' when the command
2166 * has been completely written to memory.
2176 * This field is used in Output records to indicate that the output is
2177 * completely written to RAM. This field should be read as '1' to
2178 * indicate that the output has been completely written. When writing a
2179 * command completion or response to an internal processor, the order of
2180 * writes has to be such that this field is written last.
2183 } __attribute__((packed));
2185 /* hwrm_port_phy_cfg */
2187 * Description: This command configures the PHY device for the port. It allows
2188 * setting of the most generic settings for the PHY. The HWRM shall complete
2189 * this command as soon as PHY settings are configured. They may not be applied
2190 * when the command response is provided. A VF driver shall not be allowed to
2191 * configure PHY using this command. In a network partition mode, a PF driver
2192 * shall not be allowed to configure PHY using this command.
2195 /* Input (56 bytes) */
2196 struct hwrm_port_phy_cfg_input {
2198 * This value indicates what type of request this is. The format for the
2199 * rest of the command is determined by this field.
2204 * This value indicates the what completion ring the request will be
2205 * optionally completed on. If the value is -1, then no CR completion
2206 * will be generated. Any other value must be a valid CR ring_id value
2207 * for this function.
2211 /* This value indicates the command sequence number. */
2215 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2216 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2221 * This is the host address where the response will be written when the
2222 * request is complete. This area must be 16B aligned and must be
2223 * cleared to zero before the request is made.
2228 * When this bit is set to '1', the PHY for the port shall be reset. #
2229 * If this bit is set to 1, then the HWRM shall reset the PHY after
2230 * applying PHY configuration changes specified in this command. # In
2231 * order to guarantee that PHY configuration changes specified in this
2232 * command take effect, the HWRM client should set this flag to 1. # If
2233 * this bit is not set to 1, then the HWRM may reset the PHY depending
2234 * on the current PHY configuration and settings specified in this
2237 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2239 * When this bit is set to '1', the link shall be forced to be taken
2240 * down. # When this bit is set to '1", all other command input settings
2241 * related to the link speed shall be ignored. Once the link state is
2242 * forced down, it can be explicitly cleared from that state by setting
2243 * this flag to '0'. # If this flag is set to '0', then the link shall
2244 * be cleared from forced down state if the link is in forced down
2245 * state. There may be conditions (e.g. out-of-band or sideband
2246 * configuration changes for the link) outside the scope of the HWRM
2247 * implementation that may clear forced down link state.
2249 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2251 * When this bit is set to '1', the link shall be forced to the
2252 * force_link_speed value. When this bit is set to '1', the HWRM client
2253 * should not enable any of the auto negotiation related fields
2254 * represented by auto_XXX fields in this command. When this bit is set
2255 * to '1' and the HWRM client has enabled a auto_XXX field in this
2256 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2257 * this bit is set to zero, the link shall be allowed to autoneg.
2259 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2261 * When this bit is set to '1', the auto-negotiation process shall be
2262 * restarted on the link.
2264 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2266 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2267 * requested to be enabled on this link. If EEE is not supported on this
2268 * port, then this flag shall be ignored by the HWRM.
2270 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2272 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2273 * requested to be disabled on this link. If EEE is not supported on
2274 * this port, then this flag shall be ignored by the HWRM.
2276 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2278 * When this bit is set to '1' and EEE is enabled on this link, then TX
2279 * LPI is requested to be enabled on the link. If EEE is not supported
2280 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2281 * disabled on this port, then this flag shall be ignored by the HWRM.
2283 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2286 /* This bit must be '1' for the auto_mode field to be configured. */
2287 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2288 /* This bit must be '1' for the auto_duplex field to be configured. */
2289 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2290 /* This bit must be '1' for the auto_pause field to be configured. */
2291 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2293 * This bit must be '1' for the auto_link_speed field to be configured.
2295 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2297 * This bit must be '1' for the auto_link_speed_mask field to be
2300 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2302 /* This bit must be '1' for the wirespeed field to be configured. */
2303 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2304 /* This bit must be '1' for the lpbk field to be configured. */
2305 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2306 /* This bit must be '1' for the preemphasis field to be configured. */
2307 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2308 /* This bit must be '1' for the force_pause field to be configured. */
2309 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2311 * This bit must be '1' for the eee_link_speed_mask field to be
2314 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2316 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2317 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2320 /* Port ID of port that is to be configured. */
2324 * This is the speed that will be used if the force bit is '1'. If
2325 * unsupported speed is selected, an error will be generated.
2327 /* 100Mb link speed */
2328 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2329 (UINT32_C(0x1) << 0)
2330 /* 1Gb link speed */
2331 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2332 (UINT32_C(0xa) << 0)
2333 /* 2Gb link speed */
2334 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2335 (UINT32_C(0x14) << 0)
2336 /* 2.5Gb link speed */
2337 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2338 (UINT32_C(0x19) << 0)
2339 /* 10Gb link speed */
2340 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2341 (UINT32_C(0x64) << 0)
2342 /* 20Mb link speed */
2343 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2344 (UINT32_C(0xc8) << 0)
2345 /* 25Gb link speed */
2346 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2347 (UINT32_C(0xfa) << 0)
2348 /* 40Gb link speed */
2349 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2350 (UINT32_C(0x190) << 0)
2351 /* 50Gb link speed */
2352 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2353 (UINT32_C(0x1f4) << 0)
2354 /* 100Gb link speed */
2355 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2356 (UINT32_C(0x3e8) << 0)
2357 /* 10Mb link speed */
2358 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2359 (UINT32_C(0xffff) << 0)
2360 uint16_t force_link_speed;
2363 * This value is used to identify what autoneg mode is used when the
2364 * link speed is not being forced.
2367 * Disable autoneg or autoneg disabled. No speeds are selected.
2369 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2370 /* Select all possible speeds for autoneg mode. */
2371 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2372 (UINT32_C(0x1) << 0)
2374 * Select only the auto_link_speed speed for autoneg mode. This
2375 * mode has been DEPRECATED. An HWRM client should not use this
2378 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2379 (UINT32_C(0x2) << 0)
2381 * Select the auto_link_speed or any speed below that speed for
2382 * autoneg. This mode has been DEPRECATED. An HWRM client should
2383 * not use this mode.
2385 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2386 (UINT32_C(0x3) << 0)
2388 * Select the speeds based on the corresponding link speed mask
2389 * value that is provided.
2391 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2392 (UINT32_C(0x4) << 0)
2396 * This is the duplex setting that will be used if the autoneg_mode is
2397 * "one_speed" or "one_or_below".
2399 /* Half Duplex will be requested. */
2400 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2401 (UINT32_C(0x0) << 0)
2402 /* Full duplex will be requested. */
2403 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2404 (UINT32_C(0x1) << 0)
2405 /* Both Half and Full dupex will be requested. */
2406 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2407 (UINT32_C(0x2) << 0)
2408 uint8_t auto_duplex;
2411 * This value is used to configure the pause that will be used for
2412 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2415 * When this bit is '1', Generation of tx pause messages has been
2416 * requested. Disabled otherwise.
2418 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2420 * When this bit is '1', Reception of rx pause messages has been
2421 * requested. Disabled otherwise.
2423 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2425 * When set to 1, the advertisement of pause is enabled. # When the
2426 * auto_mode is not set to none and this flag is set to 1, then the
2427 * auto_pause bits on this port are being advertised and autoneg pause
2428 * results are being interpreted. # When the auto_mode is not set to
2429 * none and this flag is set to 0, the pause is forced as indicated in
2430 * force_pause, and also advertised as auto_pause bits, but the autoneg
2431 * results are not interpreted since the pause configuration is being
2432 * forced. # When the auto_mode is set to none and this flag is set to
2433 * 1, auto_pause bits should be ignored and should be set to 0.
2435 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2441 * This is the speed that will be used if the autoneg_mode is
2442 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2443 * an error will be generated.
2445 /* 100Mb link speed */
2446 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2447 (UINT32_C(0x1) << 0)
2448 /* 1Gb link speed */
2449 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2450 (UINT32_C(0xa) << 0)
2451 /* 2Gb link speed */
2452 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2453 (UINT32_C(0x14) << 0)
2454 /* 2.5Gb link speed */
2455 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2456 (UINT32_C(0x19) << 0)
2457 /* 10Gb link speed */
2458 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2459 (UINT32_C(0x64) << 0)
2460 /* 20Mb link speed */
2461 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2462 (UINT32_C(0xc8) << 0)
2463 /* 25Gb link speed */
2464 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2465 (UINT32_C(0xfa) << 0)
2466 /* 40Gb link speed */
2467 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2468 (UINT32_C(0x190) << 0)
2469 /* 50Gb link speed */
2470 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2471 (UINT32_C(0x1f4) << 0)
2472 /* 100Gb link speed */
2473 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2474 (UINT32_C(0x3e8) << 0)
2475 /* 10Mb link speed */
2476 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2477 (UINT32_C(0xffff) << 0)
2478 uint16_t auto_link_speed;
2481 * This is a mask of link speeds that will be used if autoneg_mode is
2482 * "mask". If unsupported speed is enabled an error will be generated.
2484 /* 100Mb link speed (Half-duplex) */
2485 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2487 /* 100Mb link speed (Full-duplex) */
2488 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2490 /* 1Gb link speed (Half-duplex) */
2491 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2493 /* 1Gb link speed (Full-duplex) */
2494 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2496 /* 2Gb link speed */
2497 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2499 /* 2.5Gb link speed */
2500 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2502 /* 10Gb link speed */
2503 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2505 /* 20Gb link speed */
2506 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2508 /* 25Gb link speed */
2509 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2511 /* 40Gb link speed */
2512 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2514 /* 50Gb link speed */
2515 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2517 /* 100Gb link speed */
2518 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2520 /* 10Mb link speed (Half-duplex) */
2521 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2523 /* 10Mb link speed (Full-duplex) */
2524 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2526 uint16_t auto_link_speed_mask;
2528 /* This value controls the wirespeed feature. */
2529 /* Wirespeed feature is disabled. */
2530 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2531 /* Wirespeed feature is enabled. */
2532 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2535 /* This value controls the loopback setting for the PHY. */
2536 /* No loopback is selected. Normal operation. */
2537 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2539 * The HW will be configured with local loopback such that host
2540 * data is sent back to the host without modification.
2542 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2544 * The HW will be configured with remote loopback such that port
2545 * logic will send packets back out the transmitter that are
2548 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2552 * This value is used to configure the pause that will be used for force
2556 * When this bit is '1', Generation of tx pause messages is supported.
2557 * Disabled otherwise.
2559 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2561 * When this bit is '1', Reception of rx pause messages is supported.
2562 * Disabled otherwise.
2564 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2565 uint8_t force_pause;
2570 * This value controls the pre-emphasis to be used for the link. Driver
2571 * should not set this value (use enable.preemphasis = 0) unless driver
2572 * is sure of setting. Normally HWRM FW will determine proper pre-
2575 uint32_t preemphasis;
2578 * Setting for link speed mask that is used to advertise speeds during
2579 * autonegotiation when EEE is enabled. This field is valid only when
2580 * EEE is enabled. The speeds specified in this field shall be a subset
2581 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2582 * at least one speed shall be provided in this mask.
2585 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2586 /* 100Mb link speed (Full-duplex) */
2587 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2589 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2590 /* 1Gb link speed (Full-duplex) */
2591 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2593 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2596 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2598 /* 10Gb link speed */
2599 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2601 uint16_t eee_link_speed_mask;
2607 * Reuested setting of TX LPI timer in microseconds. This field is valid
2608 * only when EEE is enabled and TX LPI is enabled.
2610 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2612 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2613 uint32_t tx_lpi_timer;
2616 } __attribute__((packed));
2618 /* Output (16 bytes) */
2619 struct hwrm_port_phy_cfg_output {
2621 * Pass/Fail or error type Note: receiver to verify the in parameters,
2622 * and fail the call with an error when appropriate
2624 uint16_t error_code;
2626 /* This field returns the type of original request. */
2629 /* This field provides original sequence number of the command. */
2633 * This field is the length of the response in bytes. The last byte of
2634 * the response is a valid flag that will read as '1' when the command
2635 * has been completely written to memory.
2645 * This field is used in Output records to indicate that the output is
2646 * completely written to RAM. This field should be read as '1' to
2647 * indicate that the output has been completely written. When writing a
2648 * command completion or response to an internal processor, the order of
2649 * writes has to be such that this field is written last.
2652 } __attribute__((packed));
2656 * Description: This function is called by a driver to determine the HWRM
2657 * interface version supported by the HWRM firmware, the version of HWRM
2658 * firmware implementation, the name of HWRM firmware, the versions of other
2659 * embedded firmwares, and the names of other embedded firmwares, etc. Any
2660 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
2661 * be considered an invalid version.
2664 /* Input (24 bytes) */
2665 struct hwrm_ver_get_input {
2667 * This value indicates what type of request this is. The format for the
2668 * rest of the command is determined by this field.
2673 * This value indicates the what completion ring the request will be
2674 * optionally completed on. If the value is -1, then no CR completion
2675 * will be generated. Any other value must be a valid CR ring_id value
2676 * for this function.
2680 /* This value indicates the command sequence number. */
2684 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2685 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2690 * This is the host address where the response will be written when the
2691 * request is complete. This area must be 16B aligned and must be
2692 * cleared to zero before the request is made.
2697 * This field represents the major version of HWRM interface
2698 * specification supported by the driver HWRM implementation. The
2699 * interface major version is intended to change only when non backward
2700 * compatible changes are made to the HWRM interface specification.
2702 uint8_t hwrm_intf_maj;
2705 * This field represents the minor version of HWRM interface
2706 * specification supported by the driver HWRM implementation. A change
2707 * in interface minor version is used to reflect significant backward
2708 * compatible modification to HWRM interface specification. This can be
2709 * due to addition or removal of functionality. HWRM interface
2710 * specifications with the same major version but different minor
2711 * versions are compatible.
2713 uint8_t hwrm_intf_min;
2716 * This field represents the update version of HWRM interface
2717 * specification supported by the driver HWRM implementation. The
2718 * interface update version is used to reflect minor changes or bug
2719 * fixes to a released HWRM interface specification.
2721 uint8_t hwrm_intf_upd;
2723 uint8_t unused_0[5];
2724 } __attribute__((packed));
2726 /* Output (128 bytes) */
2727 struct hwrm_ver_get_output {
2729 * Pass/Fail or error type Note: receiver to verify the in parameters,
2730 * and fail the call with an error when appropriate
2732 uint16_t error_code;
2734 /* This field returns the type of original request. */
2737 /* This field provides original sequence number of the command. */
2741 * This field is the length of the response in bytes. The last byte of
2742 * the response is a valid flag that will read as '1' when the command
2743 * has been completely written to memory.
2748 * This field represents the major version of HWRM interface
2749 * specification supported by the HWRM implementation. The interface
2750 * major version is intended to change only when non backward compatible
2751 * changes are made to the HWRM interface specification. A HWRM
2752 * implementation that is compliant with this specification shall
2753 * provide value of 1 in this field.
2755 uint8_t hwrm_intf_maj;
2758 * This field represents the minor version of HWRM interface
2759 * specification supported by the HWRM implementation. A change in
2760 * interface minor version is used to reflect significant backward
2761 * compatible modification to HWRM interface specification. This can be
2762 * due to addition or removal of functionality. HWRM interface
2763 * specifications with the same major version but different minor
2764 * versions are compatible. A HWRM implementation that is compliant with
2765 * this specification shall provide value of 0 in this field.
2767 uint8_t hwrm_intf_min;
2770 * This field represents the update version of HWRM interface
2771 * specification supported by the HWRM implementation. The interface
2772 * update version is used to reflect minor changes or bug fixes to a
2773 * released HWRM interface specification. A HWRM implementation that is
2774 * compliant with this specification shall provide value of 1 in this
2777 uint8_t hwrm_intf_upd;
2779 uint8_t hwrm_intf_rsvd;
2782 * This field represents the major version of HWRM firmware. A change in
2783 * firmware major version represents a major firmware release.
2785 uint8_t hwrm_fw_maj;
2788 * This field represents the minor version of HWRM firmware. A change in
2789 * firmware minor version represents significant firmware functionality
2792 uint8_t hwrm_fw_min;
2795 * This field represents the build version of HWRM firmware. A change in
2796 * firmware build version represents bug fixes to a released firmware.
2798 uint8_t hwrm_fw_bld;
2801 * This field is a reserved field. This field can be used to represent
2802 * firmware branches or customer specific releases tied to a specific
2803 * (major,minor,update) version of the HWRM firmware.
2805 uint8_t hwrm_fw_rsvd;
2808 * This field represents the major version of mgmt firmware. A change in
2809 * major version represents a major release.
2811 uint8_t mgmt_fw_maj;
2814 * This field represents the minor version of mgmt firmware. A change in
2815 * minor version represents significant functionality changes.
2817 uint8_t mgmt_fw_min;
2820 * This field represents the build version of mgmt firmware. A change in
2821 * update version represents bug fixes.
2823 uint8_t mgmt_fw_bld;
2826 * This field is a reserved field. This field can be used to represent
2827 * firmware branches or customer specific releases tied to a specific
2828 * (major,minor,update) version
2830 uint8_t mgmt_fw_rsvd;
2833 * This field represents the major version of network control firmware.
2834 * A change in major version represents a major release.
2836 uint8_t netctrl_fw_maj;
2839 * This field represents the minor version of network control firmware.
2840 * A change in minor version represents significant functionality
2843 uint8_t netctrl_fw_min;
2846 * This field represents the build version of network control firmware.
2847 * A change in update version represents bug fixes.
2849 uint8_t netctrl_fw_bld;
2852 * This field is a reserved field. This field can be used to represent
2853 * firmware branches or customer specific releases tied to a specific
2854 * (major,minor,update) version
2856 uint8_t netctrl_fw_rsvd;
2859 * This field is reserved for future use. The responder should set it to
2860 * 0. The requester should ignore this field.
2865 * This field represents the major version of RoCE firmware. A change in
2866 * major version represents a major release.
2868 uint8_t roce_fw_maj;
2871 * This field represents the minor version of RoCE firmware. A change in
2872 * minor version represents significant functionality changes.
2874 uint8_t roce_fw_min;
2877 * This field represents the build version of RoCE firmware. A change in
2878 * update version represents bug fixes.
2880 uint8_t roce_fw_bld;
2883 * This field is a reserved field. This field can be used to represent
2884 * firmware branches or customer specific releases tied to a specific
2885 * (major,minor,update) version
2887 uint8_t roce_fw_rsvd;
2890 * This field represents the name of HWRM FW (ASCII chars without NULL
2893 char hwrm_fw_name[16];
2896 * This field represents the name of mgmt FW (ASCII chars without NULL
2899 char mgmt_fw_name[16];
2902 * This field represents the name of network control firmware (ASCII
2903 * chars without NULL at the end).
2905 char netctrl_fw_name[16];
2908 * This field is reserved for future use. The responder should set it to
2909 * 0. The requester should ignore this field.
2911 uint32_t reserved2[4];
2914 * This field represents the name of RoCE FW (ASCII chars without NULL
2917 char roce_fw_name[16];
2919 /* This field returns the chip number. */
2922 /* This field returns the revision of chip. */
2925 /* This field returns the chip metal number. */
2928 /* This field returns the bond id of the chip. */
2929 uint8_t chip_bond_id;
2932 * This value indicates the type of platform used for chip
2936 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
2937 (UINT32_C(0x0) << 0)
2938 /* FPGA platform of the chip. */
2939 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
2940 (UINT32_C(0x1) << 0)
2941 /* Palladium platform of the chip. */
2942 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
2943 (UINT32_C(0x2) << 0)
2944 uint8_t chip_platform_type;
2947 * This field returns the maximum value of request window that is
2948 * supported by the HWRM. The request window is mapped into device
2949 * address space using MMIO.
2951 uint16_t max_req_win_len;
2954 * This field returns the maximum value of response buffer in bytes. If
2955 * a request specifies the response buffer length that is greater than
2956 * this value, then the HWRM should fail it. The value of this field
2957 * shall be 4KB or more.
2959 uint16_t max_resp_len;
2962 * This field returns the default request timeout value in milliseconds.
2964 uint16_t def_req_timeout;
2971 * This field is used in Output records to indicate that the output is
2972 * completely written to RAM. This field should be read as '1' to
2973 * indicate that the output has been completely written. When writing a
2974 * command completion or response to an internal processor, the order of
2975 * writes has to be such that this field is written last.
2978 } __attribute__((packed));
2980 /* hwrm_queue_qportcfg */
2982 * Description: This function is called by a driver to query queue configuration
2983 * of a port. # The HWRM shall at least advertise one queue with lossy service
2984 * profile. # The driver shall use this command to query queue ids before
2985 * configuring or using any queues. # If a service profile is not set for a
2986 * queue, then the driver shall not use that queue without configuring a service
2987 * profile for it. # If the driver is not allowed to configure service profiles,
2988 * then the driver shall only use queues for which service profiles are pre-
2992 /* Input (24 bytes) */
2993 struct hwrm_queue_qportcfg_input {
2995 * This value indicates what type of request this is. The format for the
2996 * rest of the command is determined by this field.
3001 * This value indicates the what completion ring the request will be
3002 * optionally completed on. If the value is -1, then no CR completion
3003 * will be generated. Any other value must be a valid CR ring_id value
3004 * for this function.
3008 /* This value indicates the command sequence number. */
3012 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3013 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3018 * This is the host address where the response will be written when the
3019 * request is complete. This area must be 16B aligned and must be
3020 * cleared to zero before the request is made.
3025 * Enumeration denoting the RX, TX type of the resource. This
3026 * enumeration is used for resources that are similar for both TX and RX
3027 * paths of the chip.
3029 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
3032 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
3033 (UINT32_C(0x0) << 0)
3035 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
3036 (UINT32_C(0x1) << 0)
3037 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
3038 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
3042 * Port ID of port for which the queue configuration is being queried.
3043 * This field is only required when sent by IPC.
3048 } __attribute__((packed));
3050 /* hwrm_stat_ctx_clr_stats */
3051 /* Description: This command clears statistics of a context. */
3053 /* Input (24 bytes) */
3054 struct hwrm_stat_ctx_clr_stats_input {
3056 * This value indicates what type of request this is. The format for the
3057 * rest of the command is determined by this field.
3062 * This value indicates the what completion ring the request will be
3063 * optionally completed on. If the value is -1, then no CR completion
3064 * will be generated. Any other value must be a valid CR ring_id value
3065 * for this function.
3069 /* This value indicates the command sequence number. */
3073 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3074 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3079 * This is the host address where the response will be written when the
3080 * request is complete. This area must be 16B aligned and must be
3081 * cleared to zero before the request is made.
3085 /* ID of the statistics context that is being queried. */
3086 uint32_t stat_ctx_id;
3089 } __attribute__((packed));
3091 /* Output (16 bytes) */
3092 struct hwrm_stat_ctx_clr_stats_output {
3094 * Pass/Fail or error type Note: receiver to verify the in parameters,
3095 * and fail the call with an error when appropriate
3097 uint16_t error_code;
3099 /* This field returns the type of original request. */
3102 /* This field provides original sequence number of the command. */
3106 * This field is the length of the response in bytes. The last byte of
3107 * the response is a valid flag that will read as '1' when the command
3108 * has been completely written to memory.
3118 * This field is used in Output records to indicate that the output is
3119 * completely written to RAM. This field should be read as '1' to
3120 * indicate that the output has been completely written. When writing a
3121 * command completion or response to an internal processor, the order of
3122 * writes has to be such that this field is written last.
3125 } __attribute__((packed));
3127 /* hwrm_vnic_alloc */
3129 * Description: This VNIC is a resource in the RX side of the chip that is used
3130 * to represent a virtual host "interface". # At the time of VNIC allocation or
3131 * configuration, the function can specify whether it wants the requested VNIC
3132 * to be the default VNIC for the function or not. # If a function requests
3133 * allocation of a VNIC for the first time and a VNIC is successfully allocated
3134 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
3135 * for that function. # The default VNIC shall be used for the default action
3136 * for a partition or function. # For each VNIC allocated on a function, a
3137 * mapping on the RX side to map the allocated VNIC to source virtual interface
3138 * shall be performed by the HWRM. This should be hidden to the function driver
3139 * requesting the VNIC allocation. This enables broadcast/multicast replication
3140 * with source knockout. # If multicast replication with source knockout is
3141 * enabled, then the internal VNIC to SVIF mapping data structures shall be
3142 * programmed at the time of VNIC allocation.
3145 /* Input (24 bytes) */
3146 struct hwrm_vnic_alloc_input {
3148 * This value indicates what type of request this is. The format for the
3149 * rest of the command is determined by this field.
3154 * This value indicates the what completion ring the request will be
3155 * optionally completed on. If the value is -1, then no CR completion
3156 * will be generated. Any other value must be a valid CR ring_id value
3157 * for this function.
3161 /* This value indicates the command sequence number. */
3165 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3166 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3171 * This is the host address where the response will be written when the
3172 * request is complete. This area must be 16B aligned and must be
3173 * cleared to zero before the request is made.
3178 * When this bit is '1', this VNIC is requested to be the default VNIC
3179 * for this function.
3181 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3185 } __attribute__((packed));
3187 /* Output (16 bytes) */
3188 struct hwrm_vnic_alloc_output {
3190 * Pass/Fail or error type Note: receiver to verify the in parameters,
3191 * and fail the call with an error when appropriate
3193 uint16_t error_code;
3195 /* This field returns the type of original request. */
3198 /* This field provides original sequence number of the command. */
3202 * This field is the length of the response in bytes. The last byte of
3203 * the response is a valid flag that will read as '1' when the command
3204 * has been completely written to memory.
3208 /* Logical vnic ID */
3216 * This field is used in Output records to indicate that the output is
3217 * completely written to RAM. This field should be read as '1' to
3218 * indicate that the output has been completely written. When writing a
3219 * command completion or response to an internal processor, the order of
3220 * writes has to be such that this field is written last.
3223 } __attribute__((packed));
3226 /* Description: Configure the RX VNIC structure. */
3228 /* Input (40 bytes) */
3229 struct hwrm_vnic_cfg_input {
3231 * This value indicates what type of request this is. The format for the
3232 * rest of the command is determined by this field.
3237 * This value indicates the what completion ring the request will be
3238 * optionally completed on. If the value is -1, then no CR completion
3239 * will be generated. Any other value must be a valid CR ring_id value
3240 * for this function.
3244 /* This value indicates the command sequence number. */
3248 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3249 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3254 * This is the host address where the response will be written when the
3255 * request is complete. This area must be 16B aligned and must be
3256 * cleared to zero before the request is made.
3261 * When this bit is '1', the VNIC is requested to be the default VNIC
3264 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
3266 * When this bit is '1', the VNIC is being configured to strip VLAN in
3267 * the RX path. If set to '0', then VLAN stripping is disabled on this
3270 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
3272 * When this bit is '1', the VNIC is being configured to buffer receive
3273 * packets in the hardware until the host posts new receive buffers. If
3274 * set to '0', then bd_stall is being configured to be disabled on this
3277 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
3279 * When this bit is '1', the VNIC is being configured to receive both
3280 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
3281 * configured to be operating in dual VNIC mode.
3283 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
3285 * When this flag is set to '1', the VNIC is requested to be configured
3286 * to receive only RoCE traffic. If this flag is set to '0', then this
3287 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
3288 * to '1', then the HWRM client shall not set this flag to '1'.
3290 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
3293 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
3294 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
3295 /* This bit must be '1' for the rss_rule field to be configured. */
3296 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
3297 /* This bit must be '1' for the cos_rule field to be configured. */
3298 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
3299 /* This bit must be '1' for the lb_rule field to be configured. */
3300 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
3301 /* This bit must be '1' for the mru field to be configured. */
3302 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
3305 /* Logical vnic ID */
3309 * Default Completion ring for the VNIC. This ring will be chosen if
3310 * packet does not match any RSS rules and if there is no COS rule.
3312 uint16_t dflt_ring_grp;
3315 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
3321 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
3327 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
3328 * there is no LB rule.
3333 * The maximum receive unit of the vnic. Each vnic is associated with a
3334 * function. The vnic mru value overwrites the mru setting of the
3335 * associated function. The HWRM shall make sure that vnic mru does not
3336 * exceed the mru of the port the function is associated with.
3341 } __attribute__((packed));
3343 /* Output (16 bytes) */
3344 struct hwrm_vnic_cfg_output {
3346 * Pass/Fail or error type Note: receiver to verify the in parameters,
3347 * and fail the call with an error when appropriate
3349 uint16_t error_code;
3351 /* This field returns the type of original request. */
3354 /* This field provides original sequence number of the command. */
3358 * This field is the length of the response in bytes. The last byte of
3359 * the response is a valid flag that will read as '1' when the command
3360 * has been completely written to memory.
3370 * This field is used in Output records to indicate that the output is
3371 * completely written to RAM. This field should be read as '1' to
3372 * indicate that the output has been completely written. When writing a
3373 * command completion or response to an internal processor, the order of
3374 * writes has to be such that this field is written last.
3377 } __attribute__((packed));
3379 /* hwrm_vnic_free */
3381 * Description: Free a VNIC resource. Idle any resources associated with the
3382 * VNIC as well as the VNIC. Reset and release all resources associated with the
3386 /* Input (24 bytes) */
3387 struct hwrm_vnic_free_input {
3389 * This value indicates what type of request this is. The format for the
3390 * rest of the command is determined by this field.
3395 * This value indicates the what completion ring the request will be
3396 * optionally completed on. If the value is -1, then no CR completion
3397 * will be generated. Any other value must be a valid CR ring_id value
3398 * for this function.
3402 /* This value indicates the command sequence number. */
3406 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3407 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3412 * This is the host address where the response will be written when the
3413 * request is complete. This area must be 16B aligned and must be
3414 * cleared to zero before the request is made.
3418 /* Logical vnic ID */
3422 } __attribute__((packed));
3424 /* Output (16 bytes) */
3425 struct hwrm_vnic_free_output {
3427 * Pass/Fail or error type Note: receiver to verify the in parameters,
3428 * and fail the call with an error when appropriate
3430 uint16_t error_code;
3432 /* This field returns the type of original request. */
3435 /* This field provides original sequence number of the command. */
3439 * This field is the length of the response in bytes. The last byte of
3440 * the response is a valid flag that will read as '1' when the command
3441 * has been completely written to memory.
3451 * This field is used in Output records to indicate that the output is
3452 * completely written to RAM. This field should be read as '1' to
3453 * indicate that the output has been completely written. When writing a
3454 * command completion or response to an internal processor, the order of
3455 * writes has to be such that this field is written last.
3458 } __attribute__((packed));
3460 /* hwrm_vnic_rss_cfg */
3461 /* Description: This function is used to enable RSS configuration. */
3463 /* Input (48 bytes) */
3464 struct hwrm_vnic_rss_cfg_input {
3466 * This value indicates what type of request this is. The format for the
3467 * rest of the command is determined by this field.
3472 * This value indicates the what completion ring the request will be
3473 * optionally completed on. If the value is -1, then no CR completion
3474 * will be generated. Any other value must be a valid CR ring_id value
3475 * for this function.
3479 /* This value indicates the command sequence number. */
3483 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3484 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3489 * This is the host address where the response will be written when the
3490 * request is complete. This area must be 16B aligned and must be
3491 * cleared to zero before the request is made.
3496 * When this bit is '1', the RSS hash shall be computed over source and
3497 * destination IPv4 addresses of IPv4 packets.
3499 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
3501 * When this bit is '1', the RSS hash shall be computed over
3502 * source/destination IPv4 addresses and source/destination ports of
3505 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
3507 * When this bit is '1', the RSS hash shall be computed over
3508 * source/destination IPv4 addresses and source/destination ports of
3511 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
3513 * When this bit is '1', the RSS hash shall be computed over source and
3514 * destination IPv4 addresses of IPv6 packets.
3516 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
3518 * When this bit is '1', the RSS hash shall be computed over
3519 * source/destination IPv6 addresses and source/destination ports of
3522 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
3524 * When this bit is '1', the RSS hash shall be computed over
3525 * source/destination IPv6 addresses and source/destination ports of
3528 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
3533 /* This is the address for rss ring group table */
3534 uint64_t ring_grp_tbl_addr;
3536 /* This is the address for rss hash key table */
3537 uint64_t hash_key_tbl_addr;
3539 /* Index to the rss indirection table. */
3540 uint16_t rss_ctx_idx;
3542 uint16_t unused_1[3];
3543 } __attribute__((packed));
3545 /* Output (16 bytes) */
3546 struct hwrm_vnic_rss_cfg_output {
3548 * Pass/Fail or error type Note: receiver to verify the in parameters,
3549 * and fail the call with an error when appropriate
3551 uint16_t error_code;
3553 /* This field returns the type of original request. */
3556 /* This field provides original sequence number of the command. */
3560 * This field is the length of the response in bytes. The last byte of
3561 * the response is a valid flag that will read as '1' when the command
3562 * has been completely written to memory.
3572 * This field is used in Output records to indicate that the output is
3573 * completely written to RAM. This field should be read as '1' to
3574 * indicate that the output has been completely written. When writing a
3575 * command completion or response to an internal processor, the order of
3576 * writes has to be such that this field is written last.
3579 } __attribute__((packed));
3581 /* Input (16 bytes) */
3582 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
3584 * This value indicates what type of request this is. The format for the
3585 * rest of the command is determined by this field.
3590 * This value indicates the what completion ring the request will be
3591 * optionally completed on. If the value is -1, then no CR completion
3592 * will be generated. Any other value must be a valid CR ring_id value
3593 * for this function.
3597 /* This value indicates the command sequence number. */
3601 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3602 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3607 * This is the host address where the response will be written when the
3608 * request is complete. This area must be 16B aligned and must be
3609 * cleared to zero before the request is made.
3612 } __attribute__((packed));
3614 /* Output (16 bytes) */
3616 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
3618 * Pass/Fail or error type Note: receiver to verify the in parameters,
3619 * and fail the call with an error when appropriate
3621 uint16_t error_code;
3623 /* This field returns the type of original request. */
3626 /* This field provides original sequence number of the command. */
3630 * This field is the length of the response in bytes. The last byte of
3631 * the response is a valid flag that will read as '1' when the command
3632 * has been completely written to memory.
3636 /* rss_cos_lb_ctx_id is 16 b */
3637 uint16_t rss_cos_lb_ctx_id;
3646 * This field is used in Output records to indicate that the output is
3647 * completely written to RAM. This field should be read as '1' to
3648 * indicate that the output has been completely written. When writing a
3649 * command completion or response to an internal processor, the order of
3650 * writes has to be such that this field is written last.
3653 } __attribute__((packed));
3655 /* hwrm_vnic_rss_cos_lb_ctx_free */
3656 /* Description: This function can be used to free COS/Load Balance context. */
3657 /* Input (24 bytes) */
3659 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
3661 * This value indicates what type of request this is. The format for the
3662 * rest of the command is determined by this field.
3667 * This value indicates the what completion ring the request will be
3668 * optionally completed on. If the value is -1, then no CR completion
3669 * will be generated. Any other value must be a valid CR ring_id value
3670 * for this function.
3674 /* This value indicates the command sequence number. */
3678 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3679 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3684 * This is the host address where the response will be written when the
3685 * request is complete. This area must be 16B aligned and must be
3686 * cleared to zero before the request is made.
3690 /* rss_cos_lb_ctx_id is 16 b */
3691 uint16_t rss_cos_lb_ctx_id;
3693 uint16_t unused_0[3];
3694 } __attribute__((packed));
3696 /* Output (16 bytes) */
3697 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
3699 * Pass/Fail or error type Note: receiver to verify the in parameters,
3700 * and fail the call with an error when appropriate
3702 uint16_t error_code;
3704 /* This field returns the type of original request. */
3707 /* This field provides original sequence number of the command. */
3711 * This field is the length of the response in bytes. The last byte of
3712 * the response is a valid flag that will read as '1' when the command
3713 * has been completely written to memory.
3723 * This field is used in Output records to indicate that the output is
3724 * completely written to RAM. This field should be read as '1' to
3725 * indicate that the output has been completely written. When writing a
3726 * command completion or response to an internal processor, the order of
3727 * writes has to be such that this field is written last.
3730 } __attribute__((packed));
3732 /* Output (32 bytes) */
3733 struct hwrm_queue_qportcfg_output {
3735 * Pass/Fail or error type Note: receiver to verify the in parameters,
3736 * and fail the call with an error when appropriate
3738 uint16_t error_code;
3740 /* This field returns the type of original request. */
3743 /* This field provides original sequence number of the command. */
3747 * This field is the length of the response in bytes. The last byte of
3748 * the response is a valid flag that will read as '1' when the command
3749 * has been completely written to memory.
3753 /* The maximum number of queues that can be configured. */
3754 uint8_t max_configurable_queues;
3756 /* The maximum number of lossless queues that can be configured. */
3757 uint8_t max_configurable_lossless_queues;
3760 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
3761 * the HWRM shall allow the host SW driver to configure queues using
3764 uint8_t queue_cfg_allowed;
3767 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3768 * the HWRM shall allow the host SW driver to configure queue buffers
3769 * using hwrm_queue_buffers_cfg.
3771 uint8_t queue_buffers_cfg_allowed;
3774 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3775 * the HWRM shall allow the host SW driver to configure PFC using
3776 * hwrm_queue_pfcenable_cfg.
3778 uint8_t queue_pfcenable_cfg_allowed;
3781 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3782 * the HWRM shall allow the host SW driver to configure Priority to CoS
3783 * mapping using hwrm_queue_pri2cos_cfg.
3785 uint8_t queue_pri2cos_cfg_allowed;
3788 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
3789 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
3790 * configuration using hwrm_queue_cos2bw_cfg.
3792 uint8_t queue_cos2bw_cfg_allowed;
3794 /* ID of CoS Queue 0. FF - Invalid id */
3797 /* This value is applicable to CoS queues only. */
3798 /* Lossy (best-effort) */
3799 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
3800 (UINT32_C(0x0) << 0)
3802 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
3803 (UINT32_C(0x1) << 0)
3805 * Set to 0xFF... (All Fs) if there is no service profile
3808 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
3809 (UINT32_C(0xff) << 0)
3810 uint8_t queue_id0_service_profile;
3812 /* ID of CoS Queue 1. FF - Invalid id */
3814 /* This value is applicable to CoS queues only. */
3815 /* Lossy (best-effort) */
3816 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
3817 (UINT32_C(0x0) << 0)
3819 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
3820 (UINT32_C(0x1) << 0)
3822 * Set to 0xFF... (All Fs) if there is no service profile
3825 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
3826 (UINT32_C(0xff) << 0)
3827 uint8_t queue_id1_service_profile;
3829 /* ID of CoS Queue 2. FF - Invalid id */
3831 /* This value is applicable to CoS queues only. */
3832 /* Lossy (best-effort) */
3833 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
3834 (UINT32_C(0x0) << 0)
3836 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
3837 (UINT32_C(0x1) << 0)
3839 * Set to 0xFF... (All Fs) if there is no service profile
3842 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
3843 (UINT32_C(0xff) << 0)
3844 uint8_t queue_id2_service_profile;
3846 /* ID of CoS Queue 3. FF - Invalid id */
3849 /* This value is applicable to CoS queues only. */
3850 /* Lossy (best-effort) */
3851 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
3852 (UINT32_C(0x0) << 0)
3854 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
3855 (UINT32_C(0x1) << 0)
3857 * Set to 0xFF... (All Fs) if there is no service profile
3860 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
3861 (UINT32_C(0xff) << 0)
3862 uint8_t queue_id3_service_profile;
3864 /* ID of CoS Queue 4. FF - Invalid id */
3866 /* This value is applicable to CoS queues only. */
3867 /* Lossy (best-effort) */
3868 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
3869 (UINT32_C(0x0) << 0)
3871 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
3872 (UINT32_C(0x1) << 0)
3874 * Set to 0xFF... (All Fs) if there is no service profile
3877 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
3878 (UINT32_C(0xff) << 0)
3879 uint8_t queue_id4_service_profile;
3881 /* ID of CoS Queue 5. FF - Invalid id */
3884 /* This value is applicable to CoS queues only. */
3885 /* Lossy (best-effort) */
3886 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
3887 (UINT32_C(0x0) << 0)
3889 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
3890 (UINT32_C(0x1) << 0)
3892 * Set to 0xFF... (All Fs) if there is no service profile
3895 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
3896 (UINT32_C(0xff) << 0)
3897 uint8_t queue_id5_service_profile;
3899 /* ID of CoS Queue 6. FF - Invalid id */
3900 uint8_t queue_id6_service_profile;
3901 /* This value is applicable to CoS queues only. */
3902 /* Lossy (best-effort) */
3903 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
3904 (UINT32_C(0x0) << 0)
3906 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
3907 (UINT32_C(0x1) << 0)
3909 * Set to 0xFF... (All Fs) if there is no service profile
3912 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
3913 (UINT32_C(0xff) << 0)
3916 /* ID of CoS Queue 7. FF - Invalid id */
3919 /* This value is applicable to CoS queues only. */
3920 /* Lossy (best-effort) */
3921 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
3922 (UINT32_C(0x0) << 0)
3924 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
3925 (UINT32_C(0x1) << 0)
3927 * Set to 0xFF... (All Fs) if there is no service profile
3930 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
3931 (UINT32_C(0xff) << 0)
3932 uint8_t queue_id7_service_profile;
3935 * This field is used in Output records to indicate that the output is
3936 * completely written to RAM. This field should be read as '1' to
3937 * indicate that the output has been completely written. When writing a
3938 * command completion or response to an internal processor, the order of
3939 * writes has to be such that this field is written last.
3942 } __attribute__((packed));
3944 /* hwrm_func_drv_rgtr */
3946 * Description: This command is used by the function driver to register its
3947 * information with the HWRM. A function driver shall implement this command. A
3948 * function driver shall use this command during the driver initialization right
3949 * after the HWRM version discovery and default ring resources allocation.
3952 /* Input (80 bytes) */
3953 struct hwrm_func_drv_rgtr_input {
3955 * This value indicates what type of request this is. The format for the
3956 * rest of the command is determined by this field.
3961 * This value indicates the what completion ring the request will be
3962 * optionally completed on. If the value is -1, then no CR completion
3963 * will be generated. Any other value must be a valid CR ring_id value
3964 * for this function.
3968 /* This value indicates the command sequence number. */
3972 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3973 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3978 * This is the host address where the response will be written when the
3979 * request is complete. This area must be 16B aligned and must be
3980 * cleared to zero before the request is made.
3985 * When this bit is '1', the function driver is requesting all requests
3986 * from its children VF drivers to be forwarded to itself. This flag can
3987 * only be set by the PF driver. If a VF driver sets this flag, it
3988 * should be ignored by the HWRM.
3990 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3992 * When this bit is '1', the function is requesting none of the requests
3993 * from its children VF drivers to be forwarded to itself. This flag can
3994 * only be set by the PF driver. If a VF driver sets this flag, it
3995 * should be ignored by the HWRM.
3997 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
4000 /* This bit must be '1' for the os_type field to be configured. */
4001 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
4002 /* This bit must be '1' for the ver field to be configured. */
4003 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
4004 /* This bit must be '1' for the timestamp field to be configured. */
4005 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
4006 /* This bit must be '1' for the vf_req_fwd field to be configured. */
4007 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
4009 * This bit must be '1' for the async_event_fwd field to be configured.
4011 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
4015 /* This value indicates the type of OS. */
4017 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
4018 (UINT32_C(0x0) << 0)
4019 /* Other OS not listed below. */
4020 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
4021 (UINT32_C(0x1) << 0)
4023 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
4024 (UINT32_C(0xe) << 0)
4026 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
4027 (UINT32_C(0x12) << 0)
4029 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
4030 (UINT32_C(0x1d) << 0)
4032 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
4033 (UINT32_C(0x24) << 0)
4035 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
4036 (UINT32_C(0x2a) << 0)
4037 /* VMware ESXi OS. */
4038 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
4039 (UINT32_C(0x68) << 0)
4040 /* Microsoft Windows 8 64-bit OS. */
4041 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
4042 (UINT32_C(0x73) << 0)
4043 /* Microsoft Windows Server 2012 R2 OS. */
4044 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
4045 (UINT32_C(0x74) << 0)
4048 /* This is the major version of the driver. */
4051 /* This is the minor version of the driver. */
4054 /* This is the update version of the driver. */
4061 * This is a 32-bit timestamp provided by the driver for keep alive. The
4062 * timestamp is in multiples of 1ms.
4069 * This is a 256-bit bit mask provided by the PF driver for letting the
4070 * HWRM know what commands issued by the VF driver to the HWRM should be
4071 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
4072 * Setting Nth bit to 1 indicates that requests from the VF driver with
4073 * req_type equal to N shall be forwarded to the parent PF driver. This
4074 * field is not valid for the VF driver.
4076 uint32_t vf_req_fwd[8];
4079 * This is a 256-bit bit mask provided by the function driver (PF or VF
4080 * driver) to indicate the list of asynchronous event completions to be
4081 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
4082 * by the function driver shall result in the HWRM forwarding
4083 * asynchronous event completion with event_id equal to N. If all bits
4084 * are set to 0 (value of 0), then the HWRM shall not forward any
4085 * asynchronous event completion to this function driver.
4087 uint32_t async_event_fwd[8];
4088 } __attribute__((packed));
4090 /* Output (16 bytes) */
4092 struct hwrm_func_drv_rgtr_output {
4094 * Pass/Fail or error type Note: receiver to verify the in parameters,
4095 * and fail the call with an error when appropriate
4097 uint16_t error_code;
4099 /* This field returns the type of original request. */
4102 /* This field provides original sequence number of the command. */
4106 * This field is the length of the response in bytes. The last byte of
4107 * the response is a valid flag that will read as '1' when the command
4108 * has been completely written to memory.
4118 * This field is used in Output records to indicate that the output is
4119 * completely written to RAM. This field should be read as '1' to
4120 * indicate that the output has been completely written. When writing a
4121 * command completion or response to an internal processor, the order of
4122 * writes has to be such that this field is written last.
4125 } __attribute__((packed));
4127 /* hwrm_func_drv_unrgtr */
4129 * Description: This command is used by the function driver to un register with
4130 * the HWRM. A function driver shall implement this command. A function driver
4131 * shall use this command during the driver unloading.
4133 /* Input (24 bytes) */
4135 struct hwrm_func_drv_unrgtr_input {
4137 * This value indicates what type of request this is. The format for the
4138 * rest of the command is determined by this field.
4143 * This value indicates the what completion ring the request will be
4144 * optionally completed on. If the value is -1, then no CR completion
4145 * will be generated. Any other value must be a valid CR ring_id value
4146 * for this function.
4150 /* This value indicates the command sequence number. */
4154 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4155 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4160 * This is the host address where the response will be written when the
4161 * request is complete. This area must be 16B aligned and must be
4162 * cleared to zero before the request is made.
4167 * When this bit is '1', the function driver is notifying the HWRM to
4168 * prepare for the shutdown.
4170 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4175 } __attribute__((packed));
4177 /* Output (16 bytes) */
4178 struct hwrm_func_drv_unrgtr_output {
4180 * Pass/Fail or error type Note: receiver to verify the in parameters,
4181 * and fail the call with an error when appropriate
4183 uint16_t error_code;
4185 /* This field returns the type of original request. */
4188 /* This field provides original sequence number of the command. */
4192 * This field is the length of the response in bytes. The last byte of
4193 * the response is a valid flag that will read as '1' when the command
4194 * has been completely written to memory.
4204 * This field is used in Output records to indicate that the output is
4205 * completely written to RAM. This field should be read as '1' to
4206 * indicate that the output has been completely written. When writing a
4207 * command completion or response to an internal processor, the order of
4208 * writes has to be such that this field is written last.
4211 } __attribute__((packed));