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34 #ifndef _HSI_STRUCT_DEF_EXTERNAL_H_
35 #define _HSI_STRUCT_DEF_EXTERNAL_H_
38 * per-context HW statistics -- chip view
41 struct ctx_hw_stats64 {
42 uint64_t rx_ucast_pkts;
43 uint64_t rx_mcast_pkts;
44 uint64_t rx_bcast_pkts;
45 uint64_t rx_drop_pkts;
46 uint64_t rx_discard_pkts;
47 uint64_t rx_ucast_bytes;
48 uint64_t rx_mcast_bytes;
49 uint64_t rx_bcast_bytes;
51 uint64_t tx_ucast_pkts;
52 uint64_t tx_mcast_pkts;
53 uint64_t tx_bcast_pkts;
54 uint64_t tx_drop_pkts;
55 uint64_t tx_discard_pkts;
56 uint64_t tx_ucast_bytes;
57 uint64_t tx_mcast_bytes;
58 uint64_t tx_bcast_bytes;
64 } __attribute__((packed));
66 /* HW Resource Manager Specification 1.5.1 */
67 #define HWRM_VERSION_MAJOR 1
68 #define HWRM_VERSION_MINOR 5
69 #define HWRM_VERSION_UPDATE 1
71 #define HWRM_VERSION_STR "1.5.1"
74 * Following is the signature for HWRM message field that indicates not
75 * applicable (All F's). Need to cast it the size of the field if needed.
77 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
78 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
79 #define HWRM_MAX_RESP_LEN (176) /* hwrm_func_qstats */
80 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
81 #define HW_HASH_KEY_SIZE 40
82 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
87 #define HWRM_VER_GET (UINT32_C(0x0))
88 #define HWRM_FUNC_RESET (UINT32_C(0x11))
89 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
90 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
91 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
92 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
93 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
94 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
95 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
96 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
97 #define HWRM_VNIC_FREE (UINT32_C(0x41))
98 #define HWRM_VNIC_CFG (UINT32_C(0x42))
99 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
100 #define HWRM_RING_ALLOC (UINT32_C(0x50))
101 #define HWRM_RING_FREE (UINT32_C(0x51))
102 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
103 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
104 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
105 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
106 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
107 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
108 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
109 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
110 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
111 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
112 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
113 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
116 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
117 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
119 /* Short TX BD (16 bytes) */
122 * All bits in this field must be valid on the first BD of a packet.
123 * Only the packet_end bit must be valid for the remaining BDs of a
126 /* This value identifies the type of buffer descriptor. */
127 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
128 #define TX_BD_SHORT_TYPE_SFT 0
130 * Indicates that this BD is 16B long and is used for normal L2
131 * packet transmission.
133 #define TX_BD_SHORT_TYPE_TX_BD_SHORT (UINT32_C(0x0) << 0)
135 * If set to 1, the packet ends with the data in the buffer pointed to
136 * by this descriptor. This flag must be valid on every BD.
138 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
140 * If set to 1, the device will not generate a completion for this
141 * transmit packet unless there is an error in it's processing. If this
142 * bit is set to 0, then the packet will be completed normally. This bit
143 * must be valid only on the first BD of a packet.
145 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
147 * This value indicates how many 16B BD locations are consumed in the
148 * ring by this packet. A value of 1 indicates that this BD is the only
149 * BD (and that the it is a short BD). A value of 3 indicates either 3
150 * short BDs or 1 long BD and one short BD in the packet. A value of 0
151 * indicates that there are 32 BD locations in the packet (the maximum).
152 * This field is valid only on the first BD of a packet.
154 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
155 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
157 * This value is a hint for the length of the entire packet. It is used
158 * by the chip to optimize internal processing. The packet will be
159 * dropped if the hint is too short. This field is valid only on the
160 * first BD of a packet.
162 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
163 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
164 /* indicates packet length < 512B */
165 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
166 /* indicates 512 <= packet length < 1KB */
167 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
168 /* indicates 1KB <= packet length < 2KB */
169 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
170 /* indicates packet length >= 2KB */
171 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
172 #define TX_BD_SHORT_FLAGS_LHINT_LAST TX_BD_SHORT_FLAGS_LHINT_GTE2K
174 * If set to 1, the device immediately updates the Send Consumer Index
175 * after the buffer associated with this descriptor has been transferred
176 * via DMA to NIC memory from host memory. An interrupt may or may not
177 * be generated according to the state of the interrupt avoidance
178 * mechanisms. If this bit is set to 0, then the Consumer Index is only
179 * updated as soon as one of the host interrupt coalescing conditions
180 * has been met. This bit must be valid on the first BD of a packet.
182 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
184 * All bits in this field must be valid on the first BD of a packet.
185 * Only the packet_end bit must be valid for the remaining BDs of a
188 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
189 #define TX_BD_SHORT_FLAGS_SFT 6
193 * This is the length of the host physical buffer this BD describes in
194 * bytes. This field must be valid on all BDs of a packet.
198 * The opaque data field is pass through to the completion and can be
199 * used for any data that the driver wants to associate with the
200 * transmit BD. This field must be valid on the first BD of a packet.
205 * This is the host physical address for the portion of the packet
206 * described by this TX BD. This value must be valid on all BDs of a
210 } __attribute__((packed));
212 /* Long TX BD (32 bytes split to 2 16-byte struct) */
215 * All bits in this field must be valid on the first BD of a packet.
216 * Only the packet_end bit must be valid for the remaining BDs of a
219 /* This value identifies the type of buffer descriptor. */
220 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
221 #define TX_BD_LONG_TYPE_SFT 0
223 * Indicates that this BD is 32B long and is used for normal L2
224 * packet transmission.
226 #define TX_BD_LONG_TYPE_TX_BD_LONG (UINT32_C(0x10) << 0)
228 * If set to 1, the packet ends with the data in the buffer pointed to
229 * by this descriptor. This flag must be valid on every BD.
231 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
233 * If set to 1, the device will not generate a completion for this
234 * transmit packet unless there is an error in it's processing. If this
235 * bit is set to 0, then the packet will be completed normally. This bit
236 * must be valid only on the first BD of a packet.
238 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
240 * This value indicates how many 16B BD locations are consumed in the
241 * ring by this packet. A value of 1 indicates that this BD is the only
242 * BD (and that the it is a short BD). A value of 3 indicates either 3
243 * short BDs or 1 long BD and one short BD in the packet. A value of 0
244 * indicates that there are 32 BD locations in the packet (the maximum).
245 * This field is valid only on the first BD of a packet.
247 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
248 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
250 * This value is a hint for the length of the entire packet. It is used
251 * by the chip to optimize internal processing. The packet will be
252 * dropped if the hint is too short. This field is valid only on the
253 * first BD of a packet.
255 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
256 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
257 /* indicates packet length < 512B */
258 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
259 /* indicates 512 <= packet length < 1KB */
260 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
261 /* indicates 1KB <= packet length < 2KB */
262 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
263 /* indicates packet length >= 2KB */
264 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
265 #define TX_BD_LONG_FLAGS_LHINT_LAST TX_BD_LONG_FLAGS_LHINT_GTE2K
267 * If set to 1, the device immediately updates the Send Consumer Index
268 * after the buffer associated with this descriptor has been transferred
269 * via DMA to NIC memory from host memory. An interrupt may or may not
270 * be generated according to the state of the interrupt avoidance
271 * mechanisms. If this bit is set to 0, then the Consumer Index is only
272 * updated as soon as one of the host interrupt coalescing conditions
273 * has been met. This bit must be valid on the first BD of a packet.
275 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
277 * All bits in this field must be valid on the first BD of a packet.
278 * Only the packet_end bit must be valid for the remaining BDs of a
281 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
282 #define TX_BD_LONG_FLAGS_SFT 6
286 * This is the length of the host physical buffer this BD describes in
287 * bytes. This field must be valid on all BDs of a packet.
292 * The opaque data field is pass through to the completion and can be
293 * used for any data that the driver wants to associate with the
294 * transmit BD. This field must be valid on the first BD of a packet.
299 * This is the host physical address for the portion of the packet
300 * described by this TX BD. This value must be valid on all BDs of a
304 } __attribute__((packed));
306 /* last 16 bytes of Long TX BD */
308 struct tx_bd_long_hi {
310 * All bits in this field must be valid on the first BD of a packet.
311 * Their value on other BDs of the packet will be ignored.
314 * If set to 1, the controller replaces the TCP/UPD checksum fields of
315 * normal TCP/UPD checksum, or the inner TCP/UDP checksum field of the
316 * encapsulated TCP/UDP packets with the hardware calculated TCP/UDP
317 * checksum for the packet associated with this descriptor. This bit
318 * must be valid on the first BD of a packet.
320 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
322 * If set to 1, the controller replaces the IP checksum of the normal
323 * packets, or the inner IP checksum of the encapsulated packets with
324 * the hardware calculated IP checksum for the packet associated with
325 * this descriptor. This bit must be valid on the first BD of a packet.
327 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
329 * If set to 1, the controller will not append an Ethernet CRC to the
330 * end of the frame. This bit must be valid on the first BD of a packet.
331 * Packet must be 64B or longer when this flag is set. It is not useful
332 * to use this bit with any form of TX offload such as CSO or LSO. The
333 * intent is that the packet from the host already has a valid Ethernet
336 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
338 * If set to 1, the device will record the time at which the packet was
339 * actually transmitted at the TX MAC. This bit must be valid on the
340 * first BD of a packet.
342 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
344 * If set to 1, The controller replaces the tunnel IP checksum field
345 * with hardware calculated IP checksum for the IP header of the packet
346 * associated with this descriptor. In case of VXLAN, the controller
347 * also replaces the outer header UDP checksum with hardware calculated
348 * UDP checksum for the packet associated with this descriptor.
350 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
352 * If set to 1, the device will treat this packet with LSO(Large Send
353 * Offload) processing for both normal or encapsulated packets, which is
354 * a form of TCP segmentation. When this bit is 1, the hdr_size and mss
355 * fields must be valid. The driver doesn't need to set t_ip_chksum,
356 * ip_chksum, and tcp_udp_chksum flags since the controller will replace
357 * the appropriate checksum fields for segmented packets. When this bit
358 * is 1, the hdr_size and mss fields must be valid.
360 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
362 * If set to zero when LSO is '1', then the IPID will be treated as a
363 * 16b number and will be wrapped if it exceeds a value of 0xffff. If
364 * set to one when LSO is '1', then the IPID will be treated as a 15b
365 * number and will be wrapped if it exceeds a value 0f 0x7fff.
367 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
369 * If set to zero when LSO is '1', then the IPID of the tunnel IP header
370 * will not be modified during LSO operations. If set to one when LSO is
371 * '1', then the IPID of the tunnel IP header will be incremented for
372 * each subsequent segment of an LSO operation.
374 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
376 * If set to '1', then the RoCE ICRC will be appended to the packet.
377 * Packet must be a valid RoCE format packet.
379 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
381 * If set to '1', then the FCoE CRC will be appended to the packet.
382 * Packet must be a valid FCoE format packet.
384 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
388 * When LSO is '1', this field must contain the offset of the TCP
389 * payload from the beginning of the packet in as 16b words. In case of
390 * encapsulated/tunneling packet, this field contains the offset of the
391 * inner TCP payload from beginning of the packet as 16-bit words. This
392 * value must be valid on the first BD of a packet.
394 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
395 #define TX_BD_LONG_HDR_SIZE_SFT 0
399 * This is the MSS value that will be used to do the LSO processing. The
400 * value is the length in bytes of the TCP payload for each segment
401 * generated by the LSO operation. This value must be valid on the first
404 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
405 #define TX_BD_LONG_MSS_SFT 0
411 * This value selects a CFA action to perform on the packet. Set this
412 * value to zero if no CFA action is desired. This value must be valid
413 * on the first BD of a packet.
418 * This value is action meta-data that defines CFA edit operations that
419 * are done in addition to any action editing.
421 /* When key=1, This is the VLAN tag VID value. */
422 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
423 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
424 /* When key=1, This is the VLAN tag DE value. */
425 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
426 /* When key=1, This is the VLAN tag PRI value. */
427 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
428 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
429 /* When key=1, This is the VLAN tag TPID select value. */
430 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
431 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
433 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
435 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
437 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
439 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
441 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
442 /* Value programmed in CFA VLANTPID register. */
443 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
444 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
445 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
446 /* When key=1, This is the VLAN tag TPID select value. */
447 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
448 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
450 * This field identifies the type of edit to be performed on the packet.
451 * This value must be valid on the first BD of a packet.
453 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
454 #define TX_BD_LONG_CFA_META_KEY_SFT 28
456 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
458 * - meta[17:16] - TPID select value (0 = 0x8100). - meta[15:12]
459 * - PRI/DE value. - meta[11:0] - VID value.
461 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
462 #define TX_BD_LONG_CFA_META_KEY_LAST TX_BD_LONG_CFA_META_KEY_VLAN_TAG
464 } __attribute__((packed));
466 /* RX Producer Packet BD (16 bytes) */
467 struct rx_prod_pkt_bd {
468 /* This value identifies the type of buffer descriptor. */
469 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
470 #define RX_PROD_PKT_BD_TYPE_SFT 0
472 * Indicates that this BD is 16B long and is an RX Producer (ie.
473 * empty) buffer descriptor.
475 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT (UINT32_C(0x4) << 0)
477 * If set to 1, the packet will be placed at the address plus 2B. The 2
478 * Bytes of padding will be written as zero.
481 * This is intended to be used when the host buffer is cache-line
482 * aligned to produce packets that are easy to parse in host memory
483 * while still allowing writes to be cache line aligned.
485 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
487 * If set to 1, the packet write will be padded out to the nearest
488 * cache-line with zero value padding.
491 * If receive buffers start/end on cache-line boundaries, this feature
492 * will ensure that all data writes on the PCI bus start/end on cache
495 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
497 * This value is the number of additional buffers in the ring that
498 * describe the buffer space to be consumed for the this packet. If the
499 * value is zero, then the packet must fit within the space described by
500 * this BD. If this value is 1 or more, it indicates how many additional
501 * "buffer" BDs are in the ring immediately following this BD to be used
502 * for the same network packet. Even if the packet to be placed does not
503 * need all the additional buffers, they will be consumed anyway.
505 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
506 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
507 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
508 #define RX_PROD_PKT_BD_FLAGS_SFT 6
512 * This is the length in Bytes of the host physical buffer where data
513 * for the packet may be placed in host memory.
516 * While this is a Byte resolution value, it is often advantageous to
517 * ensure that the buffers provided end on a host cache line.
522 * The opaque data field is pass through to the completion and can be
523 * used for any data that the driver wants to associate with this
524 * receive buffer set.
529 * This is the host physical address where data for the packet may by
530 * placed in host memory.
533 * While this is a Byte resolution value, it is often advantageous to
534 * ensure that the buffers provide start on a host cache line.
537 } __attribute__((packed));
539 /* Completion Ring Structures */
540 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
541 /* Base Completion Record (16 bytes) */
545 * This field indicates the exact type of the completion. By convention,
546 * the LSB identifies the length of the record in 16B units. Even values
547 * indicate 16B records. Odd values indicate 32B records.
549 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
550 #define CMPL_BASE_TYPE_SFT 0
551 /* TX L2 completion: Completion of TX packet. Length = 16B */
552 #define CMPL_BASE_TYPE_TX_L2 (UINT32_C(0x0) << 0)
554 * RX L2 completion: Completion of and L2 RX packet.
557 #define CMPL_BASE_TYPE_RX_L2 (UINT32_C(0x11) << 0)
559 * RX Aggregation Buffer completion : Completion of an L2
560 * aggregation buffer in support of TPA, HDS, or Jumbo packet
561 * completion. Length = 16B
563 #define CMPL_BASE_TYPE_RX_AGG (UINT32_C(0x12) << 0)
565 * RX L2 TPA Start Completion: Completion at the beginning of a
566 * TPA operation. Length = 32B
568 #define CMPL_BASE_TYPE_RX_TPA_START (UINT32_C(0x13) << 0)
570 * RX L2 TPA End Completion: Completion at the end of a TPA
571 * operation. Length = 32B
573 #define CMPL_BASE_TYPE_RX_TPA_END (UINT32_C(0x15) << 0)
575 * Statistics Ejection Completion: Completion of statistics data
576 * ejection buffer. Length = 16B
578 #define CMPL_BASE_TYPE_STAT_EJECT (UINT32_C(0x1a) << 0)
579 /* HWRM Command Completion: Completion of an HWRM command. */
580 #define CMPL_BASE_TYPE_HWRM_DONE (UINT32_C(0x20) << 0)
581 /* Forwarded HWRM Request */
582 #define CMPL_BASE_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
583 /* Forwarded HWRM Response */
584 #define CMPL_BASE_TYPE_HWRM_FWD_RESP (UINT32_C(0x24) << 0)
585 /* HWRM Asynchronous Event Information */
586 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT (UINT32_C(0x2e) << 0)
587 /* CQ Notification */
588 #define CMPL_BASE_TYPE_CQ_NOTIFICATION (UINT32_C(0x30) << 0)
589 /* SRQ Threshold Event */
590 #define CMPL_BASE_TYPE_SRQ_EVENT (UINT32_C(0x32) << 0)
591 /* DBQ Threshold Event */
592 #define CMPL_BASE_TYPE_DBQ_EVENT (UINT32_C(0x34) << 0)
593 /* QP Async Notification */
594 #define CMPL_BASE_TYPE_QP_EVENT (UINT32_C(0x38) << 0)
595 /* Function Async Notification */
596 #define CMPL_BASE_TYPE_FUNC_EVENT (UINT32_C(0x3a) << 0)
603 * This value is written by the NIC such that it will be different for
604 * each pass through the completion queue. The even passes will write 1.
605 * The odd passes will write 0.
607 #define CMPL_BASE_V UINT32_C(0x1)
609 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
610 #define CMPL_BASE_INFO3_SFT 1
614 } __attribute__((packed));
616 /* TX Completion Record (16 bytes) */
619 * This field indicates the exact type of the completion. By convention,
620 * the LSB identifies the length of the record in 16B units. Even values
621 * indicate 16B records. Odd values indicate 32B records.
623 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
624 #define TX_CMPL_TYPE_SFT 0
625 /* TX L2 completion: Completion of TX packet. Length = 16B */
626 #define TX_CMPL_TYPE_TX_L2 (UINT32_C(0x0) << 0)
628 * When this bit is '1', it indicates a packet that has an error of some
629 * type. Type of error is indicated in error_flags.
631 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
633 * When this bit is '1', it indicates that the packet completed was
634 * transmitted using the push acceleration data provided by the driver.
635 * When this bit is '0', it indicates that the packet had not push
636 * acceleration data written or was executed as a normal packet even
637 * though push data was provided.
639 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
640 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
641 #define TX_CMPL_FLAGS_SFT 6
647 * This is a copy of the opaque field from the first TX BD of this
648 * transmitted packet.
653 * This value is written by the NIC such that it will be different for
654 * each pass through the completion queue. The even passes will write 1.
655 * The odd passes will write 0.
657 #define TX_CMPL_V UINT32_C(0x1)
659 * This error indicates that there was some sort of problem with the BDs
662 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
663 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
665 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
666 /* Bad Format: BDs were not formatted correctly. */
667 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
668 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
669 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
671 * When this bit is '1', it indicates that the length of the packet was
672 * zero. No packet was transmitted.
674 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
676 * When this bit is '1', it indicates that the packet was longer than
677 * the programmed limit in TDI. No packet was transmitted.
679 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
681 * When this bit is '1', it indicates that one or more of the BDs
682 * associated with this packet generated a PCI error. This probably
683 * means the address was not valid.
685 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
687 * When this bit is '1', it indicates that the packet was longer than
688 * indicated by the hint. No packet was transmitted.
690 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
692 * When this bit is '1', it indicates that the packet was dropped due to
693 * Poison TLP error on one or more of the TLPs in the PXP completion.
695 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
696 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
697 #define TX_CMPL_ERRORS_SFT 1
702 } __attribute__((packed)) tx_cmpl_t, *ptx_cmpl_t;
704 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
707 * This field indicates the exact type of the completion. By convention,
708 * the LSB identifies the length of the record in 16B units. Even values
709 * indicate 16B records. Odd values indicate 32B records.
711 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
712 #define RX_PKT_CMPL_TYPE_SFT 0
714 * RX L2 completion: Completion of and L2 RX packet.
717 #define RX_PKT_CMPL_TYPE_RX_L2 (UINT32_C(0x11) << 0)
719 * When this bit is '1', it indicates a packet that has an error of some
720 * type. Type of error is indicated in error_flags.
722 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
723 /* This field indicates how the packet was placed in the buffer. */
724 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
725 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
726 /* Normal: Packet was placed using normal algorithm. */
727 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
728 /* Jumbo: Packet was placed using jumbo algorithm. */
729 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
731 * Header/Data Separation: Packet was placed using Header/Data
732 * separation algorithm. The separation location is indicated by
735 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
736 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
737 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
738 /* This bit is '1' if the RSS field in this completion is valid. */
739 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
741 * This value indicates what the inner packet determined for the packet
744 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
745 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
746 /* Not Known: Indicates that the packet type was not known. */
747 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
749 * IP Packet: Indicates that the packet was an IP packet, but
750 * further classification was not possible.
752 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
754 * TCP Packet: Indicates that the packet was IP and TCP. This
755 * indicates that the payload_offset field is valid.
757 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
759 * UDP Packet: Indicates that the packet was IP and UDP. This
760 * indicates that the payload_offset field is valid.
762 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
764 * FCoE Packet: Indicates that the packet was recognized as a
765 * FCoE. This also indicates that the payload_offset field is
768 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
770 * RoCE Packet: Indicates that the packet was recognized as a
771 * RoCE. This also indicates that the payload_offset field is
774 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
776 * ICMP Packet: Indicates that the packet was recognized as
777 * ICMP. This indicates that the payload_offset field is valid.
779 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
781 * PtP packet wo/timestamp: Indicates that the packet was
782 * recognized as a PtP packet.
784 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP \
785 (UINT32_C(0x8) << 12)
787 * PtP packet w/timestamp: Indicates that the packet was
788 * recognized as a PtP packet and that a timestamp was taken for
791 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
792 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
793 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
794 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
795 #define RX_PKT_CMPL_FLAGS_SFT 6
799 * This is the length of the data for the packet stored in the buffer(s)
800 * identified by the opaque value. This includes the packet BD and any
801 * associated buffer BDs. This does not include the the length of any
802 * data places in aggregation BDs.
807 * This is a copy of the opaque field from the RX BD this completion
813 * This value is written by the NIC such that it will be different for
814 * each pass through the completion queue. The even passes will write 1.
815 * The odd passes will write 0.
817 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
819 * This value is the number of aggregation buffers that follow this
820 * entry in the completion ring that are a part of this packet. If the
821 * value is zero, then the packet is completely contained in the buffer
822 * space provided for the packet in the RX ring.
824 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
825 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
829 * This is the RSS hash type for the packet. The value is packed
830 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}.
832 uint8_t rss_hash_type;
835 * This value indicates the offset from the beginning of the packet
836 * where the inner payload starts. This value is valid for TCP, UDP,
837 * FCoE, and RoCE packets.
839 uint8_t payload_offset;
844 * This value is the RSS hash value calculated for the packet based on
845 * the mode bits and key value in the VNIC.
848 } __attribute__((packed));
850 /* last 16 bytes of RX Packet Completion Record */
851 struct rx_pkt_cmpl_hi {
853 * This indicates that the ip checksum was calculated for the inner
854 * packet and that the ip_cs_error field indicates if there was an
857 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
859 * This indicates that the TCP, UDP or ICMP checksum was calculated for
860 * the inner packet and that the l4_cs_error field indicates if there
863 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
865 * This indicates that the ip checksum was calculated for the tunnel
866 * header and that the t_ip_cs_error field indicates if there was an
869 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
871 * This indicates that the UDP checksum was calculated for the tunnel
872 * packet and that the t_l4_cs_error field indicates if there was an
875 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
876 /* This value indicates what format the metadata field is. */
877 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
878 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
879 /* No metadata informtaion. Value is zero. */
880 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
882 * The metadata field contains the VLAN tag and TPID value. -
883 * metadata[11:0] contains the vlan VID value. - metadata[12]
884 * contains the vlan DE value. - metadata[15:13] contains the
885 * vlan PRI value. - metadata[31:16] contains the vlan TPID
888 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
889 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
890 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
892 * This field indicates the IP type for the inner-most IP header. A
893 * value of '0' indicates IPv4. A value of '1' indicates IPv6. This
894 * value is only valid if itype indicates a packet with an IP header.
896 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
900 * This is data from the CFA block as indicated by the meta_format
903 /* When meta_format=1, this value is the VLAN VID. */
904 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
905 #define RX_PKT_CMPL_METADATA_VID_SFT 0
906 /* When meta_format=1, this value is the VLAN DE. */
907 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
908 /* When meta_format=1, this value is the VLAN PRI. */
909 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
910 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
911 /* When meta_format=1, this value is the VLAN TPID. */
912 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
913 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
917 * This value is written by the NIC such that it will be different for
918 * each pass through the completion queue. The even passes will write 1.
919 * The odd passes will write 0.
921 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
923 * This error indicates that there was some sort of problem with the BDs
924 * for the packet that was found after part of the packet was already
925 * placed. The packet should be treated as invalid.
927 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
928 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
929 /* No buffer error */
930 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER \
933 * Did Not Fit: Packet did not fit into packet buffer provided.
934 * For regular placement, this means the packet did not fit in
935 * the buffer provided. For HDS and jumbo placement, this means
936 * that the packet could not be placed into 7 physical buffers
939 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
942 * Not On Chip: All BDs needed for the packet were not on-chip
943 * when the packet arrived.
945 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
947 /* Bad Format: BDs were not formatted correctly. */
948 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
950 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
951 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
952 /* This indicates that there was an error in the IP header checksum. */
953 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
955 * This indicates that there was an error in the TCP, UDP or ICMP
958 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
960 * This indicates that there was an error in the tunnel IP header
963 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
964 /* This indicates that there was an error in the tunnel UDP checksum. */
965 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
967 * This indicates that there was a CRC error on either an FCoE or RoCE
968 * packet. The itype indicates the packet type.
970 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
972 * This indicates that there was an error in the tunnel portion of the
973 * packet when this field is non-zero.
975 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
976 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
978 * No additional error occurred on the tunnel portion of the
979 * packet of the packet does not have a tunnel.
981 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
983 * Indicates that IP header version does not match expectation
984 * from L2 Ethertype for IPv4 and IPv6 in the tunnel header.
986 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
989 * Indicates that header length is out of range in the tunnel
990 * header. Valid for IPv4.
992 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
995 * Indicates that the physical packet is shorter than that
996 * claimed by the PPPoE header length for a tunnel PPPoE packet.
998 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1001 * Indicates that physical packet is shorter than that claimed
1002 * by the tunnel l3 header length. Valid for IPv4, or IPv6
1003 * tunnel packet packets.
1005 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1006 (UINT32_C(0x4) << 9)
1008 * Indicates that the physical packet is shorter than that
1009 * claimed by the tunnel UDP header length for a tunnel UDP
1010 * packet that is not fragmented.
1012 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1013 (UINT32_C(0x5) << 9)
1015 * indicates that the IPv4 TTL or IPv6 hop limit check have
1016 * failed (e.g. TTL = 0) in the tunnel header. Valid for IPv4,
1019 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1020 (UINT32_C(0x6) << 9)
1021 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1022 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1024 * This indicates that there was an error in the inner portion of the
1025 * packet when this field is non-zero.
1027 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1028 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1030 * No additional error occurred on the tunnel portion of the
1031 * packet of the packet does not have a tunnel.
1033 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1035 * Indicates that IP header version does not match expectation
1036 * from L2 Ethertype for IPv4 and IPv6 or that option other than
1037 * VFT was parsed on FCoE packet.
1039 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1040 (UINT32_C(0x1) << 12)
1042 * indicates that header length is out of range. Valid for IPv4
1045 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1046 (UINT32_C(0x2) << 12)
1048 * indicates that the IPv4 TTL or IPv6 hop limit check have
1049 * failed (e.g. TTL = 0). Valid for IPv4, and IPv6
1051 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1053 * Indicates that physical packet is shorter than that claimed
1054 * by the l3 header length. Valid for IPv4, IPv6 packet or RoCE
1057 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1058 (UINT32_C(0x4) << 12)
1060 * Indicates that the physical packet is shorter than that
1061 * claimed by the UDP header length for a UDP packet that is not
1064 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1065 (UINT32_C(0x5) << 12)
1067 * Indicates that TCP header length > IP payload. Valid for TCP
1070 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1071 (UINT32_C(0x6) << 12)
1072 /* Indicates that TCP header length < 5. Valid for TCP. */
1073 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1074 (UINT32_C(0x7) << 12)
1076 * Indicates that TCP option headers result in a TCP header size
1077 * that does not match data offset in TCP header. Valid for TCP.
1079 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1080 (UINT32_C(0x8) << 12)
1081 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1082 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1083 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1084 #define RX_PKT_CMPL_ERRORS_SFT 1
1088 * This field identifies the CFA action rule that was used for this
1094 * This value holds the reordering sequence number for the packet. If
1095 * the reordering sequence is not valid, then this value is zero. The
1096 * reordering domain for the packet is in the bottom 8 to 10b of the
1097 * rss_hash value. The bottom 20b of this value contain the ordering
1098 * domain value for the packet.
1100 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1101 #define RX_PKT_CMPL_REORDER_SFT 0
1103 } __attribute__((packed));
1105 /* HWRM Forwarded Request (16 bytes) */
1106 struct hwrm_fwd_req_cmpl {
1107 /* Length of forwarded request in bytes. */
1109 * This field indicates the exact type of the completion. By convention,
1110 * the LSB identifies the length of the record in 16B units. Even values
1111 * indicate 16B records. Odd values indicate 32B records.
1113 #define HWRM_FWD_REQ_CMPL_TYPE_MASK UINT32_C(0x3f)
1114 #define HWRM_FWD_REQ_CMPL_TYPE_SFT 0
1115 /* Forwarded HWRM Request */
1116 #define HWRM_FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ (UINT32_C(0x22) << 0)
1117 /* Length of forwarded request in bytes. */
1118 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1119 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1120 uint16_t req_len_type;
1123 * Source ID of this request. Typically used in forwarding requests and
1124 * responses. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 - 0xFFFE -
1125 * Reserved for internal processors 0xFFFF - HWRM
1131 /* Address of forwarded request. */
1133 * This value is written by the NIC such that it will be different for
1134 * each pass through the completion queue. The even passes will write 1.
1135 * The odd passes will write 0.
1137 #define HWRM_FWD_REQ_CMPL_V UINT32_C(0x1)
1138 /* Address of forwarded request. */
1139 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1140 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1141 uint64_t req_buf_addr_v;
1142 } __attribute__((packed));
1144 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1145 struct hwrm_async_event_cmpl {
1147 * This field indicates the exact type of the completion. By convention,
1148 * the LSB identifies the length of the record in 16B units. Even values
1149 * indicate 16B records. Odd values indicate 32B records.
1151 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1152 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1153 /* HWRM Asynchronous Event Information */
1154 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT \
1155 (UINT32_C(0x2e) << 0)
1158 /* Identifiers of events. */
1159 /* Link status changed */
1160 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE \
1161 (UINT32_C(0x0) << 0)
1162 /* Link MTU changed */
1163 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE \
1164 (UINT32_C(0x1) << 0)
1165 /* Link speed changed */
1166 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE \
1167 (UINT32_C(0x2) << 0)
1168 /* DCB Configuration changed */
1169 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE \
1170 (UINT32_C(0x3) << 0)
1171 /* Port connection not allowed */
1172 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED \
1173 (UINT32_C(0x4) << 0)
1174 /* Link speed configuration was not allowed */
1175 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1176 (UINT32_C(0x5) << 0)
1177 /* Function driver unloaded */
1178 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD \
1179 (UINT32_C(0x10) << 0)
1180 /* Function driver loaded */
1181 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD \
1182 (UINT32_C(0x11) << 0)
1183 /* PF driver unloaded */
1184 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD \
1185 (UINT32_C(0x20) << 0)
1186 /* PF driver loaded */
1187 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD \
1188 (UINT32_C(0x21) << 0)
1189 /* VF Function Level Reset (FLR) */
1190 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR (UINT32_C(0x30) << 0)
1191 /* VF MAC Address Change */
1192 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE \
1193 (UINT32_C(0x31) << 0)
1194 /* PF-VF communication channel status change. */
1195 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1196 (UINT32_C(0x32) << 0)
1198 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR \
1199 (UINT32_C(0xff) << 0)
1202 /* Event specific data */
1203 uint32_t event_data2;
1207 * This value is written by the NIC such that it will be different for
1208 * each pass through the completion queue. The even passes will write 1.
1209 * The odd passes will write 0.
1211 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1213 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1214 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1217 /* 8-lsb timestamp from POR (100-msec resolution) */
1218 uint8_t timestamp_lo;
1220 /* 16-lsb timestamp from POR (100-msec resolution) */
1221 uint16_t timestamp_hi;
1223 /* Event specific data */
1224 uint32_t event_data1;
1225 } __attribute__((packed));
1228 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
1229 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
1230 * processors inside the chip. This firmware is vital part of the chip's
1231 * hardware. The chip can not be used by driver without it.
1234 /* Input (16 bytes) */
1237 * This value indicates what type of request this is. The format for the
1238 * rest of the command is determined by this field.
1243 * This value indicates the what completion ring the request will be
1244 * optionally completed on. If the value is -1, then no CR completion
1245 * will be generated. Any other value must be a valid CR ring_id value
1246 * for this function.
1250 /* This value indicates the command sequence number. */
1254 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1255 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1260 * This is the host address where the response will be written when the
1261 * request is complete. This area must be 16B aligned and must be
1262 * cleared to zero before the request is made.
1265 } __attribute__((packed));
1267 /* Output (8 bytes) */
1270 * Pass/Fail or error type Note: receiver to verify the in parameters,
1271 * and fail the call with an error when appropriate
1273 uint16_t error_code;
1275 /* This field returns the type of original request. */
1278 /* This field provides original sequence number of the command. */
1282 * This field is the length of the response in bytes. The last byte of
1283 * the response is a valid flag that will read as '1' when the command
1284 * has been completely written to memory.
1287 } __attribute__((packed));
1289 /* hwrm_cfa_l2_filter_alloc */
1291 * A filter is used to identify traffic that contains a matching set of
1292 * parameters like unicast or broadcast MAC address or a VLAN tag amongst
1293 * other things which then allows the ASIC to direct the incoming traffic
1294 * to an appropriate VNIC or Rx ring.
1297 /* Input (96 bytes) */
1298 struct hwrm_cfa_l2_filter_alloc_input {
1300 * This value indicates what type of request this is. The format for the
1301 * rest of the command is determined by this field.
1306 * This value indicates the what completion ring the request will be
1307 * optionally completed on. If the value is -1, then no CR completion
1308 * will be generated. Any other value must be a valid CR ring_id value
1309 * for this function.
1313 /* This value indicates the command sequence number. */
1317 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1318 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1323 * This is the host address where the response will be written when the
1324 * request is complete. This area must be 16B aligned and must be
1325 * cleared to zero before the request is made.
1330 * Enumeration denoting the RX, TX type of the resource. This
1331 * enumeration is used for resources that are similar for both TX and RX
1332 * paths of the chip.
1334 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH \
1337 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
1338 (UINT32_C(0x0) << 0)
1340 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
1341 (UINT32_C(0x1) << 0)
1342 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
1343 HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
1345 * Setting of this flag indicates the applicability to the loopback
1348 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
1351 * Setting of this flag indicates drop action. If this flag is not set,
1352 * then it should be considered accept action.
1354 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP \
1357 * If this flag is set, all t_l2_* fields are invalid and they should
1358 * not be specified. If this flag is set, then l2_* fields refer to
1359 * fields of outermost L2 header.
1361 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST \
1365 /* This bit must be '1' for the l2_addr field to be configured. */
1366 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR \
1368 /* This bit must be '1' for the l2_addr_mask field to be configured. */
1369 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
1371 /* This bit must be '1' for the l2_ovlan field to be configured. */
1372 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN \
1374 /* This bit must be '1' for the l2_ovlan_mask field to be configured. */
1375 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
1377 /* This bit must be '1' for the l2_ivlan field to be configured. */
1378 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN \
1380 /* This bit must be '1' for the l2_ivlan_mask field to be configured. */
1381 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
1383 /* This bit must be '1' for the t_l2_addr field to be configured. */
1384 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR \
1387 * This bit must be '1' for the t_l2_addr_mask field to be configured.
1389 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
1391 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
1392 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
1395 * This bit must be '1' for the t_l2_ovlan_mask field to be configured.
1397 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
1399 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
1400 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
1403 * This bit must be '1' for the t_l2_ivlan_mask field to be configured.
1405 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
1407 /* This bit must be '1' for the src_type field to be configured. */
1408 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE \
1410 /* This bit must be '1' for the src_id field to be configured. */
1411 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID \
1413 /* This bit must be '1' for the tunnel_type field to be configured. */
1414 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
1416 /* This bit must be '1' for the dst_id field to be configured. */
1417 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
1420 * This bit must be '1' for the mirror_vnic_id field to be configured.
1422 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
1427 * This value sets the match value for the L2 MAC address. Destination
1428 * MAC address for RX path. Source MAC address for TX path.
1436 * This value sets the mask value for the L2 address. A value of 0 will
1437 * mask the corresponding bit from compare.
1439 uint8_t l2_addr_mask[6];
1441 /* This value sets VLAN ID value for outer VLAN. */
1445 * This value sets the mask value for the ovlan id. A value of 0 will
1446 * mask the corresponding bit from compare.
1448 uint16_t l2_ovlan_mask;
1450 /* This value sets VLAN ID value for inner VLAN. */
1454 * This value sets the mask value for the ivlan id. A value of 0 will
1455 * mask the corresponding bit from compare.
1457 uint16_t l2_ivlan_mask;
1463 * This value sets the match value for the tunnel L2 MAC address.
1464 * Destination MAC address for RX path. Source MAC address for TX path.
1466 uint8_t t_l2_addr[6];
1472 * This value sets the mask value for the tunnel L2 address. A value of
1473 * 0 will mask the corresponding bit from compare.
1475 uint8_t t_l2_addr_mask[6];
1477 /* This value sets VLAN ID value for tunnel outer VLAN. */
1478 uint16_t t_l2_ovlan;
1481 * This value sets the mask value for the tunnel ovlan id. A value of 0
1482 * will mask the corresponding bit from compare.
1484 uint16_t t_l2_ovlan_mask;
1486 /* This value sets VLAN ID value for tunnel inner VLAN. */
1487 uint16_t t_l2_ivlan;
1490 * This value sets the mask value for the tunnel ivlan id. A value of 0
1491 * will mask the corresponding bit from compare.
1493 uint16_t t_l2_ivlan_mask;
1495 /* This value identifies the type of source of the packet. */
1497 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT \
1498 (UINT32_C(0x0) << 0)
1499 /* Physical function */
1500 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF \
1501 (UINT32_C(0x1) << 0)
1502 /* Virtual function */
1503 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF \
1504 (UINT32_C(0x2) << 0)
1505 /* Virtual NIC of a function */
1506 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC \
1507 (UINT32_C(0x3) << 0)
1508 /* Embedded processor for CFA management */
1509 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG \
1510 (UINT32_C(0x4) << 0)
1511 /* Embedded processor for OOB management */
1512 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE \
1513 (UINT32_C(0x5) << 0)
1514 /* Embedded processor for RoCE */
1515 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO \
1516 (UINT32_C(0x6) << 0)
1517 /* Embedded processor for network proxy functions */
1518 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG \
1519 (UINT32_C(0x7) << 0)
1524 * This value is the id of the source. For a network port, it represents
1525 * port_id. For a physical function, it represents fid. For a virtual
1526 * function, it represents vf_id. For a vnic, it represents vnic_id. For
1527 * embedded processors, this id is not valid. Notes: 1. The function ID
1528 * is implied if it src_id is not provided for a src_type that is either
1534 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
1535 (UINT32_C(0x0) << 0)
1536 /* Virtual eXtensible Local Area Network (VXLAN) */
1537 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
1538 (UINT32_C(0x1) << 0)
1540 * Network Virtualization Generic Routing Encapsulation (NVGRE)
1542 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
1543 (UINT32_C(0x2) << 0)
1545 * Generic Routing Encapsulation (GRE) inside Ethernet payload
1547 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
1548 (UINT32_C(0x3) << 0)
1550 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
1551 (UINT32_C(0x4) << 0)
1552 /* Generic Network Virtualization Encapsulation (Geneve) */
1553 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
1554 (UINT32_C(0x5) << 0)
1555 /* Multi-Protocol Lable Switching (MPLS) */
1556 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
1557 (UINT32_C(0x6) << 0)
1558 /* Stateless Transport Tunnel (STT) */
1559 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT \
1560 (UINT32_C(0x7) << 0)
1562 * Generic Routing Encapsulation (GRE) inside IP datagram
1565 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
1566 (UINT32_C(0x8) << 0)
1567 /* Any tunneled traffic */
1568 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
1569 (UINT32_C(0xff) << 0)
1570 uint8_t tunnel_type;
1575 * If set, this value shall represent the Logical VNIC ID of the
1576 * destination VNIC for the RX path and network port id of the
1577 * destination port for the TX path.
1581 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
1582 uint16_t mirror_vnic_id;
1585 * This hint is provided to help in placing the filter in the filter
1589 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
1590 (UINT32_C(0x0) << 0)
1591 /* Above the given filter */
1592 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
1593 (UINT32_C(0x1) << 0)
1594 /* Below the given filter */
1595 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
1596 (UINT32_C(0x2) << 0)
1597 /* As high as possible */
1598 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX \
1599 (UINT32_C(0x3) << 0)
1600 /* As low as possible */
1601 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN \
1602 (UINT32_C(0x4) << 0)
1609 * This is the ID of the filter that goes along with the pri_hint. This
1610 * field is valid only for the following values. 1 - Above the given
1611 * filter 2 - Below the given filter
1613 uint64_t l2_filter_id_hint;
1614 } __attribute__((packed));
1616 /* Output (24 bytes) */
1617 struct hwrm_cfa_l2_filter_alloc_output {
1619 * Pass/Fail or error type Note: receiver to verify the in parameters,
1620 * and fail the call with an error when appropriate
1622 uint16_t error_code;
1624 /* This field returns the type of original request. */
1627 /* This field provides original sequence number of the command. */
1631 * This field is the length of the response in bytes. The last byte of
1632 * the response is a valid flag that will read as '1' when the command
1633 * has been completely written to memory.
1638 * This value identifies a set of CFA data structures used for an L2
1641 uint64_t l2_filter_id;
1644 * This is the ID of the flow associated with this filter. This value
1645 * shall be used to match and associate the flow identifier returned in
1646 * completion records. A value of 0xFFFFFFFF shall indicate no flow id.
1655 * This field is used in Output records to indicate that the output is
1656 * completely written to RAM. This field should be read as '1' to
1657 * indicate that the output has been completely written. When writing a
1658 * command completion or response to an internal processor, the order of
1659 * writes has to be such that this field is written last.
1662 } __attribute__((packed));
1664 /* hwrm_cfa_l2_filter_free */
1666 * Description: Free a L2 filter. The HWRM shall free all associated filter
1667 * resources with the L2 filter.
1670 /* Input (24 bytes) */
1671 struct hwrm_cfa_l2_filter_free_input {
1673 * This value indicates what type of request this is. The format for the
1674 * rest of the command is determined by this field.
1679 * This value indicates the what completion ring the request will be
1680 * optionally completed on. If the value is -1, then no CR completion
1681 * will be generated. Any other value must be a valid CR ring_id value
1682 * for this function.
1686 /* This value indicates the command sequence number. */
1690 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1691 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1696 * This is the host address where the response will be written when the
1697 * request is complete. This area must be 16B aligned and must be
1698 * cleared to zero before the request is made.
1703 * This value identifies a set of CFA data structures used for an L2
1706 uint64_t l2_filter_id;
1707 } __attribute__((packed));
1709 /* Output (16 bytes) */
1710 struct hwrm_cfa_l2_filter_free_output {
1712 * Pass/Fail or error type Note: receiver to verify the in parameters,
1713 * and fail the call with an error when appropriate
1715 uint16_t error_code;
1717 /* This field returns the type of original request. */
1720 /* This field provides original sequence number of the command. */
1724 * This field is the length of the response in bytes. The last byte of
1725 * the response is a valid flag that will read as '1' when the command
1726 * has been completely written to memory.
1736 * This field is used in Output records to indicate that the output is
1737 * completely written to RAM. This field should be read as '1' to
1738 * indicate that the output has been completely written. When writing a
1739 * command completion or response to an internal processor, the order of
1740 * writes has to be such that this field is written last.
1743 } __attribute__((packed));
1745 /* hwrm_cfa_l2_set_rx_mask */
1746 /* Description: This command will set rx mask of the function. */
1748 /* Input (40 bytes) */
1749 struct hwrm_cfa_l2_set_rx_mask_input {
1751 * This value indicates what type of request this is. The format for the
1752 * rest of the command is determined by this field.
1757 * This value indicates the what completion ring the request will be
1758 * optionally completed on. If the value is -1, then no CR completion
1759 * will be generated. Any other value must be a valid CR ring_id value
1760 * for this function.
1764 /* This value indicates the command sequence number. */
1768 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1769 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1774 * This is the host address where the response will be written when the
1775 * request is complete. This area must be 16B aligned and must be
1776 * cleared to zero before the request is made.
1783 /* Reserved for future use. */
1784 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
1786 * When this bit is '1', the function is requested to accept multi-cast
1787 * packets specified by the multicast addr table.
1789 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
1791 * When this bit is '1', the function is requested to accept all multi-
1794 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
1796 * When this bit is '1', the function is requested to accept broadcast
1799 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
1801 * When this bit is '1', the function is requested to be put in the
1802 * promiscuous mode. The HWRM should accept any function to set up
1803 * promiscuous mode. The HWRM shall follow the semantics below for the
1804 * promiscuous mode support. # When partitioning is not enabled on a
1805 * port (i.e. single PF on the port), then the PF shall be allowed to be
1806 * in the promiscuous mode. When the PF is in the promiscuous mode, then
1807 * it shall receive all host bound traffic on that port. # When
1808 * partitioning is enabled on a port (i.e. multiple PFs per port) and a
1809 * PF on that port is in the promiscuous mode, then the PF receives all
1810 * traffic within that partition as identified by a unique identifier
1811 * for the PF (e.g. S-Tag). If a unique outer VLAN for the PF is
1812 * specified, then the setting of promiscuous mode on that PF shall
1813 * result in the PF receiving all host bound traffic with matching outer
1814 * VLAN. # A VF shall can be set in the promiscuous mode. In the
1815 * promiscuous mode, the VF does not receive any traffic unless a unique
1816 * outer VLAN for the VF is specified. If a unique outer VLAN for the VF
1817 * is specified, then the setting of promiscuous mode on that VF shall
1818 * result in the VF receiving all host bound traffic with the matching
1819 * outer VLAN. # The HWRM shall allow the setting of promiscuous mode on
1820 * a function independently from the promiscuous mode settings on other
1823 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
1825 * If this flag is set, the corresponding RX filters shall be set up to
1826 * cover multicast/broadcast filters for the outermost Layer 2
1827 * destination MAC address field.
1829 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
1832 /* This is the address for mcast address tbl. */
1833 uint64_t mc_tbl_addr;
1836 * This value indicates how many entries in mc_tbl are valid. Each entry
1839 uint32_t num_mc_entries;
1842 } __attribute__((packed));
1844 /* Output (16 bytes) */
1845 struct hwrm_cfa_l2_set_rx_mask_output {
1847 * Pass/Fail or error type Note: receiver to verify the in parameters,
1848 * and fail the call with an error when appropriate
1850 uint16_t error_code;
1852 /* This field returns the type of original request. */
1855 /* This field provides original sequence number of the command. */
1859 * This field is the length of the response in bytes. The last byte of
1860 * the response is a valid flag that will read as '1' when the command
1861 * has been completely written to memory.
1871 * This field is used in Output records to indicate that the output is
1872 * completely written to RAM. This field should be read as '1' to
1873 * indicate that the output has been completely written. When writing a
1874 * command completion or response to an internal processor, the order of
1875 * writes has to be such that this field is written last.
1878 } __attribute__((packed));
1880 /* hwrm_exec_fwd_resp */
1882 * Description: This command is used to send an encapsulated request to the
1883 * HWRM. This command instructs the HWRM to execute the request and forward the
1884 * response of the encapsulated request to the location specified in the
1885 * original request that is encapsulated. The target id of this command shall be
1886 * set to 0xFFFF (HWRM). The response location in this command shall be used to
1887 * acknowledge the receipt of the encapsulated request and forwarding of the
1891 /* Input (128 bytes) */
1892 struct hwrm_exec_fwd_resp_input {
1894 * This value indicates what type of request this is. The format for the
1895 * rest of the command is determined by this field.
1900 * This value indicates the what completion ring the request will be
1901 * optionally completed on. If the value is -1, then no CR completion
1902 * will be generated. Any other value must be a valid CR ring_id value
1903 * for this function.
1907 /* This value indicates the command sequence number. */
1911 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
1912 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1917 * This is the host address where the response will be written when the
1918 * request is complete. This area must be 16B aligned and must be
1919 * cleared to zero before the request is made.
1924 * This is an encapsulated request. This request should be executed by
1925 * the HWRM and the response should be provided in the response buffer
1926 * inside the encapsulated request.
1928 uint32_t encap_request[26];
1931 * This value indicates the target id of the response to the
1932 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids 0xFFF8 -
1933 * 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
1935 uint16_t encap_resp_target_id;
1937 uint16_t unused_0[3];
1938 } __attribute__((packed));
1940 /* Output (16 bytes) */
1941 struct hwrm_exec_fwd_resp_output {
1943 * Pass/Fail or error type Note: receiver to verify the in parameters,
1944 * and fail the call with an error when appropriate
1946 uint16_t error_code;
1948 /* This field returns the type of original request. */
1951 /* This field provides original sequence number of the command. */
1955 * This field is the length of the response in bytes. The last byte of
1956 * the response is a valid flag that will read as '1' when the command
1957 * has been completely written to memory.
1967 * This field is used in Output records to indicate that the output is
1968 * completely written to RAM. This field should be read as '1' to
1969 * indicate that the output has been completely written. When writing a
1970 * command completion or response to an internal processor, the order of
1971 * writes has to be such that this field is written last.
1974 } __attribute__((packed));
1976 /* hwrm_func_qcaps */
1978 * Description: This command returns capabilities of a function. The input FID
1979 * value is used to indicate what function is being queried. This allows a
1980 * physical function driver to query virtual functions that are children of the
1981 * physical function. The output FID value is needed to configure Rings and
1982 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
1985 /* Input (24 bytes) */
1986 struct hwrm_func_qcaps_input {
1988 * This value indicates what type of request this is. The format for the
1989 * rest of the command is determined by this field.
1994 * This value indicates the what completion ring the request will be
1995 * optionally completed on. If the value is -1, then no CR completion
1996 * will be generated. Any other value must be a valid CR ring_id value
1997 * for this function.
2001 /* This value indicates the command sequence number. */
2005 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2006 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2011 * This is the host address where the response will be written when the
2012 * request is complete. This area must be 16B aligned and must be
2013 * cleared to zero before the request is made.
2018 * Function ID of the function that is being queried. 0xFF... (All Fs)
2019 * if the query is for the requesting function.
2023 uint16_t unused_0[3];
2024 } __attribute__((packed));
2026 /* Output (80 bytes) */
2027 struct hwrm_func_qcaps_output {
2028 uint16_t error_code;
2030 * Pass/Fail or error type Note: receiver to verify the in
2031 * parameters, and fail the call with an error when appropriate
2034 /* This field returns the type of original request. */
2036 /* This field provides original sequence number of the command. */
2039 * This field is the length of the response in bytes. The last
2040 * byte of the response is a valid flag that will read as '1'
2041 * when the command has been completely written to memory.
2045 * FID value. This value is used to identify operations on the
2046 * PCI bus as belonging to a particular PCI function.
2050 * Port ID of port that this function is associated with. Valid
2051 * only for the PF. 0xFF... (All Fs) if this function is not
2052 * associated with any port. 0xFF... (All Fs) if this function
2053 * is called from a VF.
2056 /* If 1, then Push mode is supported on this function. */
2057 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2059 * If 1, then the global MSI-X auto-masking is enabled for the
2062 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING UINT32_C(0x2)
2064 * If 1, then the Precision Time Protocol (PTP) processing is
2065 * supported on this function. The HWRM should enable PTP on
2066 * only a single Physical Function (PF) per port.
2068 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2070 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2071 * supported on this function.
2073 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2075 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2076 * supported on this function.
2078 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2080 * If 1, then control and configuration of WoL magic packet are
2081 * supported on this function.
2083 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED UINT32_C(0x20)
2085 * If 1, then control and configuration of bitmap pattern packet
2086 * are supported on this function.
2088 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2090 * If set to 1, then the control and configuration of rate limit
2091 * of an allocated TX ring on the queried function is supported.
2093 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2095 * If 1, then control and configuration of minimum and maximum
2096 * bandwidths are supported on the queried function.
2098 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2100 * If the query is for a VF, then this flag shall be ignored. If
2101 * this query is for a PF and this flag is set to 1, then the PF
2102 * has the capability to set the rate limits on the TX rings of
2103 * its children VFs. If this query is for a PF and this flag is
2104 * set to 0, then the PF does not have the capability to set the
2105 * rate limits on the TX rings of its children VFs.
2107 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED UINT32_C(0x200)
2109 * If the query is for a VF, then this flag shall be ignored. If
2110 * this query is for a PF and this flag is set to 1, then the PF
2111 * has the capability to set the minimum and/or maximum
2112 * bandwidths for its children VFs. If this query is for a PF
2113 * and this flag is set to 0, then the PF does not have the
2114 * capability to set the minimum or maximum bandwidths for its
2117 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2118 uint8_t mac_address[6];
2120 * This value is current MAC address configured for this
2121 * function. A value of 00-00-00-00-00-00 indicates no MAC
2122 * address is currently configured.
2124 uint16_t max_rsscos_ctx;
2126 * The maximum number of RSS/COS contexts that can be allocated
2129 uint16_t max_cmpl_rings;
2131 * The maximum number of completion rings that can be allocated
2134 uint16_t max_tx_rings;
2136 * The maximum number of transmit rings that can be allocated to
2139 uint16_t max_rx_rings;
2141 * The maximum number of receive rings that can be allocated to
2144 uint16_t max_l2_ctxs;
2146 * The maximum number of L2 contexts that can be allocated to
2151 * The maximum number of VNICs that can be allocated to the
2154 uint16_t first_vf_id;
2156 * The identifier for the first VF enabled on a PF. This is
2157 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2158 * this command is called on a PF with SR-IOV disabled or on a
2163 * The maximum number of VFs that can be allocated to the
2164 * function. This is valid only on the PF with SR-IOV enabled.
2165 * 0xFF... (All Fs) if this command is called on a PF with SR-
2166 * IOV disabled or on a VF.
2168 uint16_t max_stat_ctx;
2170 * The maximum number of statistic contexts that can be
2171 * allocated to the function.
2173 uint32_t max_encap_records;
2175 * The maximum number of Encapsulation records that can be
2176 * offloaded by this function.
2178 uint32_t max_decap_records;
2180 * The maximum number of decapsulation records that can be
2181 * offloaded by this function.
2183 uint32_t max_tx_em_flows;
2185 * The maximum number of Exact Match (EM) flows that can be
2186 * offloaded by this function on the TX side.
2188 uint32_t max_tx_wm_flows;
2190 * The maximum number of Wildcard Match (WM) flows that can be
2191 * offloaded by this function on the TX side.
2193 uint32_t max_rx_em_flows;
2195 * The maximum number of Exact Match (EM) flows that can be
2196 * offloaded by this function on the RX side.
2198 uint32_t max_rx_wm_flows;
2200 * The maximum number of Wildcard Match (WM) flows that can be
2201 * offloaded by this function on the RX side.
2203 uint32_t max_mcast_filters;
2205 * The maximum number of multicast filters that can be supported
2206 * by this function on the RX side.
2208 uint32_t max_flow_id;
2210 * The maximum value of flow_id that can be supported in
2211 * completion records.
2213 uint32_t max_hw_ring_grps;
2215 * The maximum number of HW ring groups that can be supported on
2218 uint16_t max_sp_tx_rings;
2220 * The maximum number of strict priority transmit rings that can
2221 * be allocated to the function. This number indicates the
2222 * maximum number of TX rings that can be assigned strict
2223 * priorities out of the maximum number of TX rings that can be
2224 * allocated (max_tx_rings) to the function.
2229 * This field is used in Output records to indicate that the
2230 * output is completely written to RAM. This field should be
2231 * read as '1' to indicate that the output has been completely
2232 * written. When writing a command completion or response to an
2233 * internal processor, the order of writes has to be such that
2234 * this field is written last.
2236 } __attribute__((packed));
2238 /* hwrm_func_reset */
2240 * Description: This command resets a hardware function (PCIe function) and
2241 * frees any resources used by the function. This command shall be initiated by
2242 * the driver after an FLR has occurred to prepare the function for re-use. This
2243 * command may also be initiated by a driver prior to doing it's own
2244 * configuration. This command puts the function into the reset state. In the
2245 * reset state, global and port related features of the chip are not available.
2248 * Note: This command will reset a function that has already been disabled or
2249 * idled. The command returns all the resources owned by the function so a new
2250 * driver may allocate and configure resources normally.
2253 /* Input (24 bytes) */
2254 struct hwrm_func_reset_input {
2256 * This value indicates what type of request this is. The format for the
2257 * rest of the command is determined by this field.
2262 * This value indicates the what completion ring the request will be
2263 * optionally completed on. If the value is -1, then no CR completion
2264 * will be generated. Any other value must be a valid CR ring_id value
2265 * for this function.
2269 /* This value indicates the command sequence number. */
2273 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2274 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2279 * This is the host address where the response will be written when the
2280 * request is complete. This area must be 16B aligned and must be
2281 * cleared to zero before the request is made.
2285 /* This bit must be '1' for the vf_id_valid field to be configured. */
2286 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID \
2291 * The ID of the VF that this PF is trying to reset. Only the parent PF
2292 * shall be allowed to reset a child VF. A parent PF driver shall use
2293 * this field only when a specific child VF is requested to be reset.
2297 /* This value indicates the level of a function reset. */
2299 * Reset the caller function and its children VFs (if any). If
2300 * no children functions exist, then reset the caller function
2303 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL \
2304 (UINT32_C(0x0) << 0)
2305 /* Reset the caller function only */
2306 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME \
2307 (UINT32_C(0x1) << 0)
2309 * Reset all children VFs of the caller function driver if the
2310 * caller is a PF driver. It is an error to specify this level
2311 * by a VF driver. It is an error to specify this level by a PF
2312 * driver with no children VFs.
2314 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2315 (UINT32_C(0x2) << 0)
2317 * Reset a specific VF of the caller function driver if the
2318 * caller is the parent PF driver. It is an error to specify
2319 * this level by a VF driver. It is an error to specify this
2320 * level by a PF driver that is not the parent of the VF that is
2321 * being requested to reset.
2323 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF \
2324 (UINT32_C(0x3) << 0)
2325 uint8_t func_reset_level;
2328 } __attribute__((packed));
2330 /* Output (16 bytes) */
2331 struct hwrm_func_reset_output {
2333 * Pass/Fail or error type Note: receiver to verify the in parameters,
2334 * and fail the call with an error when appropriate
2336 uint16_t error_code;
2338 /* This field returns the type of original request. */
2341 /* This field provides original sequence number of the command. */
2345 * This field is the length of the response in bytes. The last byte of
2346 * the response is a valid flag that will read as '1' when the command
2347 * has been completely written to memory.
2357 * This field is used in Output records to indicate that the output is
2358 * completely written to RAM. This field should be read as '1' to
2359 * indicate that the output has been completely written. When writing a
2360 * command completion or response to an internal processor, the order of
2361 * writes has to be such that this field is written last.
2364 } __attribute__((packed));
2366 /* hwrm_port_phy_cfg */
2368 * Description: This command configures the PHY device for the port. It allows
2369 * setting of the most generic settings for the PHY. The HWRM shall complete
2370 * this command as soon as PHY settings are configured. They may not be applied
2371 * when the command response is provided. A VF driver shall not be allowed to
2372 * configure PHY using this command. In a network partition mode, a PF driver
2373 * shall not be allowed to configure PHY using this command.
2376 /* Input (56 bytes) */
2377 struct hwrm_port_phy_cfg_input {
2379 * This value indicates what type of request this is. The format for the
2380 * rest of the command is determined by this field.
2385 * This value indicates the what completion ring the request will be
2386 * optionally completed on. If the value is -1, then no CR completion
2387 * will be generated. Any other value must be a valid CR ring_id value
2388 * for this function.
2392 /* This value indicates the command sequence number. */
2396 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2397 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2402 * This is the host address where the response will be written when the
2403 * request is complete. This area must be 16B aligned and must be
2404 * cleared to zero before the request is made.
2409 * When this bit is set to '1', the PHY for the port shall be reset. #
2410 * If this bit is set to 1, then the HWRM shall reset the PHY after
2411 * applying PHY configuration changes specified in this command. # In
2412 * order to guarantee that PHY configuration changes specified in this
2413 * command take effect, the HWRM client should set this flag to 1. # If
2414 * this bit is not set to 1, then the HWRM may reset the PHY depending
2415 * on the current PHY configuration and settings specified in this
2418 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
2420 * When this bit is set to '1', the link shall be forced to be taken
2421 * down. # When this bit is set to '1", all other command input settings
2422 * related to the link speed shall be ignored. Once the link state is
2423 * forced down, it can be explicitly cleared from that state by setting
2424 * this flag to '0'. # If this flag is set to '0', then the link shall
2425 * be cleared from forced down state if the link is in forced down
2426 * state. There may be conditions (e.g. out-of-band or sideband
2427 * configuration changes for the link) outside the scope of the HWRM
2428 * implementation that may clear forced down link state.
2430 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DOWN UINT32_C(0x2)
2432 * When this bit is set to '1', the link shall be forced to the
2433 * force_link_speed value. When this bit is set to '1', the HWRM client
2434 * should not enable any of the auto negotiation related fields
2435 * represented by auto_XXX fields in this command. When this bit is set
2436 * to '1' and the HWRM client has enabled a auto_XXX field in this
2437 * command, then the HWRM shall ignore the enabled auto_XXX field. When
2438 * this bit is set to zero, the link shall be allowed to autoneg.
2440 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
2442 * When this bit is set to '1', the auto-negotiation process shall be
2443 * restarted on the link.
2445 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
2447 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2448 * requested to be enabled on this link. If EEE is not supported on this
2449 * port, then this flag shall be ignored by the HWRM.
2451 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
2453 * When this bit is set to '1', Energy Efficient Ethernet (EEE) is
2454 * requested to be disabled on this link. If EEE is not supported on
2455 * this port, then this flag shall be ignored by the HWRM.
2457 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
2459 * When this bit is set to '1' and EEE is enabled on this link, then TX
2460 * LPI is requested to be enabled on the link. If EEE is not supported
2461 * on this port, then this flag shall be ignored by the HWRM. If EEE is
2462 * disabled on this port, then this flag shall be ignored by the HWRM.
2464 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI UINT32_C(0x40)
2467 /* This bit must be '1' for the auto_mode field to be configured. */
2468 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
2469 /* This bit must be '1' for the auto_duplex field to be configured. */
2470 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
2471 /* This bit must be '1' for the auto_pause field to be configured. */
2472 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
2474 * This bit must be '1' for the auto_link_speed field to be configured.
2476 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
2478 * This bit must be '1' for the auto_link_speed_mask field to be
2481 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
2483 /* This bit must be '1' for the wirespeed field to be configured. */
2484 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIRESPEED UINT32_C(0x20)
2485 /* This bit must be '1' for the lpbk field to be configured. */
2486 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
2487 /* This bit must be '1' for the preemphasis field to be configured. */
2488 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
2489 /* This bit must be '1' for the force_pause field to be configured. */
2490 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
2492 * This bit must be '1' for the eee_link_speed_mask field to be
2495 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
2497 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
2498 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
2501 /* Port ID of port that is to be configured. */
2505 * This is the speed that will be used if the force bit is '1'. If
2506 * unsupported speed is selected, an error will be generated.
2508 /* 100Mb link speed */
2509 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB \
2510 (UINT32_C(0x1) << 0)
2511 /* 1Gb link speed */
2512 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB \
2513 (UINT32_C(0xa) << 0)
2514 /* 2Gb link speed */
2515 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB \
2516 (UINT32_C(0x14) << 0)
2517 /* 2.5Gb link speed */
2518 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB \
2519 (UINT32_C(0x19) << 0)
2520 /* 10Gb link speed */
2521 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB \
2522 (UINT32_C(0x64) << 0)
2523 /* 20Mb link speed */
2524 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB \
2525 (UINT32_C(0xc8) << 0)
2526 /* 25Gb link speed */
2527 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB \
2528 (UINT32_C(0xfa) << 0)
2529 /* 40Gb link speed */
2530 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB \
2531 (UINT32_C(0x190) << 0)
2532 /* 50Gb link speed */
2533 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB \
2534 (UINT32_C(0x1f4) << 0)
2535 /* 100Gb link speed */
2536 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB \
2537 (UINT32_C(0x3e8) << 0)
2538 /* 10Mb link speed */
2539 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB \
2540 (UINT32_C(0xffff) << 0)
2541 uint16_t force_link_speed;
2544 * This value is used to identify what autoneg mode is used when the
2545 * link speed is not being forced.
2548 * Disable autoneg or autoneg disabled. No speeds are selected.
2550 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE (UINT32_C(0x0) << 0)
2551 /* Select all possible speeds for autoneg mode. */
2552 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS \
2553 (UINT32_C(0x1) << 0)
2555 * Select only the auto_link_speed speed for autoneg mode. This
2556 * mode has been DEPRECATED. An HWRM client should not use this
2559 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED \
2560 (UINT32_C(0x2) << 0)
2562 * Select the auto_link_speed or any speed below that speed for
2563 * autoneg. This mode has been DEPRECATED. An HWRM client should
2564 * not use this mode.
2566 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW \
2567 (UINT32_C(0x3) << 0)
2569 * Select the speeds based on the corresponding link speed mask
2570 * value that is provided.
2572 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK \
2573 (UINT32_C(0x4) << 0)
2577 * This is the duplex setting that will be used if the autoneg_mode is
2578 * "one_speed" or "one_or_below".
2580 /* Half Duplex will be requested. */
2581 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF \
2582 (UINT32_C(0x0) << 0)
2583 /* Full duplex will be requested. */
2584 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL \
2585 (UINT32_C(0x1) << 0)
2586 /* Both Half and Full dupex will be requested. */
2587 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH \
2588 (UINT32_C(0x2) << 0)
2589 uint8_t auto_duplex;
2592 * This value is used to configure the pause that will be used for
2593 * autonegotiation. Add text on the usage of auto_pause and force_pause.
2596 * When this bit is '1', Generation of tx pause messages has been
2597 * requested. Disabled otherwise.
2599 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
2601 * When this bit is '1', Reception of rx pause messages has been
2602 * requested. Disabled otherwise.
2604 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
2606 * When set to 1, the advertisement of pause is enabled. # When the
2607 * auto_mode is not set to none and this flag is set to 1, then the
2608 * auto_pause bits on this port are being advertised and autoneg pause
2609 * results are being interpreted. # When the auto_mode is not set to
2610 * none and this flag is set to 0, the pause is forced as indicated in
2611 * force_pause, and also advertised as auto_pause bits, but the autoneg
2612 * results are not interpreted since the pause configuration is being
2613 * forced. # When the auto_mode is set to none and this flag is set to
2614 * 1, auto_pause bits should be ignored and should be set to 0.
2616 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
2622 * This is the speed that will be used if the autoneg_mode is
2623 * "one_speed" or "one_or_below". If an unsupported speed is selected,
2624 * an error will be generated.
2626 /* 100Mb link speed */
2627 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB \
2628 (UINT32_C(0x1) << 0)
2629 /* 1Gb link speed */
2630 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB \
2631 (UINT32_C(0xa) << 0)
2632 /* 2Gb link speed */
2633 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB \
2634 (UINT32_C(0x14) << 0)
2635 /* 2.5Gb link speed */
2636 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB \
2637 (UINT32_C(0x19) << 0)
2638 /* 10Gb link speed */
2639 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB \
2640 (UINT32_C(0x64) << 0)
2641 /* 20Mb link speed */
2642 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB \
2643 (UINT32_C(0xc8) << 0)
2644 /* 25Gb link speed */
2645 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB \
2646 (UINT32_C(0xfa) << 0)
2647 /* 40Gb link speed */
2648 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB \
2649 (UINT32_C(0x190) << 0)
2650 /* 50Gb link speed */
2651 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB \
2652 (UINT32_C(0x1f4) << 0)
2653 /* 100Gb link speed */
2654 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB \
2655 (UINT32_C(0x3e8) << 0)
2656 /* 10Mb link speed */
2657 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB \
2658 (UINT32_C(0xffff) << 0)
2659 uint16_t auto_link_speed;
2662 * This is a mask of link speeds that will be used if autoneg_mode is
2663 * "mask". If unsupported speed is enabled an error will be generated.
2665 /* 100Mb link speed (Half-duplex) */
2666 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
2668 /* 100Mb link speed (Full-duplex) */
2669 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
2671 /* 1Gb link speed (Half-duplex) */
2672 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
2674 /* 1Gb link speed (Full-duplex) */
2675 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
2677 /* 2Gb link speed */
2678 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
2680 /* 2.5Gb link speed */
2681 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
2683 /* 10Gb link speed */
2684 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB \
2686 /* 20Gb link speed */
2687 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB \
2689 /* 25Gb link speed */
2690 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
2692 /* 40Gb link speed */
2693 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
2695 /* 50Gb link speed */
2696 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
2698 /* 100Gb link speed */
2699 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
2701 /* 10Mb link speed (Half-duplex) */
2702 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
2704 /* 10Mb link speed (Full-duplex) */
2705 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
2707 uint16_t auto_link_speed_mask;
2709 /* This value controls the wirespeed feature. */
2710 /* Wirespeed feature is disabled. */
2711 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
2712 /* Wirespeed feature is enabled. */
2713 #define HWRM_PORT_PHY_CFG_INPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
2716 /* This value controls the loopback setting for the PHY. */
2717 /* No loopback is selected. Normal operation. */
2718 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE (UINT32_C(0x0) << 0)
2720 * The HW will be configured with local loopback such that host
2721 * data is sent back to the host without modification.
2723 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
2725 * The HW will be configured with remote loopback such that port
2726 * logic will send packets back out the transmitter that are
2729 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
2733 * This value is used to configure the pause that will be used for force
2737 * When this bit is '1', Generation of tx pause messages is supported.
2738 * Disabled otherwise.
2740 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
2742 * When this bit is '1', Reception of rx pause messages is supported.
2743 * Disabled otherwise.
2745 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
2746 uint8_t force_pause;
2751 * This value controls the pre-emphasis to be used for the link. Driver
2752 * should not set this value (use enable.preemphasis = 0) unless driver
2753 * is sure of setting. Normally HWRM FW will determine proper pre-
2756 uint32_t preemphasis;
2759 * Setting for link speed mask that is used to advertise speeds during
2760 * autonegotiation when EEE is enabled. This field is valid only when
2761 * EEE is enabled. The speeds specified in this field shall be a subset
2762 * of speeds specified in auto_link_speed_mask. If EEE is enabled,then
2763 * at least one speed shall be provided in this mask.
2766 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
2767 /* 100Mb link speed (Full-duplex) */
2768 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
2770 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
2771 /* 1Gb link speed (Full-duplex) */
2772 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
2774 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 \
2777 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 \
2779 /* 10Gb link speed */
2780 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB \
2782 uint16_t eee_link_speed_mask;
2788 * Reuested setting of TX LPI timer in microseconds. This field is valid
2789 * only when EEE is enabled and TX LPI is enabled.
2791 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK \
2793 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
2794 uint32_t tx_lpi_timer;
2797 } __attribute__((packed));
2799 /* Output (16 bytes) */
2800 struct hwrm_port_phy_cfg_output {
2802 * Pass/Fail or error type Note: receiver to verify the in parameters,
2803 * and fail the call with an error when appropriate
2805 uint16_t error_code;
2807 /* This field returns the type of original request. */
2810 /* This field provides original sequence number of the command. */
2814 * This field is the length of the response in bytes. The last byte of
2815 * the response is a valid flag that will read as '1' when the command
2816 * has been completely written to memory.
2826 * This field is used in Output records to indicate that the output is
2827 * completely written to RAM. This field should be read as '1' to
2828 * indicate that the output has been completely written. When writing a
2829 * command completion or response to an internal processor, the order of
2830 * writes has to be such that this field is written last.
2833 } __attribute__((packed));
2835 /* hwrm_port_phy_qcfg */
2836 /* Description: This command queries the PHY configuration for the port. */
2837 /* Input (24 bytes) */
2839 struct hwrm_port_phy_qcfg_input {
2841 * This value indicates what type of request this is. The format for the
2842 * rest of the command is determined by this field.
2847 * This value indicates the what completion ring the request will be
2848 * optionally completed on. If the value is -1, then no CR completion
2849 * will be generated. Any other value must be a valid CR ring_id value
2850 * for this function.
2854 /* This value indicates the command sequence number. */
2858 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2859 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2864 * This is the host address where the response will be written when the
2865 * request is complete. This area must be 16B aligned and must be
2866 * cleared to zero before the request is made.
2870 /* Port ID of port that is to be queried. */
2873 uint16_t unused_0[3];
2874 } __attribute__((packed));
2876 /* Output (96 bytes) */
2877 struct hwrm_port_phy_qcfg_output {
2879 * Pass/Fail or error type Note: receiver to verify the in parameters,
2880 * and fail the call with an error when appropriate
2882 uint16_t error_code;
2884 /* This field returns the type of original request. */
2887 /* This field provides original sequence number of the command. */
2891 * This field is the length of the response in bytes. The last byte of
2892 * the response is a valid flag that will read as '1' when the command
2893 * has been completely written to memory.
2897 /* This value indicates the current link status. */
2898 /* There is no link or cable detected. */
2899 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK (UINT32_C(0x0) << 0)
2900 /* There is no link, but a cable has been detected. */
2901 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL (UINT32_C(0x1) << 0)
2902 /* There is a link. */
2903 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK (UINT32_C(0x2) << 0)
2908 /* This value indicates the current link speed of the connection. */
2909 /* 100Mb link speed */
2910 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB \
2911 (UINT32_C(0x1) << 0)
2912 /* 1Gb link speed */
2913 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB \
2914 (UINT32_C(0xa) << 0)
2915 /* 2Gb link speed */
2916 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB \
2917 (UINT32_C(0x14) << 0)
2918 /* 2.5Gb link speed */
2919 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB \
2920 (UINT32_C(0x19) << 0)
2921 /* 10Gb link speed */
2922 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB \
2923 (UINT32_C(0x64) << 0)
2924 /* 20Mb link speed */
2925 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB \
2926 (UINT32_C(0xc8) << 0)
2927 /* 25Gb link speed */
2928 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB \
2929 (UINT32_C(0xfa) << 0)
2930 /* 40Gb link speed */
2931 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB \
2932 (UINT32_C(0x190) << 0)
2933 /* 50Gb link speed */
2934 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB \
2935 (UINT32_C(0x1f4) << 0)
2936 /* 100Gb link speed */
2937 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB \
2938 (UINT32_C(0x3e8) << 0)
2939 /* 10Mb link speed */
2940 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB \
2941 (UINT32_C(0xffff) << 0)
2942 uint16_t link_speed;
2944 /* This value is indicates the duplex of the current connection. */
2945 /* Half Duplex connection. */
2946 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF (UINT32_C(0x0) << 0)
2947 /* Full duplex connection. */
2948 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL (UINT32_C(0x1) << 0)
2952 * This value is used to indicate the current pause configuration. When
2953 * autoneg is enabled, this value represents the autoneg results of
2954 * pause configuration.
2957 * When this bit is '1', Generation of tx pause messages is supported.
2958 * Disabled otherwise.
2960 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
2962 * When this bit is '1', Reception of rx pause messages is supported.
2963 * Disabled otherwise.
2965 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
2969 * The supported speeds for the port. This is a bit mask. For each speed
2970 * that is supported, the corrresponding bit will be set to '1'.
2972 /* 100Mb link speed (Half-duplex) */
2973 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD \
2975 /* 100Mb link speed (Full-duplex) */
2976 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB \
2978 /* 1Gb link speed (Half-duplex) */
2979 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD \
2981 /* 1Gb link speed (Full-duplex) */
2982 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB \
2984 /* 2Gb link speed */
2985 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB \
2987 /* 2.5Gb link speed */
2988 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB \
2990 /* 10Gb link speed */
2991 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB \
2993 /* 20Gb link speed */
2994 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB \
2996 /* 25Gb link speed */
2997 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB \
2999 /* 40Gb link speed */
3000 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB \
3002 /* 50Gb link speed */
3003 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB \
3005 /* 100Gb link speed */
3006 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB \
3008 /* 10Mb link speed (Half-duplex) */
3009 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD \
3011 /* 10Mb link speed (Full-duplex) */
3012 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB \
3014 uint16_t support_speeds;
3017 * Current setting of forced link speed. When the link speed is not
3018 * being forced, this value shall be set to 0.
3020 /* 100Mb link speed */
3021 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB \
3022 (UINT32_C(0x1) << 0)
3023 /* 1Gb link speed */
3024 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB \
3025 (UINT32_C(0xa) << 0)
3026 /* 2Gb link speed */
3027 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB \
3028 (UINT32_C(0x14) << 0)
3029 /* 2.5Gb link speed */
3030 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB \
3031 (UINT32_C(0x19) << 0)
3032 /* 10Gb link speed */
3033 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB \
3034 (UINT32_C(0x64) << 0)
3035 /* 20Mb link speed */
3036 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB \
3037 (UINT32_C(0xc8) << 0)
3038 /* 25Gb link speed */
3039 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB \
3040 (UINT32_C(0xfa) << 0)
3041 /* 40Gb link speed */
3042 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB \
3043 (UINT32_C(0x190) << 0)
3044 /* 50Gb link speed */
3045 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB \
3046 (UINT32_C(0x1f4) << 0)
3047 /* 100Gb link speed */
3048 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB \
3049 (UINT32_C(0x3e8) << 0)
3050 /* 10Mb link speed */
3051 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB \
3052 (UINT32_C(0xffff) << 0)
3053 uint16_t force_link_speed;
3055 /* Current setting of auto negotiation mode. */
3057 * Disable autoneg or autoneg disabled. No speeds are selected.
3059 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE \
3060 (UINT32_C(0x0) << 0)
3061 /* Select all possible speeds for autoneg mode. */
3062 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS \
3063 (UINT32_C(0x1) << 0)
3065 * Select only the auto_link_speed speed for autoneg mode. This
3066 * mode has been DEPRECATED. An HWRM client should not use this
3069 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED \
3070 (UINT32_C(0x2) << 0)
3072 * Select the auto_link_speed or any speed below that speed for
3073 * autoneg. This mode has been DEPRECATED. An HWRM client should
3074 * not use this mode.
3076 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW \
3077 (UINT32_C(0x3) << 0)
3079 * Select the speeds based on the corresponding link speed mask
3080 * value that is provided.
3082 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK \
3083 (UINT32_C(0x4) << 0)
3087 * Current setting of pause autonegotiation. Move autoneg_pause flag
3091 * When this bit is '1', Generation of tx pause messages has been
3092 * requested. Disabled otherwise.
3094 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
3096 * When this bit is '1', Reception of rx pause messages has been
3097 * requested. Disabled otherwise.
3099 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
3101 * When set to 1, the advertisement of pause is enabled. # When the
3102 * auto_mode is not set to none and this flag is set to 1, then the
3103 * auto_pause bits on this port are being advertised and autoneg pause
3104 * results are being interpreted. # When the auto_mode is not set to
3105 * none and this flag is set to 0, the pause is forced as indicated in
3106 * force_pause, and also advertised as auto_pause bits, but the autoneg
3107 * results are not interpreted since the pause configuration is being
3108 * forced. # When the auto_mode is set to none and this flag is set to
3109 * 1, auto_pause bits should be ignored and should be set to 0.
3111 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE \
3116 * Current setting for auto_link_speed. This field is only valid when
3117 * auto_mode is set to "one_speed" or "one_or_below".
3119 /* 100Mb link speed */
3120 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB \
3121 (UINT32_C(0x1) << 0)
3122 /* 1Gb link speed */
3123 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB \
3124 (UINT32_C(0xa) << 0)
3125 /* 2Gb link speed */
3126 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB \
3127 (UINT32_C(0x14) << 0)
3128 /* 2.5Gb link speed */
3129 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB \
3130 (UINT32_C(0x19) << 0)
3131 /* 10Gb link speed */
3132 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB \
3133 (UINT32_C(0x64) << 0)
3134 /* 20Mb link speed */
3135 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB \
3136 (UINT32_C(0xc8) << 0)
3137 /* 25Gb link speed */
3138 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB \
3139 (UINT32_C(0xfa) << 0)
3140 /* 40Gb link speed */
3141 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB \
3142 (UINT32_C(0x190) << 0)
3143 /* 50Gb link speed */
3144 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB \
3145 (UINT32_C(0x1f4) << 0)
3146 /* 100Gb link speed */
3147 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB \
3148 (UINT32_C(0x3e8) << 0)
3149 /* 10Mb link speed */
3150 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB \
3151 (UINT32_C(0xffff) << 0)
3152 uint16_t auto_link_speed;
3155 * Current setting for auto_link_speed_mask that is used to advertise
3156 * speeds during autonegotiation. This field is only valid when
3157 * auto_mode is set to "mask". The speeds specified in this field shall
3158 * be a subset of supported speeds on this port.
3160 /* 100Mb link speed (Half-duplex) */
3161 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
3163 /* 100Mb link speed (Full-duplex) */
3164 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
3166 /* 1Gb link speed (Half-duplex) */
3167 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
3169 /* 1Gb link speed (Full-duplex) */
3170 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB \
3172 /* 2Gb link speed */
3173 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
3175 /* 2.5Gb link speed */
3176 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
3178 /* 10Gb link speed */
3179 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
3181 /* 20Gb link speed */
3182 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
3184 /* 25Gb link speed */
3185 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
3187 /* 40Gb link speed */
3188 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
3190 /* 50Gb link speed */
3191 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
3193 /* 100Gb link speed */
3194 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
3196 /* 10Mb link speed (Half-duplex) */
3197 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
3199 /* 10Mb link speed (Full-duplex) */
3200 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
3202 uint16_t auto_link_speed_mask;
3204 /* Current setting for wirespeed. */
3205 /* Wirespeed feature is disabled. */
3206 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_OFF (UINT32_C(0x0) << 0)
3207 /* Wirespeed feature is enabled. */
3208 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIRESPEED_ON (UINT32_C(0x1) << 0)
3211 /* Current setting for loopback. */
3212 /* No loopback is selected. Normal operation. */
3213 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE (UINT32_C(0x0) << 0)
3215 * The HW will be configured with local loopback such that host
3216 * data is sent back to the host without modification.
3218 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL (UINT32_C(0x1) << 0)
3220 * The HW will be configured with remote loopback such that port
3221 * logic will send packets back out the transmitter that are
3224 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE (UINT32_C(0x2) << 0)
3228 * Current setting of forced pause. When the pause configuration is not
3229 * being forced, then this value shall be set to 0.
3232 * When this bit is '1', Generation of tx pause messages is supported.
3233 * Disabled otherwise.
3235 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX \
3238 * When this bit is '1', Reception of rx pause messages is supported.
3239 * Disabled otherwise.
3241 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX \
3243 uint8_t force_pause;
3246 * This value indicates the current status of the optics module on this
3249 /* Module is inserted and accepted */
3250 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE \
3251 (UINT32_C(0x0) << 0)
3252 /* Module is rejected and transmit side Laser is disabled. */
3253 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX \
3254 (UINT32_C(0x1) << 0)
3255 /* Module mismatch warning. */
3256 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG \
3257 (UINT32_C(0x2) << 0)
3258 /* Module is rejected and powered down. */
3259 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN \
3260 (UINT32_C(0x3) << 0)
3261 /* Module is not inserted. */
3262 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
3263 (UINT32_C(0x4) << 0)
3264 /* Module status is not applicable. */
3265 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
3266 (UINT32_C(0xff) << 0)
3267 uint8_t module_status;
3269 /* Current setting for preemphasis. */
3270 uint32_t preemphasis;
3272 /* This field represents the major version of the PHY. */
3275 /* This field represents the minor version of the PHY. */
3278 /* This field represents the build version of the PHY. */
3281 /* This value represents a PHY type. */
3283 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN \
3284 (UINT32_C(0x0) << 0)
3286 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR \
3287 (UINT32_C(0x1) << 0)
3288 /* BASE-KR4 (Deprecated) */
3289 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 \
3290 (UINT32_C(0x2) << 0)
3292 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR \
3293 (UINT32_C(0x3) << 0)
3295 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR \
3296 (UINT32_C(0x4) << 0)
3297 /* BASE-KR2 (Deprecated) */
3298 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 \
3299 (UINT32_C(0x5) << 0)
3301 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX \
3302 (UINT32_C(0x6) << 0)
3304 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR \
3305 (UINT32_C(0x7) << 0)
3307 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET \
3308 (UINT32_C(0x8) << 0)
3309 /* EEE capable BASE-T */
3310 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE \
3311 (UINT32_C(0x9) << 0)
3312 /* SGMII connected external PHY */
3313 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY \
3314 (UINT32_C(0xa) << 0)
3317 /* This value represents a media type. */
3319 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN \
3320 (UINT32_C(0x0) << 0)
3322 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP (UINT32_C(0x1) << 0)
3323 /* Direct Attached Copper */
3324 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC \
3325 (UINT32_C(0x2) << 0)
3327 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE \
3328 (UINT32_C(0x3) << 0)
3331 /* This value represents a transceiver type. */
3332 /* PHY and MAC are in the same package */
3333 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
3334 (UINT32_C(0x1) << 0)
3335 /* PHY and MAC are in different packages */
3336 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
3337 (UINT32_C(0x2) << 0)
3338 uint8_t xcvr_pkg_type;
3341 * This field represents flags related to EEE configuration. These EEE
3342 * configuration flags are valid only when the auto_mode is not set to
3343 * none (in other words autonegotiation is enabled).
3345 /* This field represents PHY address. */
3346 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
3347 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
3349 * When set to 1, Energy Efficient Ethernet (EEE) mode is enabled.
3350 * Speeds for autoneg with EEE mode enabled are based on
3351 * eee_link_speed_mask.
3353 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED \
3356 * This flag is valid only when eee_enabled is set to 1. # If
3357 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3358 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3359 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and in
3360 * use. # If eee_enabled is set to 1 and this flag is set to 0, then
3361 * Energy Efficient Ethernet (EEE) mode is enabled but is currently not
3364 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE \
3367 * This flag is valid only when eee_enabled is set to 1. # If
3368 * eee_enabled is set to 0, then EEE mode is disabled and this flag
3369 * shall be ignored. # If eee_enabled is set to 1 and this flag is set
3370 * to 1, then Energy Efficient Ethernet (EEE) mode is enabled and TX LPI
3371 * is enabled. # If eee_enabled is set to 1 and this flag is set to 0,
3372 * then Energy Efficient Ethernet (EEE) mode is enabled but TX LPI is
3375 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI \
3378 * This field represents flags related to EEE configuration. These EEE
3379 * configuration flags are valid only when the auto_mode is not set to
3380 * none (in other words autonegotiation is enabled).
3382 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK \
3384 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
3385 uint8_t eee_config_phy_addr;
3387 /* Reserved field, set to 0 */
3389 * When set to 1, the parallel detection is used to determine the speed
3390 * of the link partner. Parallel detection is used when a
3391 * autonegotiation capable device is connected to a link parter that is
3392 * not capable of autonegotiation.
3394 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT \
3396 /* Reserved field, set to 0 */
3397 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
3398 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
3399 uint8_t parallel_detect;
3402 * The advertised speeds for the port by the link partner. Each
3403 * advertised speed will be set to '1'.
3405 /* 100Mb link speed (Half-duplex) */
3406 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
3408 /* 100Mb link speed (Full-duplex) */
3409 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
3411 /* 1Gb link speed (Half-duplex) */
3412 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
3414 /* 1Gb link speed (Full-duplex) */
3415 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
3417 /* 2Gb link speed */
3418 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
3420 /* 2.5Gb link speed */
3421 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
3423 /* 10Gb link speed */
3424 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
3426 /* 20Gb link speed */
3427 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
3429 /* 25Gb link speed */
3430 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
3432 /* 40Gb link speed */
3433 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
3435 /* 50Gb link speed */
3436 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
3438 /* 100Gb link speed */
3439 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
3441 /* 10Mb link speed (Half-duplex) */
3442 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
3444 /* 10Mb link speed (Full-duplex) */
3445 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
3447 uint16_t link_partner_adv_speeds;
3450 * The advertised autoneg for the port by the link partner. This field
3451 * is deprecated and should be set to 0.
3454 * Disable autoneg or autoneg disabled. No speeds are selected.
3456 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
3457 (UINT32_C(0x0) << 0)
3458 /* Select all possible speeds for autoneg mode. */
3459 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS\
3460 (UINT32_C(0x1) << 0)
3462 * Select only the auto_link_speed speed for autoneg mode. This
3463 * mode has been DEPRECATED. An HWRM client should not use this
3466 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
3467 (UINT32_C(0x2) << 0)
3469 * Select the auto_link_speed or any speed below that speed for
3470 * autoneg. This mode has been DEPRECATED. An HWRM client should
3471 * not use this mode.
3474 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
3475 (UINT32_C(0x3) << 0)
3477 * Select the speeds based on the corresponding link speed mask
3478 * value that is provided.
3480 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK\
3481 (UINT32_C(0x4) << 0)
3482 uint8_t link_partner_adv_auto_mode;
3484 /* The advertised pause settings on the port by the link partner. */
3486 * When this bit is '1', Generation of tx pause messages is supported.
3487 * Disabled otherwise.
3489 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
3492 * When this bit is '1', Reception of rx pause messages is supported.
3493 * Disabled otherwise.
3495 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
3497 uint8_t link_partner_adv_pause;
3500 * Current setting for link speed mask that is used to advertise speeds
3501 * during autonegotiation when EEE is enabled. This field is valid only
3502 * when eee_enabled flags is set to 1. The speeds specified in this
3503 * field shall be a subset of speeds specified in auto_link_speed_mask.
3506 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3508 /* 100Mb link speed (Full-duplex) */
3509 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
3512 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3514 /* 1Gb link speed (Full-duplex) */
3515 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
3518 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3521 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3523 /* 10Gb link speed */
3524 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
3526 uint16_t adv_eee_link_speed_mask;
3529 * Current setting for link speed mask that is advertised by the link
3530 * partner when EEE is enabled. This field is valid only when
3531 * eee_enabled flags is set to 1.
3535 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
3537 /* 100Mb link speed (Full-duplex) */
3539 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
3543 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
3545 /* 1Gb link speed (Full-duplex) */
3547 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
3551 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
3555 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
3557 /* 10Gb link speed */
3559 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
3561 uint16_t link_partner_adv_eee_link_speed_mask;
3563 /* This value represents transceiver identifier type. */
3565 * Current setting of TX LPI timer in microseconds. This field is valid
3566 * only when_eee_enabled flag is set to 1 and tx_lpi_enabled is set to
3569 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK \
3571 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
3572 /* This value represents transceiver identifier type. */
3573 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
3574 UINT32_C(0xff000000)
3575 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT \
3578 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
3579 (UINT32_C(0x0) << 24)
3580 /* SFP/SFP+/SFP28 */
3581 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
3582 (UINT32_C(0x3) << 24)
3584 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
3585 (UINT32_C(0xc) << 24)
3587 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
3588 (UINT32_C(0xd) << 24)
3590 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
3591 (UINT32_C(0x11) << 24)
3592 uint32_t xcvr_identifier_type_tx_lpi_timer;
3597 * Up to 16 bytes of null padded ASCII string representing PHY vendor.
3598 * If the string is set to null, then the vendor name is not available.
3600 char phy_vendor_name[16];
3603 * Up to 16 bytes of null padded ASCII string that identifies vendor
3604 * specific part number of the PHY. If the string is set to null, then
3605 * the vendor specific part number is not available.
3607 char phy_vendor_partnumber[16];
3615 * This field is used in Output records to indicate that the output is
3616 * completely written to RAM. This field should be read as '1' to
3617 * indicate that the output has been completely written. When writing a
3618 * command completion or response to an internal processor, the order of
3619 * writes has to be such that this field is written last.
3622 } __attribute__((packed));
3626 * Description: This function is called by a driver to determine the HWRM
3627 * interface version supported by the HWRM firmware, the version of HWRM
3628 * firmware implementation, the name of HWRM firmware, the versions of other
3629 * embedded firmwares, and the names of other embedded firmwares, etc. Any
3630 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
3631 * be considered an invalid version.
3634 /* Input (24 bytes) */
3635 struct hwrm_ver_get_input {
3637 * This value indicates what type of request this is. The format for the
3638 * rest of the command is determined by this field.
3643 * This value indicates the what completion ring the request will be
3644 * optionally completed on. If the value is -1, then no CR completion
3645 * will be generated. Any other value must be a valid CR ring_id value
3646 * for this function.
3650 /* This value indicates the command sequence number. */
3654 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3655 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3660 * This is the host address where the response will be written when the
3661 * request is complete. This area must be 16B aligned and must be
3662 * cleared to zero before the request is made.
3667 * This field represents the major version of HWRM interface
3668 * specification supported by the driver HWRM implementation. The
3669 * interface major version is intended to change only when non backward
3670 * compatible changes are made to the HWRM interface specification.
3672 uint8_t hwrm_intf_maj;
3675 * This field represents the minor version of HWRM interface
3676 * specification supported by the driver HWRM implementation. A change
3677 * in interface minor version is used to reflect significant backward
3678 * compatible modification to HWRM interface specification. This can be
3679 * due to addition or removal of functionality. HWRM interface
3680 * specifications with the same major version but different minor
3681 * versions are compatible.
3683 uint8_t hwrm_intf_min;
3686 * This field represents the update version of HWRM interface
3687 * specification supported by the driver HWRM implementation. The
3688 * interface update version is used to reflect minor changes or bug
3689 * fixes to a released HWRM interface specification.
3691 uint8_t hwrm_intf_upd;
3693 uint8_t unused_0[5];
3694 } __attribute__((packed));
3696 /* Output (128 bytes) */
3697 struct hwrm_ver_get_output {
3699 * Pass/Fail or error type Note: receiver to verify the in parameters,
3700 * and fail the call with an error when appropriate
3702 uint16_t error_code;
3704 /* This field returns the type of original request. */
3707 /* This field provides original sequence number of the command. */
3711 * This field is the length of the response in bytes. The last byte of
3712 * the response is a valid flag that will read as '1' when the command
3713 * has been completely written to memory.
3718 * This field represents the major version of HWRM interface
3719 * specification supported by the HWRM implementation. The interface
3720 * major version is intended to change only when non backward compatible
3721 * changes are made to the HWRM interface specification. A HWRM
3722 * implementation that is compliant with this specification shall
3723 * provide value of 1 in this field.
3725 uint8_t hwrm_intf_maj;
3728 * This field represents the minor version of HWRM interface
3729 * specification supported by the HWRM implementation. A change in
3730 * interface minor version is used to reflect significant backward
3731 * compatible modification to HWRM interface specification. This can be
3732 * due to addition or removal of functionality. HWRM interface
3733 * specifications with the same major version but different minor
3734 * versions are compatible. A HWRM implementation that is compliant with
3735 * this specification shall provide value of 0 in this field.
3737 uint8_t hwrm_intf_min;
3740 * This field represents the update version of HWRM interface
3741 * specification supported by the HWRM implementation. The interface
3742 * update version is used to reflect minor changes or bug fixes to a
3743 * released HWRM interface specification. A HWRM implementation that is
3744 * compliant with this specification shall provide value of 1 in this
3747 uint8_t hwrm_intf_upd;
3749 uint8_t hwrm_intf_rsvd;
3752 * This field represents the major version of HWRM firmware. A change in
3753 * firmware major version represents a major firmware release.
3755 uint8_t hwrm_fw_maj;
3758 * This field represents the minor version of HWRM firmware. A change in
3759 * firmware minor version represents significant firmware functionality
3762 uint8_t hwrm_fw_min;
3765 * This field represents the build version of HWRM firmware. A change in
3766 * firmware build version represents bug fixes to a released firmware.
3768 uint8_t hwrm_fw_bld;
3771 * This field is a reserved field. This field can be used to represent
3772 * firmware branches or customer specific releases tied to a specific
3773 * (major,minor,update) version of the HWRM firmware.
3775 uint8_t hwrm_fw_rsvd;
3778 * This field represents the major version of mgmt firmware. A change in
3779 * major version represents a major release.
3781 uint8_t mgmt_fw_maj;
3784 * This field represents the minor version of mgmt firmware. A change in
3785 * minor version represents significant functionality changes.
3787 uint8_t mgmt_fw_min;
3790 * This field represents the build version of mgmt firmware. A change in
3791 * update version represents bug fixes.
3793 uint8_t mgmt_fw_bld;
3796 * This field is a reserved field. This field can be used to represent
3797 * firmware branches or customer specific releases tied to a specific
3798 * (major,minor,update) version
3800 uint8_t mgmt_fw_rsvd;
3803 * This field represents the major version of network control firmware.
3804 * A change in major version represents a major release.
3806 uint8_t netctrl_fw_maj;
3809 * This field represents the minor version of network control firmware.
3810 * A change in minor version represents significant functionality
3813 uint8_t netctrl_fw_min;
3816 * This field represents the build version of network control firmware.
3817 * A change in update version represents bug fixes.
3819 uint8_t netctrl_fw_bld;
3822 * This field is a reserved field. This field can be used to represent
3823 * firmware branches or customer specific releases tied to a specific
3824 * (major,minor,update) version
3826 uint8_t netctrl_fw_rsvd;
3829 * This field is reserved for future use. The responder should set it to
3830 * 0. The requester should ignore this field.
3835 * This field represents the major version of RoCE firmware. A change in
3836 * major version represents a major release.
3838 uint8_t roce_fw_maj;
3841 * This field represents the minor version of RoCE firmware. A change in
3842 * minor version represents significant functionality changes.
3844 uint8_t roce_fw_min;
3847 * This field represents the build version of RoCE firmware. A change in
3848 * update version represents bug fixes.
3850 uint8_t roce_fw_bld;
3853 * This field is a reserved field. This field can be used to represent
3854 * firmware branches or customer specific releases tied to a specific
3855 * (major,minor,update) version
3857 uint8_t roce_fw_rsvd;
3860 * This field represents the name of HWRM FW (ASCII chars without NULL
3863 char hwrm_fw_name[16];
3866 * This field represents the name of mgmt FW (ASCII chars without NULL
3869 char mgmt_fw_name[16];
3872 * This field represents the name of network control firmware (ASCII
3873 * chars without NULL at the end).
3875 char netctrl_fw_name[16];
3878 * This field is reserved for future use. The responder should set it to
3879 * 0. The requester should ignore this field.
3881 uint32_t reserved2[4];
3884 * This field represents the name of RoCE FW (ASCII chars without NULL
3887 char roce_fw_name[16];
3889 /* This field returns the chip number. */
3892 /* This field returns the revision of chip. */
3895 /* This field returns the chip metal number. */
3898 /* This field returns the bond id of the chip. */
3899 uint8_t chip_bond_id;
3902 * This value indicates the type of platform used for chip
3906 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC \
3907 (UINT32_C(0x0) << 0)
3908 /* FPGA platform of the chip. */
3909 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA \
3910 (UINT32_C(0x1) << 0)
3911 /* Palladium platform of the chip. */
3912 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM \
3913 (UINT32_C(0x2) << 0)
3914 uint8_t chip_platform_type;
3917 * This field returns the maximum value of request window that is
3918 * supported by the HWRM. The request window is mapped into device
3919 * address space using MMIO.
3921 uint16_t max_req_win_len;
3924 * This field returns the maximum value of response buffer in bytes. If
3925 * a request specifies the response buffer length that is greater than
3926 * this value, then the HWRM should fail it. The value of this field
3927 * shall be 4KB or more.
3929 uint16_t max_resp_len;
3932 * This field returns the default request timeout value in milliseconds.
3934 uint16_t def_req_timeout;
3941 * This field is used in Output records to indicate that the output is
3942 * completely written to RAM. This field should be read as '1' to
3943 * indicate that the output has been completely written. When writing a
3944 * command completion or response to an internal processor, the order of
3945 * writes has to be such that this field is written last.
3948 } __attribute__((packed));
3950 /* hwrm_queue_qportcfg */
3952 * Description: This function is called by a driver to query queue configuration
3953 * of a port. # The HWRM shall at least advertise one queue with lossy service
3954 * profile. # The driver shall use this command to query queue ids before
3955 * configuring or using any queues. # If a service profile is not set for a
3956 * queue, then the driver shall not use that queue without configuring a service
3957 * profile for it. # If the driver is not allowed to configure service profiles,
3958 * then the driver shall only use queues for which service profiles are pre-
3962 /* Input (24 bytes) */
3963 struct hwrm_queue_qportcfg_input {
3965 * This value indicates what type of request this is. The format for the
3966 * rest of the command is determined by this field.
3971 * This value indicates the what completion ring the request will be
3972 * optionally completed on. If the value is -1, then no CR completion
3973 * will be generated. Any other value must be a valid CR ring_id value
3974 * for this function.
3978 /* This value indicates the command sequence number. */
3982 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
3983 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
3988 * This is the host address where the response will be written when the
3989 * request is complete. This area must be 16B aligned and must be
3990 * cleared to zero before the request is made.
3995 * Enumeration denoting the RX, TX type of the resource. This
3996 * enumeration is used for resources that are similar for both TX and RX
3997 * paths of the chip.
3999 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH \
4002 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX \
4003 (UINT32_C(0x0) << 0)
4005 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX \
4006 (UINT32_C(0x1) << 0)
4007 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
4008 HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
4012 * Port ID of port for which the queue configuration is being queried.
4013 * This field is only required when sent by IPC.
4018 } __attribute__((packed));
4020 /* hwrm_ring_alloc */
4022 * Description: This command allocates and does basic preparation for a ring.
4025 /* Input (80 bytes) */
4026 struct hwrm_ring_alloc_input {
4028 * This value indicates what type of request this is. The format for the
4029 * rest of the command is determined by this field.
4034 * This value indicates the what completion ring the request will be
4035 * optionally completed on. If the value is -1, then no CR completion
4036 * will be generated. Any other value must be a valid CR ring_id value
4037 * for this function.
4041 /* This value indicates the command sequence number. */
4045 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4046 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4051 * This is the host address where the response will be written when the
4052 * request is complete. This area must be 16B aligned and must be
4053 * cleared to zero before the request is made.
4057 /* This bit must be '1' for the Reserved1 field to be configured. */
4058 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
4059 /* This bit must be '1' for the Reserved2 field to be configured. */
4060 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED2 UINT32_C(0x2)
4061 /* This bit must be '1' for the Reserved3 field to be configured. */
4062 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
4064 * This bit must be '1' for the stat_ctx_id_valid field to be
4067 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
4068 /* This bit must be '1' for the Reserved4 field to be configured. */
4069 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
4070 /* This bit must be '1' for the max_bw_valid field to be configured. */
4071 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
4075 /* Completion Ring (CR) */
4076 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4078 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4080 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4086 /* This value is a pointer to the page table for the Ring. */
4087 uint64_t page_tbl_addr;
4089 /* First Byte Offset of the first entry in the first page. */
4093 * Actual page size in 2^page_size. The supported range is increments in
4094 * powers of 2 from 16 bytes to 1GB. - 4 = 16 B Page size is 16 B. - 12
4095 * = 4 KB Page size is 4 KB. - 13 = 8 KB Page size is 8 KB. - 16 = 64 KB
4096 * Page size is 64 KB. - 22 = 2 MB Page size is 2 MB. - 23 = 4 MB Page
4097 * size is 4 MB. - 31 = 1 GB Page size is 1 GB.
4102 * This value indicates the depth of page table. For this version of the
4103 * specification, value other than 0 or 1 shall be considered as an
4104 * invalid value. When the page_tbl_depth = 0, then it is treated as a
4105 * special case with the following. 1. FBO and page size fields are not
4106 * valid. 2. page_tbl_addr is the physical address of the first element
4109 uint8_t page_tbl_depth;
4115 * Number of 16B units in the ring. Minimum size for a ring is 16 16B
4121 * Logical ring number for the ring to be allocated. This value
4122 * determines the position in the doorbell area where the update to the
4123 * ring will be made. For completion rings, this value is also the MSI-X
4124 * vector number for the function the completion ring is associated
4127 uint16_t logical_id;
4130 * This field is used only when ring_type is a TX ring. This value
4131 * indicates what completion ring the TX ring is associated with.
4133 uint16_t cmpl_ring_id;
4136 * This field is used only when ring_type is a TX ring. This value
4137 * indicates what CoS queue the TX ring is associated with.
4144 /* This field is reserved for the future use. It shall be set to 0. */
4146 /* This field is reserved for the future use. It shall be set to 0. */
4151 /* This field is reserved for the future use. It shall be set to 0. */
4155 * This field is used only when ring_type is a TX ring. This input
4156 * indicates what statistics context this ring should be associated
4159 uint32_t stat_ctx_id;
4161 /* This field is reserved for the future use. It shall be set to 0. */
4165 * This field is used only when ring_type is a TX ring. Maximum BW
4166 * allocated to this TX ring in Mbps. The HWRM will translate this value
4167 * into byte counter and time interval used for this ring inside the
4173 * This field is used only when ring_type is a Completion ring. This
4174 * value indicates what interrupt mode should be used on this completion
4175 * ring. Note: In the legacy interrupt mode, no more than 16 completion
4176 * rings are allowed.
4179 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY (UINT32_C(0x0) << 0)
4181 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD (UINT32_C(0x1) << 0)
4183 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX (UINT32_C(0x2) << 0)
4184 /* No Interrupt - Polled mode */
4185 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL (UINT32_C(0x3) << 0)
4188 uint8_t unused_8[3];
4189 } __attribute__((packed));
4191 /* Output (16 bytes) */
4193 struct hwrm_ring_alloc_output {
4195 * Pass/Fail or error type Note: receiver to verify the in parameters,
4196 * and fail the call with an error when appropriate
4198 uint16_t error_code;
4200 /* This field returns the type of original request. */
4203 /* This field provides original sequence number of the command. */
4207 * This field is the length of the response in bytes. The last byte of
4208 * the response is a valid flag that will read as '1' when the command
4209 * has been completely written to memory.
4213 /* Physical number of ring allocated. */
4216 /* Logical number of ring allocated. */
4217 uint16_t logical_ring_id;
4224 * This field is used in Output records to indicate that the output is
4225 * completely written to RAM. This field should be read as '1' to
4226 * indicate that the output has been completely written. When writing a
4227 * command completion or response to an internal processor, the order of
4228 * writes has to be such that this field is written last.
4231 } __attribute__((packed));
4233 /* hwrm_ring_free */
4235 * Description: This command is used to free a ring and associated resources.
4237 /* Input (24 bytes) */
4239 struct hwrm_ring_free_input {
4241 * This value indicates what type of request this is. The format for the
4242 * rest of the command is determined by this field.
4247 * This value indicates the what completion ring the request will be
4248 * optionally completed on. If the value is -1, then no CR completion
4249 * will be generated. Any other value must be a valid CR ring_id value
4250 * for this function.
4254 /* This value indicates the command sequence number. */
4258 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4259 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4264 * This is the host address where the response will be written when the
4265 * request is complete. This area must be 16B aligned and must be
4266 * cleared to zero before the request is made.
4271 /* Completion Ring (CR) */
4272 #define HWRM_RING_FREE_INPUT_RING_TYPE_CMPL (UINT32_C(0x0) << 0)
4274 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX (UINT32_C(0x1) << 0)
4276 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX (UINT32_C(0x2) << 0)
4281 /* Physical number of ring allocated. */
4285 } __attribute__((packed));
4287 /* Output (16 bytes) */
4288 struct hwrm_ring_free_output {
4290 * Pass/Fail or error type Note: receiver to verify the in parameters,
4291 * and fail the call with an error when appropriate
4293 uint16_t error_code;
4295 /* This field returns the type of original request. */
4298 /* This field provides original sequence number of the command. */
4302 * This field is the length of the response in bytes. The last byte of
4303 * the response is a valid flag that will read as '1' when the command
4304 * has been completely written to memory.
4314 * This field is used in Output records to indicate that the output is
4315 * completely written to RAM. This field should be read as '1' to
4316 * indicate that the output has been completely written. When writing a
4317 * command completion or response to an internal processor, the order of
4318 * writes has to be such that this field is written last.
4321 } __attribute__((packed));
4323 /* hwrm_ring_grp_alloc */
4325 * Description: This API allocates and does basic preparation for a ring group.
4328 /* Input (24 bytes) */
4329 struct hwrm_ring_grp_alloc_input {
4331 * This value indicates what type of request this is. The format for the
4332 * rest of the command is determined by this field.
4337 * This value indicates the what completion ring the request will be
4338 * optionally completed on. If the value is -1, then no CR completion
4339 * will be generated. Any other value must be a valid CR ring_id value
4340 * for this function.
4344 /* This value indicates the command sequence number. */
4348 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4349 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4354 * This is the host address where the response will be written when the
4355 * request is complete. This area must be 16B aligned and must be
4356 * cleared to zero before the request is made.
4360 /* This value identifies the CR associated with the ring group. */
4363 /* This value identifies the main RR associated with the ring group. */
4367 * This value identifies the aggregation RR associated with the ring
4368 * group. If this value is 0xFF... (All Fs), then no Aggregation ring
4374 * This value identifies the statistics context associated with the ring
4378 } __attribute__((packed));
4380 /* Output (16 bytes) */
4381 struct hwrm_ring_grp_alloc_output {
4383 * Pass/Fail or error type Note: receiver to verify the in parameters,
4384 * and fail the call with an error when appropriate
4386 uint16_t error_code;
4388 /* This field returns the type of original request. */
4391 /* This field provides original sequence number of the command. */
4395 * This field is the length of the response in bytes. The last byte of
4396 * the response is a valid flag that will read as '1' when the command
4397 * has been completely written to memory.
4402 * This is the ring group ID value. Use this value to program the
4403 * default ring group for the VNIC or as table entries in an RSS/COS
4406 uint32_t ring_group_id;
4413 * This field is used in Output records to indicate that the output is
4414 * completely written to RAM. This field should be read as '1' to
4415 * indicate that the output has been completely written. When writing a
4416 * command completion or response to an internal processor, the order of
4417 * writes has to be such that this field is written last.
4420 } __attribute__((packed));
4422 /* hwrm_ring_grp_free */
4424 * Description: This API frees a ring group and associated resources. # If a
4425 * ring in the ring group is reset or free, then the associated rings in the
4426 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
4427 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
4428 * a part of executing this command, the HWRM shall reset all associated ring
4432 /* Input (24 bytes) */
4433 struct hwrm_ring_grp_free_input {
4435 * This value indicates what type of request this is. The format for the
4436 * rest of the command is determined by this field.
4441 * This value indicates the what completion ring the request will be
4442 * optionally completed on. If the value is -1, then no CR completion
4443 * will be generated. Any other value must be a valid CR ring_id value
4444 * for this function.
4448 /* This value indicates the command sequence number. */
4452 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4453 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4458 * This is the host address where the response will be written when the
4459 * request is complete. This area must be 16B aligned and must be
4460 * cleared to zero before the request is made.
4464 /* This is the ring group ID value. */
4465 uint32_t ring_group_id;
4468 } __attribute__((packed));
4470 /* Output (16 bytes) */
4471 struct hwrm_ring_grp_free_output {
4473 * Pass/Fail or error type Note: receiver to verify the in parameters,
4474 * and fail the call with an error when appropriate
4476 uint16_t error_code;
4478 /* This field returns the type of original request. */
4481 /* This field provides original sequence number of the command. */
4485 * This field is the length of the response in bytes. The last byte of
4486 * the response is a valid flag that will read as '1' when the command
4487 * has been completely written to memory.
4497 * This field is used in Output records to indicate that the output is
4498 * completely written to RAM. This field should be read as '1' to
4499 * indicate that the output has been completely written. When writing a
4500 * command completion or response to an internal processor, the order of
4501 * writes has to be such that this field is written last.
4504 } __attribute__((packed));
4506 /* hwrm_stat_ctx_alloc */
4508 * Description: This command allocates and does basic preparation for a stat
4512 /* Input (32 bytes) */
4513 struct hwrm_stat_ctx_alloc_input {
4515 * This value indicates what type of request this is. The format for the
4516 * rest of the command is determined by this field.
4521 * This value indicates the what completion ring the request will be
4522 * optionally completed on. If the value is -1, then no CR completion
4523 * will be generated. Any other value must be a valid CR ring_id value
4524 * for this function.
4528 /* This value indicates the command sequence number. */
4532 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4533 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4538 * This is the host address where the response will be written when the
4539 * request is complete. This area must be 16B aligned and must be
4540 * cleared to zero before the request is made.
4544 /* This is the address for statistic block. */
4545 uint64_t stats_dma_addr;
4548 * The statistic block update period in ms. e.g. 250ms, 500ms, 750ms,
4551 uint32_t update_period_ms;
4554 } __attribute__((packed));
4556 /* Output (16 bytes) */
4557 struct hwrm_stat_ctx_alloc_output {
4559 * Pass/Fail or error type Note: receiver to verify the in parameters,
4560 * and fail the call with an error when appropriate
4562 uint16_t error_code;
4564 /* This field returns the type of original request. */
4567 /* This field provides original sequence number of the command. */
4571 * This field is the length of the response in bytes. The last byte of
4572 * the response is a valid flag that will read as '1' when the command
4573 * has been completely written to memory.
4577 /* This is the statistics context ID value. */
4578 uint32_t stat_ctx_id;
4585 * This field is used in Output records to indicate that the output is
4586 * completely written to RAM. This field should be read as '1' to
4587 * indicate that the output has been completely written. When writing a
4588 * command completion or response to an internal processor, the order of
4589 * writes has to be such that this field is written last.
4592 } __attribute__((packed));
4594 /* hwrm_stat_ctx_clr_stats */
4595 /* Description: This command clears statistics of a context. */
4597 /* Input (24 bytes) */
4598 struct hwrm_stat_ctx_clr_stats_input {
4600 * This value indicates what type of request this is. The format for the
4601 * rest of the command is determined by this field.
4606 * This value indicates the what completion ring the request will be
4607 * optionally completed on. If the value is -1, then no CR completion
4608 * will be generated. Any other value must be a valid CR ring_id value
4609 * for this function.
4613 /* This value indicates the command sequence number. */
4617 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4618 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4623 * This is the host address where the response will be written when the
4624 * request is complete. This area must be 16B aligned and must be
4625 * cleared to zero before the request is made.
4629 /* ID of the statistics context that is being queried. */
4630 uint32_t stat_ctx_id;
4633 } __attribute__((packed));
4635 /* Output (16 bytes) */
4636 struct hwrm_stat_ctx_clr_stats_output {
4638 * Pass/Fail or error type Note: receiver to verify the in parameters,
4639 * and fail the call with an error when appropriate
4641 uint16_t error_code;
4643 /* This field returns the type of original request. */
4646 /* This field provides original sequence number of the command. */
4650 * This field is the length of the response in bytes. The last byte of
4651 * the response is a valid flag that will read as '1' when the command
4652 * has been completely written to memory.
4662 * This field is used in Output records to indicate that the output is
4663 * completely written to RAM. This field should be read as '1' to
4664 * indicate that the output has been completely written. When writing a
4665 * command completion or response to an internal processor, the order of
4666 * writes has to be such that this field is written last.
4669 } __attribute__((packed));
4671 /* hwrm_stat_ctx_free */
4672 /* Description: This command is used to free a stat context. */
4673 /* Input (24 bytes) */
4675 struct hwrm_stat_ctx_free_input {
4677 * This value indicates what type of request this is. The format for the
4678 * rest of the command is determined by this field.
4683 * This value indicates the what completion ring the request will be
4684 * optionally completed on. If the value is -1, then no CR completion
4685 * will be generated. Any other value must be a valid CR ring_id value
4686 * for this function.
4690 /* This value indicates the command sequence number. */
4694 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4695 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4700 * This is the host address where the response will be written when the
4701 * request is complete. This area must be 16B aligned and must be
4702 * cleared to zero before the request is made.
4706 /* ID of the statistics context that is being queried. */
4707 uint32_t stat_ctx_id;
4710 } __attribute__((packed));
4712 /* Output (16 bytes) */
4714 struct hwrm_stat_ctx_free_output {
4716 * Pass/Fail or error type Note: receiver to verify the in parameters,
4717 * and fail the call with an error when appropriate
4719 uint16_t error_code;
4721 /* This field returns the type of original request. */
4724 /* This field provides original sequence number of the command. */
4728 * This field is the length of the response in bytes. The last byte of
4729 * the response is a valid flag that will read as '1' when the command
4730 * has been completely written to memory.
4734 /* This is the statistics context ID value. */
4735 uint32_t stat_ctx_id;
4742 * This field is used in Output records to indicate that the output is
4743 * completely written to RAM. This field should be read as '1' to
4744 * indicate that the output has been completely written. When writing a
4745 * command completion or response to an internal processor, the order of
4746 * writes has to be such that this field is written last.
4749 } __attribute__((packed));
4751 /* hwrm_vnic_alloc */
4753 * Description: This VNIC is a resource in the RX side of the chip that is used
4754 * to represent a virtual host "interface". # At the time of VNIC allocation or
4755 * configuration, the function can specify whether it wants the requested VNIC
4756 * to be the default VNIC for the function or not. # If a function requests
4757 * allocation of a VNIC for the first time and a VNIC is successfully allocated
4758 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
4759 * for that function. # The default VNIC shall be used for the default action
4760 * for a partition or function. # For each VNIC allocated on a function, a
4761 * mapping on the RX side to map the allocated VNIC to source virtual interface
4762 * shall be performed by the HWRM. This should be hidden to the function driver
4763 * requesting the VNIC allocation. This enables broadcast/multicast replication
4764 * with source knockout. # If multicast replication with source knockout is
4765 * enabled, then the internal VNIC to SVIF mapping data structures shall be
4766 * programmed at the time of VNIC allocation.
4769 /* Input (24 bytes) */
4770 struct hwrm_vnic_alloc_input {
4772 * This value indicates what type of request this is. The format for the
4773 * rest of the command is determined by this field.
4778 * This value indicates the what completion ring the request will be
4779 * optionally completed on. If the value is -1, then no CR completion
4780 * will be generated. Any other value must be a valid CR ring_id value
4781 * for this function.
4785 /* This value indicates the command sequence number. */
4789 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4790 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4795 * This is the host address where the response will be written when the
4796 * request is complete. This area must be 16B aligned and must be
4797 * cleared to zero before the request is made.
4802 * When this bit is '1', this VNIC is requested to be the default VNIC
4803 * for this function.
4805 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4809 } __attribute__((packed));
4811 /* Output (16 bytes) */
4812 struct hwrm_vnic_alloc_output {
4814 * Pass/Fail or error type Note: receiver to verify the in parameters,
4815 * and fail the call with an error when appropriate
4817 uint16_t error_code;
4819 /* This field returns the type of original request. */
4822 /* This field provides original sequence number of the command. */
4826 * This field is the length of the response in bytes. The last byte of
4827 * the response is a valid flag that will read as '1' when the command
4828 * has been completely written to memory.
4832 /* Logical vnic ID */
4840 * This field is used in Output records to indicate that the output is
4841 * completely written to RAM. This field should be read as '1' to
4842 * indicate that the output has been completely written. When writing a
4843 * command completion or response to an internal processor, the order of
4844 * writes has to be such that this field is written last.
4847 } __attribute__((packed));
4850 /* Description: Configure the RX VNIC structure. */
4852 /* Input (40 bytes) */
4853 struct hwrm_vnic_cfg_input {
4855 * This value indicates what type of request this is. The format for the
4856 * rest of the command is determined by this field.
4861 * This value indicates the what completion ring the request will be
4862 * optionally completed on. If the value is -1, then no CR completion
4863 * will be generated. Any other value must be a valid CR ring_id value
4864 * for this function.
4868 /* This value indicates the command sequence number. */
4872 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4873 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4878 * This is the host address where the response will be written when the
4879 * request is complete. This area must be 16B aligned and must be
4880 * cleared to zero before the request is made.
4885 * When this bit is '1', the VNIC is requested to be the default VNIC
4888 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
4890 * When this bit is '1', the VNIC is being configured to strip VLAN in
4891 * the RX path. If set to '0', then VLAN stripping is disabled on this
4894 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
4896 * When this bit is '1', the VNIC is being configured to buffer receive
4897 * packets in the hardware until the host posts new receive buffers. If
4898 * set to '0', then bd_stall is being configured to be disabled on this
4901 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
4903 * When this bit is '1', the VNIC is being configured to receive both
4904 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is not
4905 * configured to be operating in dual VNIC mode.
4907 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
4909 * When this flag is set to '1', the VNIC is requested to be configured
4910 * to receive only RoCE traffic. If this flag is set to '0', then this
4911 * flag shall be ignored by the HWRM. If roce_dual_vnic_mode flag is set
4912 * to '1', then the HWRM client shall not set this flag to '1'.
4914 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
4917 /* This bit must be '1' for the dflt_ring_grp field to be configured. */
4918 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
4919 /* This bit must be '1' for the rss_rule field to be configured. */
4920 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
4921 /* This bit must be '1' for the cos_rule field to be configured. */
4922 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
4923 /* This bit must be '1' for the lb_rule field to be configured. */
4924 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
4925 /* This bit must be '1' for the mru field to be configured. */
4926 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
4929 /* Logical vnic ID */
4933 * Default Completion ring for the VNIC. This ring will be chosen if
4934 * packet does not match any RSS rules and if there is no COS rule.
4936 uint16_t dflt_ring_grp;
4939 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if there is no
4945 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if there is no
4951 * RSS ID for load balancing rule/table structure. 0xFF... (All Fs) if
4952 * there is no LB rule.
4957 * The maximum receive unit of the vnic. Each vnic is associated with a
4958 * function. The vnic mru value overwrites the mru setting of the
4959 * associated function. The HWRM shall make sure that vnic mru does not
4960 * exceed the mru of the port the function is associated with.
4965 } __attribute__((packed));
4967 /* Output (16 bytes) */
4968 struct hwrm_vnic_cfg_output {
4970 * Pass/Fail or error type Note: receiver to verify the in parameters,
4971 * and fail the call with an error when appropriate
4973 uint16_t error_code;
4975 /* This field returns the type of original request. */
4978 /* This field provides original sequence number of the command. */
4982 * This field is the length of the response in bytes. The last byte of
4983 * the response is a valid flag that will read as '1' when the command
4984 * has been completely written to memory.
4994 * This field is used in Output records to indicate that the output is
4995 * completely written to RAM. This field should be read as '1' to
4996 * indicate that the output has been completely written. When writing a
4997 * command completion or response to an internal processor, the order of
4998 * writes has to be such that this field is written last.
5001 } __attribute__((packed));
5003 /* hwrm_vnic_free */
5005 * Description: Free a VNIC resource. Idle any resources associated with the
5006 * VNIC as well as the VNIC. Reset and release all resources associated with the
5010 /* Input (24 bytes) */
5011 struct hwrm_vnic_free_input {
5013 * This value indicates what type of request this is. The format for the
5014 * rest of the command is determined by this field.
5019 * This value indicates the what completion ring the request will be
5020 * optionally completed on. If the value is -1, then no CR completion
5021 * will be generated. Any other value must be a valid CR ring_id value
5022 * for this function.
5026 /* This value indicates the command sequence number. */
5030 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5031 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5036 * This is the host address where the response will be written when the
5037 * request is complete. This area must be 16B aligned and must be
5038 * cleared to zero before the request is made.
5042 /* Logical vnic ID */
5046 } __attribute__((packed));
5048 /* Output (16 bytes) */
5049 struct hwrm_vnic_free_output {
5051 * Pass/Fail or error type Note: receiver to verify the in parameters,
5052 * and fail the call with an error when appropriate
5054 uint16_t error_code;
5056 /* This field returns the type of original request. */
5059 /* This field provides original sequence number of the command. */
5063 * This field is the length of the response in bytes. The last byte of
5064 * the response is a valid flag that will read as '1' when the command
5065 * has been completely written to memory.
5075 * This field is used in Output records to indicate that the output is
5076 * completely written to RAM. This field should be read as '1' to
5077 * indicate that the output has been completely written. When writing a
5078 * command completion or response to an internal processor, the order of
5079 * writes has to be such that this field is written last.
5082 } __attribute__((packed));
5084 /* hwrm_vnic_rss_cfg */
5085 /* Description: This function is used to enable RSS configuration. */
5087 /* Input (48 bytes) */
5088 struct hwrm_vnic_rss_cfg_input {
5090 * This value indicates what type of request this is. The format for the
5091 * rest of the command is determined by this field.
5096 * This value indicates the what completion ring the request will be
5097 * optionally completed on. If the value is -1, then no CR completion
5098 * will be generated. Any other value must be a valid CR ring_id value
5099 * for this function.
5103 /* This value indicates the command sequence number. */
5107 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5108 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5113 * This is the host address where the response will be written when the
5114 * request is complete. This area must be 16B aligned and must be
5115 * cleared to zero before the request is made.
5120 * When this bit is '1', the RSS hash shall be computed over source and
5121 * destination IPv4 addresses of IPv4 packets.
5123 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
5125 * When this bit is '1', the RSS hash shall be computed over
5126 * source/destination IPv4 addresses and source/destination ports of
5129 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
5131 * When this bit is '1', the RSS hash shall be computed over
5132 * source/destination IPv4 addresses and source/destination ports of
5135 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
5137 * When this bit is '1', the RSS hash shall be computed over source and
5138 * destination IPv4 addresses of IPv6 packets.
5140 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
5142 * When this bit is '1', the RSS hash shall be computed over
5143 * source/destination IPv6 addresses and source/destination ports of
5146 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
5148 * When this bit is '1', the RSS hash shall be computed over
5149 * source/destination IPv6 addresses and source/destination ports of
5152 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
5157 /* This is the address for rss ring group table */
5158 uint64_t ring_grp_tbl_addr;
5160 /* This is the address for rss hash key table */
5161 uint64_t hash_key_tbl_addr;
5163 /* Index to the rss indirection table. */
5164 uint16_t rss_ctx_idx;
5166 uint16_t unused_1[3];
5167 } __attribute__((packed));
5169 /* Output (16 bytes) */
5170 struct hwrm_vnic_rss_cfg_output {
5172 * Pass/Fail or error type Note: receiver to verify the in parameters,
5173 * and fail the call with an error when appropriate
5175 uint16_t error_code;
5177 /* This field returns the type of original request. */
5180 /* This field provides original sequence number of the command. */
5184 * This field is the length of the response in bytes. The last byte of
5185 * the response is a valid flag that will read as '1' when the command
5186 * has been completely written to memory.
5196 * This field is used in Output records to indicate that the output is
5197 * completely written to RAM. This field should be read as '1' to
5198 * indicate that the output has been completely written. When writing a
5199 * command completion or response to an internal processor, the order of
5200 * writes has to be such that this field is written last.
5203 } __attribute__((packed));
5205 /* Input (16 bytes) */
5206 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
5208 * This value indicates what type of request this is. The format for the
5209 * rest of the command is determined by this field.
5214 * This value indicates the what completion ring the request will be
5215 * optionally completed on. If the value is -1, then no CR completion
5216 * will be generated. Any other value must be a valid CR ring_id value
5217 * for this function.
5221 /* This value indicates the command sequence number. */
5225 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5226 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5231 * This is the host address where the response will be written when the
5232 * request is complete. This area must be 16B aligned and must be
5233 * cleared to zero before the request is made.
5236 } __attribute__((packed));
5238 /* Output (16 bytes) */
5240 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
5242 * Pass/Fail or error type Note: receiver to verify the in parameters,
5243 * and fail the call with an error when appropriate
5245 uint16_t error_code;
5247 /* This field returns the type of original request. */
5250 /* This field provides original sequence number of the command. */
5254 * This field is the length of the response in bytes. The last byte of
5255 * the response is a valid flag that will read as '1' when the command
5256 * has been completely written to memory.
5260 /* rss_cos_lb_ctx_id is 16 b */
5261 uint16_t rss_cos_lb_ctx_id;
5270 * This field is used in Output records to indicate that the output is
5271 * completely written to RAM. This field should be read as '1' to
5272 * indicate that the output has been completely written. When writing a
5273 * command completion or response to an internal processor, the order of
5274 * writes has to be such that this field is written last.
5277 } __attribute__((packed));
5279 /* hwrm_vnic_rss_cos_lb_ctx_free */
5280 /* Description: This function can be used to free COS/Load Balance context. */
5281 /* Input (24 bytes) */
5283 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
5285 * This value indicates what type of request this is. The format for the
5286 * rest of the command is determined by this field.
5291 * This value indicates the what completion ring the request will be
5292 * optionally completed on. If the value is -1, then no CR completion
5293 * will be generated. Any other value must be a valid CR ring_id value
5294 * for this function.
5298 /* This value indicates the command sequence number. */
5302 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5303 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5308 * This is the host address where the response will be written when the
5309 * request is complete. This area must be 16B aligned and must be
5310 * cleared to zero before the request is made.
5314 /* rss_cos_lb_ctx_id is 16 b */
5315 uint16_t rss_cos_lb_ctx_id;
5317 uint16_t unused_0[3];
5318 } __attribute__((packed));
5320 /* Output (16 bytes) */
5321 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
5323 * Pass/Fail or error type Note: receiver to verify the in parameters,
5324 * and fail the call with an error when appropriate
5326 uint16_t error_code;
5328 /* This field returns the type of original request. */
5331 /* This field provides original sequence number of the command. */
5335 * This field is the length of the response in bytes. The last byte of
5336 * the response is a valid flag that will read as '1' when the command
5337 * has been completely written to memory.
5347 * This field is used in Output records to indicate that the output is
5348 * completely written to RAM. This field should be read as '1' to
5349 * indicate that the output has been completely written. When writing a
5350 * command completion or response to an internal processor, the order of
5351 * writes has to be such that this field is written last.
5354 } __attribute__((packed));
5356 /* Output (32 bytes) */
5357 struct hwrm_queue_qportcfg_output {
5359 * Pass/Fail or error type Note: receiver to verify the in parameters,
5360 * and fail the call with an error when appropriate
5362 uint16_t error_code;
5364 /* This field returns the type of original request. */
5367 /* This field provides original sequence number of the command. */
5371 * This field is the length of the response in bytes. The last byte of
5372 * the response is a valid flag that will read as '1' when the command
5373 * has been completely written to memory.
5377 /* The maximum number of queues that can be configured. */
5378 uint8_t max_configurable_queues;
5380 /* The maximum number of lossless queues that can be configured. */
5381 uint8_t max_configurable_lossless_queues;
5384 * 0 - Not allowed. Non-zero - Allowed. If this value is non-zero, then
5385 * the HWRM shall allow the host SW driver to configure queues using
5388 uint8_t queue_cfg_allowed;
5391 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5392 * the HWRM shall allow the host SW driver to configure queue buffers
5393 * using hwrm_queue_buffers_cfg.
5395 uint8_t queue_buffers_cfg_allowed;
5398 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5399 * the HWRM shall allow the host SW driver to configure PFC using
5400 * hwrm_queue_pfcenable_cfg.
5402 uint8_t queue_pfcenable_cfg_allowed;
5405 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5406 * the HWRM shall allow the host SW driver to configure Priority to CoS
5407 * mapping using hwrm_queue_pri2cos_cfg.
5409 uint8_t queue_pri2cos_cfg_allowed;
5412 * 0 - Not allowed. Non-zero - Allowed If this value is non-zero, then
5413 * the HWRM shall allow the host SW driver to configure CoS Bandwidth
5414 * configuration using hwrm_queue_cos2bw_cfg.
5416 uint8_t queue_cos2bw_cfg_allowed;
5418 /* ID of CoS Queue 0. FF - Invalid id */
5421 /* This value is applicable to CoS queues only. */
5422 /* Lossy (best-effort) */
5423 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
5424 (UINT32_C(0x0) << 0)
5426 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
5427 (UINT32_C(0x1) << 0)
5429 * Set to 0xFF... (All Fs) if there is no service profile
5432 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
5433 (UINT32_C(0xff) << 0)
5434 uint8_t queue_id0_service_profile;
5436 /* ID of CoS Queue 1. FF - Invalid id */
5438 /* This value is applicable to CoS queues only. */
5439 /* Lossy (best-effort) */
5440 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
5441 (UINT32_C(0x0) << 0)
5443 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
5444 (UINT32_C(0x1) << 0)
5446 * Set to 0xFF... (All Fs) if there is no service profile
5449 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
5450 (UINT32_C(0xff) << 0)
5451 uint8_t queue_id1_service_profile;
5453 /* ID of CoS Queue 2. FF - Invalid id */
5455 /* This value is applicable to CoS queues only. */
5456 /* Lossy (best-effort) */
5457 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
5458 (UINT32_C(0x0) << 0)
5460 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
5461 (UINT32_C(0x1) << 0)
5463 * Set to 0xFF... (All Fs) if there is no service profile
5466 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
5467 (UINT32_C(0xff) << 0)
5468 uint8_t queue_id2_service_profile;
5470 /* ID of CoS Queue 3. FF - Invalid id */
5473 /* This value is applicable to CoS queues only. */
5474 /* Lossy (best-effort) */
5475 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
5476 (UINT32_C(0x0) << 0)
5478 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
5479 (UINT32_C(0x1) << 0)
5481 * Set to 0xFF... (All Fs) if there is no service profile
5484 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
5485 (UINT32_C(0xff) << 0)
5486 uint8_t queue_id3_service_profile;
5488 /* ID of CoS Queue 4. FF - Invalid id */
5490 /* This value is applicable to CoS queues only. */
5491 /* Lossy (best-effort) */
5492 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
5493 (UINT32_C(0x0) << 0)
5495 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
5496 (UINT32_C(0x1) << 0)
5498 * Set to 0xFF... (All Fs) if there is no service profile
5501 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
5502 (UINT32_C(0xff) << 0)
5503 uint8_t queue_id4_service_profile;
5505 /* ID of CoS Queue 5. FF - Invalid id */
5508 /* This value is applicable to CoS queues only. */
5509 /* Lossy (best-effort) */
5510 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
5511 (UINT32_C(0x0) << 0)
5513 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
5514 (UINT32_C(0x1) << 0)
5516 * Set to 0xFF... (All Fs) if there is no service profile
5519 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
5520 (UINT32_C(0xff) << 0)
5521 uint8_t queue_id5_service_profile;
5523 /* ID of CoS Queue 6. FF - Invalid id */
5524 uint8_t queue_id6_service_profile;
5525 /* This value is applicable to CoS queues only. */
5526 /* Lossy (best-effort) */
5527 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
5528 (UINT32_C(0x0) << 0)
5530 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
5531 (UINT32_C(0x1) << 0)
5533 * Set to 0xFF... (All Fs) if there is no service profile
5536 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
5537 (UINT32_C(0xff) << 0)
5540 /* ID of CoS Queue 7. FF - Invalid id */
5543 /* This value is applicable to CoS queues only. */
5544 /* Lossy (best-effort) */
5545 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
5546 (UINT32_C(0x0) << 0)
5548 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
5549 (UINT32_C(0x1) << 0)
5551 * Set to 0xFF... (All Fs) if there is no service profile
5554 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
5555 (UINT32_C(0xff) << 0)
5556 uint8_t queue_id7_service_profile;
5559 * This field is used in Output records to indicate that the output is
5560 * completely written to RAM. This field should be read as '1' to
5561 * indicate that the output has been completely written. When writing a
5562 * command completion or response to an internal processor, the order of
5563 * writes has to be such that this field is written last.
5566 } __attribute__((packed));
5568 /* hwrm_func_drv_rgtr */
5570 * Description: This command is used by the function driver to register its
5571 * information with the HWRM. A function driver shall implement this command. A
5572 * function driver shall use this command during the driver initialization right
5573 * after the HWRM version discovery and default ring resources allocation.
5576 /* Input (80 bytes) */
5577 struct hwrm_func_drv_rgtr_input {
5579 * This value indicates what type of request this is. The format for the
5580 * rest of the command is determined by this field.
5585 * This value indicates the what completion ring the request will be
5586 * optionally completed on. If the value is -1, then no CR completion
5587 * will be generated. Any other value must be a valid CR ring_id value
5588 * for this function.
5592 /* This value indicates the command sequence number. */
5596 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5597 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5602 * This is the host address where the response will be written when the
5603 * request is complete. This area must be 16B aligned and must be
5604 * cleared to zero before the request is made.
5609 * When this bit is '1', the function driver is requesting all requests
5610 * from its children VF drivers to be forwarded to itself. This flag can
5611 * only be set by the PF driver. If a VF driver sets this flag, it
5612 * should be ignored by the HWRM.
5614 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
5616 * When this bit is '1', the function is requesting none of the requests
5617 * from its children VF drivers to be forwarded to itself. This flag can
5618 * only be set by the PF driver. If a VF driver sets this flag, it
5619 * should be ignored by the HWRM.
5621 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
5624 /* This bit must be '1' for the os_type field to be configured. */
5625 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
5626 /* This bit must be '1' for the ver field to be configured. */
5627 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
5628 /* This bit must be '1' for the timestamp field to be configured. */
5629 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
5630 /* This bit must be '1' for the vf_req_fwd field to be configured. */
5631 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_REQ_FWD UINT32_C(0x8)
5633 * This bit must be '1' for the async_event_fwd field to be configured.
5635 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD \
5639 /* This value indicates the type of OS. */
5641 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN \
5642 (UINT32_C(0x0) << 0)
5643 /* Other OS not listed below. */
5644 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER \
5645 (UINT32_C(0x1) << 0)
5647 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS \
5648 (UINT32_C(0xe) << 0)
5650 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS \
5651 (UINT32_C(0x12) << 0)
5653 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS \
5654 (UINT32_C(0x1d) << 0)
5656 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX \
5657 (UINT32_C(0x24) << 0)
5659 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD \
5660 (UINT32_C(0x2a) << 0)
5661 /* VMware ESXi OS. */
5662 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI \
5663 (UINT32_C(0x68) << 0)
5664 /* Microsoft Windows 8 64-bit OS. */
5665 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 \
5666 (UINT32_C(0x73) << 0)
5667 /* Microsoft Windows Server 2012 R2 OS. */
5668 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 \
5669 (UINT32_C(0x74) << 0)
5672 /* This is the major version of the driver. */
5675 /* This is the minor version of the driver. */
5678 /* This is the update version of the driver. */
5685 * This is a 32-bit timestamp provided by the driver for keep alive. The
5686 * timestamp is in multiples of 1ms.
5693 * This is a 256-bit bit mask provided by the PF driver for letting the
5694 * HWRM know what commands issued by the VF driver to the HWRM should be
5695 * forwarded to the PF driver. Nth bit refers to the Nth req_type.
5696 * Setting Nth bit to 1 indicates that requests from the VF driver with
5697 * req_type equal to N shall be forwarded to the parent PF driver. This
5698 * field is not valid for the VF driver.
5700 uint32_t vf_req_fwd[8];
5703 * This is a 256-bit bit mask provided by the function driver (PF or VF
5704 * driver) to indicate the list of asynchronous event completions to be
5705 * forwarded. Nth bit refers to the Nth event_id. Setting Nth bit to 1
5706 * by the function driver shall result in the HWRM forwarding
5707 * asynchronous event completion with event_id equal to N. If all bits
5708 * are set to 0 (value of 0), then the HWRM shall not forward any
5709 * asynchronous event completion to this function driver.
5711 uint32_t async_event_fwd[8];
5712 } __attribute__((packed));
5714 /* Output (16 bytes) */
5716 struct hwrm_func_drv_rgtr_output {
5718 * Pass/Fail or error type Note: receiver to verify the in parameters,
5719 * and fail the call with an error when appropriate
5721 uint16_t error_code;
5723 /* This field returns the type of original request. */
5726 /* This field provides original sequence number of the command. */
5730 * This field is the length of the response in bytes. The last byte of
5731 * the response is a valid flag that will read as '1' when the command
5732 * has been completely written to memory.
5742 * This field is used in Output records to indicate that the output is
5743 * completely written to RAM. This field should be read as '1' to
5744 * indicate that the output has been completely written. When writing a
5745 * command completion or response to an internal processor, the order of
5746 * writes has to be such that this field is written last.
5749 } __attribute__((packed));
5751 /* hwrm_func_drv_unrgtr */
5753 * Description: This command is used by the function driver to un register with
5754 * the HWRM. A function driver shall implement this command. A function driver
5755 * shall use this command during the driver unloading.
5757 /* Input (24 bytes) */
5759 struct hwrm_func_drv_unrgtr_input {
5761 * This value indicates what type of request this is. The format for the
5762 * rest of the command is determined by this field.
5767 * This value indicates the what completion ring the request will be
5768 * optionally completed on. If the value is -1, then no CR completion
5769 * will be generated. Any other value must be a valid CR ring_id value
5770 * for this function.
5774 /* This value indicates the command sequence number. */
5778 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5779 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5784 * This is the host address where the response will be written when the
5785 * request is complete. This area must be 16B aligned and must be
5786 * cleared to zero before the request is made.
5791 * When this bit is '1', the function driver is notifying the HWRM to
5792 * prepare for the shutdown.
5794 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
5799 } __attribute__((packed));
5801 /* Output (16 bytes) */
5802 struct hwrm_func_drv_unrgtr_output {
5804 * Pass/Fail or error type Note: receiver to verify the in parameters,
5805 * and fail the call with an error when appropriate
5807 uint16_t error_code;
5809 /* This field returns the type of original request. */
5812 /* This field provides original sequence number of the command. */
5816 * This field is the length of the response in bytes. The last byte of
5817 * the response is a valid flag that will read as '1' when the command
5818 * has been completely written to memory.
5828 * This field is used in Output records to indicate that the output is
5829 * completely written to RAM. This field should be read as '1' to
5830 * indicate that the output has been completely written. When writing a
5831 * command completion or response to an internal processor, the order of
5832 * writes has to be such that this field is written last.
5835 } __attribute__((packed));
5837 /* hwrm_func_qcfg */
5839 * Description: This command returns the current configuration of a function.
5840 * The input FID value is used to indicate what function is being queried. This
5841 * allows a physical function driver to query virtual functions that are
5842 * children of the physical function. The output FID value is needed to
5843 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
5846 /* Input (24 bytes) */
5847 struct hwrm_func_qcfg_input {
5849 * This value indicates what type of request this is. The format for the
5850 * rest of the command is determined by this field.
5854 * This value indicates the what completion ring the request will be
5855 * optionally completed on. If the value is -1, then no CR completion
5856 * will be generated. Any other value must be a valid CR ring_id value
5857 * for this function.
5860 /* This value indicates the command sequence number. */
5863 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
5864 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
5868 * This is the host address where the response will be written when the
5869 * request is complete. This area must be 16B aligned and must be
5870 * cleared to zero before the request is made.
5874 * Function ID of the function that is being queried. 0xFF... (All Fs)
5875 * if the query is for the requesting function.
5879 uint16_t unused_0[3];
5880 } __attribute__((packed));
5882 /* Output (72 bytes) */
5883 struct hwrm_func_qcfg_output {
5885 * Pass/Fail or error type Note: receiver to verify the in parameters,
5886 * and fail the call with an error when appropriate
5888 uint16_t error_code;
5889 /* This field returns the type of original request. */
5891 /* This field provides original sequence number of the command. */
5894 * This field is the length of the response in bytes. The last byte of
5895 * the response is a valid flag that will read as '1' when the command
5896 * has been completely written to memory.
5900 * FID value. This value is used to identify operations on the PCI bus
5901 * as belonging to a particular PCI function.
5905 * Port ID of port that this function is associated with. 0xFF... (All
5906 * Fs) if this function is not associated with any port.
5910 * This value is the current VLAN setting for this function. The value
5911 * of 0 for this field indicates no priority tagging or VLAN is used.
5912 * This VLAN is in 802.1Q tag format.
5920 * This value is current MAC address configured for this function. A
5921 * value of 00-00-00-00-00-00 indicates no MAC address is currently
5924 uint8_t mac_address[6];
5927 * This value is current PCI ID of this function. If ARI is enabled,
5928 * then it is Bus Number (8b):Function Number(8b). Otherwise, it is Bus
5929 * Number (8b):Device Number (4b):Function Number(4b).
5932 /* The number of RSS/COS contexts currently allocated to the function. */
5933 uint16_t alloc_rsscos_ctx;
5935 * The number of completion rings currently allocated to the function.
5936 * This does not include the rings allocated to any children functions
5939 uint16_t alloc_cmpl_rings;
5941 * The number of transmit rings currently allocated to the function.
5942 * This does not include the rings allocated to any children functions
5945 uint16_t alloc_tx_rings;
5947 * The number of receive rings currently allocated to the function. This
5948 * does not include the rings allocated to any children functions if
5951 uint16_t alloc_rx_rings;
5952 /* The allocated number of L2 contexts to the function. */
5953 uint16_t alloc_l2_ctx;
5954 /* The allocated number of vnics to the function. */
5955 uint16_t alloc_vnics;
5957 * The maximum transmission unit of the function. For rings allocated on
5958 * this function, this default value is used if ring MTU is not
5963 * The maximum receive unit of the function. For vnics allocated on this
5964 * function, this default value is used if vnic MRU is not specified.
5967 /* The statistics context assigned to a function. */
5968 uint16_t stat_ctx_id;
5970 * The HWRM shall return Unknown value for this field when this command
5971 * is used to query VF's configuration.
5973 /* Single physical function */
5974 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF \
5975 (UINT32_C(0x0) << 0)
5976 /* Multiple physical functions */
5977 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS \
5978 (UINT32_C(0x1) << 0)
5979 /* Network Partitioning 1.0 */
5980 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 \
5981 (UINT32_C(0x2) << 0)
5982 /* Network Partitioning 1.5 */
5983 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 \
5984 (UINT32_C(0x3) << 0)
5985 /* Network Partitioning 2.0 */
5986 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 \
5987 (UINT32_C(0x4) << 0)
5989 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN \
5990 (UINT32_C(0xff) << 0)
5991 uint8_t port_partition_type;
5994 /* The default VNIC ID assigned to a function that is being queried. */
5995 uint16_t dflt_vnic_id;
6000 * Minimum BW allocated for this function in Mbps. The HWRM will
6001 * translate this value into byte counter and time interval used for the
6002 * scheduler inside the device. A value of 0 indicates the minimum
6003 * bandwidth is not configured.
6007 * Maximum BW allocated for this function in Mbps. The HWRM will
6008 * translate this value into byte counter and time interval used for the
6009 * scheduler inside the device. A value of 0 indicates that the maximum
6010 * bandwidth is not configured.
6014 * This value indicates the Edge virtual bridge mode for the domain that
6015 * this function belongs to.
6017 /* No Edge Virtual Bridging (EVB) */
6018 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB (UINT32_C(0x0) << 0)
6019 /* Virtual Ethernet Bridge (VEB) */
6020 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB (UINT32_C(0x1) << 0)
6021 /* Virtual Ethernet Port Aggregator (VEPA) */
6022 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA (UINT32_C(0x2) << 0)
6028 * The number of allocated multicast filters for this function on the RX
6031 uint32_t alloc_mcast_filters;
6032 /* The number of allocated HW ring groups for this function. */
6033 uint32_t alloc_hw_ring_grps;
6039 * This field is used in Output records to indicate that the output is
6040 * completely written to RAM. This field should be read as '1' to
6041 * indicate that the output has been completely written. When writing a
6042 * command completion or response to an internal processor, the order of
6043 * writes has to be such that this field is written last.
6046 } __attribute__((packed));