f08065b2821da2b0bd029eb616eaaba0dad99e5e
[dpdk.git] / drivers / net / bnxt / tf_ulp / ulp_template_db_enum.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2014-2020 Broadcom
3  * All rights reserved.
4  */
5
6 #ifndef ULP_TEMPLATE_DB_H_
7 #define ULP_TEMPLATE_DB_H_
8
9 #define BNXT_ULP_REGFILE_MAX_SZ 19
10 #define BNXT_ULP_MAX_NUM_DEVICES 4
11 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2
12 #define BNXT_ULP_CACHE_TBL_MAX_SZ 4
13 #define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048
14 #define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 155
15 #define BNXT_ULP_CLASS_HID_LOW_PRIME 7919
16 #define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907
17 #define BNXT_ULP_CLASS_HID_SHFTR 32
18 #define BNXT_ULP_CLASS_HID_SHFTL 31
19 #define BNXT_ULP_CLASS_HID_MASK 2047
20 #define BNXT_ULP_ACT_SIG_TBL_MAX_SZ 4096
21 #define BNXT_ULP_ACT_MATCH_LIST_MAX_SZ 86
22 #define BNXT_ULP_ACT_HID_LOW_PRIME 7919
23 #define BNXT_ULP_ACT_HID_HIGH_PRIME 4721
24 #define BNXT_ULP_ACT_HID_SHFTR 23
25 #define BNXT_ULP_ACT_HID_SHFTL 23
26 #define BNXT_ULP_ACT_HID_MASK 4095
27 #define BNXT_ULP_CACHE_TBL_IDENT_MAX_NUM 2
28 #define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 8
29 #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1
30
31 enum bnxt_ulp_action_bit {
32         BNXT_ULP_ACTION_BIT_MARK             = 0x0000000000000001,
33         BNXT_ULP_ACTION_BIT_DROP             = 0x0000000000000002,
34         BNXT_ULP_ACTION_BIT_COUNT            = 0x0000000000000004,
35         BNXT_ULP_ACTION_BIT_RSS              = 0x0000000000000008,
36         BNXT_ULP_ACTION_BIT_METER            = 0x0000000000000010,
37         BNXT_ULP_ACTION_BIT_VXLAN_DECAP      = 0x0000000000000020,
38         BNXT_ULP_ACTION_BIT_POP_MPLS         = 0x0000000000000040,
39         BNXT_ULP_ACTION_BIT_PUSH_MPLS        = 0x0000000000000080,
40         BNXT_ULP_ACTION_BIT_MAC_SWAP         = 0x0000000000000100,
41         BNXT_ULP_ACTION_BIT_SET_MAC_SRC      = 0x0000000000000200,
42         BNXT_ULP_ACTION_BIT_SET_MAC_DST      = 0x0000000000000400,
43         BNXT_ULP_ACTION_BIT_POP_VLAN         = 0x0000000000000800,
44         BNXT_ULP_ACTION_BIT_PUSH_VLAN        = 0x0000000000001000,
45         BNXT_ULP_ACTION_BIT_SET_VLAN_PCP     = 0x0000000000002000,
46         BNXT_ULP_ACTION_BIT_SET_VLAN_VID     = 0x0000000000004000,
47         BNXT_ULP_ACTION_BIT_SET_IPV4_SRC     = 0x0000000000008000,
48         BNXT_ULP_ACTION_BIT_SET_IPV4_DST     = 0x0000000000010000,
49         BNXT_ULP_ACTION_BIT_SET_IPV6_SRC     = 0x0000000000020000,
50         BNXT_ULP_ACTION_BIT_SET_IPV6_DST     = 0x0000000000040000,
51         BNXT_ULP_ACTION_BIT_DEC_TTL          = 0x0000000000080000,
52         BNXT_ULP_ACTION_BIT_SET_TP_SRC       = 0x0000000000100000,
53         BNXT_ULP_ACTION_BIT_SET_TP_DST       = 0x0000000000200000,
54         BNXT_ULP_ACTION_BIT_VXLAN_ENCAP      = 0x0000000000400000,
55         BNXT_ULP_ACTION_BIT_LAST             = 0x0000000000800000
56 };
57
58 enum bnxt_ulp_hdr_bit {
59         BNXT_ULP_HDR_BIT_O_ETH               = 0x0000000000000001,
60         BNXT_ULP_HDR_BIT_OO_VLAN             = 0x0000000000000002,
61         BNXT_ULP_HDR_BIT_OI_VLAN             = 0x0000000000000004,
62         BNXT_ULP_HDR_BIT_O_IPV4              = 0x0000000000000008,
63         BNXT_ULP_HDR_BIT_O_IPV6              = 0x0000000000000010,
64         BNXT_ULP_HDR_BIT_O_TCP               = 0x0000000000000020,
65         BNXT_ULP_HDR_BIT_O_UDP               = 0x0000000000000040,
66         BNXT_ULP_HDR_BIT_T_VXLAN             = 0x0000000000000080,
67         BNXT_ULP_HDR_BIT_T_GRE               = 0x0000000000000100,
68         BNXT_ULP_HDR_BIT_I_ETH               = 0x0000000000000200,
69         BNXT_ULP_HDR_BIT_IO_VLAN             = 0x0000000000000400,
70         BNXT_ULP_HDR_BIT_II_VLAN             = 0x0000000000000800,
71         BNXT_ULP_HDR_BIT_I_IPV4              = 0x0000000000001000,
72         BNXT_ULP_HDR_BIT_I_IPV6              = 0x0000000000002000,
73         BNXT_ULP_HDR_BIT_I_TCP               = 0x0000000000004000,
74         BNXT_ULP_HDR_BIT_I_UDP               = 0x0000000000008000,
75         BNXT_ULP_HDR_BIT_LAST                = 0x0000000000010000
76 };
77
78 enum bnxt_ulp_act_type {
79         BNXT_ULP_ACT_TYPE_NOT_SUPPORTED = 0,
80         BNXT_ULP_ACT_TYPE_SUPPORTED = 1,
81         BNXT_ULP_ACT_TYPE_END = 2,
82         BNXT_ULP_ACT_TYPE_LAST = 3
83 };
84
85 enum bnxt_ulp_byte_order {
86         BNXT_ULP_BYTE_ORDER_BE = 0,
87         BNXT_ULP_BYTE_ORDER_LE = 1,
88         BNXT_ULP_BYTE_ORDER_LAST = 2
89 };
90
91 enum bnxt_ulp_cf_idx {
92         BNXT_ULP_CF_IDX_NOT_USED = 0,
93         BNXT_ULP_CF_IDX_MPLS_TAG_NUM = 1,
94         BNXT_ULP_CF_IDX_O_VTAG_NUM = 2,
95         BNXT_ULP_CF_IDX_O_NO_VTAG = 3,
96         BNXT_ULP_CF_IDX_O_ONE_VTAG = 4,
97         BNXT_ULP_CF_IDX_O_TWO_VTAGS = 5,
98         BNXT_ULP_CF_IDX_I_VTAG_NUM = 6,
99         BNXT_ULP_CF_IDX_I_NO_VTAG = 7,
100         BNXT_ULP_CF_IDX_I_ONE_VTAG = 8,
101         BNXT_ULP_CF_IDX_I_TWO_VTAGS = 9,
102         BNXT_ULP_CF_IDX_INCOMING_IF = 10,
103         BNXT_ULP_CF_IDX_DIRECTION = 11,
104         BNXT_ULP_CF_IDX_SVIF_FLAG = 12,
105         BNXT_ULP_CF_IDX_O_L3 = 13,
106         BNXT_ULP_CF_IDX_I_L3 = 14,
107         BNXT_ULP_CF_IDX_O_L4 = 15,
108         BNXT_ULP_CF_IDX_I_L4 = 16,
109         BNXT_ULP_CF_IDX_DEV_PORT_ID = 17,
110         BNXT_ULP_CF_IDX_DRV_FUNC_SVIF = 18,
111         BNXT_ULP_CF_IDX_DRV_FUNC_SPIF = 19,
112         BNXT_ULP_CF_IDX_DRV_FUNC_PARIF = 20,
113         BNXT_ULP_CF_IDX_DRV_FUNC_VNIC = 21,
114         BNXT_ULP_CF_IDX_DRV_FUNC_PHY_PORT = 22,
115         BNXT_ULP_CF_IDX_VF_FUNC_SVIF = 23,
116         BNXT_ULP_CF_IDX_VF_FUNC_SPIF = 24,
117         BNXT_ULP_CF_IDX_VF_FUNC_PARIF = 25,
118         BNXT_ULP_CF_IDX_VF_FUNC_VNIC = 26,
119         BNXT_ULP_CF_IDX_PHY_PORT_SVIF = 27,
120         BNXT_ULP_CF_IDX_PHY_PORT_SPIF = 28,
121         BNXT_ULP_CF_IDX_PHY_PORT_PARIF = 29,
122         BNXT_ULP_CF_IDX_PHY_PORT_VPORT = 30,
123         BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG = 31,
124         BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG = 32,
125         BNXT_ULP_CF_IDX_ACT_DEC_TTL = 33,
126         BNXT_ULP_CF_IDX_ACT_T_DEC_TTL = 34,
127         BNXT_ULP_CF_IDX_ACT_PORT_IS_SET = 35,
128         BNXT_ULP_CF_IDX_ACT_PORT_TYPE = 36,
129         BNXT_ULP_CF_IDX_MATCH_PORT_TYPE = 37,
130         BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP = 38,
131         BNXT_ULP_CF_IDX_VF_TO_VF = 39,
132         BNXT_ULP_CF_IDX_L3_HDR_CNT = 40,
133         BNXT_ULP_CF_IDX_L4_HDR_CNT = 41,
134         BNXT_ULP_CF_IDX_VFR_MODE = 42,
135         BNXT_ULP_CF_IDX_LAST = 43
136 };
137
138 enum bnxt_ulp_cond_opcode {
139         BNXT_ULP_COND_OPCODE_NOP = 0,
140         BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET = 1,
141         BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET = 2,
142         BNXT_ULP_COND_OPCODE_HDR_BIT_IS_SET = 3,
143         BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET = 4,
144         BNXT_ULP_COND_OPCODE_ACTION_BIT_NOT_SET = 5,
145         BNXT_ULP_COND_OPCODE_HDR_BIT_NOT_SET = 6,
146         BNXT_ULP_COND_OPCODE_LAST = 7
147 };
148
149 enum bnxt_ulp_critical_resource {
150         BNXT_ULP_CRITICAL_RESOURCE_NO = 0,
151         BNXT_ULP_CRITICAL_RESOURCE_YES = 1,
152         BNXT_ULP_CRITICAL_RESOURCE_LAST = 2
153 };
154
155 enum bnxt_ulp_device_id {
156         BNXT_ULP_DEVICE_ID_WH_PLUS = 0,
157         BNXT_ULP_DEVICE_ID_THOR = 1,
158         BNXT_ULP_DEVICE_ID_STINGRAY = 2,
159         BNXT_ULP_DEVICE_ID_STINGRAY2 = 3,
160         BNXT_ULP_DEVICE_ID_LAST = 4
161 };
162
163 enum bnxt_ulp_df_param_type {
164         BNXT_ULP_DF_PARAM_TYPE_DEV_PORT_ID = 0,
165         BNXT_ULP_DF_PARAM_TYPE_LAST = 1
166 };
167
168 enum bnxt_ulp_direction {
169         BNXT_ULP_DIRECTION_INGRESS = 0,
170         BNXT_ULP_DIRECTION_EGRESS = 1,
171         BNXT_ULP_DIRECTION_LAST = 2
172 };
173
174 enum bnxt_ulp_flow_mem_type {
175         BNXT_ULP_FLOW_MEM_TYPE_INT = 0,
176         BNXT_ULP_FLOW_MEM_TYPE_EXT = 1,
177         BNXT_ULP_FLOW_MEM_TYPE_BOTH = 2,
178         BNXT_ULP_FLOW_MEM_TYPE_LAST = 3
179 };
180
181 enum bnxt_ulp_glb_regfile_index {
182         BNXT_ULP_GLB_REGFILE_INDEX_NOT_USED = 0,
183         BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID = 1,
184         BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR = 2,
185         BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID = 3,
186         BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID = 4,
187         BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR = 5,
188         BNXT_ULP_GLB_REGFILE_INDEX_LAST = 6
189 };
190
191 enum bnxt_ulp_hdr_type {
192         BNXT_ULP_HDR_TYPE_NOT_SUPPORTED = 0,
193         BNXT_ULP_HDR_TYPE_SUPPORTED = 1,
194         BNXT_ULP_HDR_TYPE_END = 2,
195         BNXT_ULP_HDR_TYPE_LAST = 3
196 };
197
198 enum bnxt_ulp_index_opcode {
199         BNXT_ULP_INDEX_OPCODE_NOT_USED = 0,
200         BNXT_ULP_INDEX_OPCODE_ALLOCATE = 1,
201         BNXT_ULP_INDEX_OPCODE_GLOBAL = 2,
202         BNXT_ULP_INDEX_OPCODE_COMP_FIELD = 3,
203         BNXT_ULP_INDEX_OPCODE_CONSTANT = 4,
204         BNXT_ULP_INDEX_OPCODE_LAST = 5
205 };
206
207 enum bnxt_ulp_mapper_opc {
208         BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT = 0,
209         BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD = 1,
210         BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD = 2,
211         BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE = 3,
212         BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE = 4,
213         BNXT_ULP_MAPPER_OPC_SET_TO_ZERO = 5,
214         BNXT_ULP_MAPPER_OPC_SET_TO_ACT_BIT = 6,
215         BNXT_ULP_MAPPER_OPC_SET_TO_ACT_PROP = 7,
216         BNXT_ULP_MAPPER_OPC_SET_TO_ENCAP_ACT_PROP_SZ = 8,
217         BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_ACT_PROP_ELSE_CONST = 9,
218         BNXT_ULP_MAPPER_OPC_IF_ACT_BIT_THEN_CONST_ELSE_CONST = 10,
219         BNXT_ULP_MAPPER_OPC_IF_COMP_FIELD_THEN_CF_ELSE_CF = 11,
220         BNXT_ULP_MAPPER_OPC_LAST = 12
221 };
222
223 enum bnxt_ulp_mark_db_opcode {
224         BNXT_ULP_MARK_DB_OPCODE_NOP = 0,
225         BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION = 1,
226         BNXT_ULP_MARK_DB_OPCODE_SET_VFR_FLAG = 2,
227         BNXT_ULP_MARK_DB_OPCODE_LAST = 3
228 };
229
230 enum bnxt_ulp_match_type {
231         BNXT_ULP_MATCH_TYPE_EM = 0,
232         BNXT_ULP_MATCH_TYPE_WM = 1,
233         BNXT_ULP_MATCH_TYPE_LAST = 2
234 };
235
236 enum bnxt_ulp_priority {
237         BNXT_ULP_PRIORITY_LEVEL_0 = 0,
238         BNXT_ULP_PRIORITY_LEVEL_1 = 1,
239         BNXT_ULP_PRIORITY_LEVEL_2 = 2,
240         BNXT_ULP_PRIORITY_LEVEL_3 = 3,
241         BNXT_ULP_PRIORITY_LEVEL_4 = 4,
242         BNXT_ULP_PRIORITY_LEVEL_5 = 5,
243         BNXT_ULP_PRIORITY_LEVEL_6 = 6,
244         BNXT_ULP_PRIORITY_LEVEL_7 = 7,
245         BNXT_ULP_PRIORITY_NOT_USED = 8,
246         BNXT_ULP_PRIORITY_LAST = 9
247 };
248
249 enum bnxt_ulp_regfile_index {
250         BNXT_ULP_REGFILE_INDEX_NOT_USED = 0,
251         BNXT_ULP_REGFILE_INDEX_CLASS_TID = 1,
252         BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 = 2,
253         BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_1 = 3,
254         BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_0 = 4,
255         BNXT_ULP_REGFILE_INDEX_PROF_FUNC_ID_1 = 5,
256         BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 = 6,
257         BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_1 = 7,
258         BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 = 8,
259         BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_1 = 9,
260         BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR = 10,
261         BNXT_ULP_REGFILE_INDEX_ACTION_PTR_0 = 11,
262         BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0 = 12,
263         BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_1 = 13,
264         BNXT_ULP_REGFILE_INDEX_CRITICAL_RESOURCE = 14,
265         BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0 = 15,
266         BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR = 16,
267         BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0 = 17,
268         BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0 = 18,
269         BNXT_ULP_REGFILE_INDEX_LAST = 19
270 };
271
272 enum bnxt_ulp_search_before_alloc {
273         BNXT_ULP_SEARCH_BEFORE_ALLOC_NO = 0,
274         BNXT_ULP_SEARCH_BEFORE_ALLOC_YES = 1,
275         BNXT_ULP_SEARCH_BEFORE_ALLOC_LAST = 2
276 };
277
278 enum bnxt_ulp_fdb_resource_flags {
279         BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_INGR = 0x00,
280         BNXT_ULP_FDB_RESOURCE_FLAGS_DIR_EGR = 0x01
281 };
282
283 enum bnxt_ulp_fdb_type {
284         BNXT_ULP_FDB_TYPE_REGULAR = 0,
285         BNXT_ULP_FDB_TYPE_DEFAULT = 1
286 };
287
288 enum bnxt_ulp_flow_dir_bitmask {
289         BNXT_ULP_FLOW_DIR_BITMASK_ING = 0x0000000000000000,
290         BNXT_ULP_FLOW_DIR_BITMASK_EGR = 0x8000000000000000
291 };
292
293 enum bnxt_ulp_match_type_bitmask {
294         BNXT_ULP_MATCH_TYPE_BITMASK_EM = 0x0000000000000000,
295         BNXT_ULP_MATCH_TYPE_BITMASK_WM = 0x0000000000000001
296 };
297
298 enum bnxt_ulp_resource_func {
299         BNXT_ULP_RESOURCE_FUNC_INVALID = 0x00,
300         BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE = 0x20,
301         BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE = 0x40,
302         BNXT_ULP_RESOURCE_FUNC_RSVD2 = 0x60,
303         BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE = 0x80,
304         BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE = 0x81,
305         BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE = 0x82,
306         BNXT_ULP_RESOURCE_FUNC_IDENTIFIER = 0x83,
307         BNXT_ULP_RESOURCE_FUNC_IF_TABLE = 0x84,
308         BNXT_ULP_RESOURCE_FUNC_HW_FID = 0x85
309 };
310
311 enum bnxt_ulp_resource_sub_type {
312         BNXT_ULP_RESOURCE_SUB_TYPE_NOT_USED = 0,
313         BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL = 0,
314         BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION = 1,
315         BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT = 2,
316         BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_EXT_COUNT = 3,
317         BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM = 0,
318         BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM = 1
319 };
320
321 enum bnxt_ulp_sym {
322         BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,
323         BNXT_ULP_SYM_PKT_TYPE_L2 = 0,
324         BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,
325         BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,
326         BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,
327         BNXT_ULP_SYM_RECYCLE_CNT_TWO = 2,
328         BNXT_ULP_SYM_RECYCLE_CNT_THREE = 3,
329         BNXT_ULP_SYM_AGG_ERROR_IGNORE = 0,
330         BNXT_ULP_SYM_AGG_ERROR_NO = 0,
331         BNXT_ULP_SYM_AGG_ERROR_YES = 1,
332         BNXT_ULP_SYM_RESERVED_IGNORE = 0,
333         BNXT_ULP_SYM_HREC_NEXT_IGNORE = 0,
334         BNXT_ULP_SYM_HREC_NEXT_NO = 0,
335         BNXT_ULP_SYM_HREC_NEXT_YES = 1,
336         BNXT_ULP_SYM_TL2_HDR_VALID_IGNORE = 0,
337         BNXT_ULP_SYM_TL2_HDR_VALID_NO = 0,
338         BNXT_ULP_SYM_TL2_HDR_VALID_YES = 1,
339         BNXT_ULP_SYM_TL2_HDR_TYPE_IGNORE = 0,
340         BNXT_ULP_SYM_TL2_HDR_TYPE_DIX = 0,
341         BNXT_ULP_SYM_TL2_UC_MC_BC_IGNORE = 0,
342         BNXT_ULP_SYM_TL2_UC_MC_BC_UC = 0,
343         BNXT_ULP_SYM_TL2_UC_MC_BC_MC = 2,
344         BNXT_ULP_SYM_TL2_UC_MC_BC_BC = 3,
345         BNXT_ULP_SYM_TL2_VTAG_PRESENT_IGNORE = 0,
346         BNXT_ULP_SYM_TL2_VTAG_PRESENT_NO = 0,
347         BNXT_ULP_SYM_TL2_VTAG_PRESENT_YES = 1,
348         BNXT_ULP_SYM_TL2_TWO_VTAGS_IGNORE = 0,
349         BNXT_ULP_SYM_TL2_TWO_VTAGS_NO = 0,
350         BNXT_ULP_SYM_TL2_TWO_VTAGS_YES = 1,
351         BNXT_ULP_SYM_TL3_HDR_VALID_IGNORE = 0,
352         BNXT_ULP_SYM_TL3_HDR_VALID_NO = 0,
353         BNXT_ULP_SYM_TL3_HDR_VALID_YES = 1,
354         BNXT_ULP_SYM_TL3_HDR_ERROR_IGNORE = 0,
355         BNXT_ULP_SYM_TL3_HDR_ERROR_NO = 0,
356         BNXT_ULP_SYM_TL3_HDR_ERROR_YES = 1,
357         BNXT_ULP_SYM_TL3_HDR_TYPE_IGNORE = 0,
358         BNXT_ULP_SYM_TL3_HDR_TYPE_IPV4 = 0,
359         BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6 = 1,
360         BNXT_ULP_SYM_TL3_HDR_ISIP_IGNORE = 0,
361         BNXT_ULP_SYM_TL3_HDR_ISIP_NO = 0,
362         BNXT_ULP_SYM_TL3_HDR_ISIP_YES = 1,
363         BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_IGNORE = 0,
364         BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_NO = 0,
365         BNXT_ULP_SYM_TL3_IPV6_CMP_SRC_YES = 1,
366         BNXT_ULP_SYM_TL3_IPV6_CMP_DST_IGNORE = 0,
367         BNXT_ULP_SYM_TL3_IPV6_CMP_DST_NO = 0,
368         BNXT_ULP_SYM_TL3_IPV6_CMP_DST_YES = 1,
369         BNXT_ULP_SYM_TL4_HDR_VALID_IGNORE = 0,
370         BNXT_ULP_SYM_TL4_HDR_VALID_NO = 0,
371         BNXT_ULP_SYM_TL4_HDR_VALID_YES = 1,
372         BNXT_ULP_SYM_TL4_HDR_ERROR_IGNORE = 0,
373         BNXT_ULP_SYM_TL4_HDR_ERROR_NO = 0,
374         BNXT_ULP_SYM_TL4_HDR_ERROR_YES = 1,
375         BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_IGNORE = 0,
376         BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_NO = 0,
377         BNXT_ULP_SYM_TL4_HDR_IS_UDP_TCP_YES = 1,
378         BNXT_ULP_SYM_TL4_HDR_TYPE_IGNORE = 0,
379         BNXT_ULP_SYM_TL4_HDR_TYPE_TCP = 0,
380         BNXT_ULP_SYM_TL4_HDR_TYPE_UDP = 1,
381         BNXT_ULP_SYM_TUN_HDR_VALID_IGNORE = 0,
382         BNXT_ULP_SYM_TUN_HDR_VALID_NO = 0,
383         BNXT_ULP_SYM_TUN_HDR_VALID_YES = 1,
384         BNXT_ULP_SYM_TUN_HDR_ERROR_IGNORE = 0,
385         BNXT_ULP_SYM_TUN_HDR_ERROR_NO = 0,
386         BNXT_ULP_SYM_TUN_HDR_ERROR_YES = 1,
387         BNXT_ULP_SYM_TUN_HDR_TYPE_IGNORE = 0,
388         BNXT_ULP_SYM_TUN_HDR_TYPE_VXLAN = 0,
389         BNXT_ULP_SYM_TUN_HDR_TYPE_GENEVE = 1,
390         BNXT_ULP_SYM_TUN_HDR_TYPE_NVGRE = 2,
391         BNXT_ULP_SYM_TUN_HDR_TYPE_GRE = 3,
392         BNXT_ULP_SYM_TUN_HDR_TYPE_IPV4 = 4,
393         BNXT_ULP_SYM_TUN_HDR_TYPE_IPV6 = 5,
394         BNXT_ULP_SYM_TUN_HDR_TYPE_PPPOE = 6,
395         BNXT_ULP_SYM_TUN_HDR_TYPE_MPLS = 7,
396         BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR1 = 8,
397         BNXT_ULP_SYM_TUN_HDR_TYPE_UPAR2 = 9,
398         BNXT_ULP_SYM_TUN_HDR_TYPE_NONE = 15,
399         BNXT_ULP_SYM_TUN_HDR_FLAGS_IGNORE = 0,
400         BNXT_ULP_SYM_L2_HDR_VALID_IGNORE = 0,
401         BNXT_ULP_SYM_L2_HDR_VALID_NO = 0,
402         BNXT_ULP_SYM_L2_HDR_VALID_YES = 1,
403         BNXT_ULP_SYM_L2_HDR_ERROR_IGNORE = 0,
404         BNXT_ULP_SYM_L2_HDR_ERROR_NO = 0,
405         BNXT_ULP_SYM_L2_HDR_ERROR_YES = 1,
406         BNXT_ULP_SYM_L2_HDR_TYPE_IGNORE = 0,
407         BNXT_ULP_SYM_L2_HDR_TYPE_DIX = 0,
408         BNXT_ULP_SYM_L2_HDR_TYPE_LLC_SNAP = 1,
409         BNXT_ULP_SYM_L2_HDR_TYPE_LLC = 2,
410         BNXT_ULP_SYM_L2_UC_MC_BC_IGNORE = 0,
411         BNXT_ULP_SYM_L2_UC_MC_BC_UC = 0,
412         BNXT_ULP_SYM_L2_UC_MC_BC_MC = 2,
413         BNXT_ULP_SYM_L2_UC_MC_BC_BC = 3,
414         BNXT_ULP_SYM_L2_VTAG_PRESENT_IGNORE = 0,
415         BNXT_ULP_SYM_L2_VTAG_PRESENT_NO = 0,
416         BNXT_ULP_SYM_L2_VTAG_PRESENT_YES = 1,
417         BNXT_ULP_SYM_L2_TWO_VTAGS_IGNORE = 0,
418         BNXT_ULP_SYM_L2_TWO_VTAGS_NO = 0,
419         BNXT_ULP_SYM_L2_TWO_VTAGS_YES = 1,
420         BNXT_ULP_SYM_L3_HDR_VALID_IGNORE = 0,
421         BNXT_ULP_SYM_L3_HDR_VALID_NO = 0,
422         BNXT_ULP_SYM_L3_HDR_VALID_YES = 1,
423         BNXT_ULP_SYM_L3_HDR_ERROR_IGNORE = 0,
424         BNXT_ULP_SYM_L3_HDR_ERROR_NO = 0,
425         BNXT_ULP_SYM_L3_HDR_ERROR_YES = 1,
426         BNXT_ULP_SYM_L3_HDR_TYPE_IGNORE = 0,
427         BNXT_ULP_SYM_L3_HDR_TYPE_IPV4 = 0,
428         BNXT_ULP_SYM_L3_HDR_TYPE_IPV6 = 1,
429         BNXT_ULP_SYM_L3_HDR_TYPE_ARP = 2,
430         BNXT_ULP_SYM_L3_HDR_TYPE_PTP = 3,
431         BNXT_ULP_SYM_L3_HDR_TYPE_EAPOL = 4,
432         BNXT_ULP_SYM_L3_HDR_TYPE_ROCE = 5,
433         BNXT_ULP_SYM_L3_HDR_TYPE_FCOE = 6,
434         BNXT_ULP_SYM_L3_HDR_TYPE_UPAR1 = 7,
435         BNXT_ULP_SYM_L3_HDR_TYPE_UPAR2 = 8,
436         BNXT_ULP_SYM_L3_HDR_ISIP_IGNORE = 0,
437         BNXT_ULP_SYM_L3_HDR_ISIP_NO = 0,
438         BNXT_ULP_SYM_L3_HDR_ISIP_YES = 1,
439         BNXT_ULP_SYM_L3_IPV6_CMP_SRC_IGNORE = 0,
440         BNXT_ULP_SYM_L3_IPV6_CMP_SRC_NO = 0,
441         BNXT_ULP_SYM_L3_IPV6_CMP_SRC_YES = 1,
442         BNXT_ULP_SYM_L3_IPV6_CMP_DST_IGNORE = 0,
443         BNXT_ULP_SYM_L3_IPV6_CMP_DST_NO = 0,
444         BNXT_ULP_SYM_L3_IPV6_CMP_DST_YES = 1,
445         BNXT_ULP_SYM_L4_HDR_VALID_IGNORE = 0,
446         BNXT_ULP_SYM_L4_HDR_VALID_NO = 0,
447         BNXT_ULP_SYM_L4_HDR_VALID_YES = 1,
448         BNXT_ULP_SYM_L4_HDR_ERROR_IGNORE = 0,
449         BNXT_ULP_SYM_L4_HDR_ERROR_NO = 0,
450         BNXT_ULP_SYM_L4_HDR_ERROR_YES = 1,
451         BNXT_ULP_SYM_L4_HDR_TYPE_IGNORE = 0,
452         BNXT_ULP_SYM_L4_HDR_TYPE_TCP = 0,
453         BNXT_ULP_SYM_L4_HDR_TYPE_UDP = 1,
454         BNXT_ULP_SYM_L4_HDR_TYPE_ICMP = 2,
455         BNXT_ULP_SYM_L4_HDR_TYPE_UPAR1 = 3,
456         BNXT_ULP_SYM_L4_HDR_TYPE_UPAR2 = 4,
457         BNXT_ULP_SYM_L4_HDR_TYPE_BTH_V1 = 5,
458         BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_IGNORE = 0,
459         BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_NO = 0,
460         BNXT_ULP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
461         BNXT_ULP_SYM_POP_VLAN_NO = 0,
462         BNXT_ULP_SYM_POP_VLAN_YES = 1,
463         BNXT_ULP_SYM_DECAP_FUNC_NONE = 0,
464         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL2 = 3,
465         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL3 = 8,
466         BNXT_ULP_SYM_DECAP_FUNC_THRU_TL4 = 9,
467         BNXT_ULP_SYM_DECAP_FUNC_THRU_TUN = 10,
468         BNXT_ULP_SYM_DECAP_FUNC_THRU_L2 = 11,
469         BNXT_ULP_SYM_DECAP_FUNC_THRU_L3 = 12,
470         BNXT_ULP_SYM_DECAP_FUNC_THRU_L4 = 13,
471         BNXT_ULP_SYM_ECV_VALID_NO = 0,
472         BNXT_ULP_SYM_ECV_VALID_YES = 1,
473         BNXT_ULP_SYM_ECV_CUSTOM_EN_NO = 0,
474         BNXT_ULP_SYM_ECV_CUSTOM_EN_YES = 1,
475         BNXT_ULP_SYM_ECV_L2_EN_NO = 0,
476         BNXT_ULP_SYM_ECV_L2_EN_YES = 1,
477         BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP = 0,
478         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI = 1,
479         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_IVLAN_PRI = 2,
480         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_REMAP_DIFFSERV = 3,
481         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI = 4,
482         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_REMAP_DIFFSERV = 5,
483         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_ENCAP_PRI = 6,
484         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_REMAP_DIFFSERV = 7,
485         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_0 = 8,
486         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_1 = 8,
487         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_2 = 8,
488         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_3 = 8,
489         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_4 = 8,
490         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_5 = 8,
491         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_6 = 8,
492         BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_0_PRI_7 = 8,
493         BNXT_ULP_SYM_ECV_L3_TYPE_NONE = 0,
494         BNXT_ULP_SYM_ECV_L3_TYPE_IPV4 = 4,
495         BNXT_ULP_SYM_ECV_L3_TYPE_IPV6 = 5,
496         BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8847 = 6,
497         BNXT_ULP_SYM_ECV_L3_TYPE_MPLS_8848 = 7,
498         BNXT_ULP_SYM_ECV_L4_TYPE_NONE = 0,
499         BNXT_ULP_SYM_ECV_L4_TYPE_UDP = 4,
500         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_CSUM = 5,
501         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY = 6,
502         BNXT_ULP_SYM_ECV_L4_TYPE_UDP_ENTROPY_CSUM = 7,
503         BNXT_ULP_SYM_ECV_TUN_TYPE_NONE = 0,
504         BNXT_ULP_SYM_ECV_TUN_TYPE_GENERIC = 1,
505         BNXT_ULP_SYM_ECV_TUN_TYPE_VXLAN = 2,
506         BNXT_ULP_SYM_ECV_TUN_TYPE_NGE = 3,
507         BNXT_ULP_SYM_ECV_TUN_TYPE_NVGRE = 4,
508         BNXT_ULP_SYM_ECV_TUN_TYPE_GRE = 5,
509         BNXT_ULP_SYM_WH_PLUS_INT_ACT_REC = 1,
510         BNXT_ULP_SYM_WH_PLUS_EXT_ACT_REC = 0,
511         BNXT_ULP_SYM_WH_PLUS_UC_ACT_REC = 0,
512         BNXT_ULP_SYM_WH_PLUS_MC_ACT_REC = 1,
513         BNXT_ULP_SYM_ACT_REC_DROP_YES = 1,
514         BNXT_ULP_SYM_ACT_REC_DROP_NO = 0,
515         BNXT_ULP_SYM_ACT_REC_POP_VLAN_YES = 1,
516         BNXT_ULP_SYM_ACT_REC_POP_VLAN_NO = 0,
517         BNXT_ULP_SYM_ACT_REC_METER_EN_YES = 1,
518         BNXT_ULP_SYM_ACT_REC_METER_EN_NO = 0,
519         BNXT_ULP_SYM_WH_PLUS_LOOPBACK_PORT = 4,
520         BNXT_ULP_SYM_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448,
521         BNXT_ULP_SYM_STINGRAY_LOOPBACK_PORT = 16,
522         BNXT_ULP_SYM_STINGRAY_EXT_EM_MAX_KEY_SIZE = 448,
523         BNXT_ULP_SYM_STINGRAY2_LOOPBACK_PORT = 3,
524         BNXT_ULP_SYM_THOR_LOOPBACK_PORT = 3,
525         BNXT_ULP_SYM_MATCH_TYPE_EM = 0,
526         BNXT_ULP_SYM_MATCH_TYPE_WM = 1,
527         BNXT_ULP_SYM_IP_PROTO_ICMP = 1,
528         BNXT_ULP_SYM_IP_PROTO_IGMP = 2,
529         BNXT_ULP_SYM_IP_PROTO_IP_IN_IP = 4,
530         BNXT_ULP_SYM_IP_PROTO_TCP = 6,
531         BNXT_ULP_SYM_IP_PROTO_UDP = 17,
532         BNXT_ULP_SYM_VF_FUNC_PARIF = 15,
533         BNXT_ULP_SYM_NO = 0,
534         BNXT_ULP_SYM_YES = 1
535 };
536
537 enum bnxt_ulp_wh_plus {
538         BNXT_ULP_WH_PLUS_LOOPBACK_PORT = 4,
539         BNXT_ULP_WH_PLUS_EXT_EM_MAX_KEY_SIZE = 448
540 };
541
542 enum bnxt_ulp_act_prop_sz {
543         BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ = 4,
544         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ = 4,
545         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ = 4,
546         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE = 4,
547         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM = 4,
548         BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE = 4,
549         BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM = 4,
550         BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM = 4,
551         BNXT_ULP_ACT_PROP_SZ_PORT_ID = 4,
552         BNXT_ULP_ACT_PROP_SZ_VNIC = 4,
553         BNXT_ULP_ACT_PROP_SZ_VPORT = 4,
554         BNXT_ULP_ACT_PROP_SZ_MARK = 4,
555         BNXT_ULP_ACT_PROP_SZ_COUNT = 4,
556         BNXT_ULP_ACT_PROP_SZ_METER = 4,
557         BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC = 8,
558         BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST = 8,
559         BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN = 2,
560         BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP = 1,
561         BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID = 2,
562         BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC = 4,
563         BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST = 4,
564         BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC = 16,
565         BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST = 16,
566         BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC = 2,
567         BNXT_ULP_ACT_PROP_SZ_SET_TP_DST = 2,
568         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0 = 4,
569         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1 = 4,
570         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2 = 4,
571         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3 = 4,
572         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4 = 4,
573         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5 = 4,
574         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6 = 4,
575         BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7 = 4,
576         BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC = 6,
577         BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC = 6,
578         BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG = 8,
579         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP = 32,
580         BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16,
581         BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,
582         BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,
583         BNXT_ULP_ACT_PROP_SZ_LAST = 4
584 };
585
586 enum bnxt_ulp_act_prop_idx {
587         BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ = 0,
588         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ = 4,
589         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ = 8,
590         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE = 12,
591         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM = 16,
592         BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE = 20,
593         BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM = 24,
594         BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM = 28,
595         BNXT_ULP_ACT_PROP_IDX_PORT_ID = 32,
596         BNXT_ULP_ACT_PROP_IDX_VNIC = 36,
597         BNXT_ULP_ACT_PROP_IDX_VPORT = 40,
598         BNXT_ULP_ACT_PROP_IDX_MARK = 44,
599         BNXT_ULP_ACT_PROP_IDX_COUNT = 48,
600         BNXT_ULP_ACT_PROP_IDX_METER = 52,
601         BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC = 56,
602         BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST = 64,
603         BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN = 72,
604         BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP = 74,
605         BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID = 75,
606         BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC = 77,
607         BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST = 81,
608         BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC = 85,
609         BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST = 101,
610         BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC = 117,
611         BNXT_ULP_ACT_PROP_IDX_SET_TP_DST = 119,
612         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0 = 121,
613         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1 = 125,
614         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2 = 129,
615         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3 = 133,
616         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4 = 137,
617         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5 = 141,
618         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6 = 145,
619         BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7 = 149,
620         BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC = 153,
621         BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC = 159,
622         BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG = 165,
623         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP = 173,
624         BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 205,
625         BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221,
626         BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225,
627         BNXT_ULP_ACT_PROP_IDX_LAST = 257
628 };
629
630 enum bnxt_ulp_class_hid {
631         BNXT_ULP_CLASS_HID_0138 = 0x0138,
632         BNXT_ULP_CLASS_HID_03f0 = 0x03f0,
633         BNXT_ULP_CLASS_HID_0134 = 0x0134,
634         BNXT_ULP_CLASS_HID_03fc = 0x03fc,
635         BNXT_ULP_CLASS_HID_0139 = 0x0139,
636         BNXT_ULP_CLASS_HID_03f1 = 0x03f1,
637         BNXT_ULP_CLASS_HID_068b = 0x068b,
638         BNXT_ULP_CLASS_HID_0143 = 0x0143,
639         BNXT_ULP_CLASS_HID_0135 = 0x0135,
640         BNXT_ULP_CLASS_HID_03fd = 0x03fd,
641         BNXT_ULP_CLASS_HID_0687 = 0x0687,
642         BNXT_ULP_CLASS_HID_014f = 0x014f,
643         BNXT_ULP_CLASS_HID_0118 = 0x0118,
644         BNXT_ULP_CLASS_HID_03d0 = 0x03d0,
645         BNXT_ULP_CLASS_HID_0114 = 0x0114,
646         BNXT_ULP_CLASS_HID_03dc = 0x03dc,
647         BNXT_ULP_CLASS_HID_0119 = 0x0119,
648         BNXT_ULP_CLASS_HID_03d1 = 0x03d1,
649         BNXT_ULP_CLASS_HID_06ab = 0x06ab,
650         BNXT_ULP_CLASS_HID_0163 = 0x0163,
651         BNXT_ULP_CLASS_HID_0115 = 0x0115,
652         BNXT_ULP_CLASS_HID_03dd = 0x03dd,
653         BNXT_ULP_CLASS_HID_06a7 = 0x06a7,
654         BNXT_ULP_CLASS_HID_016f = 0x016f,
655         BNXT_ULP_CLASS_HID_0128 = 0x0128,
656         BNXT_ULP_CLASS_HID_03e0 = 0x03e0,
657         BNXT_ULP_CLASS_HID_0124 = 0x0124,
658         BNXT_ULP_CLASS_HID_03ec = 0x03ec,
659         BNXT_ULP_CLASS_HID_0129 = 0x0129,
660         BNXT_ULP_CLASS_HID_03e1 = 0x03e1,
661         BNXT_ULP_CLASS_HID_069b = 0x069b,
662         BNXT_ULP_CLASS_HID_0153 = 0x0153,
663         BNXT_ULP_CLASS_HID_0125 = 0x0125,
664         BNXT_ULP_CLASS_HID_03ed = 0x03ed,
665         BNXT_ULP_CLASS_HID_0697 = 0x0697,
666         BNXT_ULP_CLASS_HID_015f = 0x015f,
667         BNXT_ULP_CLASS_HID_0452 = 0x0452,
668         BNXT_ULP_CLASS_HID_0528 = 0x0528,
669         BNXT_ULP_CLASS_HID_0790 = 0x0790,
670         BNXT_ULP_CLASS_HID_046e = 0x046e,
671         BNXT_ULP_CLASS_HID_0462 = 0x0462,
672         BNXT_ULP_CLASS_HID_0518 = 0x0518,
673         BNXT_ULP_CLASS_HID_07a0 = 0x07a0,
674         BNXT_ULP_CLASS_HID_045e = 0x045e,
675         BNXT_ULP_CLASS_HID_0228 = 0x0228,
676         BNXT_ULP_CLASS_HID_06d0 = 0x06d0,
677         BNXT_ULP_CLASS_HID_02be = 0x02be,
678         BNXT_ULP_CLASS_HID_07a6 = 0x07a6,
679         BNXT_ULP_CLASS_HID_0218 = 0x0218,
680         BNXT_ULP_CLASS_HID_06e0 = 0x06e0,
681         BNXT_ULP_CLASS_HID_028e = 0x028e,
682         BNXT_ULP_CLASS_HID_0796 = 0x0796,
683         BNXT_ULP_CLASS_HID_079c = 0x079c,
684         BNXT_ULP_CLASS_HID_0654 = 0x0654,
685         BNXT_ULP_CLASS_HID_06d2 = 0x06d2,
686         BNXT_ULP_CLASS_HID_058a = 0x058a,
687         BNXT_ULP_CLASS_HID_052f = 0x052f,
688         BNXT_ULP_CLASS_HID_07e7 = 0x07e7,
689         BNXT_ULP_CLASS_HID_079d = 0x079d,
690         BNXT_ULP_CLASS_HID_0655 = 0x0655,
691         BNXT_ULP_CLASS_HID_046d = 0x046d,
692         BNXT_ULP_CLASS_HID_0725 = 0x0725,
693         BNXT_ULP_CLASS_HID_06d3 = 0x06d3,
694         BNXT_ULP_CLASS_HID_058b = 0x058b,
695         BNXT_ULP_CLASS_HID_07ac = 0x07ac,
696         BNXT_ULP_CLASS_HID_0664 = 0x0664,
697         BNXT_ULP_CLASS_HID_06e2 = 0x06e2,
698         BNXT_ULP_CLASS_HID_05ba = 0x05ba,
699         BNXT_ULP_CLASS_HID_051f = 0x051f,
700         BNXT_ULP_CLASS_HID_07d7 = 0x07d7,
701         BNXT_ULP_CLASS_HID_07ad = 0x07ad,
702         BNXT_ULP_CLASS_HID_0665 = 0x0665,
703         BNXT_ULP_CLASS_HID_045d = 0x045d,
704         BNXT_ULP_CLASS_HID_0715 = 0x0715,
705         BNXT_ULP_CLASS_HID_06e3 = 0x06e3,
706         BNXT_ULP_CLASS_HID_05bb = 0x05bb,
707         BNXT_ULP_CLASS_HID_016a = 0x016a,
708         BNXT_ULP_CLASS_HID_03d2 = 0x03d2,
709         BNXT_ULP_CLASS_HID_0612 = 0x0612,
710         BNXT_ULP_CLASS_HID_00da = 0x00da,
711         BNXT_ULP_CLASS_HID_06bd = 0x06bd,
712         BNXT_ULP_CLASS_HID_0165 = 0x0165,
713         BNXT_ULP_CLASS_HID_016b = 0x016b,
714         BNXT_ULP_CLASS_HID_03d3 = 0x03d3,
715         BNXT_ULP_CLASS_HID_03a5 = 0x03a5,
716         BNXT_ULP_CLASS_HID_066d = 0x066d,
717         BNXT_ULP_CLASS_HID_0613 = 0x0613,
718         BNXT_ULP_CLASS_HID_00db = 0x00db,
719         BNXT_ULP_CLASS_HID_015a = 0x015a,
720         BNXT_ULP_CLASS_HID_03e2 = 0x03e2,
721         BNXT_ULP_CLASS_HID_0622 = 0x0622,
722         BNXT_ULP_CLASS_HID_00ea = 0x00ea,
723         BNXT_ULP_CLASS_HID_068d = 0x068d,
724         BNXT_ULP_CLASS_HID_0155 = 0x0155,
725         BNXT_ULP_CLASS_HID_015b = 0x015b,
726         BNXT_ULP_CLASS_HID_03e3 = 0x03e3,
727         BNXT_ULP_CLASS_HID_0395 = 0x0395,
728         BNXT_ULP_CLASS_HID_065d = 0x065d,
729         BNXT_ULP_CLASS_HID_0623 = 0x0623,
730         BNXT_ULP_CLASS_HID_00eb = 0x00eb,
731         BNXT_ULP_CLASS_HID_0768 = 0x0768,
732         BNXT_ULP_CLASS_HID_073c = 0x073c,
733         BNXT_ULP_CLASS_HID_04bc = 0x04bc,
734         BNXT_ULP_CLASS_HID_0442 = 0x0442,
735         BNXT_ULP_CLASS_HID_050a = 0x050a,
736         BNXT_ULP_CLASS_HID_06ba = 0x06ba,
737         BNXT_ULP_CLASS_HID_0472 = 0x0472,
738         BNXT_ULP_CLASS_HID_0700 = 0x0700,
739         BNXT_ULP_CLASS_HID_04c8 = 0x04c8,
740         BNXT_ULP_CLASS_HID_0678 = 0x0678,
741         BNXT_ULP_CLASS_HID_064f = 0x064f,
742         BNXT_ULP_CLASS_HID_051d = 0x051d,
743         BNXT_ULP_CLASS_HID_06a5 = 0x06a5,
744         BNXT_ULP_CLASS_HID_0455 = 0x0455,
745         BNXT_ULP_CLASS_HID_04bd = 0x04bd,
746         BNXT_ULP_CLASS_HID_0443 = 0x0443,
747         BNXT_ULP_CLASS_HID_050b = 0x050b,
748         BNXT_ULP_CLASS_HID_06bb = 0x06bb,
749         BNXT_ULP_CLASS_HID_050d = 0x050d,
750         BNXT_ULP_CLASS_HID_04d3 = 0x04d3,
751         BNXT_ULP_CLASS_HID_059b = 0x059b,
752         BNXT_ULP_CLASS_HID_070b = 0x070b,
753         BNXT_ULP_CLASS_HID_0473 = 0x0473,
754         BNXT_ULP_CLASS_HID_0701 = 0x0701,
755         BNXT_ULP_CLASS_HID_04c9 = 0x04c9,
756         BNXT_ULP_CLASS_HID_0679 = 0x0679,
757         BNXT_ULP_CLASS_HID_048b = 0x048b,
758         BNXT_ULP_CLASS_HID_0749 = 0x0749,
759         BNXT_ULP_CLASS_HID_05f1 = 0x05f1,
760         BNXT_ULP_CLASS_HID_04b7 = 0x04b7,
761         BNXT_ULP_CLASS_HID_049b = 0x049b,
762         BNXT_ULP_CLASS_HID_0759 = 0x0759,
763         BNXT_ULP_CLASS_HID_05e1 = 0x05e1,
764         BNXT_ULP_CLASS_HID_04a7 = 0x04a7,
765         BNXT_ULP_CLASS_HID_0301 = 0x0301,
766         BNXT_ULP_CLASS_HID_07f9 = 0x07f9,
767         BNXT_ULP_CLASS_HID_0397 = 0x0397,
768         BNXT_ULP_CLASS_HID_068f = 0x068f,
769         BNXT_ULP_CLASS_HID_02f1 = 0x02f1,
770         BNXT_ULP_CLASS_HID_0609 = 0x0609,
771         BNXT_ULP_CLASS_HID_0267 = 0x0267,
772         BNXT_ULP_CLASS_HID_077f = 0x077f,
773         BNXT_ULP_CLASS_HID_01e1 = 0x01e1,
774         BNXT_ULP_CLASS_HID_0329 = 0x0329,
775         BNXT_ULP_CLASS_HID_01dd = 0x01dd,
776         BNXT_ULP_CLASS_HID_0315 = 0x0315,
777         BNXT_ULP_CLASS_HID_01c1 = 0x01c1,
778         BNXT_ULP_CLASS_HID_0309 = 0x0309,
779         BNXT_ULP_CLASS_HID_003d = 0x003d,
780         BNXT_ULP_CLASS_HID_02f5 = 0x02f5,
781         BNXT_ULP_CLASS_HID_01d1 = 0x01d1,
782         BNXT_ULP_CLASS_HID_0319 = 0x0319,
783         BNXT_ULP_CLASS_HID_01cd = 0x01cd,
784         BNXT_ULP_CLASS_HID_0305 = 0x0305
785 };
786
787 enum bnxt_ulp_act_hid {
788         BNXT_ULP_ACT_HID_015a = 0x015a,
789         BNXT_ULP_ACT_HID_00eb = 0x00eb,
790         BNXT_ULP_ACT_HID_0043 = 0x0043,
791         BNXT_ULP_ACT_HID_03d8 = 0x03d8,
792         BNXT_ULP_ACT_HID_02c1 = 0x02c1,
793         BNXT_ULP_ACT_HID_015e = 0x015e,
794         BNXT_ULP_ACT_HID_00ef = 0x00ef,
795         BNXT_ULP_ACT_HID_0047 = 0x0047,
796         BNXT_ULP_ACT_HID_03dc = 0x03dc,
797         BNXT_ULP_ACT_HID_02c5 = 0x02c5,
798         BNXT_ULP_ACT_HID_025b = 0x025b,
799         BNXT_ULP_ACT_HID_01ec = 0x01ec,
800         BNXT_ULP_ACT_HID_0144 = 0x0144,
801         BNXT_ULP_ACT_HID_04d9 = 0x04d9,
802         BNXT_ULP_ACT_HID_03c2 = 0x03c2,
803         BNXT_ULP_ACT_HID_025f = 0x025f,
804         BNXT_ULP_ACT_HID_01f0 = 0x01f0,
805         BNXT_ULP_ACT_HID_0148 = 0x0148,
806         BNXT_ULP_ACT_HID_04dd = 0x04dd,
807         BNXT_ULP_ACT_HID_03c6 = 0x03c6,
808         BNXT_ULP_ACT_HID_0000 = 0x0000,
809         BNXT_ULP_ACT_HID_0002 = 0x0002,
810         BNXT_ULP_ACT_HID_0800 = 0x0800,
811         BNXT_ULP_ACT_HID_0101 = 0x0101,
812         BNXT_ULP_ACT_HID_0020 = 0x0020,
813         BNXT_ULP_ACT_HID_0901 = 0x0901,
814         BNXT_ULP_ACT_HID_0121 = 0x0121,
815         BNXT_ULP_ACT_HID_0004 = 0x0004,
816         BNXT_ULP_ACT_HID_0804 = 0x0804,
817         BNXT_ULP_ACT_HID_0105 = 0x0105,
818         BNXT_ULP_ACT_HID_0024 = 0x0024,
819         BNXT_ULP_ACT_HID_0905 = 0x0905,
820         BNXT_ULP_ACT_HID_0125 = 0x0125,
821         BNXT_ULP_ACT_HID_0001 = 0x0001,
822         BNXT_ULP_ACT_HID_0005 = 0x0005,
823         BNXT_ULP_ACT_HID_0009 = 0x0009,
824         BNXT_ULP_ACT_HID_000d = 0x000d,
825         BNXT_ULP_ACT_HID_0021 = 0x0021,
826         BNXT_ULP_ACT_HID_0029 = 0x0029,
827         BNXT_ULP_ACT_HID_0025 = 0x0025,
828         BNXT_ULP_ACT_HID_002d = 0x002d,
829         BNXT_ULP_ACT_HID_0801 = 0x0801,
830         BNXT_ULP_ACT_HID_0809 = 0x0809,
831         BNXT_ULP_ACT_HID_0805 = 0x0805,
832         BNXT_ULP_ACT_HID_080d = 0x080d,
833         BNXT_ULP_ACT_HID_0c15 = 0x0c15,
834         BNXT_ULP_ACT_HID_0c19 = 0x0c19,
835         BNXT_ULP_ACT_HID_02f6 = 0x02f6,
836         BNXT_ULP_ACT_HID_04f8 = 0x04f8,
837         BNXT_ULP_ACT_HID_01df = 0x01df,
838         BNXT_ULP_ACT_HID_07e5 = 0x07e5,
839         BNXT_ULP_ACT_HID_06ce = 0x06ce,
840         BNXT_ULP_ACT_HID_02fa = 0x02fa,
841         BNXT_ULP_ACT_HID_04fc = 0x04fc,
842         BNXT_ULP_ACT_HID_01e3 = 0x01e3,
843         BNXT_ULP_ACT_HID_07e9 = 0x07e9,
844         BNXT_ULP_ACT_HID_06d2 = 0x06d2,
845         BNXT_ULP_ACT_HID_03f7 = 0x03f7,
846         BNXT_ULP_ACT_HID_05f9 = 0x05f9,
847         BNXT_ULP_ACT_HID_02e0 = 0x02e0,
848         BNXT_ULP_ACT_HID_08e6 = 0x08e6,
849         BNXT_ULP_ACT_HID_07cf = 0x07cf,
850         BNXT_ULP_ACT_HID_03fb = 0x03fb,
851         BNXT_ULP_ACT_HID_05fd = 0x05fd,
852         BNXT_ULP_ACT_HID_02e4 = 0x02e4,
853         BNXT_ULP_ACT_HID_08ea = 0x08ea,
854         BNXT_ULP_ACT_HID_07d3 = 0x07d3,
855         BNXT_ULP_ACT_HID_040d = 0x040d,
856         BNXT_ULP_ACT_HID_040f = 0x040f,
857         BNXT_ULP_ACT_HID_0413 = 0x0413,
858         BNXT_ULP_ACT_HID_0c0d = 0x0c0d,
859         BNXT_ULP_ACT_HID_0567 = 0x0567,
860         BNXT_ULP_ACT_HID_0a49 = 0x0a49,
861         BNXT_ULP_ACT_HID_050e = 0x050e,
862         BNXT_ULP_ACT_HID_0d0e = 0x0d0e,
863         BNXT_ULP_ACT_HID_0668 = 0x0668,
864         BNXT_ULP_ACT_HID_0b4a = 0x0b4a,
865         BNXT_ULP_ACT_HID_0411 = 0x0411,
866         BNXT_ULP_ACT_HID_056b = 0x056b,
867         BNXT_ULP_ACT_HID_0a4d = 0x0a4d,
868         BNXT_ULP_ACT_HID_0c11 = 0x0c11,
869         BNXT_ULP_ACT_HID_0512 = 0x0512,
870         BNXT_ULP_ACT_HID_0d12 = 0x0d12,
871         BNXT_ULP_ACT_HID_066c = 0x066c,
872         BNXT_ULP_ACT_HID_0b4e = 0x0b4e
873 };
874
875 enum bnxt_ulp_df_tpl {
876         BNXT_ULP_DF_TPL_PORT_TO_VS = 1,
877         BNXT_ULP_DF_TPL_VS_TO_PORT = 2,
878         BNXT_ULP_DF_TPL_VFREP_TO_VF = 3,
879         BNXT_ULP_DF_TPL_VF_TO_VFREP = 4,
880         BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 5
881 };
882
883 #endif