drivers/net/cxgbe/cxgbe_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2014-2015 Chelsio Communications.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Chelsio Communications nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <netinet/in.h>
  43
  44 #include <rte_byteorder.h>
  45 #include <rte_common.h>
  46 #include <rte_cycles.h>
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_tailq.h>
  56 #include <rte_eal.h>
  57 #include <rte_alarm.h>
  58 #include <rte_ether.h>
  59 #include <rte_ethdev.h>
  60 #include <rte_atomic.h>
  61 #include <rte_malloc.h>
  62 #include <rte_random.h>
  63 #include <rte_dev.h>
  64
  65 #include "cxgbe.h"
  66
  67 /*
  68  * Macros needed to support the PCI Device ID Table ...
  69  */
  70 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
  71         static struct rte_pci_id cxgb4_pci_tbl[] = {
  72 #define CH_PCI_DEVICE_ID_FUNCTION 0x4
  73
  74 #define PCI_VENDOR_ID_CHELSIO 0x1425
  75
  76 #define CH_PCI_ID_TABLE_ENTRY(devid) \
  77                 { RTE_PCI_DEVICE(PCI_VENDOR_ID_CHELSIO, (devid)) }
  78
  79 #define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
  80                 { .vendor_id = 0, } \
  81         }
  82
  83 /*
  84  *... and the PCI ID Table itself ...
  85  */
  86 #include "t4_pci_id_tbl.h"
  87
  88 static uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
  89                                 uint16_t nb_pkts)
  90 {
  91         struct sge_eth_txq *txq = (struct sge_eth_txq *)tx_queue;
  92         uint16_t pkts_sent, pkts_remain;
  93         uint16_t total_sent = 0;
  94         int ret = 0;
  95
  96         CXGBE_DEBUG_TX(adapter, "%s: txq = %p; tx_pkts = %p; nb_pkts = %d\n",
  97                        __func__, txq, tx_pkts, nb_pkts);
  98
  99         t4_os_lock(&txq->txq_lock);
 100         /* free up desc from already completed tx */
 101         reclaim_completed_tx(&txq->q);
 102         while (total_sent < nb_pkts) {
 103                 pkts_remain = nb_pkts - total_sent;
 104
 105                 for (pkts_sent = 0; pkts_sent < pkts_remain; pkts_sent++) {
 106                         ret = t4_eth_xmit(txq, tx_pkts[total_sent + pkts_sent]);
 107                         if (ret < 0)
 108                                 break;
 109                 }
 110                 if (!pkts_sent)
 111                         break;
 112                 total_sent += pkts_sent;
 113                 /* reclaim as much as possible */
 114                 reclaim_completed_tx(&txq->q);
 115         }
 116
 117         t4_os_unlock(&txq->txq_lock);
 118         return total_sent;
 119 }
 120
 121 static uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 122                                 uint16_t nb_pkts)
 123 {
 124         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)rx_queue;
 125         unsigned int work_done;
 126
 127         CXGBE_DEBUG_RX(adapter, "%s: rxq->rspq.cntxt_id = %u; nb_pkts = %d\n",
 128                        __func__, rxq->rspq.cntxt_id, nb_pkts);
 129
 130         if (cxgbe_poll(&rxq->rspq, rx_pkts, (unsigned int)nb_pkts, &work_done))
 131                 dev_err(adapter, "error in cxgbe poll\n");
 132
 133         CXGBE_DEBUG_RX(adapter, "%s: work_done = %u\n", __func__, work_done);
 134         return work_done;
 135 }
 136
 137 static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
 138                                struct rte_eth_dev_info *device_info)
 139 {
 140         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 141         struct adapter *adapter = pi->adapter;
 142         int max_queues = adapter->sge.max_ethqsets / adapter->params.nports;
 143
 144         device_info->min_rx_bufsize = 68; /* XXX: Smallest pkt size */
 145         device_info->max_rx_pktlen = 1500; /* XXX: For now we support mtu */
 146         device_info->max_rx_queues = max_queues;
 147         device_info->max_tx_queues = max_queues;
 148         device_info->max_mac_addrs = 1;
 149         /* XXX: For now we support one MAC/port */
 150         device_info->max_vfs = adapter->params.arch.vfcount;
 151         device_info->max_vmdq_pools = 0; /* XXX: For now no support for VMDQ */
 152
 153         device_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 154                                        DEV_RX_OFFLOAD_IPV4_CKSUM |
 155                                        DEV_RX_OFFLOAD_UDP_CKSUM |
 156                                        DEV_RX_OFFLOAD_TCP_CKSUM;
 157
 158         device_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 159                                        DEV_TX_OFFLOAD_IPV4_CKSUM |
 160                                        DEV_TX_OFFLOAD_UDP_CKSUM |
 161                                        DEV_TX_OFFLOAD_TCP_CKSUM |
 162                                        DEV_TX_OFFLOAD_TCP_TSO;
 163
 164         device_info->reta_size = pi->rss_size;
 165 }
 166
 167 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
 168                                     uint16_t tx_queue_id);
 169 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
 170                                     uint16_t tx_queue_id);
 171 static void cxgbe_dev_tx_queue_release(void *q);
 172 static void cxgbe_dev_rx_queue_release(void *q);
 173
 174 /*
 175  * Stop device.
 176  */
 177 static void cxgbe_dev_close(struct rte_eth_dev *eth_dev)
 178 {
 179         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 180         struct adapter *adapter = pi->adapter;
 181         int i, dev_down = 0;
 182
 183         CXGBE_FUNC_TRACE();
 184
 185         if (!(adapter->flags & FULL_INIT_DONE))
 186                 return;
 187
 188         cxgbe_down(pi);
 189
 190         /*
 191          *  We clear queues only if both tx and rx path of the port
 192          *  have been disabled
 193          */
 194         t4_sge_eth_clear_queues(pi);
 195
 196         /*  See if all ports are down */
 197         for_each_port(adapter, i) {
 198                 pi = adap2pinfo(adapter, i);
 199                 /*
 200                  * Skip first port of the adapter since it will be closed
 201                  * by DPDK
 202                  */
 203                 if (i == 0)
 204                         continue;
 205                 dev_down += (pi->eth_dev->data->dev_started == 0) ? 1 : 0;
 206         }
 207
 208         /* If rest of the ports are stopped, then free up resources */
 209         if (dev_down == (adapter->params.nports - 1))
 210                 cxgbe_close(adapter);
 211 }
 212
 213 /* Start the device.
 214  * It returns 0 on success.
 215  */
 216 static int cxgbe_dev_start(struct rte_eth_dev *eth_dev)
 217 {
 218         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 219         struct adapter *adapter = pi->adapter;
 220         int err = 0, i;
 221
 222         CXGBE_FUNC_TRACE();
 223
 224         /*
 225          * If we don't have a connection to the firmware there's nothing we
 226          * can do.
 227          */
 228         if (!(adapter->flags & FW_OK)) {
 229                 err = -ENXIO;
 230                 goto out;
 231         }
 232
 233         if (!(adapter->flags & FULL_INIT_DONE)) {
 234                 err = cxgbe_up(adapter);
 235                 if (err < 0)
 236                         goto out;
 237         }
 238
 239         err = setup_rss(pi);
 240         if (err)
 241                 goto out;
 242
 243         for (i = 0; i < pi->n_tx_qsets; i++) {
 244                 err = cxgbe_dev_tx_queue_start(eth_dev, i);
 245                 if (err)
 246                         goto out;
 247         }
 248
 249         for (i = 0; i < pi->n_rx_qsets; i++) {
 250                 err = cxgbe_dev_rx_queue_start(eth_dev, i);
 251                 if (err)
 252                         goto out;
 253         }
 254
 255         err = link_start(pi);
 256         if (err)
 257                 goto out;
 258
 259 out:
 260         return err;
 261 }
 262
 263 /*
 264  * Stop device: disable rx and tx functions to allow for reconfiguring.
 265  */
 266 static void cxgbe_dev_stop(struct rte_eth_dev *eth_dev)
 267 {
 268         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 269         struct adapter *adapter = pi->adapter;
 270
 271         CXGBE_FUNC_TRACE();
 272
 273         if (!(adapter->flags & FULL_INIT_DONE))
 274                 return;
 275
 276         cxgbe_down(pi);
 277
 278         /*
 279          *  We clear queues only if both tx and rx path of the port
 280          *  have been disabled
 281          */
 282         t4_sge_eth_clear_queues(pi);
 283 }
 284
 285 static int cxgbe_dev_configure(struct rte_eth_dev *eth_dev)
 286 {
 287         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 288         struct adapter *adapter = pi->adapter;
 289         int err;
 290
 291         CXGBE_FUNC_TRACE();
 292
 293         if (!(adapter->flags & FW_QUEUE_BOUND)) {
 294                 err = setup_sge_fwevtq(adapter);
 295                 if (err)
 296                         return err;
 297                 adapter->flags |= FW_QUEUE_BOUND;
 298         }
 299
 300         err = cfg_queue_count(eth_dev);
 301         if (err)
 302                 return err;
 303
 304         return 0;
 305 }
 306
 307 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
 308                                     uint16_t tx_queue_id)
 309 {
 310         struct sge_eth_txq *txq = (struct sge_eth_txq *)
 311                                   (eth_dev->data->tx_queues[tx_queue_id]);
 312
 313         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
 314
 315         return t4_sge_eth_txq_start(txq);
 316 }
 317
 318 static int cxgbe_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
 319                                    uint16_t tx_queue_id)
 320 {
 321         struct sge_eth_txq *txq = (struct sge_eth_txq *)
 322                                   (eth_dev->data->tx_queues[tx_queue_id]);
 323
 324         dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id);
 325
 326         return t4_sge_eth_txq_stop(txq);
 327 }
 328
 329 static int cxgbe_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
 330                                     uint16_t queue_idx, uint16_t nb_desc,
 331                                     unsigned int socket_id,
 332                                     const struct rte_eth_txconf *tx_conf)
 333 {
 334         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 335         struct adapter *adapter = pi->adapter;
 336         struct sge *s = &adapter->sge;
 337         struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset + queue_idx];
 338         int err = 0;
 339         unsigned int temp_nb_desc;
 340
 341         RTE_SET_USED(tx_conf);
 342
 343         dev_debug(adapter, "%s: eth_dev->data->nb_tx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; pi->first_qset = %u\n",
 344                   __func__, eth_dev->data->nb_tx_queues, queue_idx, nb_desc,
 345                   socket_id, pi->first_qset);
 346
 347         /*  Free up the existing queue  */
 348         if (eth_dev->data->tx_queues[queue_idx]) {
 349                 cxgbe_dev_tx_queue_release(eth_dev->data->tx_queues[queue_idx]);
 350                 eth_dev->data->tx_queues[queue_idx] = NULL;
 351         }
 352
 353         eth_dev->data->tx_queues[queue_idx] = (void *)txq;
 354
 355         /* Sanity Checking
 356          *
 357          * nb_desc should be > 1023 and <= CXGBE_MAX_RING_DESC_SIZE
 358          */
 359         temp_nb_desc = nb_desc;
 360         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
 361                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
 362                          __func__, CXGBE_MIN_RING_DESC_SIZE,
 363                          CXGBE_DEFAULT_TX_DESC_SIZE);
 364                 temp_nb_desc = CXGBE_DEFAULT_TX_DESC_SIZE;
 365         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
 366                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
 367                         __func__, CXGBE_MIN_RING_DESC_SIZE,
 368                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_TX_DESC_SIZE);
 369                 return -(EINVAL);
 370         }
 371
 372         txq->q.size = temp_nb_desc;
 373
 374         err = t4_sge_alloc_eth_txq(adapter, txq, eth_dev, queue_idx,
 375                                    s->fw_evtq.cntxt_id, socket_id);
 376
 377         dev_debug(adapter, "%s: txq->q.cntxt_id= %d err = %d\n",
 378                   __func__, txq->q.cntxt_id, err);
 379
 380         return err;
 381 }
 382
 383 static void cxgbe_dev_tx_queue_release(void *q)
 384 {
 385         struct sge_eth_txq *txq = (struct sge_eth_txq *)q;
 386
 387         if (txq) {
 388                 struct port_info *pi = (struct port_info *)
 389                                        (txq->eth_dev->data->dev_private);
 390                 struct adapter *adap = pi->adapter;
 391
 392                 dev_debug(adapter, "%s: pi->port_id = %d; tx_queue_id = %d\n",
 393                           __func__, pi->port_id, txq->q.cntxt_id);
 394
 395                 t4_sge_eth_txq_release(adap, txq);
 396         }
 397 }
 398
 399 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
 400                                     uint16_t rx_queue_id)
 401 {
 402         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 403         struct adapter *adap = pi->adapter;
 404         struct sge_rspq *q;
 405
 406         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
 407                   __func__, pi->port_id, rx_queue_id);
 408
 409         q = eth_dev->data->rx_queues[rx_queue_id];
 410         return t4_sge_eth_rxq_start(adap, q);
 411 }
 412
 413 static int cxgbe_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
 414                                    uint16_t rx_queue_id)
 415 {
 416         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 417         struct adapter *adap = pi->adapter;
 418         struct sge_rspq *q;
 419
 420         dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
 421                   __func__, pi->port_id, rx_queue_id);
 422
 423         q = eth_dev->data->rx_queues[rx_queue_id];
 424         return t4_sge_eth_rxq_stop(adap, q);
 425 }
 426
 427 static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 428                                     uint16_t queue_idx, uint16_t nb_desc,
 429                                     unsigned int socket_id,
 430                                     const struct rte_eth_rxconf *rx_conf,
 431                                     struct rte_mempool *mp)
 432 {
 433         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 434         struct adapter *adapter = pi->adapter;
 435         struct sge *s = &adapter->sge;
 436         struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset + queue_idx];
 437         int err = 0;
 438         int msi_idx = 0;
 439         unsigned int temp_nb_desc;
 440
 441         RTE_SET_USED(rx_conf);
 442
 443         dev_debug(adapter, "%s: eth_dev->data->nb_rx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id = %d; mp = %p\n",
 444                   __func__, eth_dev->data->nb_rx_queues, queue_idx, nb_desc,
 445                   socket_id, mp);
 446
 447         /*  Free up the existing queue  */
 448         if (eth_dev->data->rx_queues[queue_idx]) {
 449                 cxgbe_dev_rx_queue_release(eth_dev->data->rx_queues[queue_idx]);
 450                 eth_dev->data->rx_queues[queue_idx] = NULL;
 451         }
 452
 453         eth_dev->data->rx_queues[queue_idx] = (void *)rxq;
 454
 455         /* Sanity Checking
 456          *
 457          * nb_desc should be > 0 and <= CXGBE_MAX_RING_DESC_SIZE
 458          */
 459         temp_nb_desc = nb_desc;
 460         if (nb_desc < CXGBE_MIN_RING_DESC_SIZE) {
 461                 dev_warn(adapter, "%s: number of descriptors must be >= %d. Using default [%d]\n",
 462                          __func__, CXGBE_MIN_RING_DESC_SIZE,
 463                          CXGBE_DEFAULT_RX_DESC_SIZE);
 464                 temp_nb_desc = CXGBE_DEFAULT_RX_DESC_SIZE;
 465         } else if (nb_desc > CXGBE_MAX_RING_DESC_SIZE) {
 466                 dev_err(adapter, "%s: number of descriptors must be between %d and %d inclusive. Default [%d]\n",
 467                         __func__, CXGBE_MIN_RING_DESC_SIZE,
 468                         CXGBE_MAX_RING_DESC_SIZE, CXGBE_DEFAULT_RX_DESC_SIZE);
 469                 return -(EINVAL);
 470         }
 471
 472         rxq->rspq.size = temp_nb_desc;
 473         if ((&rxq->fl) != NULL)
 474                 rxq->fl.size = temp_nb_desc;
 475
 476         err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
 477                                &rxq->fl, t4_ethrx_handler,
 478                                t4_get_mps_bg_map(adapter, pi->tx_chan), mp,
 479                                queue_idx, socket_id);
 480
 481         dev_debug(adapter, "%s: err = %d; port_id = %d; cntxt_id = %u\n",
 482                   __func__, err, pi->port_id, rxq->rspq.cntxt_id);
 483         return err;
 484 }
 485
 486 static void cxgbe_dev_rx_queue_release(void *q)
 487 {
 488         struct sge_eth_rxq *rxq = (struct sge_eth_rxq *)q;
 489         struct sge_rspq *rq = &rxq->rspq;
 490
 491         if (rq) {
 492                 struct port_info *pi = (struct port_info *)
 493                                        (rq->eth_dev->data->dev_private);
 494                 struct adapter *adap = pi->adapter;
 495
 496                 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n",
 497                           __func__, pi->port_id, rxq->rspq.cntxt_id);
 498
 499                 t4_sge_eth_rxq_release(adap, rxq);
 500         }
 501 }
 502
 503 /*
 504  * Get port statistics.
 505  */
 506 static void cxgbe_dev_stats_get(struct rte_eth_dev *eth_dev,
 507                                 struct rte_eth_stats *eth_stats)
 508 {
 509         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 510         struct adapter *adapter = pi->adapter;
 511         struct sge *s = &adapter->sge;
 512         struct port_stats ps;
 513         unsigned int i;
 514
 515         cxgbe_stats_get(pi, &ps);
 516
 517         /* RX Stats */
 518         eth_stats->ipackets = ps.rx_frames;
 519         eth_stats->ibytes   = ps.rx_octets;
 520         eth_stats->imcasts  = ps.rx_mcast_frames;
 521         eth_stats->imissed  = ps.rx_ovflow0 + ps.rx_ovflow1 +
 522                               ps.rx_ovflow2 + ps.rx_ovflow3 +
 523                               ps.rx_trunc0 + ps.rx_trunc1 +
 524                               ps.rx_trunc2 + ps.rx_trunc3;
 525         eth_stats->ibadcrc  = ps.rx_fcs_err;
 526         eth_stats->ibadlen  = ps.rx_jabber + ps.rx_too_long + ps.rx_runt;
 527         eth_stats->ierrors  = ps.rx_symbol_err + eth_stats->ibadcrc +
 528                               eth_stats->ibadlen + ps.rx_len_err +
 529                               eth_stats->imissed;
 530         eth_stats->rx_pause_xon  = ps.rx_pause;
 531
 532         /* TX Stats */
 533         eth_stats->opackets = ps.tx_frames;
 534         eth_stats->obytes   = ps.tx_octets;
 535         eth_stats->oerrors  = ps.tx_error_frames;
 536         eth_stats->tx_pause_xon  = ps.tx_pause;
 537
 538         for (i = 0; i < pi->n_rx_qsets; i++) {
 539                 struct sge_eth_rxq *rxq =
 540                         &s->ethrxq[pi->first_qset + i];
 541
 542                 eth_stats->q_ipackets[i] = rxq->stats.pkts;
 543                 eth_stats->q_ibytes[i] = rxq->stats.rx_bytes;
 544         }
 545
 546         for (i = 0; i < pi->n_tx_qsets; i++) {
 547                 struct sge_eth_txq *txq =
 548                         &s->ethtxq[pi->first_qset + i];
 549
 550                 eth_stats->q_opackets[i] = txq->stats.pkts;
 551                 eth_stats->q_obytes[i] = txq->stats.tx_bytes;
 552                 eth_stats->q_errors[i] = txq->stats.mapping_err;
 553         }
 554 }
 555
 556 /*
 557  * Reset port statistics.
 558  */
 559 static void cxgbe_dev_stats_reset(struct rte_eth_dev *eth_dev)
 560 {
 561         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 562         struct adapter *adapter = pi->adapter;
 563         struct sge *s = &adapter->sge;
 564         unsigned int i;
 565
 566         cxgbe_stats_reset(pi);
 567         for (i = 0; i < pi->n_rx_qsets; i++) {
 568                 struct sge_eth_rxq *rxq =
 569                         &s->ethrxq[pi->first_qset + i];
 570
 571                 rxq->stats.pkts = 0;
 572                 rxq->stats.rx_bytes = 0;
 573         }
 574         for (i = 0; i < pi->n_tx_qsets; i++) {
 575                 struct sge_eth_txq *txq =
 576                         &s->ethtxq[pi->first_qset + i];
 577
 578                 txq->stats.pkts = 0;
 579                 txq->stats.tx_bytes = 0;
 580                 txq->stats.mapping_err = 0;
 581         }
 582 }
 583
 584 static struct eth_dev_ops cxgbe_eth_dev_ops = {
 585         .dev_start              = cxgbe_dev_start,
 586         .dev_stop               = cxgbe_dev_stop,
 587         .dev_close              = cxgbe_dev_close,
 588         .dev_configure          = cxgbe_dev_configure,
 589         .dev_infos_get          = cxgbe_dev_info_get,
 590         .tx_queue_setup         = cxgbe_dev_tx_queue_setup,
 591         .tx_queue_start         = cxgbe_dev_tx_queue_start,
 592         .tx_queue_stop          = cxgbe_dev_tx_queue_stop,
 593         .tx_queue_release       = cxgbe_dev_tx_queue_release,
 594         .rx_queue_setup         = cxgbe_dev_rx_queue_setup,
 595         .rx_queue_start         = cxgbe_dev_rx_queue_start,
 596         .rx_queue_stop          = cxgbe_dev_rx_queue_stop,
 597         .rx_queue_release       = cxgbe_dev_rx_queue_release,
 598         .stats_get              = cxgbe_dev_stats_get,
 599         .stats_reset            = cxgbe_dev_stats_reset,
 600 };
 601
 602 /*
 603  * Initialize driver
 604  * It returns 0 on success.
 605  */
 606 static int eth_cxgbe_dev_init(struct rte_eth_dev *eth_dev)
 607 {
 608         struct rte_pci_device *pci_dev;
 609         struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
 610         struct adapter *adapter = NULL;
 611         char name[RTE_ETH_NAME_MAX_LEN];
 612         int err = 0;
 613
 614         CXGBE_FUNC_TRACE();
 615
 616         eth_dev->dev_ops = &cxgbe_eth_dev_ops;
 617         eth_dev->rx_pkt_burst = &cxgbe_recv_pkts;
 618         eth_dev->tx_pkt_burst = &cxgbe_xmit_pkts;
 619
 620         /* for secondary processes, we don't initialise any further as primary
 621          * has already done this work.
 622          */
 623         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 624                 return 0;
 625
 626         pci_dev = eth_dev->pci_dev;
 627         snprintf(name, sizeof(name), "cxgbeadapter%d", eth_dev->data->port_id);
 628         adapter = rte_zmalloc(name, sizeof(*adapter), 0);
 629         if (!adapter)
 630                 return -1;
 631
 632         adapter->use_unpacked_mode = 1;
 633         adapter->regs = (void *)pci_dev->mem_resource[0].addr;
 634         if (!adapter->regs) {
 635                 dev_err(adapter, "%s: cannot map device registers\n", __func__);
 636                 err = -ENOMEM;
 637                 goto out_free_adapter;
 638         }
 639         adapter->pdev = pci_dev;
 640         adapter->eth_dev = eth_dev;
 641         pi->adapter = adapter;
 642
 643         err = cxgbe_probe(adapter);
 644         if (err)
 645                 dev_err(adapter, "%s: cxgbe probe failed with err %d\n",
 646                         __func__, err);
 647
 648 out_free_adapter:
 649         return err;
 650 }
 651
 652 static struct eth_driver rte_cxgbe_pmd = {
 653         {
 654                 .name = "rte_cxgbe_pmd",
 655                 .id_table = cxgb4_pci_tbl,
 656                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 657         },
 658         .eth_dev_init = eth_cxgbe_dev_init,
 659         .dev_private_size = sizeof(struct port_info),
 660 };
 661
 662 /*
 663  * Driver initialization routine.
 664  * Invoked once at EAL init time.
 665  * Register itself as the [Poll Mode] Driver of PCI CXGBE devices.
 666  */
 667 static int rte_cxgbe_pmd_init(const char *name __rte_unused,
 668                               const char *params __rte_unused)
 669 {
 670         CXGBE_FUNC_TRACE();
 671
 672         rte_eth_driver_register(&rte_cxgbe_pmd);
 673         return 0;
 674 }
 675
 676 static struct rte_driver rte_cxgbe_driver = {
 677         .name = "cxgbe_driver",
 678         .type = PMD_PDEV,
 679         .init = rte_cxgbe_pmd_init,
 680 };
 681
 682 PMD_REGISTER_DRIVER(rte_cxgbe_driver);