drivers/net/cxgbe/cxgbe_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2018 Chelsio Communications.
   3  * All rights reserved.
   4  */
   5 #include "base/common.h"
   6 #include "cxgbe_flow.h"
   7
   8 #define __CXGBE_FILL_FS(__v, __m, fs, elem, e) \
   9 do { \
  10         if ((fs)->mask.elem && ((fs)->val.elem != (__v))) \
  11                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, \
  12                                           NULL, "Redefined match item with" \
  13                                           " different values found"); \
  14         (fs)->val.elem = (__v); \
  15         (fs)->mask.elem = (__m); \
  16 } while (0)
  17
  18 #define __CXGBE_FILL_FS_MEMCPY(__v, __m, fs, elem) \
  19 do { \
  20         memcpy(&(fs)->val.elem, &(__v), sizeof(__v)); \
  21         memcpy(&(fs)->mask.elem, &(__m), sizeof(__m)); \
  22 } while (0)
  23
  24 #define CXGBE_FILL_FS(v, m, elem) \
  25         __CXGBE_FILL_FS(v, m, fs, elem, e)
  26
  27 #define CXGBE_FILL_FS_MEMCPY(v, m, elem) \
  28         __CXGBE_FILL_FS_MEMCPY(v, m, fs, elem)
  29
  30 static int
  31 cxgbe_validate_item(const struct rte_flow_item *i, struct rte_flow_error *e)
  32 {
  33         /* rte_flow specification does not allow it. */
  34         if (!i->spec && (i->mask ||  i->last))
  35                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
  36                                    i, "last or mask given without spec");
  37         /*
  38          * We don't support it.
  39          * Although, we can support values in last as 0's or last == spec.
  40          * But this will not provide user with any additional functionality
  41          * and will only increase the complexity for us.
  42          */
  43         if (i->last)
  44                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
  45                                    i, "last is not supported by chelsio pmd");
  46         return 0;
  47 }
  48
  49 /**
  50  * Apart from the 4-tuple IPv4/IPv6 - TCP/UDP information,
  51  * there's only 40-bits available to store match fields.
  52  * So, to save space, optimize filter spec for some common
  53  * known fields that hardware can parse against incoming
  54  * packets automatically.
  55  */
  56 static void
  57 cxgbe_tweak_filter_spec(struct adapter *adap,
  58                         struct ch_filter_specification *fs)
  59 {
  60         /* Save 16-bit ethertype field space, by setting corresponding
  61          * 1-bit flags in the filter spec for common known ethertypes.
  62          * When hardware sees these flags, it automatically infers and
  63          * matches incoming packets against the corresponding ethertype.
  64          */
  65         if (fs->mask.ethtype == 0xffff) {
  66                 switch (fs->val.ethtype) {
  67                 case RTE_ETHER_TYPE_IPV4:
  68                         if (adap->params.tp.ethertype_shift < 0) {
  69                                 fs->type = FILTER_TYPE_IPV4;
  70                                 fs->val.ethtype = 0;
  71                                 fs->mask.ethtype = 0;
  72                         }
  73                         break;
  74                 case RTE_ETHER_TYPE_IPV6:
  75                         if (adap->params.tp.ethertype_shift < 0) {
  76                                 fs->type = FILTER_TYPE_IPV6;
  77                                 fs->val.ethtype = 0;
  78                                 fs->mask.ethtype = 0;
  79                         }
  80                         break;
  81                 case RTE_ETHER_TYPE_VLAN:
  82                         if (adap->params.tp.ethertype_shift < 0 &&
  83                             adap->params.tp.vlan_shift >= 0) {
  84                                 fs->val.ivlan_vld = 1;
  85                                 fs->mask.ivlan_vld = 1;
  86                                 fs->val.ethtype = 0;
  87                                 fs->mask.ethtype = 0;
  88                         }
  89                         break;
  90                 case RTE_ETHER_TYPE_QINQ:
  91                         if (adap->params.tp.ethertype_shift < 0 &&
  92                             adap->params.tp.vnic_shift >= 0) {
  93                                 fs->val.ovlan_vld = 1;
  94                                 fs->mask.ovlan_vld = 1;
  95                                 fs->val.ethtype = 0;
  96                                 fs->mask.ethtype = 0;
  97                         }
  98                         break;
  99                 default:
 100                         break;
 101                 }
 102         }
 103 }
 104
 105 static void
 106 cxgbe_fill_filter_region(struct adapter *adap,
 107                          struct ch_filter_specification *fs)
 108 {
 109         struct tp_params *tp = &adap->params.tp;
 110         u64 hash_filter_mask = tp->hash_filter_mask;
 111         u64 ntuple_mask = 0;
 112
 113         fs->cap = 0;
 114
 115         if (!is_hashfilter(adap))
 116                 return;
 117
 118         if (fs->type) {
 119                 uint8_t biton[16] = {0xff, 0xff, 0xff, 0xff,
 120                                      0xff, 0xff, 0xff, 0xff,
 121                                      0xff, 0xff, 0xff, 0xff,
 122                                      0xff, 0xff, 0xff, 0xff};
 123                 uint8_t bitoff[16] = {0};
 124
 125                 if (!memcmp(fs->val.lip, bitoff, sizeof(bitoff)) ||
 126                     !memcmp(fs->val.fip, bitoff, sizeof(bitoff)) ||
 127                     memcmp(fs->mask.lip, biton, sizeof(biton)) ||
 128                     memcmp(fs->mask.fip, biton, sizeof(biton)))
 129                         return;
 130         } else {
 131                 uint32_t biton  = 0xffffffff;
 132                 uint32_t bitoff = 0x0U;
 133
 134                 if (!memcmp(fs->val.lip, &bitoff, sizeof(bitoff)) ||
 135                     !memcmp(fs->val.fip, &bitoff, sizeof(bitoff)) ||
 136                     memcmp(fs->mask.lip, &biton, sizeof(biton)) ||
 137                     memcmp(fs->mask.fip, &biton, sizeof(biton)))
 138                         return;
 139         }
 140
 141         if (!fs->val.lport || fs->mask.lport != 0xffff)
 142                 return;
 143         if (!fs->val.fport || fs->mask.fport != 0xffff)
 144                 return;
 145
 146         if (tp->protocol_shift >= 0)
 147                 ntuple_mask |= (u64)fs->mask.proto << tp->protocol_shift;
 148         if (tp->ethertype_shift >= 0)
 149                 ntuple_mask |= (u64)fs->mask.ethtype << tp->ethertype_shift;
 150         if (tp->port_shift >= 0)
 151                 ntuple_mask |= (u64)fs->mask.iport << tp->port_shift;
 152         if (tp->macmatch_shift >= 0)
 153                 ntuple_mask |= (u64)fs->mask.macidx << tp->macmatch_shift;
 154         if (tp->vlan_shift >= 0 && fs->mask.ivlan_vld)
 155                 ntuple_mask |= (u64)(F_FT_VLAN_VLD | fs->mask.ivlan) <<
 156                                tp->vlan_shift;
 157         if (tp->vnic_shift >= 0) {
 158                 if (fs->mask.ovlan_vld)
 159                         ntuple_mask |= (u64)(fs->val.ovlan_vld << 16 |
 160                                              fs->mask.ovlan) << tp->vnic_shift;
 161                 else if (fs->mask.pfvf_vld)
 162                         ntuple_mask |= (u64)(fs->mask.pfvf_vld << 16 |
 163                                              fs->mask.pf << 13 |
 164                                              fs->mask.vf) << tp->vnic_shift;
 165         }
 166         if (tp->tos_shift >= 0)
 167                 ntuple_mask |= (u64)fs->mask.tos << tp->tos_shift;
 168
 169         if (ntuple_mask != hash_filter_mask)
 170                 return;
 171
 172         fs->cap = 1;    /* use hash region */
 173 }
 174
 175 static int
 176 ch_rte_parsetype_eth(const void *dmask, const struct rte_flow_item *item,
 177                      struct ch_filter_specification *fs,
 178                      struct rte_flow_error *e)
 179 {
 180         const struct rte_flow_item_eth *spec = item->spec;
 181         const struct rte_flow_item_eth *umask = item->mask;
 182         const struct rte_flow_item_eth *mask;
 183
 184         /* If user has not given any mask, then use chelsio supported mask. */
 185         mask = umask ? umask : (const struct rte_flow_item_eth *)dmask;
 186
 187         if (!spec)
 188                 return 0;
 189
 190         /* we don't support SRC_MAC filtering*/
 191         if (!rte_is_zero_ether_addr(&mask->src))
 192                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
 193                                           item,
 194                                           "src mac filtering not supported");
 195
 196         if (!rte_is_zero_ether_addr(&mask->dst)) {
 197                 const u8 *addr = (const u8 *)&spec->dst.addr_bytes[0];
 198                 const u8 *m = (const u8 *)&mask->dst.addr_bytes[0];
 199                 struct rte_flow *flow = (struct rte_flow *)fs->private;
 200                 struct port_info *pi = (struct port_info *)
 201                                         (flow->dev->data->dev_private);
 202                 int idx;
 203
 204                 idx = cxgbe_mpstcam_alloc(pi, addr, m);
 205                 if (idx <= 0)
 206                         return rte_flow_error_set(e, idx,
 207                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 208                                                   NULL, "unable to allocate mac"
 209                                                   " entry in h/w");
 210                 CXGBE_FILL_FS(idx, 0x1ff, macidx);
 211         }
 212
 213         CXGBE_FILL_FS(be16_to_cpu(spec->type),
 214                       be16_to_cpu(mask->type), ethtype);
 215
 216         return 0;
 217 }
 218
 219 static int
 220 ch_rte_parsetype_port(const void *dmask, const struct rte_flow_item *item,
 221                       struct ch_filter_specification *fs,
 222                       struct rte_flow_error *e)
 223 {
 224         const struct rte_flow_item_phy_port *val = item->spec;
 225         const struct rte_flow_item_phy_port *umask = item->mask;
 226         const struct rte_flow_item_phy_port *mask;
 227
 228         mask = umask ? umask : (const struct rte_flow_item_phy_port *)dmask;
 229
 230         if (!val)
 231                 return 0; /* Wildcard, match all physical ports */
 232
 233         if (val->index > 0x7)
 234                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
 235                                           item,
 236                                           "port index upto 0x7 is supported");
 237
 238         CXGBE_FILL_FS(val->index, mask->index, iport);
 239
 240         return 0;
 241 }
 242
 243 static int
 244 ch_rte_parsetype_vlan(const void *dmask, const struct rte_flow_item *item,
 245                       struct ch_filter_specification *fs,
 246                       struct rte_flow_error *e)
 247 {
 248         const struct rte_flow_item_vlan *spec = item->spec;
 249         const struct rte_flow_item_vlan *umask = item->mask;
 250         const struct rte_flow_item_vlan *mask;
 251
 252         /* If user has not given any mask, then use chelsio supported mask. */
 253         mask = umask ? umask : (const struct rte_flow_item_vlan *)dmask;
 254
 255         if (!fs->mask.ethtype)
 256                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
 257                                           item,
 258                                           "Can't parse VLAN item without knowing ethertype");
 259
 260         /* If ethertype is already set and is not VLAN (0x8100) or
 261          * QINQ(0x88A8), then don't proceed further. Otherwise,
 262          * reset the outer ethertype, so that it can be replaced by
 263          * innermost ethertype. Note that hardware will automatically
 264          * match against VLAN or QINQ packets, based on 'ivlan_vld' or
 265          * 'ovlan_vld' bit set in Chelsio filter spec, respectively.
 266          */
 267         if (fs->mask.ethtype) {
 268                 if (fs->val.ethtype != RTE_ETHER_TYPE_VLAN &&
 269                     fs->val.ethtype != RTE_ETHER_TYPE_QINQ)
 270                         return rte_flow_error_set(e, EINVAL,
 271                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 272                                                   item,
 273                                                   "Ethertype must be 0x8100 or 0x88a8");
 274         }
 275
 276         if (fs->val.ethtype == RTE_ETHER_TYPE_QINQ) {
 277                 CXGBE_FILL_FS(1, 1, ovlan_vld);
 278                 if (spec) {
 279                         CXGBE_FILL_FS(be16_to_cpu(spec->tci),
 280                                       be16_to_cpu(mask->tci), ovlan);
 281
 282                         fs->mask.ethtype = 0;
 283                         fs->val.ethtype = 0;
 284                 }
 285         } else if (fs->val.ethtype == RTE_ETHER_TYPE_VLAN) {
 286                 CXGBE_FILL_FS(1, 1, ivlan_vld);
 287                 if (spec) {
 288                         CXGBE_FILL_FS(be16_to_cpu(spec->tci),
 289                                       be16_to_cpu(mask->tci), ivlan);
 290
 291                         fs->mask.ethtype = 0;
 292                         fs->val.ethtype = 0;
 293                 }
 294         }
 295
 296         if (spec)
 297                 CXGBE_FILL_FS(be16_to_cpu(spec->inner_type),
 298                               be16_to_cpu(mask->inner_type), ethtype);
 299
 300         return 0;
 301 }
 302
 303 static int
 304 ch_rte_parsetype_pf(const void *dmask __rte_unused,
 305                     const struct rte_flow_item *item __rte_unused,
 306                     struct ch_filter_specification *fs,
 307                     struct rte_flow_error *e __rte_unused)
 308 {
 309         struct rte_flow *flow = (struct rte_flow *)fs->private;
 310         struct rte_eth_dev *dev = flow->dev;
 311         struct adapter *adap = ethdev2adap(dev);
 312
 313         CXGBE_FILL_FS(1, 1, pfvf_vld);
 314
 315         CXGBE_FILL_FS(adap->pf, 0x7, pf);
 316         return 0;
 317 }
 318
 319 static int
 320 ch_rte_parsetype_vf(const void *dmask, const struct rte_flow_item *item,
 321                     struct ch_filter_specification *fs,
 322                     struct rte_flow_error *e)
 323 {
 324         const struct rte_flow_item_vf *umask = item->mask;
 325         const struct rte_flow_item_vf *val = item->spec;
 326         const struct rte_flow_item_vf *mask;
 327
 328         /* If user has not given any mask, then use chelsio supported mask. */
 329         mask = umask ? umask : (const struct rte_flow_item_vf *)dmask;
 330
 331         CXGBE_FILL_FS(1, 1, pfvf_vld);
 332
 333         if (!val)
 334                 return 0; /* Wildcard, match all Vf */
 335
 336         if (val->id > UCHAR_MAX)
 337                 return rte_flow_error_set(e, EINVAL,
 338                                           RTE_FLOW_ERROR_TYPE_ITEM,
 339                                           item,
 340                                           "VF ID > MAX(255)");
 341
 342         CXGBE_FILL_FS(val->id, mask->id, vf);
 343
 344         return 0;
 345 }
 346
 347 static int
 348 ch_rte_parsetype_udp(const void *dmask, const struct rte_flow_item *item,
 349                      struct ch_filter_specification *fs,
 350                      struct rte_flow_error *e)
 351 {
 352         const struct rte_flow_item_udp *val = item->spec;
 353         const struct rte_flow_item_udp *umask = item->mask;
 354         const struct rte_flow_item_udp *mask;
 355
 356         mask = umask ? umask : (const struct rte_flow_item_udp *)dmask;
 357
 358         if (mask->hdr.dgram_len || mask->hdr.dgram_cksum)
 359                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
 360                                           item,
 361                                           "udp: only src/dst port supported");
 362
 363         CXGBE_FILL_FS(IPPROTO_UDP, 0xff, proto);
 364         if (!val)
 365                 return 0;
 366         CXGBE_FILL_FS(be16_to_cpu(val->hdr.src_port),
 367                       be16_to_cpu(mask->hdr.src_port), fport);
 368         CXGBE_FILL_FS(be16_to_cpu(val->hdr.dst_port),
 369                       be16_to_cpu(mask->hdr.dst_port), lport);
 370         return 0;
 371 }
 372
 373 static int
 374 ch_rte_parsetype_tcp(const void *dmask, const struct rte_flow_item *item,
 375                      struct ch_filter_specification *fs,
 376                      struct rte_flow_error *e)
 377 {
 378         const struct rte_flow_item_tcp *val = item->spec;
 379         const struct rte_flow_item_tcp *umask = item->mask;
 380         const struct rte_flow_item_tcp *mask;
 381
 382         mask = umask ? umask : (const struct rte_flow_item_tcp *)dmask;
 383
 384         if (mask->hdr.sent_seq || mask->hdr.recv_ack || mask->hdr.data_off ||
 385             mask->hdr.tcp_flags || mask->hdr.rx_win || mask->hdr.cksum ||
 386             mask->hdr.tcp_urp)
 387                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
 388                                           item,
 389                                           "tcp: only src/dst port supported");
 390
 391         CXGBE_FILL_FS(IPPROTO_TCP, 0xff, proto);
 392         if (!val)
 393                 return 0;
 394         CXGBE_FILL_FS(be16_to_cpu(val->hdr.src_port),
 395                       be16_to_cpu(mask->hdr.src_port), fport);
 396         CXGBE_FILL_FS(be16_to_cpu(val->hdr.dst_port),
 397                       be16_to_cpu(mask->hdr.dst_port), lport);
 398         return 0;
 399 }
 400
 401 static int
 402 ch_rte_parsetype_ipv4(const void *dmask, const struct rte_flow_item *item,
 403                       struct ch_filter_specification *fs,
 404                       struct rte_flow_error *e)
 405 {
 406         const struct rte_flow_item_ipv4 *val = item->spec;
 407         const struct rte_flow_item_ipv4 *umask = item->mask;
 408         const struct rte_flow_item_ipv4 *mask;
 409
 410         mask = umask ? umask : (const struct rte_flow_item_ipv4 *)dmask;
 411
 412         if (mask->hdr.time_to_live)
 413                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
 414                                           item, "ttl is not supported");
 415
 416         if (fs->mask.ethtype &&
 417             (fs->val.ethtype != RTE_ETHER_TYPE_IPV4))
 418                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
 419                                           item,
 420                                           "Couldn't find IPv4 ethertype");
 421         fs->type = FILTER_TYPE_IPV4;
 422         if (!val)
 423                 return 0; /* ipv4 wild card */
 424
 425         CXGBE_FILL_FS(val->hdr.next_proto_id, mask->hdr.next_proto_id, proto);
 426         CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip);
 427         CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip);
 428         CXGBE_FILL_FS(val->hdr.type_of_service, mask->hdr.type_of_service, tos);
 429
 430         return 0;
 431 }
 432
 433 static int
 434 ch_rte_parsetype_ipv6(const void *dmask, const struct rte_flow_item *item,
 435                       struct ch_filter_specification *fs,
 436                       struct rte_flow_error *e)
 437 {
 438         const struct rte_flow_item_ipv6 *val = item->spec;
 439         const struct rte_flow_item_ipv6 *umask = item->mask;
 440         const struct rte_flow_item_ipv6 *mask;
 441         u32 vtc_flow, vtc_flow_mask;
 442
 443         mask = umask ? umask : (const struct rte_flow_item_ipv6 *)dmask;
 444
 445         vtc_flow_mask = be32_to_cpu(mask->hdr.vtc_flow);
 446
 447         if (vtc_flow_mask & RTE_IPV6_HDR_FL_MASK ||
 448             mask->hdr.payload_len || mask->hdr.hop_limits)
 449                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
 450                                           item,
 451                                           "flow/hop are not supported");
 452
 453         if (fs->mask.ethtype &&
 454             (fs->val.ethtype != RTE_ETHER_TYPE_IPV6))
 455                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM,
 456                                           item,
 457                                           "Couldn't find IPv6 ethertype");
 458         fs->type = FILTER_TYPE_IPV6;
 459         if (!val)
 460                 return 0; /* ipv6 wild card */
 461
 462         CXGBE_FILL_FS(val->hdr.proto, mask->hdr.proto, proto);
 463
 464         vtc_flow = be32_to_cpu(val->hdr.vtc_flow);
 465         CXGBE_FILL_FS((vtc_flow & RTE_IPV6_HDR_TC_MASK) >>
 466                       RTE_IPV6_HDR_TC_SHIFT,
 467                       (vtc_flow_mask & RTE_IPV6_HDR_TC_MASK) >>
 468                       RTE_IPV6_HDR_TC_SHIFT,
 469                       tos);
 470
 471         CXGBE_FILL_FS_MEMCPY(val->hdr.dst_addr, mask->hdr.dst_addr, lip);
 472         CXGBE_FILL_FS_MEMCPY(val->hdr.src_addr, mask->hdr.src_addr, fip);
 473
 474         return 0;
 475 }
 476
 477 static int
 478 cxgbe_rtef_parse_attr(struct rte_flow *flow, const struct rte_flow_attr *attr,
 479                       struct rte_flow_error *e)
 480 {
 481         if (attr->egress)
 482                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR,
 483                                           attr, "attribute:<egress> is"
 484                                           " not supported !");
 485         if (attr->group > 0)
 486                 return rte_flow_error_set(e, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR,
 487                                           attr, "group parameter is"
 488                                           " not supported.");
 489
 490         flow->fidx = attr->priority ? attr->priority - 1 : FILTER_ID_MAX;
 491
 492         return 0;
 493 }
 494
 495 static inline int check_rxq(struct rte_eth_dev *dev, uint16_t rxq)
 496 {
 497         struct port_info *pi = ethdev2pinfo(dev);
 498
 499         if (rxq > pi->n_rx_qsets)
 500                 return -EINVAL;
 501         return 0;
 502 }
 503
 504 static int cxgbe_validate_fidxondel(struct filter_entry *f, unsigned int fidx)
 505 {
 506         struct adapter *adap = ethdev2adap(f->dev);
 507         struct ch_filter_specification fs = f->fs;
 508         u8 nentries;
 509
 510         if (fidx >= adap->tids.nftids) {
 511                 dev_err(adap, "invalid flow index %d.\n", fidx);
 512                 return -EINVAL;
 513         }
 514
 515         nentries = cxgbe_filter_slots(adap, fs.type);
 516         if (!cxgbe_is_filter_set(&adap->tids, fidx, nentries)) {
 517                 dev_err(adap, "Already free fidx:%d f:%p\n", fidx, f);
 518                 return -EINVAL;
 519         }
 520
 521         return 0;
 522 }
 523
 524 static int
 525 cxgbe_validate_fidxonadd(struct ch_filter_specification *fs,
 526                          struct adapter *adap, unsigned int fidx)
 527 {
 528         u8 nentries;
 529
 530         nentries = cxgbe_filter_slots(adap, fs->type);
 531         if (cxgbe_is_filter_set(&adap->tids, fidx, nentries)) {
 532                 dev_err(adap, "filter index: %d is busy.\n", fidx);
 533                 return -EBUSY;
 534         }
 535
 536         if (fidx >= adap->tids.nftids) {
 537                 dev_err(adap, "filter index (%u) >= max(%u)\n",
 538                         fidx, adap->tids.nftids);
 539                 return -ERANGE;
 540         }
 541
 542         return 0;
 543 }
 544
 545 static int
 546 cxgbe_verify_fidx(struct rte_flow *flow, unsigned int fidx, uint8_t del)
 547 {
 548         if (flow->fs.cap)
 549                 return 0; /* Hash filters */
 550         return del ? cxgbe_validate_fidxondel(flow->f, fidx) :
 551                 cxgbe_validate_fidxonadd(&flow->fs,
 552                                          ethdev2adap(flow->dev), fidx);
 553 }
 554
 555 static int cxgbe_get_fidx(struct rte_flow *flow, unsigned int *fidx)
 556 {
 557         struct ch_filter_specification *fs = &flow->fs;
 558         struct adapter *adap = ethdev2adap(flow->dev);
 559
 560         /* For tcam get the next available slot, if default value specified */
 561         if (flow->fidx == FILTER_ID_MAX) {
 562                 u8 nentries;
 563                 int idx;
 564
 565                 nentries = cxgbe_filter_slots(adap, fs->type);
 566                 idx = cxgbe_alloc_ftid(adap, nentries);
 567                 if (idx < 0) {
 568                         dev_err(adap, "unable to get a filter index in tcam\n");
 569                         return -ENOMEM;
 570                 }
 571                 *fidx = (unsigned int)idx;
 572         } else {
 573                 *fidx = flow->fidx;
 574         }
 575
 576         return 0;
 577 }
 578
 579 static int
 580 cxgbe_get_flow_item_index(const struct rte_flow_item items[], u32 type)
 581 {
 582         const struct rte_flow_item *i;
 583         int j, index = -ENOENT;
 584
 585         for (i = items, j = 0; i->type != RTE_FLOW_ITEM_TYPE_END; i++, j++) {
 586                 if (i->type == type) {
 587                         index = j;
 588                         break;
 589                 }
 590         }
 591
 592         return index;
 593 }
 594
 595 static int
 596 ch_rte_parse_nat(uint8_t nmode, struct ch_filter_specification *fs)
 597 {
 598         /* nmode:
 599          * BIT_0 = [src_ip],   BIT_1 = [dst_ip]
 600          * BIT_2 = [src_port], BIT_3 = [dst_port]
 601          *
 602          * Only below cases are supported as per our spec.
 603          */
 604         switch (nmode) {
 605         case 0:  /* 0000b */
 606                 fs->nat_mode = NAT_MODE_NONE;
 607                 break;
 608         case 2:  /* 0010b */
 609                 fs->nat_mode = NAT_MODE_DIP;
 610                 break;
 611         case 5:  /* 0101b */
 612                 fs->nat_mode = NAT_MODE_SIP_SP;
 613                 break;
 614         case 7:  /* 0111b */
 615                 fs->nat_mode = NAT_MODE_DIP_SIP_SP;
 616                 break;
 617         case 10: /* 1010b */
 618                 fs->nat_mode = NAT_MODE_DIP_DP;
 619                 break;
 620         case 11: /* 1011b */
 621                 fs->nat_mode = NAT_MODE_DIP_DP_SIP;
 622                 break;
 623         case 14: /* 1110b */
 624                 fs->nat_mode = NAT_MODE_DIP_DP_SP;
 625                 break;
 626         case 15: /* 1111b */
 627                 fs->nat_mode = NAT_MODE_ALL;
 628                 break;
 629         default:
 630                 return -EINVAL;
 631         }
 632
 633         return 0;
 634 }
 635
 636 static int
 637 ch_rte_parse_atype_switch(const struct rte_flow_action *a,
 638                           const struct rte_flow_item items[],
 639                           uint8_t *nmode,
 640                           struct ch_filter_specification *fs,
 641                           struct rte_flow_error *e)
 642 {
 643         const struct rte_flow_action_of_set_vlan_vid *vlanid;
 644         const struct rte_flow_action_of_set_vlan_pcp *vlanpcp;
 645         const struct rte_flow_action_of_push_vlan *pushvlan;
 646         const struct rte_flow_action_set_ipv4 *ipv4;
 647         const struct rte_flow_action_set_ipv6 *ipv6;
 648         const struct rte_flow_action_set_tp *tp_port;
 649         const struct rte_flow_action_phy_port *port;
 650         int item_index;
 651         u16 tmp_vlan;
 652
 653         switch (a->type) {
 654         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
 655                 vlanid = (const struct rte_flow_action_of_set_vlan_vid *)
 656                           a->conf;
 657                 /* If explicitly asked to push a new VLAN header,
 658                  * then don't set rewrite mode. Otherwise, the
 659                  * incoming VLAN packets will get their VLAN fields
 660                  * rewritten, instead of adding an additional outer
 661                  * VLAN header.
 662                  */
 663                 if (fs->newvlan != VLAN_INSERT)
 664                         fs->newvlan = VLAN_REWRITE;
 665                 tmp_vlan = fs->vlan & 0xe000;
 666                 fs->vlan = (be16_to_cpu(vlanid->vlan_vid) & 0xfff) | tmp_vlan;
 667                 break;
 668         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
 669                 vlanpcp = (const struct rte_flow_action_of_set_vlan_pcp *)
 670                           a->conf;
 671                 /* If explicitly asked to push a new VLAN header,
 672                  * then don't set rewrite mode. Otherwise, the
 673                  * incoming VLAN packets will get their VLAN fields
 674                  * rewritten, instead of adding an additional outer
 675                  * VLAN header.
 676                  */
 677                 if (fs->newvlan != VLAN_INSERT)
 678                         fs->newvlan = VLAN_REWRITE;
 679                 tmp_vlan = fs->vlan & 0xfff;
 680                 fs->vlan = (vlanpcp->vlan_pcp << 13) | tmp_vlan;
 681                 break;
 682         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
 683                 pushvlan = (const struct rte_flow_action_of_push_vlan *)
 684                             a->conf;
 685                 if (be16_to_cpu(pushvlan->ethertype) != RTE_ETHER_TYPE_VLAN)
 686                         return rte_flow_error_set(e, EINVAL,
 687                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 688                                                   "only ethertype 0x8100 "
 689                                                   "supported for push vlan.");
 690                 fs->newvlan = VLAN_INSERT;
 691                 break;
 692         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
 693                 fs->newvlan = VLAN_REMOVE;
 694                 break;
 695         case RTE_FLOW_ACTION_TYPE_PHY_PORT:
 696                 port = (const struct rte_flow_action_phy_port *)a->conf;
 697                 fs->eport = port->index;
 698                 break;
 699         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
 700                 item_index = cxgbe_get_flow_item_index(items,
 701                                                        RTE_FLOW_ITEM_TYPE_IPV4);
 702                 if (item_index < 0)
 703                         return rte_flow_error_set(e, EINVAL,
 704                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 705                                                   "No RTE_FLOW_ITEM_TYPE_IPV4 "
 706                                                   "found.");
 707
 708                 ipv4 = (const struct rte_flow_action_set_ipv4 *)a->conf;
 709                 memcpy(fs->nat_fip, &ipv4->ipv4_addr, sizeof(ipv4->ipv4_addr));
 710                 *nmode |= 1 << 0;
 711                 break;
 712         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
 713                 item_index = cxgbe_get_flow_item_index(items,
 714                                                        RTE_FLOW_ITEM_TYPE_IPV4);
 715                 if (item_index < 0)
 716                         return rte_flow_error_set(e, EINVAL,
 717                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 718                                                   "No RTE_FLOW_ITEM_TYPE_IPV4 "
 719                                                   "found.");
 720
 721                 ipv4 = (const struct rte_flow_action_set_ipv4 *)a->conf;
 722                 memcpy(fs->nat_lip, &ipv4->ipv4_addr, sizeof(ipv4->ipv4_addr));
 723                 *nmode |= 1 << 1;
 724                 break;
 725         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
 726                 item_index = cxgbe_get_flow_item_index(items,
 727                                                        RTE_FLOW_ITEM_TYPE_IPV6);
 728                 if (item_index < 0)
 729                         return rte_flow_error_set(e, EINVAL,
 730                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 731                                                   "No RTE_FLOW_ITEM_TYPE_IPV6 "
 732                                                   "found.");
 733
 734                 ipv6 = (const struct rte_flow_action_set_ipv6 *)a->conf;
 735                 memcpy(fs->nat_fip, ipv6->ipv6_addr, sizeof(ipv6->ipv6_addr));
 736                 *nmode |= 1 << 0;
 737                 break;
 738         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
 739                 item_index = cxgbe_get_flow_item_index(items,
 740                                                        RTE_FLOW_ITEM_TYPE_IPV6);
 741                 if (item_index < 0)
 742                         return rte_flow_error_set(e, EINVAL,
 743                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 744                                                   "No RTE_FLOW_ITEM_TYPE_IPV6 "
 745                                                   "found.");
 746
 747                 ipv6 = (const struct rte_flow_action_set_ipv6 *)a->conf;
 748                 memcpy(fs->nat_lip, ipv6->ipv6_addr, sizeof(ipv6->ipv6_addr));
 749                 *nmode |= 1 << 1;
 750                 break;
 751         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
 752                 item_index = cxgbe_get_flow_item_index(items,
 753                                                        RTE_FLOW_ITEM_TYPE_TCP);
 754                 if (item_index < 0) {
 755                         item_index =
 756                                 cxgbe_get_flow_item_index(items,
 757                                                 RTE_FLOW_ITEM_TYPE_UDP);
 758                         if (item_index < 0)
 759                                 return rte_flow_error_set(e, EINVAL,
 760                                                 RTE_FLOW_ERROR_TYPE_ACTION, a,
 761                                                 "No RTE_FLOW_ITEM_TYPE_TCP or "
 762                                                 "RTE_FLOW_ITEM_TYPE_UDP found");
 763                 }
 764
 765                 tp_port = (const struct rte_flow_action_set_tp *)a->conf;
 766                 fs->nat_fport = be16_to_cpu(tp_port->port);
 767                 *nmode |= 1 << 2;
 768                 break;
 769         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
 770                 item_index = cxgbe_get_flow_item_index(items,
 771                                                        RTE_FLOW_ITEM_TYPE_TCP);
 772                 if (item_index < 0) {
 773                         item_index =
 774                                 cxgbe_get_flow_item_index(items,
 775                                                 RTE_FLOW_ITEM_TYPE_UDP);
 776                         if (item_index < 0)
 777                                 return rte_flow_error_set(e, EINVAL,
 778                                                 RTE_FLOW_ERROR_TYPE_ACTION, a,
 779                                                 "No RTE_FLOW_ITEM_TYPE_TCP or "
 780                                                 "RTE_FLOW_ITEM_TYPE_UDP found");
 781                 }
 782
 783                 tp_port = (const struct rte_flow_action_set_tp *)a->conf;
 784                 fs->nat_lport = be16_to_cpu(tp_port->port);
 785                 *nmode |= 1 << 3;
 786                 break;
 787         case RTE_FLOW_ACTION_TYPE_MAC_SWAP:
 788                 item_index = cxgbe_get_flow_item_index(items,
 789                                                        RTE_FLOW_ITEM_TYPE_ETH);
 790                 if (item_index < 0)
 791                         return rte_flow_error_set(e, EINVAL,
 792                                                   RTE_FLOW_ERROR_TYPE_ACTION, a,
 793                                                   "No RTE_FLOW_ITEM_TYPE_ETH "
 794                                                   "found");
 795                 fs->swapmac = 1;
 796                 break;
 797         default:
 798                 /* We are not supposed to come here */
 799                 return rte_flow_error_set(e, EINVAL,
 800                                           RTE_FLOW_ERROR_TYPE_ACTION, a,
 801                                           "Action not supported");
 802         }
 803
 804         return 0;
 805 }
 806
 807 static int
 808 cxgbe_rtef_parse_actions(struct rte_flow *flow,
 809                          const struct rte_flow_item items[],
 810                          const struct rte_flow_action action[],
 811                          struct rte_flow_error *e)
 812 {
 813         struct ch_filter_specification *fs = &flow->fs;
 814         uint8_t nmode = 0, nat_ipv4 = 0, nat_ipv6 = 0;
 815         uint8_t vlan_set_vid = 0, vlan_set_pcp = 0;
 816         const struct rte_flow_action_queue *q;
 817         const struct rte_flow_action *a;
 818         char abit = 0;
 819         int ret;
 820
 821         for (a = action; a->type != RTE_FLOW_ACTION_TYPE_END; a++) {
 822                 switch (a->type) {
 823                 case RTE_FLOW_ACTION_TYPE_VOID:
 824                         continue;
 825                 case RTE_FLOW_ACTION_TYPE_DROP:
 826                         if (abit++)
 827                                 return rte_flow_error_set(e, EINVAL,
 828                                                 RTE_FLOW_ERROR_TYPE_ACTION, a,
 829                                                 "specify only 1 pass/drop");
 830                         fs->action = FILTER_DROP;
 831                         break;
 832                 case RTE_FLOW_ACTION_TYPE_QUEUE:
 833                         q = (const struct rte_flow_action_queue *)a->conf;
 834                         if (!q)
 835                                 return rte_flow_error_set(e, EINVAL,
 836                                                 RTE_FLOW_ERROR_TYPE_ACTION, q,
 837                                                 "specify rx queue index");
 838                         if (check_rxq(flow->dev, q->index))
 839                                 return rte_flow_error_set(e, EINVAL,
 840                                                 RTE_FLOW_ERROR_TYPE_ACTION, q,
 841                                                 "Invalid rx queue");
 842                         if (abit++)
 843                                 return rte_flow_error_set(e, EINVAL,
 844                                                 RTE_FLOW_ERROR_TYPE_ACTION, a,
 845                                                 "specify only 1 pass/drop");
 846                         fs->action = FILTER_PASS;
 847                         fs->dirsteer = 1;
 848                         fs->iq = q->index;
 849                         break;
 850                 case RTE_FLOW_ACTION_TYPE_COUNT:
 851                         fs->hitcnts = 1;
 852                         break;
 853                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
 854                         vlan_set_vid++;
 855                         goto action_switch;
 856                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
 857                         vlan_set_pcp++;
 858                         goto action_switch;
 859                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
 860                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
 861                 case RTE_FLOW_ACTION_TYPE_PHY_PORT:
 862                 case RTE_FLOW_ACTION_TYPE_MAC_SWAP:
 863                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
 864                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
 865                         nat_ipv4++;
 866                         goto action_switch;
 867                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
 868                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
 869                         nat_ipv6++;
 870                         goto action_switch;
 871                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
 872                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
 873 action_switch:
 874                         /* We allow multiple switch actions, but switch is
 875                          * not compatible with either queue or drop
 876                          */
 877                         if (abit++ && fs->action != FILTER_SWITCH)
 878                                 return rte_flow_error_set(e, EINVAL,
 879                                                 RTE_FLOW_ERROR_TYPE_ACTION, a,
 880                                                 "overlapping action specified");
 881                         if (nat_ipv4 && nat_ipv6)
 882                                 return rte_flow_error_set(e, EINVAL,
 883                                         RTE_FLOW_ERROR_TYPE_ACTION, a,
 884                                         "Can't have one address ipv4 and the"
 885                                         " other ipv6");
 886
 887                         ret = ch_rte_parse_atype_switch(a, items, &nmode, fs,
 888                                                         e);
 889                         if (ret)
 890                                 return ret;
 891                         fs->action = FILTER_SWITCH;
 892                         break;
 893                 default:
 894                         /* Not supported action : return error */
 895                         return rte_flow_error_set(e, ENOTSUP,
 896                                                   RTE_FLOW_ERROR_TYPE_ACTION,
 897                                                   a, "Action not supported");
 898                 }
 899         }
 900
 901         if (fs->newvlan == VLAN_REWRITE && (!vlan_set_vid || !vlan_set_pcp))
 902                 return rte_flow_error_set(e, EINVAL,
 903                                           RTE_FLOW_ERROR_TYPE_ACTION, a,
 904                                           "Both OF_SET_VLAN_VID and "
 905                                           "OF_SET_VLAN_PCP must be specified");
 906
 907         if (ch_rte_parse_nat(nmode, fs))
 908                 return rte_flow_error_set(e, EINVAL,
 909                                           RTE_FLOW_ERROR_TYPE_ACTION, a,
 910                                           "invalid settings for swich action");
 911         return 0;
 912 }
 913
 914 static struct chrte_fparse parseitem[] = {
 915         [RTE_FLOW_ITEM_TYPE_ETH] = {
 916                 .fptr  = ch_rte_parsetype_eth,
 917                 .dmask = &(const struct rte_flow_item_eth){
 918                         .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
 919                         .src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
 920                         .type = 0xffff,
 921                 }
 922         },
 923
 924         [RTE_FLOW_ITEM_TYPE_PHY_PORT] = {
 925                 .fptr = ch_rte_parsetype_port,
 926                 .dmask = &(const struct rte_flow_item_phy_port){
 927                         .index = 0x7,
 928                 }
 929         },
 930
 931         [RTE_FLOW_ITEM_TYPE_VLAN] = {
 932                 .fptr = ch_rte_parsetype_vlan,
 933                 .dmask = &(const struct rte_flow_item_vlan){
 934                         .tci = 0xffff,
 935                         .inner_type = 0xffff,
 936                 }
 937         },
 938
 939         [RTE_FLOW_ITEM_TYPE_IPV4] = {
 940                 .fptr  = ch_rte_parsetype_ipv4,
 941                 .dmask = &(const struct rte_flow_item_ipv4) {
 942                         .hdr = {
 943                                 .src_addr = RTE_BE32(0xffffffff),
 944                                 .dst_addr = RTE_BE32(0xffffffff),
 945                                 .type_of_service = 0xff,
 946                         },
 947                 },
 948         },
 949
 950         [RTE_FLOW_ITEM_TYPE_IPV6] = {
 951                 .fptr  = ch_rte_parsetype_ipv6,
 952                 .dmask = &(const struct rte_flow_item_ipv6) {
 953                         .hdr = {
 954                                 .src_addr =
 955                                         "\xff\xff\xff\xff\xff\xff\xff\xff"
 956                                         "\xff\xff\xff\xff\xff\xff\xff\xff",
 957                                 .dst_addr =
 958                                         "\xff\xff\xff\xff\xff\xff\xff\xff"
 959                                         "\xff\xff\xff\xff\xff\xff\xff\xff",
 960                                 .vtc_flow = RTE_BE32(0xff000000),
 961                         },
 962                 },
 963         },
 964
 965         [RTE_FLOW_ITEM_TYPE_UDP] = {
 966                 .fptr  = ch_rte_parsetype_udp,
 967                 .dmask = &rte_flow_item_udp_mask,
 968         },
 969
 970         [RTE_FLOW_ITEM_TYPE_TCP] = {
 971                 .fptr  = ch_rte_parsetype_tcp,
 972                 .dmask = &rte_flow_item_tcp_mask,
 973         },
 974
 975         [RTE_FLOW_ITEM_TYPE_PF] = {
 976                 .fptr = ch_rte_parsetype_pf,
 977                 .dmask = NULL,
 978         },
 979
 980         [RTE_FLOW_ITEM_TYPE_VF] = {
 981                 .fptr = ch_rte_parsetype_vf,
 982                 .dmask = &(const struct rte_flow_item_vf){
 983                         .id = 0xffffffff,
 984                 }
 985         },
 986 };
 987
 988 static int
 989 cxgbe_rtef_parse_items(struct rte_flow *flow,
 990                        const struct rte_flow_item items[],
 991                        struct rte_flow_error *e)
 992 {
 993         struct adapter *adap = ethdev2adap(flow->dev);
 994         const struct rte_flow_item *i;
 995         char repeat[ARRAY_SIZE(parseitem)] = {0};
 996
 997         for (i = items; i->type != RTE_FLOW_ITEM_TYPE_END; i++) {
 998                 struct chrte_fparse *idx;
 999                 int ret;
1000
1001                 if (i->type >= ARRAY_SIZE(parseitem))
1002                         return rte_flow_error_set(e, ENOTSUP,
1003                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1004                                                   i, "Item not supported");
1005
1006                 switch (i->type) {
1007                 case RTE_FLOW_ITEM_TYPE_VOID:
1008                         continue;
1009                 default:
1010                         /* check if item is repeated */
1011                         if (repeat[i->type] &&
1012                             i->type != RTE_FLOW_ITEM_TYPE_VLAN)
1013                                 return rte_flow_error_set(e, ENOTSUP,
1014                                                 RTE_FLOW_ERROR_TYPE_ITEM, i,
1015                                                 "parse items cannot be repeated(except void/vlan)");
1016
1017                         repeat[i->type] = 1;
1018
1019                         /* validate the item */
1020                         ret = cxgbe_validate_item(i, e);
1021                         if (ret)
1022                                 return ret;
1023
1024                         idx = &flow->item_parser[i->type];
1025                         if (!idx || !idx->fptr) {
1026                                 return rte_flow_error_set(e, ENOTSUP,
1027                                                 RTE_FLOW_ERROR_TYPE_ITEM, i,
1028                                                 "Item not supported");
1029                         } else {
1030                                 ret = idx->fptr(idx->dmask, i, &flow->fs, e);
1031                                 if (ret)
1032                                         return ret;
1033                         }
1034                 }
1035         }
1036
1037         cxgbe_fill_filter_region(adap, &flow->fs);
1038         cxgbe_tweak_filter_spec(adap, &flow->fs);
1039
1040         return 0;
1041 }
1042
1043 static int
1044 cxgbe_flow_parse(struct rte_flow *flow,
1045                  const struct rte_flow_attr *attr,
1046                  const struct rte_flow_item item[],
1047                  const struct rte_flow_action action[],
1048                  struct rte_flow_error *e)
1049 {
1050         int ret;
1051         /* parse user request into ch_filter_specification */
1052         ret = cxgbe_rtef_parse_attr(flow, attr, e);
1053         if (ret)
1054                 return ret;
1055         ret = cxgbe_rtef_parse_items(flow, item, e);
1056         if (ret)
1057                 return ret;
1058         return cxgbe_rtef_parse_actions(flow, item, action, e);
1059 }
1060
1061 static int __cxgbe_flow_create(struct rte_eth_dev *dev, struct rte_flow *flow)
1062 {
1063         struct ch_filter_specification *fs = &flow->fs;
1064         struct adapter *adap = ethdev2adap(dev);
1065         struct tid_info *t = &adap->tids;
1066         struct filter_ctx ctx;
1067         unsigned int fidx;
1068         int err;
1069
1070         if (cxgbe_get_fidx(flow, &fidx))
1071                 return -ENOMEM;
1072         if (cxgbe_verify_fidx(flow, fidx, 0))
1073                 return -1;
1074
1075         t4_init_completion(&ctx.completion);
1076         /* go create the filter */
1077         err = cxgbe_set_filter(dev, fidx, fs, &ctx);
1078         if (err) {
1079                 dev_err(adap, "Error %d while creating filter.\n", err);
1080                 return err;
1081         }
1082
1083         /* Poll the FW for reply */
1084         err = cxgbe_poll_for_completion(&adap->sge.fw_evtq,
1085                                         CXGBE_FLOW_POLL_MS,
1086                                         CXGBE_FLOW_POLL_CNT,
1087                                         &ctx.completion);
1088         if (err) {
1089                 dev_err(adap, "Filter set operation timed out (%d)\n", err);
1090                 return err;
1091         }
1092         if (ctx.result) {
1093                 dev_err(adap, "Hardware error %d while creating the filter.\n",
1094                         ctx.result);
1095                 return ctx.result;
1096         }
1097
1098         if (fs->cap) { /* to destroy the filter */
1099                 flow->fidx = ctx.tid;
1100                 flow->f = lookup_tid(t, ctx.tid);
1101         } else {
1102                 flow->fidx = fidx;
1103                 flow->f = &adap->tids.ftid_tab[fidx];
1104         }
1105
1106         return 0;
1107 }
1108
1109 static struct rte_flow *
1110 cxgbe_flow_create(struct rte_eth_dev *dev,
1111                   const struct rte_flow_attr *attr,
1112                   const struct rte_flow_item item[],
1113                   const struct rte_flow_action action[],
1114                   struct rte_flow_error *e)
1115 {
1116         struct adapter *adap = ethdev2adap(dev);
1117         struct rte_flow *flow;
1118         int ret;
1119
1120         flow = t4_os_alloc(sizeof(struct rte_flow));
1121         if (!flow) {
1122                 rte_flow_error_set(e, ENOMEM, RTE_FLOW_ERROR_TYPE_HANDLE,
1123                                    NULL, "Unable to allocate memory for"
1124                                    " filter_entry");
1125                 return NULL;
1126         }
1127
1128         flow->item_parser = parseitem;
1129         flow->dev = dev;
1130         flow->fs.private = (void *)flow;
1131
1132         if (cxgbe_flow_parse(flow, attr, item, action, e)) {
1133                 t4_os_free(flow);
1134                 return NULL;
1135         }
1136
1137         t4_os_lock(&adap->flow_lock);
1138         /* go, interact with cxgbe_filter */
1139         ret = __cxgbe_flow_create(dev, flow);
1140         t4_os_unlock(&adap->flow_lock);
1141         if (ret) {
1142                 rte_flow_error_set(e, ret, RTE_FLOW_ERROR_TYPE_HANDLE,
1143                                    NULL, "Unable to create flow rule");
1144                 t4_os_free(flow);
1145                 return NULL;
1146         }
1147
1148         flow->f->private = flow; /* Will be used during flush */
1149
1150         return flow;
1151 }
1152
1153 static int __cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
1154 {
1155         struct adapter *adap = ethdev2adap(dev);
1156         struct filter_entry *f = flow->f;
1157         struct ch_filter_specification *fs;
1158         struct filter_ctx ctx;
1159         int err;
1160
1161         fs = &f->fs;
1162         if (cxgbe_verify_fidx(flow, flow->fidx, 1))
1163                 return -1;
1164
1165         t4_init_completion(&ctx.completion);
1166         err = cxgbe_del_filter(dev, flow->fidx, fs, &ctx);
1167         if (err) {
1168                 dev_err(adap, "Error %d while deleting filter.\n", err);
1169                 return err;
1170         }
1171
1172         /* Poll the FW for reply */
1173         err = cxgbe_poll_for_completion(&adap->sge.fw_evtq,
1174                                         CXGBE_FLOW_POLL_MS,
1175                                         CXGBE_FLOW_POLL_CNT,
1176                                         &ctx.completion);
1177         if (err) {
1178                 dev_err(adap, "Filter delete operation timed out (%d)\n", err);
1179                 return err;
1180         }
1181         if (ctx.result) {
1182                 dev_err(adap, "Hardware error %d while deleting the filter.\n",
1183                         ctx.result);
1184                 return ctx.result;
1185         }
1186
1187         fs = &flow->fs;
1188         if (fs->mask.macidx) {
1189                 struct port_info *pi = (struct port_info *)
1190                                         (dev->data->dev_private);
1191                 int ret;
1192
1193                 ret = cxgbe_mpstcam_remove(pi, fs->val.macidx);
1194                 if (!ret)
1195                         return ret;
1196         }
1197
1198         return 0;
1199 }
1200
1201 static int
1202 cxgbe_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,
1203                    struct rte_flow_error *e)
1204 {
1205         struct adapter *adap = ethdev2adap(dev);
1206         int ret;
1207
1208         t4_os_lock(&adap->flow_lock);
1209         ret = __cxgbe_flow_destroy(dev, flow);
1210         t4_os_unlock(&adap->flow_lock);
1211         if (ret)
1212                 return rte_flow_error_set(e, ret, RTE_FLOW_ERROR_TYPE_HANDLE,
1213                                           flow, "error destroying filter.");
1214         t4_os_free(flow);
1215         return 0;
1216 }
1217
1218 static int __cxgbe_flow_query(struct rte_flow *flow, u64 *count,
1219                               u64 *byte_count)
1220 {
1221         struct adapter *adap = ethdev2adap(flow->dev);
1222         struct ch_filter_specification fs = flow->f->fs;
1223         unsigned int fidx = flow->fidx;
1224         int ret = 0;
1225
1226         ret = cxgbe_get_filter_count(adap, fidx, count, fs.cap, 0);
1227         if (ret)
1228                 return ret;
1229         return cxgbe_get_filter_count(adap, fidx, byte_count, fs.cap, 1);
1230 }
1231
1232 static int
1233 cxgbe_flow_query(struct rte_eth_dev *dev, struct rte_flow *flow,
1234                  const struct rte_flow_action *action, void *data,
1235                  struct rte_flow_error *e)
1236 {
1237         struct adapter *adap = ethdev2adap(flow->dev);
1238         struct ch_filter_specification fs;
1239         struct rte_flow_query_count *c;
1240         struct filter_entry *f;
1241         int ret;
1242
1243         RTE_SET_USED(dev);
1244
1245         f = flow->f;
1246         fs = f->fs;
1247
1248         if (action->type != RTE_FLOW_ACTION_TYPE_COUNT)
1249                 return rte_flow_error_set(e, ENOTSUP,
1250                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1251                                           "only count supported for query");
1252
1253         /*
1254          * This is a valid operation, Since we are allowed to do chelsio
1255          * specific operations in rte side of our code but not vise-versa
1256          *
1257          * So, fs can be queried/modified here BUT rte_flow_query_count
1258          * cannot be worked on by the lower layer since we want to maintain
1259          * it as rte_flow agnostic.
1260          */
1261         if (!fs.hitcnts)
1262                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
1263                                           &fs, "filter hit counters were not"
1264                                           " enabled during filter creation");
1265
1266         c = (struct rte_flow_query_count *)data;
1267
1268         t4_os_lock(&adap->flow_lock);
1269         ret = __cxgbe_flow_query(flow, &c->hits, &c->bytes);
1270         if (ret) {
1271                 rte_flow_error_set(e, -ret, RTE_FLOW_ERROR_TYPE_ACTION,
1272                                    f, "cxgbe pmd failed to perform query");
1273                 goto out;
1274         }
1275
1276         /* Query was successful */
1277         c->bytes_set = 1;
1278         c->hits_set = 1;
1279         if (c->reset)
1280                 cxgbe_clear_filter_count(adap, flow->fidx, f->fs.cap, true);
1281
1282 out:
1283         t4_os_unlock(&adap->flow_lock);
1284         return ret;
1285 }
1286
1287 static int
1288 cxgbe_flow_validate(struct rte_eth_dev *dev,
1289                     const struct rte_flow_attr *attr,
1290                     const struct rte_flow_item item[],
1291                     const struct rte_flow_action action[],
1292                     struct rte_flow_error *e)
1293 {
1294         struct adapter *adap = ethdev2adap(dev);
1295         struct rte_flow *flow;
1296         unsigned int fidx;
1297         int ret = 0;
1298
1299         flow = t4_os_alloc(sizeof(struct rte_flow));
1300         if (!flow)
1301                 return rte_flow_error_set(e, ENOMEM, RTE_FLOW_ERROR_TYPE_HANDLE,
1302                                 NULL,
1303                                 "Unable to allocate memory for filter_entry");
1304
1305         flow->item_parser = parseitem;
1306         flow->dev = dev;
1307
1308         ret = cxgbe_flow_parse(flow, attr, item, action, e);
1309         if (ret) {
1310                 t4_os_free(flow);
1311                 return ret;
1312         }
1313
1314         if (cxgbe_validate_filter(adap, &flow->fs)) {
1315                 t4_os_free(flow);
1316                 return rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,
1317                                 NULL,
1318                                 "validation failed. Check f/w config file.");
1319         }
1320
1321         t4_os_lock(&adap->flow_lock);
1322         if (cxgbe_get_fidx(flow, &fidx)) {
1323                 ret = rte_flow_error_set(e, ENOMEM, RTE_FLOW_ERROR_TYPE_HANDLE,
1324                                          NULL, "no memory in tcam.");
1325                 goto out;
1326         }
1327
1328         if (cxgbe_verify_fidx(flow, fidx, 0)) {
1329                 ret = rte_flow_error_set(e, EINVAL, RTE_FLOW_ERROR_TYPE_HANDLE,
1330                                          NULL, "validation failed");
1331                 goto out;
1332         }
1333
1334 out:
1335         t4_os_unlock(&adap->flow_lock);
1336         t4_os_free(flow);
1337         return ret;
1338 }
1339
1340 /*
1341  * @ret : > 0 filter destroyed succsesfully
1342  *        < 0 error destroying filter
1343  *        == 1 filter not active / not found
1344  */
1345 static int
1346 cxgbe_check_n_destroy(struct filter_entry *f, struct rte_eth_dev *dev)
1347 {
1348         if (f && (f->valid || f->pending) &&
1349             f->dev == dev && /* Only if user has asked for this port */
1350              f->private) /* We (rte_flow) created this filter */
1351                 return __cxgbe_flow_destroy(dev, (struct rte_flow *)f->private);
1352         return 1;
1353 }
1354
1355 static int cxgbe_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *e)
1356 {
1357         struct adapter *adap = ethdev2adap(dev);
1358         unsigned int i;
1359         int ret = 0;
1360
1361         t4_os_lock(&adap->flow_lock);
1362         if (adap->tids.ftid_tab) {
1363                 struct filter_entry *f = &adap->tids.ftid_tab[0];
1364
1365                 for (i = 0; i < adap->tids.nftids; i++, f++) {
1366                         ret = cxgbe_check_n_destroy(f, dev);
1367                         if (ret < 0) {
1368                                 rte_flow_error_set(e, ret,
1369                                                    RTE_FLOW_ERROR_TYPE_HANDLE,
1370                                                    f->private,
1371                                                    "error destroying TCAM "
1372                                                    "filter.");
1373                                 goto out;
1374                         }
1375                 }
1376         }
1377
1378         if (is_hashfilter(adap) && adap->tids.tid_tab) {
1379                 struct filter_entry *f;
1380
1381                 for (i = adap->tids.hash_base; i <= adap->tids.ntids; i++) {
1382                         f = (struct filter_entry *)adap->tids.tid_tab[i];
1383
1384                         ret = cxgbe_check_n_destroy(f, dev);
1385                         if (ret < 0) {
1386                                 rte_flow_error_set(e, ret,
1387                                                    RTE_FLOW_ERROR_TYPE_HANDLE,
1388                                                    f->private,
1389                                                    "error destroying HASH "
1390                                                    "filter.");
1391                                 goto out;
1392                         }
1393                 }
1394         }
1395
1396 out:
1397         t4_os_unlock(&adap->flow_lock);
1398         return ret >= 0 ? 0 : ret;
1399 }
1400
1401 static const struct rte_flow_ops cxgbe_flow_ops = {
1402         .validate       = cxgbe_flow_validate,
1403         .create         = cxgbe_flow_create,
1404         .destroy        = cxgbe_flow_destroy,
1405         .flush          = cxgbe_flow_flush,
1406         .query          = cxgbe_flow_query,
1407         .isolate        = NULL,
1408 };
1409
1410 int
1411 cxgbe_dev_filter_ctrl(struct rte_eth_dev *dev,
1412                       enum rte_filter_type filter_type,
1413                       enum rte_filter_op filter_op,
1414                       void *arg)
1415 {
1416         int ret = 0;
1417
1418         RTE_SET_USED(dev);
1419         switch (filter_type) {
1420         case RTE_ETH_FILTER_GENERIC:
1421                 if (filter_op != RTE_ETH_FILTER_GET)
1422                         return -EINVAL;
1423                 *(const void **)arg = &cxgbe_flow_ops;
1424                 break;
1425         default:
1426                 ret = -ENOTSUP;
1427                 break;
1428         }
1429         return ret;
1430 }