net: add rte prefix to ether defines
[dpdk.git] / drivers / net / cxgbe / l2t.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018 Chelsio Communications.
3  * All rights reserved.
4  */
5
6 #include "base/common.h"
7 #include "l2t.h"
8
9 /**
10  * cxgbe_l2t_release - Release associated L2T entry
11  * @e: L2T entry to release
12  *
13  * Releases ref count and frees up an L2T entry from L2T table
14  */
15 void cxgbe_l2t_release(struct l2t_entry *e)
16 {
17         if (rte_atomic32_read(&e->refcnt) != 0)
18                 rte_atomic32_dec(&e->refcnt);
19 }
20
21 /**
22  * Process a CPL_L2T_WRITE_RPL. Note that the TID in the reply is really
23  * the L2T index it refers to.
24  */
25 void do_l2t_write_rpl(struct adapter *adap, const struct cpl_l2t_write_rpl *rpl)
26 {
27         struct l2t_data *d = adap->l2t;
28         unsigned int tid = GET_TID(rpl);
29         unsigned int l2t_idx = tid % L2T_SIZE;
30
31         if (unlikely(rpl->status != CPL_ERR_NONE)) {
32                 dev_err(adap,
33                         "Unexpected L2T_WRITE_RPL status %u for entry %u\n",
34                         rpl->status, l2t_idx);
35                 return;
36         }
37
38         if (tid & F_SYNC_WR) {
39                 struct l2t_entry *e = &d->l2tab[l2t_idx - d->l2t_start];
40
41                 t4_os_lock(&e->lock);
42                 if (e->state != L2T_STATE_SWITCHING)
43                         e->state = L2T_STATE_VALID;
44                 t4_os_unlock(&e->lock);
45         }
46 }
47
48 /**
49  * Write an L2T entry.  Must be called with the entry locked.
50  * The write may be synchronous or asynchronous.
51  */
52 static int write_l2e(struct rte_eth_dev *dev, struct l2t_entry *e, int sync,
53                      bool loopback, bool arpmiss)
54 {
55         struct adapter *adap = ethdev2adap(dev);
56         struct l2t_data *d = adap->l2t;
57         struct rte_mbuf *mbuf;
58         struct cpl_l2t_write_req *req;
59         struct sge_ctrl_txq *ctrlq;
60         unsigned int l2t_idx = e->idx + d->l2t_start;
61         unsigned int port_id = ethdev2pinfo(dev)->port_id;
62
63         ctrlq = &adap->sge.ctrlq[port_id];
64         mbuf = rte_pktmbuf_alloc(ctrlq->mb_pool);
65         if (!mbuf)
66                 return -ENOMEM;
67
68         mbuf->data_len = sizeof(*req);
69         mbuf->pkt_len = mbuf->data_len;
70
71         req = rte_pktmbuf_mtod(mbuf, struct cpl_l2t_write_req *);
72         INIT_TP_WR(req, 0);
73
74         OPCODE_TID(req) =
75                 cpu_to_be32(MK_OPCODE_TID(CPL_L2T_WRITE_REQ,
76                                           l2t_idx | V_SYNC_WR(sync) |
77                                           V_TID_QID(adap->sge.fw_evtq.abs_id)));
78         req->params = cpu_to_be16(V_L2T_W_PORT(e->lport) |
79                                   V_L2T_W_LPBK(loopback) |
80                                   V_L2T_W_ARPMISS(arpmiss) |
81                                   V_L2T_W_NOREPLY(!sync));
82         req->l2t_idx = cpu_to_be16(l2t_idx);
83         req->vlan = cpu_to_be16(e->vlan);
84         rte_memcpy(req->dst_mac, e->dmac, RTE_ETHER_ADDR_LEN);
85
86         if (loopback)
87                 memset(req->dst_mac, 0, RTE_ETHER_ADDR_LEN);
88
89         t4_mgmt_tx(ctrlq, mbuf);
90
91         if (sync && e->state != L2T_STATE_SWITCHING)
92                 e->state = L2T_STATE_SYNC_WRITE;
93
94         return 0;
95 }
96
97 /**
98  * find_or_alloc_l2e - Find/Allocate a free L2T entry
99  * @d: L2T table
100  * @vlan: VLAN id to compare/add
101  * @port: port id to compare/add
102  * @dmac: Destination MAC address to compare/add
103  * Returns pointer to the L2T entry found/created
104  *
105  * Finds/Allocates an L2T entry to be used by switching rule of a filter.
106  */
107 static struct l2t_entry *find_or_alloc_l2e(struct l2t_data *d, u16 vlan,
108                                            u8 port, u8 *dmac)
109 {
110         struct l2t_entry *end, *e;
111         struct l2t_entry *first_free = NULL;
112
113         for (e = &d->l2tab[0], end = &d->l2tab[d->l2t_size]; e != end; ++e) {
114                 if (rte_atomic32_read(&e->refcnt) == 0) {
115                         if (!first_free)
116                                 first_free = e;
117                 } else {
118                         if (e->state == L2T_STATE_SWITCHING) {
119                                 if ((!memcmp(e->dmac, dmac, RTE_ETHER_ADDR_LEN)) &&
120                                     e->vlan == vlan && e->lport == port)
121                                         goto exists;
122                         }
123                 }
124         }
125
126         if (first_free) {
127                 e = first_free;
128                 goto found;
129         }
130
131         return NULL;
132
133 found:
134         e->state = L2T_STATE_UNUSED;
135
136 exists:
137         return e;
138 }
139
140 static struct l2t_entry *t4_l2t_alloc_switching(struct rte_eth_dev *dev,
141                                                 u16 vlan, u8 port,
142                                                 u8 *eth_addr)
143 {
144         struct adapter *adap = ethdev2adap(dev);
145         struct l2t_data *d = adap->l2t;
146         struct l2t_entry *e;
147         int ret = 0;
148
149         t4_os_write_lock(&d->lock);
150         e = find_or_alloc_l2e(d, vlan, port, eth_addr);
151         if (e) {
152                 t4_os_lock(&e->lock);
153                 if (!rte_atomic32_read(&e->refcnt)) {
154                         e->state = L2T_STATE_SWITCHING;
155                         e->vlan = vlan;
156                         e->lport = port;
157                         rte_memcpy(e->dmac, eth_addr, RTE_ETHER_ADDR_LEN);
158                         rte_atomic32_set(&e->refcnt, 1);
159                         ret = write_l2e(dev, e, 0, !L2T_LPBK, !L2T_ARPMISS);
160                         if (ret < 0)
161                                 dev_debug(adap, "Failed to write L2T entry: %d",
162                                           ret);
163                 } else {
164                         rte_atomic32_inc(&e->refcnt);
165                 }
166                 t4_os_unlock(&e->lock);
167         }
168         t4_os_write_unlock(&d->lock);
169
170         return ret ? NULL : e;
171 }
172
173 /**
174  * cxgbe_l2t_alloc_switching - Allocate a L2T entry for switching rule
175  * @dev: rte_eth_dev pointer
176  * @vlan: VLAN Id
177  * @port: Associated port
178  * @dmac: Destination MAC address to add to L2T
179  * Returns pointer to the allocated l2t entry
180  *
181  * Allocates a L2T entry for use by switching rule of a filter
182  */
183 struct l2t_entry *cxgbe_l2t_alloc_switching(struct rte_eth_dev *dev, u16 vlan,
184                                             u8 port, u8 *dmac)
185 {
186         return t4_l2t_alloc_switching(dev, vlan, port, dmac);
187 }
188
189 /**
190  * Initialize L2 Table
191  */
192 struct l2t_data *t4_init_l2t(unsigned int l2t_start, unsigned int l2t_end)
193 {
194         unsigned int l2t_size;
195         unsigned int i;
196         struct l2t_data *d;
197
198         if (l2t_start >= l2t_end || l2t_end >= L2T_SIZE)
199                 return NULL;
200         l2t_size = l2t_end - l2t_start + 1;
201
202         d = t4_os_alloc(sizeof(*d) + l2t_size * sizeof(struct l2t_entry));
203         if (!d)
204                 return NULL;
205
206         d->l2t_start = l2t_start;
207         d->l2t_size = l2t_size;
208
209         t4_os_rwlock_init(&d->lock);
210
211         for (i = 0; i < d->l2t_size; ++i) {
212                 d->l2tab[i].idx = i;
213                 d->l2tab[i].state = L2T_STATE_UNUSED;
214                 t4_os_lock_init(&d->l2tab[i].lock);
215                 rte_atomic32_set(&d->l2tab[i].refcnt, 0);
216         }
217
218         return d;
219 }
220
221 /**
222  * Cleanup L2 Table
223  */
224 void t4_cleanup_l2t(struct adapter *adap)
225 {
226         if (adap->l2t)
227                 t4_os_free(adap->l2t);
228 }