drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev_driver.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Keep track of whether QMAN and BMAN have been globally initialized */
  49 static int is_global_init;
  50 /* At present we only allow up to 4 push mode queues - as each of this queue
  51  * need dedicated portal and we are short of portals.
  52  */
  53 #define DPAA_MAX_PUSH_MODE_QUEUE       4
  54
  55 static int dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
  56 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  57
  58
  59 /* Per FQ Taildrop in frame count */
  60 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  61
  62 struct rte_dpaa_xstats_name_off {
  63         char name[RTE_ETH_XSTATS_NAME_SIZE];
  64         uint32_t offset;
  65 };
  66
  67 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  68         {"rx_align_err",
  69                 offsetof(struct dpaa_if_stats, raln)},
  70         {"rx_valid_pause",
  71                 offsetof(struct dpaa_if_stats, rxpf)},
  72         {"rx_fcs_err",
  73                 offsetof(struct dpaa_if_stats, rfcs)},
  74         {"rx_vlan_frame",
  75                 offsetof(struct dpaa_if_stats, rvlan)},
  76         {"rx_frame_err",
  77                 offsetof(struct dpaa_if_stats, rerr)},
  78         {"rx_drop_err",
  79                 offsetof(struct dpaa_if_stats, rdrp)},
  80         {"rx_undersized",
  81                 offsetof(struct dpaa_if_stats, rund)},
  82         {"rx_oversize_err",
  83                 offsetof(struct dpaa_if_stats, rovr)},
  84         {"rx_fragment_pkt",
  85                 offsetof(struct dpaa_if_stats, rfrg)},
  86         {"tx_valid_pause",
  87                 offsetof(struct dpaa_if_stats, txpf)},
  88         {"tx_fcs_err",
  89                 offsetof(struct dpaa_if_stats, terr)},
  90         {"tx_vlan_frame",
  91                 offsetof(struct dpaa_if_stats, tvlan)},
  92         {"rx_undersized",
  93                 offsetof(struct dpaa_if_stats, tund)},
  94 };
  95
  96 static struct rte_dpaa_driver rte_dpaa_pmd;
  97
  98 static inline void
  99 dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
 100 {
 101         memset(opts, 0, sizeof(struct qm_mcc_initfq));
 102         opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 103         opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 104                            QM_FQCTRL_PREFERINCACHE;
 105         opts->fqd.context_a.stashing.exclusive = 0;
 106         if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 107                 opts->fqd.context_a.stashing.annotation_cl =
 108                                                 DPAA_IF_RX_ANNOTATION_STASH;
 109         opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 110         opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 111 }
 112
 113 static int
 114 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 115 {
 116         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 117         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 118                                 + VLAN_TAG_SIZE;
 119
 120         PMD_INIT_FUNC_TRACE();
 121
 122         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 123                 return -EINVAL;
 124         if (frame_size > ETHER_MAX_LEN)
 125                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 126         else
 127                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 128
 129         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 130
 131         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 132
 133         return 0;
 134 }
 135
 136 static int
 137 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused)
 138 {
 139         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 140
 141         PMD_INIT_FUNC_TRACE();
 142
 143         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
 144                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 145                     DPAA_MAX_RX_PKT_LEN) {
 146                         fman_if_set_maxfrm(dpaa_intf->fif,
 147                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 148                         return 0;
 149                 } else {
 150                         return -1;
 151                 }
 152         }
 153         return 0;
 154 }
 155
 156 static const uint32_t *
 157 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 158 {
 159         static const uint32_t ptypes[] = {
 160                 /*todo -= add more types */
 161                 RTE_PTYPE_L2_ETHER,
 162                 RTE_PTYPE_L3_IPV4,
 163                 RTE_PTYPE_L3_IPV4_EXT,
 164                 RTE_PTYPE_L3_IPV6,
 165                 RTE_PTYPE_L3_IPV6_EXT,
 166                 RTE_PTYPE_L4_TCP,
 167                 RTE_PTYPE_L4_UDP,
 168                 RTE_PTYPE_L4_SCTP
 169         };
 170
 171         PMD_INIT_FUNC_TRACE();
 172
 173         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 174                 return ptypes;
 175         return NULL;
 176 }
 177
 178 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 179 {
 180         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 181
 182         PMD_INIT_FUNC_TRACE();
 183
 184         /* Change tx callback to the real one */
 185         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 186         fman_if_enable_rx(dpaa_intf->fif);
 187
 188         return 0;
 189 }
 190
 191 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 192 {
 193         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 194
 195         PMD_INIT_FUNC_TRACE();
 196
 197         fman_if_disable_rx(dpaa_intf->fif);
 198         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 199 }
 200
 201 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 202 {
 203         PMD_INIT_FUNC_TRACE();
 204
 205         dpaa_eth_dev_stop(dev);
 206 }
 207
 208 static int
 209 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 210                      char *fw_version,
 211                      size_t fw_size)
 212 {
 213         int ret;
 214         FILE *svr_file = NULL;
 215         unsigned int svr_ver = 0;
 216
 217         PMD_INIT_FUNC_TRACE();
 218
 219         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 220         if (!svr_file) {
 221                 DPAA_PMD_ERR("Unable to open SoC device");
 222                 return -ENOTSUP; /* Not supported on this infra */
 223         }
 224         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 225                 dpaa_svr_family = svr_ver & SVR_MASK;
 226         else
 227                 DPAA_PMD_ERR("Unable to read SoC device");
 228
 229         fclose(svr_file);
 230
 231         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 232                        svr_ver, fman_ip_rev);
 233         ret += 1; /* add the size of '\0' */
 234
 235         if (fw_size < (uint32_t)ret)
 236                 return ret;
 237         else
 238                 return 0;
 239 }
 240
 241 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 242                               struct rte_eth_dev_info *dev_info)
 243 {
 244         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 245
 246         PMD_INIT_FUNC_TRACE();
 247
 248         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 249         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 250         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 251         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 252         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 253         dev_info->max_hash_mac_addrs = 0;
 254         dev_info->max_vfs = 0;
 255         dev_info->max_vmdq_pools = ETH_16_POOLS;
 256         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 257         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 258                                 ETH_LINK_SPEED_10G);
 259         dev_info->rx_offload_capa =
 260                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 261                 DEV_RX_OFFLOAD_UDP_CKSUM   |
 262                 DEV_RX_OFFLOAD_TCP_CKSUM);
 263         dev_info->tx_offload_capa =
 264                 (DEV_TX_OFFLOAD_IPV4_CKSUM  |
 265                 DEV_TX_OFFLOAD_UDP_CKSUM   |
 266                 DEV_TX_OFFLOAD_TCP_CKSUM);
 267 }
 268
 269 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 270                                 int wait_to_complete __rte_unused)
 271 {
 272         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 273         struct rte_eth_link *link = &dev->data->dev_link;
 274
 275         PMD_INIT_FUNC_TRACE();
 276
 277         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 278                 link->link_speed = 1000;
 279         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 280                 link->link_speed = 10000;
 281         else
 282                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 283                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 284
 285         link->link_status = dpaa_intf->valid;
 286         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 287         link->link_autoneg = ETH_LINK_AUTONEG;
 288         return 0;
 289 }
 290
 291 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 292                                struct rte_eth_stats *stats)
 293 {
 294         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 295
 296         PMD_INIT_FUNC_TRACE();
 297
 298         fman_if_stats_get(dpaa_intf->fif, stats);
 299         return 0;
 300 }
 301
 302 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 303 {
 304         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 305
 306         PMD_INIT_FUNC_TRACE();
 307
 308         fman_if_stats_reset(dpaa_intf->fif);
 309 }
 310
 311 static int
 312 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 313                     unsigned int n)
 314 {
 315         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 316         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 317         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 318
 319         if (xstats == NULL)
 320                 return 0;
 321
 322         if (n < num)
 323                 return num;
 324
 325         fman_if_stats_get_all(dpaa_intf->fif, values,
 326                               sizeof(struct dpaa_if_stats) / 8);
 327
 328         for (i = 0; i < num; i++) {
 329                 xstats[i].id = i;
 330                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 331         }
 332         return i;
 333 }
 334
 335 static int
 336 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 337                       struct rte_eth_xstat_name *xstats_names,
 338                       __rte_unused unsigned int limit)
 339 {
 340         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 341
 342         if (xstats_names != NULL)
 343                 for (i = 0; i < stat_cnt; i++)
 344                         snprintf(xstats_names[i].name,
 345                                  sizeof(xstats_names[i].name),
 346                                  "%s",
 347                                  dpaa_xstats_strings[i].name);
 348
 349         return stat_cnt;
 350 }
 351
 352 static int
 353 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 354                       uint64_t *values, unsigned int n)
 355 {
 356         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 357         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 358
 359         if (!ids) {
 360                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 361
 362                 if (n < stat_cnt)
 363                         return stat_cnt;
 364
 365                 if (!values)
 366                         return 0;
 367
 368                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 369                                       sizeof(struct dpaa_if_stats));
 370
 371                 for (i = 0; i < stat_cnt; i++)
 372                         values[i] =
 373                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 374
 375                 return stat_cnt;
 376         }
 377
 378         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 379
 380         for (i = 0; i < n; i++) {
 381                 if (ids[i] >= stat_cnt) {
 382                         DPAA_PMD_ERR("id value isn't valid");
 383                         return -1;
 384                 }
 385                 values[i] = values_copy[ids[i]];
 386         }
 387         return n;
 388 }
 389
 390 static int
 391 dpaa_xstats_get_names_by_id(
 392         struct rte_eth_dev *dev,
 393         struct rte_eth_xstat_name *xstats_names,
 394         const uint64_t *ids,
 395         unsigned int limit)
 396 {
 397         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 398         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 399
 400         if (!ids)
 401                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 402
 403         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 404
 405         for (i = 0; i < limit; i++) {
 406                 if (ids[i] >= stat_cnt) {
 407                         DPAA_PMD_ERR("id value isn't valid");
 408                         return -1;
 409                 }
 410                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 411         }
 412         return limit;
 413 }
 414
 415 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 416 {
 417         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 418
 419         PMD_INIT_FUNC_TRACE();
 420
 421         fman_if_promiscuous_enable(dpaa_intf->fif);
 422 }
 423
 424 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 425 {
 426         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 427
 428         PMD_INIT_FUNC_TRACE();
 429
 430         fman_if_promiscuous_disable(dpaa_intf->fif);
 431 }
 432
 433 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 434 {
 435         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 436
 437         PMD_INIT_FUNC_TRACE();
 438
 439         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 440 }
 441
 442 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 443 {
 444         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 445
 446         PMD_INIT_FUNC_TRACE();
 447
 448         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 449 }
 450
 451 static
 452 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 453                             uint16_t nb_desc,
 454                             unsigned int socket_id __rte_unused,
 455                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 456                             struct rte_mempool *mp)
 457 {
 458         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 459         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 460         struct qm_mcc_initfq opts = {0};
 461         u32 flags = 0;
 462         int ret;
 463
 464         PMD_INIT_FUNC_TRACE();
 465
 466         DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx);
 467
 468         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 469                 struct fman_if_ic_params icp;
 470                 uint32_t fd_offset;
 471                 uint32_t bp_size;
 472
 473                 if (!mp->pool_data) {
 474                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 475                         return -1;
 476                 }
 477                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 478
 479                 memset(&icp, 0, sizeof(icp));
 480                 /* set ICEOF for to the default value , which is 0*/
 481                 icp.iciof = DEFAULT_ICIOF;
 482                 icp.iceof = DEFAULT_RX_ICEOF;
 483                 icp.icsz = DEFAULT_ICSZ;
 484                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 485
 486                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 487                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 488
 489                 /* Buffer pool size should be equal to Dataroom Size*/
 490                 bp_size = rte_pktmbuf_data_room_size(mp);
 491                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 492                                dpaa_intf->bp_info->bpid, bp_size);
 493                 dpaa_intf->valid = 1;
 494                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 495                             dpaa_intf->name, fd_offset,
 496                         fman_if_get_fdoff(dpaa_intf->fif));
 497         }
 498         /* checking if push mode only, no error check for now */
 499         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 500                 dpaa_push_queue_idx++;
 501                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 502                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 503                                    QM_FQCTRL_CTXASTASHING |
 504                                    QM_FQCTRL_PREFERINCACHE;
 505                 opts.fqd.context_a.stashing.exclusive = 0;
 506                 opts.fqd.context_a.stashing.annotation_cl =
 507                                                 DPAA_IF_RX_ANNOTATION_STASH;
 508                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 509                 opts.fqd.context_a.stashing.context_cl =
 510                                                 DPAA_IF_RX_CONTEXT_STASH;
 511
 512                 /*Create a channel and associate given queue with the channel*/
 513                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 514                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 515                 opts.fqd.dest.channel = rxq->ch_id;
 516                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 517                 flags = QMAN_INITFQ_FLAG_SCHED;
 518
 519                 /* Configure tail drop */
 520                 if (dpaa_intf->cgr_rx) {
 521                         opts.we_mask |= QM_INITFQ_WE_CGID;
 522                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 523                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 524                 }
 525                 ret = qman_init_fq(rxq, flags, &opts);
 526                 if (ret)
 527                         DPAA_PMD_ERR("Channel/Queue association failed. fqid %d"
 528                                      " ret: %d", rxq->fqid, ret);
 529                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb;
 530                 rxq->is_static = true;
 531         }
 532         dev->data->rx_queues[queue_idx] = rxq;
 533
 534         /* configure the CGR size as per the desc size */
 535         if (dpaa_intf->cgr_rx) {
 536                 struct qm_mcc_initcgr cgr_opts = {0};
 537
 538                 /* Enable tail drop with cgr on this queue */
 539                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 540                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 541                 if (ret) {
 542                         DPAA_PMD_WARN(
 543                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 544                                 rxq->fqid, ret);
 545                 }
 546         }
 547
 548         return 0;
 549 }
 550
 551 int __rte_experimental
 552 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
 553                 int eth_rx_queue_id,
 554                 u16 ch_id,
 555                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 556 {
 557         int ret;
 558         u32 flags = 0;
 559         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 560         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 561         struct qm_mcc_initfq opts = {0};
 562
 563         if (dpaa_push_mode_max_queue)
 564                 DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.\n"
 565                               "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n",
 566                               dpaa_push_mode_max_queue);
 567
 568         dpaa_poll_queue_default_config(&opts);
 569
 570         switch (queue_conf->ev.sched_type) {
 571         case RTE_SCHED_TYPE_ATOMIC:
 572                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
 573                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
 574                  * configuration with HOLD_ACTIVE setting
 575                  */
 576                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
 577                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
 578                 break;
 579         case RTE_SCHED_TYPE_ORDERED:
 580                 DPAA_PMD_ERR("Ordered queue schedule type is not supported\n");
 581                 return -1;
 582         default:
 583                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
 584                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
 585                 break;
 586         }
 587
 588         opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 589         opts.fqd.dest.channel = ch_id;
 590         opts.fqd.dest.wq = queue_conf->ev.priority;
 591
 592         if (dpaa_intf->cgr_rx) {
 593                 opts.we_mask |= QM_INITFQ_WE_CGID;
 594                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 595                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 596         }
 597
 598         flags = QMAN_INITFQ_FLAG_SCHED;
 599
 600         ret = qman_init_fq(rxq, flags, &opts);
 601         if (ret) {
 602                 DPAA_PMD_ERR("Channel/Queue association failed. fqid %d ret:%d",
 603                              rxq->fqid, ret);
 604                 return ret;
 605         }
 606
 607         /* copy configuration which needs to be filled during dequeue */
 608         memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
 609         dev->data->rx_queues[eth_rx_queue_id] = rxq;
 610
 611         return ret;
 612 }
 613
 614 int __rte_experimental
 615 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 616                 int eth_rx_queue_id)
 617 {
 618         struct qm_mcc_initfq opts;
 619         int ret;
 620         u32 flags = 0;
 621         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 622         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 623
 624         dpaa_poll_queue_default_config(&opts);
 625
 626         if (dpaa_intf->cgr_rx) {
 627                 opts.we_mask |= QM_INITFQ_WE_CGID;
 628                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 629                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 630         }
 631
 632         ret = qman_init_fq(rxq, flags, &opts);
 633         if (ret) {
 634                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
 635                              rxq->fqid, ret);
 636         }
 637
 638         rxq->cb.dqrr_dpdk_cb = NULL;
 639         dev->data->rx_queues[eth_rx_queue_id] = NULL;
 640
 641         return 0;
 642 }
 643
 644 static
 645 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 646 {
 647         PMD_INIT_FUNC_TRACE();
 648 }
 649
 650 static
 651 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 652                             uint16_t nb_desc __rte_unused,
 653                 unsigned int socket_id __rte_unused,
 654                 const struct rte_eth_txconf *tx_conf __rte_unused)
 655 {
 656         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 657
 658         PMD_INIT_FUNC_TRACE();
 659
 660         DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx);
 661         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 662         return 0;
 663 }
 664
 665 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 666 {
 667         PMD_INIT_FUNC_TRACE();
 668 }
 669
 670 static uint32_t
 671 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 672 {
 673         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 674         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 675         u32 frm_cnt = 0;
 676
 677         PMD_INIT_FUNC_TRACE();
 678
 679         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 680                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 681                         rx_queue_id, frm_cnt);
 682         }
 683         return frm_cnt;
 684 }
 685
 686 static int dpaa_link_down(struct rte_eth_dev *dev)
 687 {
 688         PMD_INIT_FUNC_TRACE();
 689
 690         dpaa_eth_dev_stop(dev);
 691         return 0;
 692 }
 693
 694 static int dpaa_link_up(struct rte_eth_dev *dev)
 695 {
 696         PMD_INIT_FUNC_TRACE();
 697
 698         dpaa_eth_dev_start(dev);
 699         return 0;
 700 }
 701
 702 static int
 703 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 704                    struct rte_eth_fc_conf *fc_conf)
 705 {
 706         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 707         struct rte_eth_fc_conf *net_fc;
 708
 709         PMD_INIT_FUNC_TRACE();
 710
 711         if (!(dpaa_intf->fc_conf)) {
 712                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 713                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 714                 if (!dpaa_intf->fc_conf) {
 715                         DPAA_PMD_ERR("unable to save flow control info");
 716                         return -ENOMEM;
 717                 }
 718         }
 719         net_fc = dpaa_intf->fc_conf;
 720
 721         if (fc_conf->high_water < fc_conf->low_water) {
 722                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 723                 return -EINVAL;
 724         }
 725
 726         if (fc_conf->mode == RTE_FC_NONE) {
 727                 return 0;
 728         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 729                  fc_conf->mode == RTE_FC_FULL) {
 730                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 731                                          fc_conf->low_water,
 732                                 dpaa_intf->bp_info->bpid);
 733                 if (fc_conf->pause_time)
 734                         fman_if_set_fc_quanta(dpaa_intf->fif,
 735                                               fc_conf->pause_time);
 736         }
 737
 738         /* Save the information in dpaa device */
 739         net_fc->pause_time = fc_conf->pause_time;
 740         net_fc->high_water = fc_conf->high_water;
 741         net_fc->low_water = fc_conf->low_water;
 742         net_fc->send_xon = fc_conf->send_xon;
 743         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 744         net_fc->mode = fc_conf->mode;
 745         net_fc->autoneg = fc_conf->autoneg;
 746
 747         return 0;
 748 }
 749
 750 static int
 751 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 752                    struct rte_eth_fc_conf *fc_conf)
 753 {
 754         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 755         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 756         int ret;
 757
 758         PMD_INIT_FUNC_TRACE();
 759
 760         if (net_fc) {
 761                 fc_conf->pause_time = net_fc->pause_time;
 762                 fc_conf->high_water = net_fc->high_water;
 763                 fc_conf->low_water = net_fc->low_water;
 764                 fc_conf->send_xon = net_fc->send_xon;
 765                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 766                 fc_conf->mode = net_fc->mode;
 767                 fc_conf->autoneg = net_fc->autoneg;
 768                 return 0;
 769         }
 770         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 771         if (ret) {
 772                 fc_conf->mode = RTE_FC_TX_PAUSE;
 773                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 774         } else {
 775                 fc_conf->mode = RTE_FC_NONE;
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int
 782 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 783                              struct ether_addr *addr,
 784                              uint32_t index,
 785                              __rte_unused uint32_t pool)
 786 {
 787         int ret;
 788         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 789
 790         PMD_INIT_FUNC_TRACE();
 791
 792         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 793
 794         if (ret)
 795                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 796                         " err = %d", ret);
 797         return 0;
 798 }
 799
 800 static void
 801 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 802                           uint32_t index)
 803 {
 804         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 805
 806         PMD_INIT_FUNC_TRACE();
 807
 808         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 809 }
 810
 811 static void
 812 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 813                        struct ether_addr *addr)
 814 {
 815         int ret;
 816         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 817
 818         PMD_INIT_FUNC_TRACE();
 819
 820         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 821         if (ret)
 822                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 823 }
 824
 825 static struct eth_dev_ops dpaa_devops = {
 826         .dev_configure            = dpaa_eth_dev_configure,
 827         .dev_start                = dpaa_eth_dev_start,
 828         .dev_stop                 = dpaa_eth_dev_stop,
 829         .dev_close                = dpaa_eth_dev_close,
 830         .dev_infos_get            = dpaa_eth_dev_info,
 831         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 832
 833         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 834         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 835         .rx_queue_release         = dpaa_eth_rx_queue_release,
 836         .tx_queue_release         = dpaa_eth_tx_queue_release,
 837         .rx_queue_count           = dpaa_dev_rx_queue_count,
 838
 839         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 840         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 841
 842         .link_update              = dpaa_eth_link_update,
 843         .stats_get                = dpaa_eth_stats_get,
 844         .xstats_get               = dpaa_dev_xstats_get,
 845         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 846         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 847         .xstats_get_names         = dpaa_xstats_get_names,
 848         .xstats_reset             = dpaa_eth_stats_reset,
 849         .stats_reset              = dpaa_eth_stats_reset,
 850         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 851         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 852         .allmulticast_enable      = dpaa_eth_multicast_enable,
 853         .allmulticast_disable     = dpaa_eth_multicast_disable,
 854         .mtu_set                  = dpaa_mtu_set,
 855         .dev_set_link_down        = dpaa_link_down,
 856         .dev_set_link_up          = dpaa_link_up,
 857         .mac_addr_add             = dpaa_dev_add_mac_addr,
 858         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 859         .mac_addr_set             = dpaa_dev_set_mac_addr,
 860
 861         .fw_version_get           = dpaa_fw_version_get,
 862 };
 863
 864 static bool
 865 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
 866 {
 867         if (strcmp(dev->device->driver->name,
 868                    drv->driver.name))
 869                 return false;
 870
 871         return true;
 872 }
 873
 874 static bool
 875 is_dpaa_supported(struct rte_eth_dev *dev)
 876 {
 877         return is_device_supported(dev, &rte_dpaa_pmd);
 878 }
 879
 880 int __rte_experimental
 881 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
 882 {
 883         struct rte_eth_dev *dev;
 884         struct dpaa_if *dpaa_intf;
 885
 886         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 887
 888         dev = &rte_eth_devices[port];
 889
 890         if (!is_dpaa_supported(dev))
 891                 return -ENOTSUP;
 892
 893         dpaa_intf = dev->data->dev_private;
 894
 895         if (on)
 896                 fman_if_loopback_enable(dpaa_intf->fif);
 897         else
 898                 fman_if_loopback_disable(dpaa_intf->fif);
 899
 900         return 0;
 901 }
 902
 903 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 904 {
 905         struct rte_eth_fc_conf *fc_conf;
 906         int ret;
 907
 908         PMD_INIT_FUNC_TRACE();
 909
 910         if (!(dpaa_intf->fc_conf)) {
 911                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 912                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 913                 if (!dpaa_intf->fc_conf) {
 914                         DPAA_PMD_ERR("unable to save flow control info");
 915                         return -ENOMEM;
 916                 }
 917         }
 918         fc_conf = dpaa_intf->fc_conf;
 919         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 920         if (ret) {
 921                 fc_conf->mode = RTE_FC_TX_PAUSE;
 922                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 923         } else {
 924                 fc_conf->mode = RTE_FC_NONE;
 925         }
 926
 927         return 0;
 928 }
 929
 930 /* Initialise an Rx FQ */
 931 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 932                               uint32_t fqid)
 933 {
 934         struct qm_mcc_initfq opts = {0};
 935         int ret;
 936         u32 flags = 0;
 937         struct qm_mcc_initcgr cgr_opts = {
 938                 .we_mask = QM_CGR_WE_CS_THRES |
 939                                 QM_CGR_WE_CSTD_EN |
 940                                 QM_CGR_WE_MODE,
 941                 .cgr = {
 942                         .cstd_en = QM_CGR_EN,
 943                         .mode = QMAN_CGR_MODE_FRAME
 944                 }
 945         };
 946
 947         PMD_INIT_FUNC_TRACE();
 948
 949         ret = qman_reserve_fqid(fqid);
 950         if (ret) {
 951                 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d",
 952                              fqid, ret);
 953                 return -EINVAL;
 954         }
 955
 956         DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid);
 957         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 958         if (ret) {
 959                 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d",
 960                         fqid, ret);
 961                 return ret;
 962         }
 963         fq->is_static = false;
 964
 965         dpaa_poll_queue_default_config(&opts);
 966
 967         if (cgr_rx) {
 968                 /* Enable tail drop with cgr on this queue */
 969                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
 970                 cgr_rx->cb = NULL;
 971                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
 972                                       &cgr_opts);
 973                 if (ret) {
 974                         DPAA_PMD_WARN(
 975                                 "rx taildrop init fail on rx fqid %d (ret=%d)",
 976                                 fqid, ret);
 977                         goto without_cgr;
 978                 }
 979                 opts.we_mask |= QM_INITFQ_WE_CGID;
 980                 opts.fqd.cgid = cgr_rx->cgrid;
 981                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 982         }
 983 without_cgr:
 984         ret = qman_init_fq(fq, flags, &opts);
 985         if (ret)
 986                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret);
 987         return ret;
 988 }
 989
 990 /* Initialise a Tx FQ */
 991 static int dpaa_tx_queue_init(struct qman_fq *fq,
 992                               struct fman_if *fman_intf)
 993 {
 994         struct qm_mcc_initfq opts = {0};
 995         int ret;
 996
 997         PMD_INIT_FUNC_TRACE();
 998
 999         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
1000                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
1001         if (ret) {
1002                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
1003                 return ret;
1004         }
1005         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
1006                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
1007         opts.fqd.dest.channel = fman_intf->tx_channel_id;
1008         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
1009         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
1010         opts.fqd.context_b = 0;
1011         /* no tx-confirmation */
1012         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
1013         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
1014         DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid);
1015         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
1016         if (ret)
1017                 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret);
1018         return ret;
1019 }
1020
1021 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1022 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
1023 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
1024 {
1025         struct qm_mcc_initfq opts = {0};
1026         int ret;
1027
1028         PMD_INIT_FUNC_TRACE();
1029
1030         ret = qman_reserve_fqid(fqid);
1031         if (ret) {
1032                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
1033                         fqid, ret);
1034                 return -EINVAL;
1035         }
1036         /* "map" this Rx FQ to one of the interfaces Tx FQID */
1037         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
1038         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1039         if (ret) {
1040                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
1041                         fqid, ret);
1042                 return ret;
1043         }
1044         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
1045         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
1046         ret = qman_init_fq(fq, 0, &opts);
1047         if (ret)
1048                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
1049                             fqid, ret);
1050         return ret;
1051 }
1052 #endif
1053
1054 /* Initialise a network interface */
1055 static int
1056 dpaa_dev_init(struct rte_eth_dev *eth_dev)
1057 {
1058         int num_cores, num_rx_fqs, fqid;
1059         int loop, ret = 0;
1060         int dev_id;
1061         struct rte_dpaa_device *dpaa_device;
1062         struct dpaa_if *dpaa_intf;
1063         struct fm_eth_port_cfg *cfg;
1064         struct fman_if *fman_intf;
1065         struct fman_if_bpool *bp, *tmp_bp;
1066         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
1067
1068         PMD_INIT_FUNC_TRACE();
1069
1070         /* For secondary processes, the primary has done all the work */
1071         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1072                 return 0;
1073
1074         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1075         dev_id = dpaa_device->id.dev_id;
1076         dpaa_intf = eth_dev->data->dev_private;
1077         cfg = &dpaa_netcfg->port_cfg[dev_id];
1078         fman_intf = cfg->fman_if;
1079
1080         dpaa_intf->name = dpaa_device->name;
1081
1082         /* save fman_if & cfg in the interface struture */
1083         dpaa_intf->fif = fman_intf;
1084         dpaa_intf->ifid = dev_id;
1085         dpaa_intf->cfg = cfg;
1086
1087         /* Initialize Rx FQ's */
1088         if (getenv("DPAA_NUM_RX_QUEUES"))
1089                 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
1090         else
1091                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1092
1093         /* if push mode queues to be enabled. Currenly we are allowing only
1094          * one queue per thread.
1095          */
1096         if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
1097                 dpaa_push_mode_max_queue =
1098                                 atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
1099                 if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
1100                         dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
1101         }
1102
1103         /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX
1104          * queues.
1105          */
1106         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) {
1107                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1108                 return -EINVAL;
1109         }
1110
1111         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1112                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1113         if (!dpaa_intf->rx_queues) {
1114                 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
1115                 return -ENOMEM;
1116         }
1117
1118         /* If congestion control is enabled globally*/
1119         if (td_threshold) {
1120                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1121                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1122                 if (!dpaa_intf->cgr_rx) {
1123                         DPAA_PMD_ERR("Failed to alloc mem for cgr_rx\n");
1124                         ret = -ENOMEM;
1125                         goto free_rx;
1126                 }
1127
1128                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1129                 if (ret != num_rx_fqs) {
1130                         DPAA_PMD_WARN("insufficient CGRIDs available");
1131                         ret = -EINVAL;
1132                         goto free_rx;
1133                 }
1134         } else {
1135                 dpaa_intf->cgr_rx = NULL;
1136         }
1137
1138         for (loop = 0; loop < num_rx_fqs; loop++) {
1139                 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *
1140                         DPAA_PCD_FQID_MULTIPLIER + loop;
1141
1142                 if (dpaa_intf->cgr_rx)
1143                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1144
1145                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1146                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1147                         fqid);
1148                 if (ret)
1149                         goto free_rx;
1150                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1151         }
1152         dpaa_intf->nb_rx_queues = num_rx_fqs;
1153
1154         /* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
1155         num_cores = rte_lcore_count();
1156         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1157                 num_cores, MAX_CACHELINE);
1158         if (!dpaa_intf->tx_queues) {
1159                 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n");
1160                 ret = -ENOMEM;
1161                 goto free_rx;
1162         }
1163
1164         for (loop = 0; loop < num_cores; loop++) {
1165                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1166                                          fman_intf);
1167                 if (ret)
1168                         goto free_tx;
1169                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1170         }
1171         dpaa_intf->nb_tx_queues = num_cores;
1172
1173 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1174         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1175                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1176         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1177         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1178                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1179         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1180 #endif
1181
1182         DPAA_PMD_DEBUG("All frame queues created");
1183
1184         /* Get the initial configuration for flow control */
1185         dpaa_fc_set_default(dpaa_intf);
1186
1187         /* reset bpool list, initialize bpool dynamically */
1188         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1189                 list_del(&bp->node);
1190                 free(bp);
1191         }
1192
1193         /* Populate ethdev structure */
1194         eth_dev->dev_ops = &dpaa_devops;
1195         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1196         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1197
1198         /* Allocate memory for storing MAC addresses */
1199         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1200                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1201         if (eth_dev->data->mac_addrs == NULL) {
1202                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1203                                                 "store MAC addresses",
1204                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1205                 ret = -ENOMEM;
1206                 goto free_tx;
1207         }
1208
1209         /* copy the primary mac address */
1210         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1211
1212         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1213                 dpaa_device->name,
1214                 fman_intf->mac_addr.addr_bytes[0],
1215                 fman_intf->mac_addr.addr_bytes[1],
1216                 fman_intf->mac_addr.addr_bytes[2],
1217                 fman_intf->mac_addr.addr_bytes[3],
1218                 fman_intf->mac_addr.addr_bytes[4],
1219                 fman_intf->mac_addr.addr_bytes[5]);
1220
1221         /* Disable RX mode */
1222         fman_if_discard_rx_errors(fman_intf);
1223         fman_if_disable_rx(fman_intf);
1224         /* Disable promiscuous mode */
1225         fman_if_promiscuous_disable(fman_intf);
1226         /* Disable multicast */
1227         fman_if_reset_mcast_filter_table(fman_intf);
1228         /* Reset interface statistics */
1229         fman_if_stats_reset(fman_intf);
1230
1231         return 0;
1232
1233 free_tx:
1234         rte_free(dpaa_intf->tx_queues);
1235         dpaa_intf->tx_queues = NULL;
1236         dpaa_intf->nb_tx_queues = 0;
1237
1238 free_rx:
1239         rte_free(dpaa_intf->cgr_rx);
1240         rte_free(dpaa_intf->rx_queues);
1241         dpaa_intf->rx_queues = NULL;
1242         dpaa_intf->nb_rx_queues = 0;
1243         return ret;
1244 }
1245
1246 static int
1247 dpaa_dev_uninit(struct rte_eth_dev *dev)
1248 {
1249         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1250         int loop;
1251
1252         PMD_INIT_FUNC_TRACE();
1253
1254         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1255                 return -EPERM;
1256
1257         if (!dpaa_intf) {
1258                 DPAA_PMD_WARN("Already closed or not started");
1259                 return -1;
1260         }
1261
1262         dpaa_eth_dev_close(dev);
1263
1264         /* release configuration memory */
1265         if (dpaa_intf->fc_conf)
1266                 rte_free(dpaa_intf->fc_conf);
1267
1268         /* Release RX congestion Groups */
1269         if (dpaa_intf->cgr_rx) {
1270                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1271                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1272
1273                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1274                                          dpaa_intf->nb_rx_queues);
1275         }
1276
1277         rte_free(dpaa_intf->cgr_rx);
1278         dpaa_intf->cgr_rx = NULL;
1279
1280         rte_free(dpaa_intf->rx_queues);
1281         dpaa_intf->rx_queues = NULL;
1282
1283         rte_free(dpaa_intf->tx_queues);
1284         dpaa_intf->tx_queues = NULL;
1285
1286         /* free memory for storing MAC addresses */
1287         rte_free(dev->data->mac_addrs);
1288         dev->data->mac_addrs = NULL;
1289
1290         dev->dev_ops = NULL;
1291         dev->rx_pkt_burst = NULL;
1292         dev->tx_pkt_burst = NULL;
1293
1294         return 0;
1295 }
1296
1297 static int
1298 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
1299                struct rte_dpaa_device *dpaa_dev)
1300 {
1301         int diag;
1302         int ret;
1303         struct rte_eth_dev *eth_dev;
1304
1305         PMD_INIT_FUNC_TRACE();
1306
1307         /* In case of secondary process, the device is already configured
1308          * and no further action is required, except portal initialization
1309          * and verifying secondary attachment to port name.
1310          */
1311         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1312                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1313                 if (!eth_dev)
1314                         return -ENOMEM;
1315                 return 0;
1316         }
1317
1318         if (!is_global_init) {
1319                 /* One time load of Qman/Bman drivers */
1320                 ret = qman_global_init();
1321                 if (ret) {
1322                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1323                                      ret);
1324                         return ret;
1325                 }
1326                 ret = bman_global_init();
1327                 if (ret) {
1328                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1329                                      ret);
1330                         return ret;
1331                 }
1332
1333                 is_global_init = 1;
1334         }
1335
1336         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
1337                 ret = rte_dpaa_portal_init((void *)1);
1338                 if (ret) {
1339                         DPAA_PMD_ERR("Unable to initialize portal");
1340                         return ret;
1341                 }
1342         }
1343
1344         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1345         if (eth_dev == NULL)
1346                 return -ENOMEM;
1347
1348         eth_dev->data->dev_private = rte_zmalloc(
1349                                         "ethdev private structure",
1350                                         sizeof(struct dpaa_if),
1351                                         RTE_CACHE_LINE_SIZE);
1352         if (!eth_dev->data->dev_private) {
1353                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1354                 rte_eth_dev_release_port(eth_dev);
1355                 return -ENOMEM;
1356         }
1357
1358         eth_dev->device = &dpaa_dev->device;
1359         eth_dev->device->driver = &dpaa_drv->driver;
1360         dpaa_dev->eth_dev = eth_dev;
1361
1362         /* Invoke PMD device initialization function */
1363         diag = dpaa_dev_init(eth_dev);
1364         if (diag == 0)
1365                 return 0;
1366
1367         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1368                 rte_free(eth_dev->data->dev_private);
1369
1370         rte_eth_dev_release_port(eth_dev);
1371         return diag;
1372 }
1373
1374 static int
1375 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1376 {
1377         struct rte_eth_dev *eth_dev;
1378
1379         PMD_INIT_FUNC_TRACE();
1380
1381         eth_dev = dpaa_dev->eth_dev;
1382         dpaa_dev_uninit(eth_dev);
1383
1384         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1385                 rte_free(eth_dev->data->dev_private);
1386
1387         rte_eth_dev_release_port(eth_dev);
1388
1389         return 0;
1390 }
1391
1392 static struct rte_dpaa_driver rte_dpaa_pmd = {
1393         .drv_type = FSL_DPAA_ETH,
1394         .probe = rte_dpaa_probe,
1395         .remove = rte_dpaa_remove,
1396 };
1397
1398 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);