drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Keep track of whether QMAN and BMAN have been globally initialized */
  49 static int is_global_init;
  50 /* At present we only allow up to 4 push mode queues - as each of this queue
  51  * need dedicated portal and we are short of portals.
  52  */
  53 #define DPAA_MAX_PUSH_MODE_QUEUE       4
  54
  55 static int dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
  56 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  57
  58
  59 /* Per FQ Taildrop in frame count */
  60 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  61
  62 struct rte_dpaa_xstats_name_off {
  63         char name[RTE_ETH_XSTATS_NAME_SIZE];
  64         uint32_t offset;
  65 };
  66
  67 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  68         {"rx_align_err",
  69                 offsetof(struct dpaa_if_stats, raln)},
  70         {"rx_valid_pause",
  71                 offsetof(struct dpaa_if_stats, rxpf)},
  72         {"rx_fcs_err",
  73                 offsetof(struct dpaa_if_stats, rfcs)},
  74         {"rx_vlan_frame",
  75                 offsetof(struct dpaa_if_stats, rvlan)},
  76         {"rx_frame_err",
  77                 offsetof(struct dpaa_if_stats, rerr)},
  78         {"rx_drop_err",
  79                 offsetof(struct dpaa_if_stats, rdrp)},
  80         {"rx_undersized",
  81                 offsetof(struct dpaa_if_stats, rund)},
  82         {"rx_oversize_err",
  83                 offsetof(struct dpaa_if_stats, rovr)},
  84         {"rx_fragment_pkt",
  85                 offsetof(struct dpaa_if_stats, rfrg)},
  86         {"tx_valid_pause",
  87                 offsetof(struct dpaa_if_stats, txpf)},
  88         {"tx_fcs_err",
  89                 offsetof(struct dpaa_if_stats, terr)},
  90         {"tx_vlan_frame",
  91                 offsetof(struct dpaa_if_stats, tvlan)},
  92         {"rx_undersized",
  93                 offsetof(struct dpaa_if_stats, tund)},
  94 };
  95
  96 static struct rte_dpaa_driver rte_dpaa_pmd;
  97
  98 static int
  99 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 100 {
 101         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 102         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 103                                 + VLAN_TAG_SIZE;
 104
 105         PMD_INIT_FUNC_TRACE();
 106
 107         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 108                 return -EINVAL;
 109         if (frame_size > ETHER_MAX_LEN)
 110                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 111         else
 112                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 113
 114         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 115
 116         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 117
 118         return 0;
 119 }
 120
 121 static int
 122 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused)
 123 {
 124         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 125
 126         PMD_INIT_FUNC_TRACE();
 127
 128         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
 129                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 130                     DPAA_MAX_RX_PKT_LEN) {
 131                         fman_if_set_maxfrm(dpaa_intf->fif,
 132                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 133                         return 0;
 134                 } else {
 135                         return -1;
 136                 }
 137         }
 138         return 0;
 139 }
 140
 141 static const uint32_t *
 142 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 143 {
 144         static const uint32_t ptypes[] = {
 145                 /*todo -= add more types */
 146                 RTE_PTYPE_L2_ETHER,
 147                 RTE_PTYPE_L3_IPV4,
 148                 RTE_PTYPE_L3_IPV4_EXT,
 149                 RTE_PTYPE_L3_IPV6,
 150                 RTE_PTYPE_L3_IPV6_EXT,
 151                 RTE_PTYPE_L4_TCP,
 152                 RTE_PTYPE_L4_UDP,
 153                 RTE_PTYPE_L4_SCTP
 154         };
 155
 156         PMD_INIT_FUNC_TRACE();
 157
 158         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 159                 return ptypes;
 160         return NULL;
 161 }
 162
 163 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 164 {
 165         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 166
 167         PMD_INIT_FUNC_TRACE();
 168
 169         /* Change tx callback to the real one */
 170         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 171         fman_if_enable_rx(dpaa_intf->fif);
 172
 173         return 0;
 174 }
 175
 176 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 177 {
 178         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 179
 180         PMD_INIT_FUNC_TRACE();
 181
 182         fman_if_disable_rx(dpaa_intf->fif);
 183         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 184 }
 185
 186 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 187 {
 188         PMD_INIT_FUNC_TRACE();
 189
 190         dpaa_eth_dev_stop(dev);
 191 }
 192
 193 static int
 194 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 195                      char *fw_version,
 196                      size_t fw_size)
 197 {
 198         int ret;
 199         FILE *svr_file = NULL;
 200         unsigned int svr_ver = 0;
 201
 202         PMD_INIT_FUNC_TRACE();
 203
 204         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 205         if (!svr_file) {
 206                 DPAA_PMD_ERR("Unable to open SoC device");
 207                 return -ENOTSUP; /* Not supported on this infra */
 208         }
 209         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 210                 dpaa_svr_family = svr_ver & SVR_MASK;
 211         else
 212                 DPAA_PMD_ERR("Unable to read SoC device");
 213
 214         fclose(svr_file);
 215
 216         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 217                        svr_ver, fman_ip_rev);
 218         ret += 1; /* add the size of '\0' */
 219
 220         if (fw_size < (uint32_t)ret)
 221                 return ret;
 222         else
 223                 return 0;
 224 }
 225
 226 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 227                               struct rte_eth_dev_info *dev_info)
 228 {
 229         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 230
 231         PMD_INIT_FUNC_TRACE();
 232
 233         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 234         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 235         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 236         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 237         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 238         dev_info->max_hash_mac_addrs = 0;
 239         dev_info->max_vfs = 0;
 240         dev_info->max_vmdq_pools = ETH_16_POOLS;
 241         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 242         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 243                                 ETH_LINK_SPEED_10G);
 244         dev_info->rx_offload_capa =
 245                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 246                 DEV_RX_OFFLOAD_UDP_CKSUM   |
 247                 DEV_RX_OFFLOAD_TCP_CKSUM);
 248         dev_info->tx_offload_capa =
 249                 (DEV_TX_OFFLOAD_IPV4_CKSUM  |
 250                 DEV_TX_OFFLOAD_UDP_CKSUM   |
 251                 DEV_TX_OFFLOAD_TCP_CKSUM);
 252 }
 253
 254 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 255                                 int wait_to_complete __rte_unused)
 256 {
 257         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 258         struct rte_eth_link *link = &dev->data->dev_link;
 259
 260         PMD_INIT_FUNC_TRACE();
 261
 262         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 263                 link->link_speed = 1000;
 264         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 265                 link->link_speed = 10000;
 266         else
 267                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 268                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 269
 270         link->link_status = dpaa_intf->valid;
 271         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 272         link->link_autoneg = ETH_LINK_AUTONEG;
 273         return 0;
 274 }
 275
 276 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 277                                struct rte_eth_stats *stats)
 278 {
 279         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 280
 281         PMD_INIT_FUNC_TRACE();
 282
 283         fman_if_stats_get(dpaa_intf->fif, stats);
 284         return 0;
 285 }
 286
 287 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 288 {
 289         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 290
 291         PMD_INIT_FUNC_TRACE();
 292
 293         fman_if_stats_reset(dpaa_intf->fif);
 294 }
 295
 296 static int
 297 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 298                     unsigned int n)
 299 {
 300         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 301         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 302         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 303
 304         if (xstats == NULL)
 305                 return 0;
 306
 307         if (n < num)
 308                 return num;
 309
 310         fman_if_stats_get_all(dpaa_intf->fif, values,
 311                               sizeof(struct dpaa_if_stats) / 8);
 312
 313         for (i = 0; i < num; i++) {
 314                 xstats[i].id = i;
 315                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 316         }
 317         return i;
 318 }
 319
 320 static int
 321 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 322                       struct rte_eth_xstat_name *xstats_names,
 323                       __rte_unused unsigned int limit)
 324 {
 325         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 326
 327         if (xstats_names != NULL)
 328                 for (i = 0; i < stat_cnt; i++)
 329                         snprintf(xstats_names[i].name,
 330                                  sizeof(xstats_names[i].name),
 331                                  "%s",
 332                                  dpaa_xstats_strings[i].name);
 333
 334         return stat_cnt;
 335 }
 336
 337 static int
 338 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 339                       uint64_t *values, unsigned int n)
 340 {
 341         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 342         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 343
 344         if (!ids) {
 345                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 346
 347                 if (n < stat_cnt)
 348                         return stat_cnt;
 349
 350                 if (!values)
 351                         return 0;
 352
 353                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 354                                       sizeof(struct dpaa_if_stats));
 355
 356                 for (i = 0; i < stat_cnt; i++)
 357                         values[i] =
 358                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 359
 360                 return stat_cnt;
 361         }
 362
 363         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 364
 365         for (i = 0; i < n; i++) {
 366                 if (ids[i] >= stat_cnt) {
 367                         DPAA_PMD_ERR("id value isn't valid");
 368                         return -1;
 369                 }
 370                 values[i] = values_copy[ids[i]];
 371         }
 372         return n;
 373 }
 374
 375 static int
 376 dpaa_xstats_get_names_by_id(
 377         struct rte_eth_dev *dev,
 378         struct rte_eth_xstat_name *xstats_names,
 379         const uint64_t *ids,
 380         unsigned int limit)
 381 {
 382         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 383         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 384
 385         if (!ids)
 386                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 387
 388         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 389
 390         for (i = 0; i < limit; i++) {
 391                 if (ids[i] >= stat_cnt) {
 392                         DPAA_PMD_ERR("id value isn't valid");
 393                         return -1;
 394                 }
 395                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 396         }
 397         return limit;
 398 }
 399
 400 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 401 {
 402         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 403
 404         PMD_INIT_FUNC_TRACE();
 405
 406         fman_if_promiscuous_enable(dpaa_intf->fif);
 407 }
 408
 409 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 410 {
 411         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 412
 413         PMD_INIT_FUNC_TRACE();
 414
 415         fman_if_promiscuous_disable(dpaa_intf->fif);
 416 }
 417
 418 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 419 {
 420         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 421
 422         PMD_INIT_FUNC_TRACE();
 423
 424         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 425 }
 426
 427 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 428 {
 429         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 430
 431         PMD_INIT_FUNC_TRACE();
 432
 433         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 434 }
 435
 436 static
 437 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 438                             uint16_t nb_desc,
 439                             unsigned int socket_id __rte_unused,
 440                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 441                             struct rte_mempool *mp)
 442 {
 443         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 444         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 445         struct qm_mcc_initfq opts = {0};
 446         u32 flags = 0;
 447         int ret;
 448
 449         PMD_INIT_FUNC_TRACE();
 450
 451         DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx);
 452
 453         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 454                 struct fman_if_ic_params icp;
 455                 uint32_t fd_offset;
 456                 uint32_t bp_size;
 457
 458                 if (!mp->pool_data) {
 459                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 460                         return -1;
 461                 }
 462                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 463
 464                 memset(&icp, 0, sizeof(icp));
 465                 /* set ICEOF for to the default value , which is 0*/
 466                 icp.iciof = DEFAULT_ICIOF;
 467                 icp.iceof = DEFAULT_RX_ICEOF;
 468                 icp.icsz = DEFAULT_ICSZ;
 469                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 470
 471                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 472                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 473
 474                 /* Buffer pool size should be equal to Dataroom Size*/
 475                 bp_size = rte_pktmbuf_data_room_size(mp);
 476                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 477                                dpaa_intf->bp_info->bpid, bp_size);
 478                 dpaa_intf->valid = 1;
 479                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 480                             dpaa_intf->name, fd_offset,
 481                         fman_if_get_fdoff(dpaa_intf->fif));
 482         }
 483         /* checking if push mode only, no error check for now */
 484         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 485                 dpaa_push_queue_idx++;
 486                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 487                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 488                                    QM_FQCTRL_CTXASTASHING |
 489                                    QM_FQCTRL_PREFERINCACHE;
 490                 opts.fqd.context_a.stashing.exclusive = 0;
 491                 opts.fqd.context_a.stashing.annotation_cl =
 492                                                 DPAA_IF_RX_ANNOTATION_STASH;
 493                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 494                 opts.fqd.context_a.stashing.context_cl =
 495                                                 DPAA_IF_RX_CONTEXT_STASH;
 496
 497                 /*Create a channel and associate given queue with the channel*/
 498                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 499                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 500                 opts.fqd.dest.channel = rxq->ch_id;
 501                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 502                 flags = QMAN_INITFQ_FLAG_SCHED;
 503
 504                 /* Configure tail drop */
 505                 if (dpaa_intf->cgr_rx) {
 506                         opts.we_mask |= QM_INITFQ_WE_CGID;
 507                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 508                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 509                 }
 510                 ret = qman_init_fq(rxq, flags, &opts);
 511                 if (ret)
 512                         DPAA_PMD_ERR("Channel/Queue association failed. fqid %d"
 513                                      " ret: %d", rxq->fqid, ret);
 514                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb;
 515                 rxq->is_static = true;
 516         }
 517         dev->data->rx_queues[queue_idx] = rxq;
 518
 519         /* configure the CGR size as per the desc size */
 520         if (dpaa_intf->cgr_rx) {
 521                 struct qm_mcc_initcgr cgr_opts = {0};
 522
 523                 /* Enable tail drop with cgr on this queue */
 524                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 525                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 526                 if (ret) {
 527                         DPAA_PMD_WARN(
 528                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 529                                 rxq->fqid, ret);
 530                 }
 531         }
 532
 533         return 0;
 534 }
 535
 536 static
 537 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 538 {
 539         PMD_INIT_FUNC_TRACE();
 540 }
 541
 542 static
 543 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 544                             uint16_t nb_desc __rte_unused,
 545                 unsigned int socket_id __rte_unused,
 546                 const struct rte_eth_txconf *tx_conf __rte_unused)
 547 {
 548         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 549
 550         PMD_INIT_FUNC_TRACE();
 551
 552         DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx);
 553         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 554         return 0;
 555 }
 556
 557 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 558 {
 559         PMD_INIT_FUNC_TRACE();
 560 }
 561
 562 static uint32_t
 563 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 564 {
 565         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 566         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 567         u32 frm_cnt = 0;
 568
 569         PMD_INIT_FUNC_TRACE();
 570
 571         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 572                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 573                         rx_queue_id, frm_cnt);
 574         }
 575         return frm_cnt;
 576 }
 577
 578 static int dpaa_link_down(struct rte_eth_dev *dev)
 579 {
 580         PMD_INIT_FUNC_TRACE();
 581
 582         dpaa_eth_dev_stop(dev);
 583         return 0;
 584 }
 585
 586 static int dpaa_link_up(struct rte_eth_dev *dev)
 587 {
 588         PMD_INIT_FUNC_TRACE();
 589
 590         dpaa_eth_dev_start(dev);
 591         return 0;
 592 }
 593
 594 static int
 595 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 596                    struct rte_eth_fc_conf *fc_conf)
 597 {
 598         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 599         struct rte_eth_fc_conf *net_fc;
 600
 601         PMD_INIT_FUNC_TRACE();
 602
 603         if (!(dpaa_intf->fc_conf)) {
 604                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 605                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 606                 if (!dpaa_intf->fc_conf) {
 607                         DPAA_PMD_ERR("unable to save flow control info");
 608                         return -ENOMEM;
 609                 }
 610         }
 611         net_fc = dpaa_intf->fc_conf;
 612
 613         if (fc_conf->high_water < fc_conf->low_water) {
 614                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 615                 return -EINVAL;
 616         }
 617
 618         if (fc_conf->mode == RTE_FC_NONE) {
 619                 return 0;
 620         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 621                  fc_conf->mode == RTE_FC_FULL) {
 622                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 623                                          fc_conf->low_water,
 624                                 dpaa_intf->bp_info->bpid);
 625                 if (fc_conf->pause_time)
 626                         fman_if_set_fc_quanta(dpaa_intf->fif,
 627                                               fc_conf->pause_time);
 628         }
 629
 630         /* Save the information in dpaa device */
 631         net_fc->pause_time = fc_conf->pause_time;
 632         net_fc->high_water = fc_conf->high_water;
 633         net_fc->low_water = fc_conf->low_water;
 634         net_fc->send_xon = fc_conf->send_xon;
 635         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 636         net_fc->mode = fc_conf->mode;
 637         net_fc->autoneg = fc_conf->autoneg;
 638
 639         return 0;
 640 }
 641
 642 static int
 643 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 644                    struct rte_eth_fc_conf *fc_conf)
 645 {
 646         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 647         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 648         int ret;
 649
 650         PMD_INIT_FUNC_TRACE();
 651
 652         if (net_fc) {
 653                 fc_conf->pause_time = net_fc->pause_time;
 654                 fc_conf->high_water = net_fc->high_water;
 655                 fc_conf->low_water = net_fc->low_water;
 656                 fc_conf->send_xon = net_fc->send_xon;
 657                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 658                 fc_conf->mode = net_fc->mode;
 659                 fc_conf->autoneg = net_fc->autoneg;
 660                 return 0;
 661         }
 662         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 663         if (ret) {
 664                 fc_conf->mode = RTE_FC_TX_PAUSE;
 665                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 666         } else {
 667                 fc_conf->mode = RTE_FC_NONE;
 668         }
 669
 670         return 0;
 671 }
 672
 673 static int
 674 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 675                              struct ether_addr *addr,
 676                              uint32_t index,
 677                              __rte_unused uint32_t pool)
 678 {
 679         int ret;
 680         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 681
 682         PMD_INIT_FUNC_TRACE();
 683
 684         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 685
 686         if (ret)
 687                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 688                         " err = %d", ret);
 689         return 0;
 690 }
 691
 692 static void
 693 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 694                           uint32_t index)
 695 {
 696         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 697
 698         PMD_INIT_FUNC_TRACE();
 699
 700         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 701 }
 702
 703 static void
 704 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 705                        struct ether_addr *addr)
 706 {
 707         int ret;
 708         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 709
 710         PMD_INIT_FUNC_TRACE();
 711
 712         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 713         if (ret)
 714                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 715 }
 716
 717 static struct eth_dev_ops dpaa_devops = {
 718         .dev_configure            = dpaa_eth_dev_configure,
 719         .dev_start                = dpaa_eth_dev_start,
 720         .dev_stop                 = dpaa_eth_dev_stop,
 721         .dev_close                = dpaa_eth_dev_close,
 722         .dev_infos_get            = dpaa_eth_dev_info,
 723         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 724
 725         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 726         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 727         .rx_queue_release         = dpaa_eth_rx_queue_release,
 728         .tx_queue_release         = dpaa_eth_tx_queue_release,
 729         .rx_queue_count           = dpaa_dev_rx_queue_count,
 730
 731         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 732         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 733
 734         .link_update              = dpaa_eth_link_update,
 735         .stats_get                = dpaa_eth_stats_get,
 736         .xstats_get               = dpaa_dev_xstats_get,
 737         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 738         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 739         .xstats_get_names         = dpaa_xstats_get_names,
 740         .xstats_reset             = dpaa_eth_stats_reset,
 741         .stats_reset              = dpaa_eth_stats_reset,
 742         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 743         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 744         .allmulticast_enable      = dpaa_eth_multicast_enable,
 745         .allmulticast_disable     = dpaa_eth_multicast_disable,
 746         .mtu_set                  = dpaa_mtu_set,
 747         .dev_set_link_down        = dpaa_link_down,
 748         .dev_set_link_up          = dpaa_link_up,
 749         .mac_addr_add             = dpaa_dev_add_mac_addr,
 750         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 751         .mac_addr_set             = dpaa_dev_set_mac_addr,
 752
 753         .fw_version_get           = dpaa_fw_version_get,
 754 };
 755
 756 static bool
 757 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
 758 {
 759         if (strcmp(dev->device->driver->name,
 760                    drv->driver.name))
 761                 return false;
 762
 763         return true;
 764 }
 765
 766 static bool
 767 is_dpaa_supported(struct rte_eth_dev *dev)
 768 {
 769         return is_device_supported(dev, &rte_dpaa_pmd);
 770 }
 771
 772 int
 773 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
 774 {
 775         struct rte_eth_dev *dev;
 776         struct dpaa_if *dpaa_intf;
 777
 778         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 779
 780         dev = &rte_eth_devices[port];
 781
 782         if (!is_dpaa_supported(dev))
 783                 return -ENOTSUP;
 784
 785         dpaa_intf = dev->data->dev_private;
 786
 787         if (on)
 788                 fman_if_loopback_enable(dpaa_intf->fif);
 789         else
 790                 fman_if_loopback_disable(dpaa_intf->fif);
 791
 792         return 0;
 793 }
 794
 795 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 796 {
 797         struct rte_eth_fc_conf *fc_conf;
 798         int ret;
 799
 800         PMD_INIT_FUNC_TRACE();
 801
 802         if (!(dpaa_intf->fc_conf)) {
 803                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 804                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 805                 if (!dpaa_intf->fc_conf) {
 806                         DPAA_PMD_ERR("unable to save flow control info");
 807                         return -ENOMEM;
 808                 }
 809         }
 810         fc_conf = dpaa_intf->fc_conf;
 811         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 812         if (ret) {
 813                 fc_conf->mode = RTE_FC_TX_PAUSE;
 814                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 815         } else {
 816                 fc_conf->mode = RTE_FC_NONE;
 817         }
 818
 819         return 0;
 820 }
 821
 822 /* Initialise an Rx FQ */
 823 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 824                               uint32_t fqid)
 825 {
 826         struct qm_mcc_initfq opts = {0};
 827         int ret;
 828         u32 flags = 0;
 829         struct qm_mcc_initcgr cgr_opts = {
 830                 .we_mask = QM_CGR_WE_CS_THRES |
 831                                 QM_CGR_WE_CSTD_EN |
 832                                 QM_CGR_WE_MODE,
 833                 .cgr = {
 834                         .cstd_en = QM_CGR_EN,
 835                         .mode = QMAN_CGR_MODE_FRAME
 836                 }
 837         };
 838
 839         PMD_INIT_FUNC_TRACE();
 840
 841         ret = qman_reserve_fqid(fqid);
 842         if (ret) {
 843                 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d",
 844                              fqid, ret);
 845                 return -EINVAL;
 846         }
 847
 848         DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid);
 849         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 850         if (ret) {
 851                 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d",
 852                         fqid, ret);
 853                 return ret;
 854         }
 855         fq->is_static = false;
 856         opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 857         opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 858                            QM_FQCTRL_PREFERINCACHE;
 859         opts.fqd.context_a.stashing.exclusive = 0;
 860         opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH;
 861         opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 862         opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 863
 864         if (cgr_rx) {
 865                 /* Enable tail drop with cgr on this queue */
 866                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
 867                 cgr_rx->cb = NULL;
 868                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
 869                                       &cgr_opts);
 870                 if (ret) {
 871                         DPAA_PMD_WARN(
 872                                 "rx taildrop init fail on rx fqid %d (ret=%d)",
 873                                 fqid, ret);
 874                         goto without_cgr;
 875                 }
 876                 opts.we_mask |= QM_INITFQ_WE_CGID;
 877                 opts.fqd.cgid = cgr_rx->cgrid;
 878                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 879         }
 880 without_cgr:
 881         ret = qman_init_fq(fq, flags, &opts);
 882         if (ret)
 883                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret);
 884         return ret;
 885 }
 886
 887 /* Initialise a Tx FQ */
 888 static int dpaa_tx_queue_init(struct qman_fq *fq,
 889                               struct fman_if *fman_intf)
 890 {
 891         struct qm_mcc_initfq opts = {0};
 892         int ret;
 893
 894         PMD_INIT_FUNC_TRACE();
 895
 896         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
 897                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
 898         if (ret) {
 899                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
 900                 return ret;
 901         }
 902         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
 903                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
 904         opts.fqd.dest.channel = fman_intf->tx_channel_id;
 905         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
 906         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
 907         opts.fqd.context_b = 0;
 908         /* no tx-confirmation */
 909         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
 910         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
 911         DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid);
 912         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
 913         if (ret)
 914                 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret);
 915         return ret;
 916 }
 917
 918 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
 919 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
 920 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
 921 {
 922         struct qm_mcc_initfq opts = {0};
 923         int ret;
 924
 925         PMD_INIT_FUNC_TRACE();
 926
 927         ret = qman_reserve_fqid(fqid);
 928         if (ret) {
 929                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
 930                         fqid, ret);
 931                 return -EINVAL;
 932         }
 933         /* "map" this Rx FQ to one of the interfaces Tx FQID */
 934         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
 935         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 936         if (ret) {
 937                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
 938                         fqid, ret);
 939                 return ret;
 940         }
 941         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
 942         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
 943         ret = qman_init_fq(fq, 0, &opts);
 944         if (ret)
 945                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
 946                             fqid, ret);
 947         return ret;
 948 }
 949 #endif
 950
 951 /* Initialise a network interface */
 952 static int
 953 dpaa_dev_init(struct rte_eth_dev *eth_dev)
 954 {
 955         int num_cores, num_rx_fqs, fqid;
 956         int loop, ret = 0;
 957         int dev_id;
 958         struct rte_dpaa_device *dpaa_device;
 959         struct dpaa_if *dpaa_intf;
 960         struct fm_eth_port_cfg *cfg;
 961         struct fman_if *fman_intf;
 962         struct fman_if_bpool *bp, *tmp_bp;
 963         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
 964
 965         PMD_INIT_FUNC_TRACE();
 966
 967         /* For secondary processes, the primary has done all the work */
 968         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 969                 return 0;
 970
 971         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
 972         dev_id = dpaa_device->id.dev_id;
 973         dpaa_intf = eth_dev->data->dev_private;
 974         cfg = &dpaa_netcfg->port_cfg[dev_id];
 975         fman_intf = cfg->fman_if;
 976
 977         dpaa_intf->name = dpaa_device->name;
 978
 979         /* save fman_if & cfg in the interface struture */
 980         dpaa_intf->fif = fman_intf;
 981         dpaa_intf->ifid = dev_id;
 982         dpaa_intf->cfg = cfg;
 983
 984         /* Initialize Rx FQ's */
 985         if (getenv("DPAA_NUM_RX_QUEUES"))
 986                 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
 987         else
 988                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
 989
 990         /* if push mode queues to be enabled. Currenly we are allowing only
 991          * one queue per thread.
 992          */
 993         if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
 994                 dpaa_push_mode_max_queue =
 995                                 atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
 996                 if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
 997                         dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
 998         }
 999
1000         /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX
1001          * queues.
1002          */
1003         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) {
1004                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1005                 return -EINVAL;
1006         }
1007
1008         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1009                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1010
1011         /* If congestion control is enabled globally*/
1012         if (td_threshold) {
1013                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1014                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1015
1016                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1017                 if (ret != num_rx_fqs) {
1018                         DPAA_PMD_WARN("insufficient CGRIDs available");
1019                         return -EINVAL;
1020                 }
1021         } else {
1022                 dpaa_intf->cgr_rx = NULL;
1023         }
1024
1025         for (loop = 0; loop < num_rx_fqs; loop++) {
1026                 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *
1027                         DPAA_PCD_FQID_MULTIPLIER + loop;
1028
1029                 if (dpaa_intf->cgr_rx)
1030                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1031
1032                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1033                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1034                         fqid);
1035                 if (ret)
1036                         return ret;
1037                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1038         }
1039         dpaa_intf->nb_rx_queues = num_rx_fqs;
1040
1041         /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */
1042         num_cores = rte_lcore_count();
1043         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1044                 num_cores, MAX_CACHELINE);
1045         if (!dpaa_intf->tx_queues)
1046                 return -ENOMEM;
1047
1048         for (loop = 0; loop < num_cores; loop++) {
1049                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1050                                          fman_intf);
1051                 if (ret)
1052                         return ret;
1053                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1054         }
1055         dpaa_intf->nb_tx_queues = num_cores;
1056
1057 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1058         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1059                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1060         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1061         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1062                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1063         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1064 #endif
1065
1066         DPAA_PMD_DEBUG("All frame queues created");
1067
1068         /* Get the initial configuration for flow control */
1069         dpaa_fc_set_default(dpaa_intf);
1070
1071         /* reset bpool list, initialize bpool dynamically */
1072         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1073                 list_del(&bp->node);
1074                 free(bp);
1075         }
1076
1077         /* Populate ethdev structure */
1078         eth_dev->dev_ops = &dpaa_devops;
1079         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1080         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1081
1082         /* Allocate memory for storing MAC addresses */
1083         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1084                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1085         if (eth_dev->data->mac_addrs == NULL) {
1086                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1087                                                 "store MAC addresses",
1088                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1089                 rte_free(dpaa_intf->cgr_rx);
1090                 rte_free(dpaa_intf->rx_queues);
1091                 rte_free(dpaa_intf->tx_queues);
1092                 dpaa_intf->rx_queues = NULL;
1093                 dpaa_intf->tx_queues = NULL;
1094                 dpaa_intf->nb_rx_queues = 0;
1095                 dpaa_intf->nb_tx_queues = 0;
1096                 return -ENOMEM;
1097         }
1098
1099         /* copy the primary mac address */
1100         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1101
1102         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1103                 dpaa_device->name,
1104                 fman_intf->mac_addr.addr_bytes[0],
1105                 fman_intf->mac_addr.addr_bytes[1],
1106                 fman_intf->mac_addr.addr_bytes[2],
1107                 fman_intf->mac_addr.addr_bytes[3],
1108                 fman_intf->mac_addr.addr_bytes[4],
1109                 fman_intf->mac_addr.addr_bytes[5]);
1110
1111         /* Disable RX mode */
1112         fman_if_discard_rx_errors(fman_intf);
1113         fman_if_disable_rx(fman_intf);
1114         /* Disable promiscuous mode */
1115         fman_if_promiscuous_disable(fman_intf);
1116         /* Disable multicast */
1117         fman_if_reset_mcast_filter_table(fman_intf);
1118         /* Reset interface statistics */
1119         fman_if_stats_reset(fman_intf);
1120
1121         return 0;
1122 }
1123
1124 static int
1125 dpaa_dev_uninit(struct rte_eth_dev *dev)
1126 {
1127         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1128         int loop;
1129
1130         PMD_INIT_FUNC_TRACE();
1131
1132         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1133                 return -EPERM;
1134
1135         if (!dpaa_intf) {
1136                 DPAA_PMD_WARN("Already closed or not started");
1137                 return -1;
1138         }
1139
1140         dpaa_eth_dev_close(dev);
1141
1142         /* release configuration memory */
1143         if (dpaa_intf->fc_conf)
1144                 rte_free(dpaa_intf->fc_conf);
1145
1146         /* Release RX congestion Groups */
1147         if (dpaa_intf->cgr_rx) {
1148                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1149                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1150
1151                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1152                                          dpaa_intf->nb_rx_queues);
1153         }
1154
1155         rte_free(dpaa_intf->cgr_rx);
1156         dpaa_intf->cgr_rx = NULL;
1157
1158         rte_free(dpaa_intf->rx_queues);
1159         dpaa_intf->rx_queues = NULL;
1160
1161         rte_free(dpaa_intf->tx_queues);
1162         dpaa_intf->tx_queues = NULL;
1163
1164         /* free memory for storing MAC addresses */
1165         rte_free(dev->data->mac_addrs);
1166         dev->data->mac_addrs = NULL;
1167
1168         dev->dev_ops = NULL;
1169         dev->rx_pkt_burst = NULL;
1170         dev->tx_pkt_burst = NULL;
1171
1172         return 0;
1173 }
1174
1175 static int
1176 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
1177                struct rte_dpaa_device *dpaa_dev)
1178 {
1179         int diag;
1180         int ret;
1181         struct rte_eth_dev *eth_dev;
1182
1183         PMD_INIT_FUNC_TRACE();
1184
1185         /* In case of secondary process, the device is already configured
1186          * and no further action is required, except portal initialization
1187          * and verifying secondary attachment to port name.
1188          */
1189         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1190                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1191                 if (!eth_dev)
1192                         return -ENOMEM;
1193                 return 0;
1194         }
1195
1196         if (!is_global_init) {
1197                 /* One time load of Qman/Bman drivers */
1198                 ret = qman_global_init();
1199                 if (ret) {
1200                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1201                                      ret);
1202                         return ret;
1203                 }
1204                 ret = bman_global_init();
1205                 if (ret) {
1206                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1207                                      ret);
1208                         return ret;
1209                 }
1210
1211                 is_global_init = 1;
1212         }
1213
1214         ret = rte_dpaa_portal_init((void *)1);
1215         if (ret) {
1216                 DPAA_PMD_ERR("Unable to initialize portal");
1217                 return ret;
1218         }
1219
1220         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1221         if (eth_dev == NULL)
1222                 return -ENOMEM;
1223
1224         eth_dev->data->dev_private = rte_zmalloc(
1225                                         "ethdev private structure",
1226                                         sizeof(struct dpaa_if),
1227                                         RTE_CACHE_LINE_SIZE);
1228         if (!eth_dev->data->dev_private) {
1229                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1230                 rte_eth_dev_release_port(eth_dev);
1231                 return -ENOMEM;
1232         }
1233
1234         eth_dev->device = &dpaa_dev->device;
1235         eth_dev->device->driver = &dpaa_drv->driver;
1236         dpaa_dev->eth_dev = eth_dev;
1237
1238         /* Invoke PMD device initialization function */
1239         diag = dpaa_dev_init(eth_dev);
1240         if (diag == 0)
1241                 return 0;
1242
1243         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1244                 rte_free(eth_dev->data->dev_private);
1245
1246         rte_eth_dev_release_port(eth_dev);
1247         return diag;
1248 }
1249
1250 static int
1251 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1252 {
1253         struct rte_eth_dev *eth_dev;
1254
1255         PMD_INIT_FUNC_TRACE();
1256
1257         eth_dev = dpaa_dev->eth_dev;
1258         dpaa_dev_uninit(eth_dev);
1259
1260         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1261                 rte_free(eth_dev->data->dev_private);
1262
1263         rte_eth_dev_release_port(eth_dev);
1264
1265         return 0;
1266 }
1267
1268 static struct rte_dpaa_driver rte_dpaa_pmd = {
1269         .drv_type = FSL_DPAA_ETH,
1270         .probe = rte_dpaa_probe,
1271         .remove = rte_dpaa_remove,
1272 };
1273
1274 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);