drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Keep track of whether QMAN and BMAN have been globally initialized */
  49 static int is_global_init;
  50 /* At present we only allow up to 4 push mode queues - as each of this queue
  51  * need dedicated portal and we are short of portals.
  52  */
  53 #define DPAA_MAX_PUSH_MODE_QUEUE       4
  54
  55 static int dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
  56 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  57
  58
  59 /* Per FQ Taildrop in frame count */
  60 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  61
  62 struct rte_dpaa_xstats_name_off {
  63         char name[RTE_ETH_XSTATS_NAME_SIZE];
  64         uint32_t offset;
  65 };
  66
  67 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  68         {"rx_align_err",
  69                 offsetof(struct dpaa_if_stats, raln)},
  70         {"rx_valid_pause",
  71                 offsetof(struct dpaa_if_stats, rxpf)},
  72         {"rx_fcs_err",
  73                 offsetof(struct dpaa_if_stats, rfcs)},
  74         {"rx_vlan_frame",
  75                 offsetof(struct dpaa_if_stats, rvlan)},
  76         {"rx_frame_err",
  77                 offsetof(struct dpaa_if_stats, rerr)},
  78         {"rx_drop_err",
  79                 offsetof(struct dpaa_if_stats, rdrp)},
  80         {"rx_undersized",
  81                 offsetof(struct dpaa_if_stats, rund)},
  82         {"rx_oversize_err",
  83                 offsetof(struct dpaa_if_stats, rovr)},
  84         {"rx_fragment_pkt",
  85                 offsetof(struct dpaa_if_stats, rfrg)},
  86         {"tx_valid_pause",
  87                 offsetof(struct dpaa_if_stats, txpf)},
  88         {"tx_fcs_err",
  89                 offsetof(struct dpaa_if_stats, terr)},
  90         {"tx_vlan_frame",
  91                 offsetof(struct dpaa_if_stats, tvlan)},
  92         {"rx_undersized",
  93                 offsetof(struct dpaa_if_stats, tund)},
  94 };
  95
  96 static struct rte_dpaa_driver rte_dpaa_pmd;
  97
  98 static inline void
  99 dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
 100 {
 101         memset(opts, 0, sizeof(struct qm_mcc_initfq));
 102         opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 103         opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 104                            QM_FQCTRL_PREFERINCACHE;
 105         opts->fqd.context_a.stashing.exclusive = 0;
 106         if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 107                 opts->fqd.context_a.stashing.annotation_cl =
 108                                                 DPAA_IF_RX_ANNOTATION_STASH;
 109         opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 110         opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 111 }
 112
 113 static int
 114 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 115 {
 116         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 117         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 118                                 + VLAN_TAG_SIZE;
 119
 120         PMD_INIT_FUNC_TRACE();
 121
 122         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 123                 return -EINVAL;
 124         if (frame_size > ETHER_MAX_LEN)
 125                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 126         else
 127                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 128
 129         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 130
 131         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 132
 133         return 0;
 134 }
 135
 136 static int
 137 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused)
 138 {
 139         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 140
 141         PMD_INIT_FUNC_TRACE();
 142
 143         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
 144                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 145                     DPAA_MAX_RX_PKT_LEN) {
 146                         fman_if_set_maxfrm(dpaa_intf->fif,
 147                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 148                         return 0;
 149                 } else {
 150                         return -1;
 151                 }
 152         }
 153         return 0;
 154 }
 155
 156 static const uint32_t *
 157 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 158 {
 159         static const uint32_t ptypes[] = {
 160                 /*todo -= add more types */
 161                 RTE_PTYPE_L2_ETHER,
 162                 RTE_PTYPE_L3_IPV4,
 163                 RTE_PTYPE_L3_IPV4_EXT,
 164                 RTE_PTYPE_L3_IPV6,
 165                 RTE_PTYPE_L3_IPV6_EXT,
 166                 RTE_PTYPE_L4_TCP,
 167                 RTE_PTYPE_L4_UDP,
 168                 RTE_PTYPE_L4_SCTP
 169         };
 170
 171         PMD_INIT_FUNC_TRACE();
 172
 173         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 174                 return ptypes;
 175         return NULL;
 176 }
 177
 178 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 179 {
 180         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 181
 182         PMD_INIT_FUNC_TRACE();
 183
 184         /* Change tx callback to the real one */
 185         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 186         fman_if_enable_rx(dpaa_intf->fif);
 187
 188         return 0;
 189 }
 190
 191 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 192 {
 193         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 194
 195         PMD_INIT_FUNC_TRACE();
 196
 197         fman_if_disable_rx(dpaa_intf->fif);
 198         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 199 }
 200
 201 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 202 {
 203         PMD_INIT_FUNC_TRACE();
 204
 205         dpaa_eth_dev_stop(dev);
 206 }
 207
 208 static int
 209 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 210                      char *fw_version,
 211                      size_t fw_size)
 212 {
 213         int ret;
 214         FILE *svr_file = NULL;
 215         unsigned int svr_ver = 0;
 216
 217         PMD_INIT_FUNC_TRACE();
 218
 219         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 220         if (!svr_file) {
 221                 DPAA_PMD_ERR("Unable to open SoC device");
 222                 return -ENOTSUP; /* Not supported on this infra */
 223         }
 224         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 225                 dpaa_svr_family = svr_ver & SVR_MASK;
 226         else
 227                 DPAA_PMD_ERR("Unable to read SoC device");
 228
 229         fclose(svr_file);
 230
 231         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 232                        svr_ver, fman_ip_rev);
 233         ret += 1; /* add the size of '\0' */
 234
 235         if (fw_size < (uint32_t)ret)
 236                 return ret;
 237         else
 238                 return 0;
 239 }
 240
 241 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 242                               struct rte_eth_dev_info *dev_info)
 243 {
 244         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 245
 246         PMD_INIT_FUNC_TRACE();
 247
 248         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 249         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 250         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 251         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 252         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 253         dev_info->max_hash_mac_addrs = 0;
 254         dev_info->max_vfs = 0;
 255         dev_info->max_vmdq_pools = ETH_16_POOLS;
 256         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 257         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 258                                 ETH_LINK_SPEED_10G);
 259         dev_info->rx_offload_capa =
 260                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 261                 DEV_RX_OFFLOAD_UDP_CKSUM   |
 262                 DEV_RX_OFFLOAD_TCP_CKSUM);
 263         dev_info->tx_offload_capa =
 264                 (DEV_TX_OFFLOAD_IPV4_CKSUM  |
 265                 DEV_TX_OFFLOAD_UDP_CKSUM   |
 266                 DEV_TX_OFFLOAD_TCP_CKSUM);
 267 }
 268
 269 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 270                                 int wait_to_complete __rte_unused)
 271 {
 272         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 273         struct rte_eth_link *link = &dev->data->dev_link;
 274
 275         PMD_INIT_FUNC_TRACE();
 276
 277         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 278                 link->link_speed = 1000;
 279         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 280                 link->link_speed = 10000;
 281         else
 282                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 283                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 284
 285         link->link_status = dpaa_intf->valid;
 286         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 287         link->link_autoneg = ETH_LINK_AUTONEG;
 288         return 0;
 289 }
 290
 291 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 292                                struct rte_eth_stats *stats)
 293 {
 294         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 295
 296         PMD_INIT_FUNC_TRACE();
 297
 298         fman_if_stats_get(dpaa_intf->fif, stats);
 299         return 0;
 300 }
 301
 302 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 303 {
 304         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 305
 306         PMD_INIT_FUNC_TRACE();
 307
 308         fman_if_stats_reset(dpaa_intf->fif);
 309 }
 310
 311 static int
 312 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 313                     unsigned int n)
 314 {
 315         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 316         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 317         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 318
 319         if (xstats == NULL)
 320                 return 0;
 321
 322         if (n < num)
 323                 return num;
 324
 325         fman_if_stats_get_all(dpaa_intf->fif, values,
 326                               sizeof(struct dpaa_if_stats) / 8);
 327
 328         for (i = 0; i < num; i++) {
 329                 xstats[i].id = i;
 330                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 331         }
 332         return i;
 333 }
 334
 335 static int
 336 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 337                       struct rte_eth_xstat_name *xstats_names,
 338                       __rte_unused unsigned int limit)
 339 {
 340         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 341
 342         if (xstats_names != NULL)
 343                 for (i = 0; i < stat_cnt; i++)
 344                         snprintf(xstats_names[i].name,
 345                                  sizeof(xstats_names[i].name),
 346                                  "%s",
 347                                  dpaa_xstats_strings[i].name);
 348
 349         return stat_cnt;
 350 }
 351
 352 static int
 353 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 354                       uint64_t *values, unsigned int n)
 355 {
 356         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 357         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 358
 359         if (!ids) {
 360                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 361
 362                 if (n < stat_cnt)
 363                         return stat_cnt;
 364
 365                 if (!values)
 366                         return 0;
 367
 368                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 369                                       sizeof(struct dpaa_if_stats));
 370
 371                 for (i = 0; i < stat_cnt; i++)
 372                         values[i] =
 373                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 374
 375                 return stat_cnt;
 376         }
 377
 378         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 379
 380         for (i = 0; i < n; i++) {
 381                 if (ids[i] >= stat_cnt) {
 382                         DPAA_PMD_ERR("id value isn't valid");
 383                         return -1;
 384                 }
 385                 values[i] = values_copy[ids[i]];
 386         }
 387         return n;
 388 }
 389
 390 static int
 391 dpaa_xstats_get_names_by_id(
 392         struct rte_eth_dev *dev,
 393         struct rte_eth_xstat_name *xstats_names,
 394         const uint64_t *ids,
 395         unsigned int limit)
 396 {
 397         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 398         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 399
 400         if (!ids)
 401                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 402
 403         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 404
 405         for (i = 0; i < limit; i++) {
 406                 if (ids[i] >= stat_cnt) {
 407                         DPAA_PMD_ERR("id value isn't valid");
 408                         return -1;
 409                 }
 410                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 411         }
 412         return limit;
 413 }
 414
 415 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 416 {
 417         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 418
 419         PMD_INIT_FUNC_TRACE();
 420
 421         fman_if_promiscuous_enable(dpaa_intf->fif);
 422 }
 423
 424 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 425 {
 426         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 427
 428         PMD_INIT_FUNC_TRACE();
 429
 430         fman_if_promiscuous_disable(dpaa_intf->fif);
 431 }
 432
 433 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 434 {
 435         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 436
 437         PMD_INIT_FUNC_TRACE();
 438
 439         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 440 }
 441
 442 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 443 {
 444         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 445
 446         PMD_INIT_FUNC_TRACE();
 447
 448         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 449 }
 450
 451 static
 452 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 453                             uint16_t nb_desc,
 454                             unsigned int socket_id __rte_unused,
 455                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 456                             struct rte_mempool *mp)
 457 {
 458         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 459         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 460         struct qm_mcc_initfq opts = {0};
 461         u32 flags = 0;
 462         int ret;
 463
 464         PMD_INIT_FUNC_TRACE();
 465
 466         DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx);
 467
 468         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 469                 struct fman_if_ic_params icp;
 470                 uint32_t fd_offset;
 471                 uint32_t bp_size;
 472
 473                 if (!mp->pool_data) {
 474                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 475                         return -1;
 476                 }
 477                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 478
 479                 memset(&icp, 0, sizeof(icp));
 480                 /* set ICEOF for to the default value , which is 0*/
 481                 icp.iciof = DEFAULT_ICIOF;
 482                 icp.iceof = DEFAULT_RX_ICEOF;
 483                 icp.icsz = DEFAULT_ICSZ;
 484                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 485
 486                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 487                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 488
 489                 /* Buffer pool size should be equal to Dataroom Size*/
 490                 bp_size = rte_pktmbuf_data_room_size(mp);
 491                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 492                                dpaa_intf->bp_info->bpid, bp_size);
 493                 dpaa_intf->valid = 1;
 494                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 495                             dpaa_intf->name, fd_offset,
 496                         fman_if_get_fdoff(dpaa_intf->fif));
 497         }
 498         /* checking if push mode only, no error check for now */
 499         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 500                 dpaa_push_queue_idx++;
 501                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 502                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 503                                    QM_FQCTRL_CTXASTASHING |
 504                                    QM_FQCTRL_PREFERINCACHE;
 505                 opts.fqd.context_a.stashing.exclusive = 0;
 506                 opts.fqd.context_a.stashing.annotation_cl =
 507                                                 DPAA_IF_RX_ANNOTATION_STASH;
 508                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 509                 opts.fqd.context_a.stashing.context_cl =
 510                                                 DPAA_IF_RX_CONTEXT_STASH;
 511
 512                 /*Create a channel and associate given queue with the channel*/
 513                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 514                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 515                 opts.fqd.dest.channel = rxq->ch_id;
 516                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 517                 flags = QMAN_INITFQ_FLAG_SCHED;
 518
 519                 /* Configure tail drop */
 520                 if (dpaa_intf->cgr_rx) {
 521                         opts.we_mask |= QM_INITFQ_WE_CGID;
 522                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 523                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 524                 }
 525                 ret = qman_init_fq(rxq, flags, &opts);
 526                 if (ret)
 527                         DPAA_PMD_ERR("Channel/Queue association failed. fqid %d"
 528                                      " ret: %d", rxq->fqid, ret);
 529                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb;
 530                 rxq->is_static = true;
 531         }
 532         dev->data->rx_queues[queue_idx] = rxq;
 533
 534         /* configure the CGR size as per the desc size */
 535         if (dpaa_intf->cgr_rx) {
 536                 struct qm_mcc_initcgr cgr_opts = {0};
 537
 538                 /* Enable tail drop with cgr on this queue */
 539                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 540                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 541                 if (ret) {
 542                         DPAA_PMD_WARN(
 543                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 544                                 rxq->fqid, ret);
 545                 }
 546         }
 547
 548         return 0;
 549 }
 550
 551 int dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
 552                            int eth_rx_queue_id,
 553                 u16 ch_id,
 554                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 555 {
 556         int ret;
 557         u32 flags = 0;
 558         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 559         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 560         struct qm_mcc_initfq opts = {0};
 561
 562         if (dpaa_push_mode_max_queue)
 563                 DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.\n"
 564                               "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n",
 565                               dpaa_push_mode_max_queue);
 566
 567         dpaa_poll_queue_default_config(&opts);
 568
 569         switch (queue_conf->ev.sched_type) {
 570         case RTE_SCHED_TYPE_ATOMIC:
 571                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
 572                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
 573                  * configuration with HOLD_ACTIVE setting
 574                  */
 575                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
 576                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
 577                 break;
 578         case RTE_SCHED_TYPE_ORDERED:
 579                 DPAA_PMD_ERR("Ordered queue schedule type is not supported\n");
 580                 return -1;
 581         default:
 582                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
 583                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
 584                 break;
 585         }
 586
 587         opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 588         opts.fqd.dest.channel = ch_id;
 589         opts.fqd.dest.wq = queue_conf->ev.priority;
 590
 591         if (dpaa_intf->cgr_rx) {
 592                 opts.we_mask |= QM_INITFQ_WE_CGID;
 593                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 594                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 595         }
 596
 597         flags = QMAN_INITFQ_FLAG_SCHED;
 598
 599         ret = qman_init_fq(rxq, flags, &opts);
 600         if (ret) {
 601                 DPAA_PMD_ERR("Channel/Queue association failed. fqid %d ret:%d",
 602                              rxq->fqid, ret);
 603                 return ret;
 604         }
 605
 606         /* copy configuration which needs to be filled during dequeue */
 607         memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
 608         dev->data->rx_queues[eth_rx_queue_id] = rxq;
 609
 610         return ret;
 611 }
 612
 613 int dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 614                            int eth_rx_queue_id)
 615 {
 616         struct qm_mcc_initfq opts;
 617         int ret;
 618         u32 flags = 0;
 619         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 620         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 621
 622         dpaa_poll_queue_default_config(&opts);
 623
 624         if (dpaa_intf->cgr_rx) {
 625                 opts.we_mask |= QM_INITFQ_WE_CGID;
 626                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 627                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 628         }
 629
 630         ret = qman_init_fq(rxq, flags, &opts);
 631         if (ret) {
 632                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
 633                              rxq->fqid, ret);
 634         }
 635
 636         rxq->cb.dqrr_dpdk_cb = NULL;
 637         dev->data->rx_queues[eth_rx_queue_id] = NULL;
 638
 639         return 0;
 640 }
 641
 642 static
 643 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 644 {
 645         PMD_INIT_FUNC_TRACE();
 646 }
 647
 648 static
 649 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 650                             uint16_t nb_desc __rte_unused,
 651                 unsigned int socket_id __rte_unused,
 652                 const struct rte_eth_txconf *tx_conf __rte_unused)
 653 {
 654         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 655
 656         PMD_INIT_FUNC_TRACE();
 657
 658         DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx);
 659         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 660         return 0;
 661 }
 662
 663 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 664 {
 665         PMD_INIT_FUNC_TRACE();
 666 }
 667
 668 static uint32_t
 669 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 670 {
 671         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 672         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 673         u32 frm_cnt = 0;
 674
 675         PMD_INIT_FUNC_TRACE();
 676
 677         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 678                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 679                         rx_queue_id, frm_cnt);
 680         }
 681         return frm_cnt;
 682 }
 683
 684 static int dpaa_link_down(struct rte_eth_dev *dev)
 685 {
 686         PMD_INIT_FUNC_TRACE();
 687
 688         dpaa_eth_dev_stop(dev);
 689         return 0;
 690 }
 691
 692 static int dpaa_link_up(struct rte_eth_dev *dev)
 693 {
 694         PMD_INIT_FUNC_TRACE();
 695
 696         dpaa_eth_dev_start(dev);
 697         return 0;
 698 }
 699
 700 static int
 701 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 702                    struct rte_eth_fc_conf *fc_conf)
 703 {
 704         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 705         struct rte_eth_fc_conf *net_fc;
 706
 707         PMD_INIT_FUNC_TRACE();
 708
 709         if (!(dpaa_intf->fc_conf)) {
 710                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 711                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 712                 if (!dpaa_intf->fc_conf) {
 713                         DPAA_PMD_ERR("unable to save flow control info");
 714                         return -ENOMEM;
 715                 }
 716         }
 717         net_fc = dpaa_intf->fc_conf;
 718
 719         if (fc_conf->high_water < fc_conf->low_water) {
 720                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 721                 return -EINVAL;
 722         }
 723
 724         if (fc_conf->mode == RTE_FC_NONE) {
 725                 return 0;
 726         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 727                  fc_conf->mode == RTE_FC_FULL) {
 728                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 729                                          fc_conf->low_water,
 730                                 dpaa_intf->bp_info->bpid);
 731                 if (fc_conf->pause_time)
 732                         fman_if_set_fc_quanta(dpaa_intf->fif,
 733                                               fc_conf->pause_time);
 734         }
 735
 736         /* Save the information in dpaa device */
 737         net_fc->pause_time = fc_conf->pause_time;
 738         net_fc->high_water = fc_conf->high_water;
 739         net_fc->low_water = fc_conf->low_water;
 740         net_fc->send_xon = fc_conf->send_xon;
 741         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 742         net_fc->mode = fc_conf->mode;
 743         net_fc->autoneg = fc_conf->autoneg;
 744
 745         return 0;
 746 }
 747
 748 static int
 749 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 750                    struct rte_eth_fc_conf *fc_conf)
 751 {
 752         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 753         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 754         int ret;
 755
 756         PMD_INIT_FUNC_TRACE();
 757
 758         if (net_fc) {
 759                 fc_conf->pause_time = net_fc->pause_time;
 760                 fc_conf->high_water = net_fc->high_water;
 761                 fc_conf->low_water = net_fc->low_water;
 762                 fc_conf->send_xon = net_fc->send_xon;
 763                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 764                 fc_conf->mode = net_fc->mode;
 765                 fc_conf->autoneg = net_fc->autoneg;
 766                 return 0;
 767         }
 768         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 769         if (ret) {
 770                 fc_conf->mode = RTE_FC_TX_PAUSE;
 771                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 772         } else {
 773                 fc_conf->mode = RTE_FC_NONE;
 774         }
 775
 776         return 0;
 777 }
 778
 779 static int
 780 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 781                              struct ether_addr *addr,
 782                              uint32_t index,
 783                              __rte_unused uint32_t pool)
 784 {
 785         int ret;
 786         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 787
 788         PMD_INIT_FUNC_TRACE();
 789
 790         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 791
 792         if (ret)
 793                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 794                         " err = %d", ret);
 795         return 0;
 796 }
 797
 798 static void
 799 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 800                           uint32_t index)
 801 {
 802         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 803
 804         PMD_INIT_FUNC_TRACE();
 805
 806         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 807 }
 808
 809 static void
 810 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 811                        struct ether_addr *addr)
 812 {
 813         int ret;
 814         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 815
 816         PMD_INIT_FUNC_TRACE();
 817
 818         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 819         if (ret)
 820                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 821 }
 822
 823 static struct eth_dev_ops dpaa_devops = {
 824         .dev_configure            = dpaa_eth_dev_configure,
 825         .dev_start                = dpaa_eth_dev_start,
 826         .dev_stop                 = dpaa_eth_dev_stop,
 827         .dev_close                = dpaa_eth_dev_close,
 828         .dev_infos_get            = dpaa_eth_dev_info,
 829         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 830
 831         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 832         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 833         .rx_queue_release         = dpaa_eth_rx_queue_release,
 834         .tx_queue_release         = dpaa_eth_tx_queue_release,
 835         .rx_queue_count           = dpaa_dev_rx_queue_count,
 836
 837         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 838         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 839
 840         .link_update              = dpaa_eth_link_update,
 841         .stats_get                = dpaa_eth_stats_get,
 842         .xstats_get               = dpaa_dev_xstats_get,
 843         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 844         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 845         .xstats_get_names         = dpaa_xstats_get_names,
 846         .xstats_reset             = dpaa_eth_stats_reset,
 847         .stats_reset              = dpaa_eth_stats_reset,
 848         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 849         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 850         .allmulticast_enable      = dpaa_eth_multicast_enable,
 851         .allmulticast_disable     = dpaa_eth_multicast_disable,
 852         .mtu_set                  = dpaa_mtu_set,
 853         .dev_set_link_down        = dpaa_link_down,
 854         .dev_set_link_up          = dpaa_link_up,
 855         .mac_addr_add             = dpaa_dev_add_mac_addr,
 856         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 857         .mac_addr_set             = dpaa_dev_set_mac_addr,
 858
 859         .fw_version_get           = dpaa_fw_version_get,
 860 };
 861
 862 static bool
 863 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
 864 {
 865         if (strcmp(dev->device->driver->name,
 866                    drv->driver.name))
 867                 return false;
 868
 869         return true;
 870 }
 871
 872 static bool
 873 is_dpaa_supported(struct rte_eth_dev *dev)
 874 {
 875         return is_device_supported(dev, &rte_dpaa_pmd);
 876 }
 877
 878 int
 879 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
 880 {
 881         struct rte_eth_dev *dev;
 882         struct dpaa_if *dpaa_intf;
 883
 884         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 885
 886         dev = &rte_eth_devices[port];
 887
 888         if (!is_dpaa_supported(dev))
 889                 return -ENOTSUP;
 890
 891         dpaa_intf = dev->data->dev_private;
 892
 893         if (on)
 894                 fman_if_loopback_enable(dpaa_intf->fif);
 895         else
 896                 fman_if_loopback_disable(dpaa_intf->fif);
 897
 898         return 0;
 899 }
 900
 901 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 902 {
 903         struct rte_eth_fc_conf *fc_conf;
 904         int ret;
 905
 906         PMD_INIT_FUNC_TRACE();
 907
 908         if (!(dpaa_intf->fc_conf)) {
 909                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 910                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 911                 if (!dpaa_intf->fc_conf) {
 912                         DPAA_PMD_ERR("unable to save flow control info");
 913                         return -ENOMEM;
 914                 }
 915         }
 916         fc_conf = dpaa_intf->fc_conf;
 917         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 918         if (ret) {
 919                 fc_conf->mode = RTE_FC_TX_PAUSE;
 920                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 921         } else {
 922                 fc_conf->mode = RTE_FC_NONE;
 923         }
 924
 925         return 0;
 926 }
 927
 928 /* Initialise an Rx FQ */
 929 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 930                               uint32_t fqid)
 931 {
 932         struct qm_mcc_initfq opts = {0};
 933         int ret;
 934         u32 flags = 0;
 935         struct qm_mcc_initcgr cgr_opts = {
 936                 .we_mask = QM_CGR_WE_CS_THRES |
 937                                 QM_CGR_WE_CSTD_EN |
 938                                 QM_CGR_WE_MODE,
 939                 .cgr = {
 940                         .cstd_en = QM_CGR_EN,
 941                         .mode = QMAN_CGR_MODE_FRAME
 942                 }
 943         };
 944
 945         PMD_INIT_FUNC_TRACE();
 946
 947         ret = qman_reserve_fqid(fqid);
 948         if (ret) {
 949                 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d",
 950                              fqid, ret);
 951                 return -EINVAL;
 952         }
 953
 954         DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid);
 955         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
 956         if (ret) {
 957                 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d",
 958                         fqid, ret);
 959                 return ret;
 960         }
 961         fq->is_static = false;
 962
 963         dpaa_poll_queue_default_config(&opts);
 964
 965         if (cgr_rx) {
 966                 /* Enable tail drop with cgr on this queue */
 967                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
 968                 cgr_rx->cb = NULL;
 969                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
 970                                       &cgr_opts);
 971                 if (ret) {
 972                         DPAA_PMD_WARN(
 973                                 "rx taildrop init fail on rx fqid %d (ret=%d)",
 974                                 fqid, ret);
 975                         goto without_cgr;
 976                 }
 977                 opts.we_mask |= QM_INITFQ_WE_CGID;
 978                 opts.fqd.cgid = cgr_rx->cgrid;
 979                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 980         }
 981 without_cgr:
 982         ret = qman_init_fq(fq, flags, &opts);
 983         if (ret)
 984                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret);
 985         return ret;
 986 }
 987
 988 /* Initialise a Tx FQ */
 989 static int dpaa_tx_queue_init(struct qman_fq *fq,
 990                               struct fman_if *fman_intf)
 991 {
 992         struct qm_mcc_initfq opts = {0};
 993         int ret;
 994
 995         PMD_INIT_FUNC_TRACE();
 996
 997         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
 998                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
 999         if (ret) {
1000                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
1001                 return ret;
1002         }
1003         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
1004                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
1005         opts.fqd.dest.channel = fman_intf->tx_channel_id;
1006         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
1007         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
1008         opts.fqd.context_b = 0;
1009         /* no tx-confirmation */
1010         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
1011         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
1012         DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid);
1013         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
1014         if (ret)
1015                 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret);
1016         return ret;
1017 }
1018
1019 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1020 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
1021 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
1022 {
1023         struct qm_mcc_initfq opts = {0};
1024         int ret;
1025
1026         PMD_INIT_FUNC_TRACE();
1027
1028         ret = qman_reserve_fqid(fqid);
1029         if (ret) {
1030                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
1031                         fqid, ret);
1032                 return -EINVAL;
1033         }
1034         /* "map" this Rx FQ to one of the interfaces Tx FQID */
1035         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
1036         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1037         if (ret) {
1038                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
1039                         fqid, ret);
1040                 return ret;
1041         }
1042         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
1043         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
1044         ret = qman_init_fq(fq, 0, &opts);
1045         if (ret)
1046                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
1047                             fqid, ret);
1048         return ret;
1049 }
1050 #endif
1051
1052 /* Initialise a network interface */
1053 static int
1054 dpaa_dev_init(struct rte_eth_dev *eth_dev)
1055 {
1056         int num_cores, num_rx_fqs, fqid;
1057         int loop, ret = 0;
1058         int dev_id;
1059         struct rte_dpaa_device *dpaa_device;
1060         struct dpaa_if *dpaa_intf;
1061         struct fm_eth_port_cfg *cfg;
1062         struct fman_if *fman_intf;
1063         struct fman_if_bpool *bp, *tmp_bp;
1064         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
1065
1066         PMD_INIT_FUNC_TRACE();
1067
1068         /* For secondary processes, the primary has done all the work */
1069         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1070                 return 0;
1071
1072         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1073         dev_id = dpaa_device->id.dev_id;
1074         dpaa_intf = eth_dev->data->dev_private;
1075         cfg = &dpaa_netcfg->port_cfg[dev_id];
1076         fman_intf = cfg->fman_if;
1077
1078         dpaa_intf->name = dpaa_device->name;
1079
1080         /* save fman_if & cfg in the interface struture */
1081         dpaa_intf->fif = fman_intf;
1082         dpaa_intf->ifid = dev_id;
1083         dpaa_intf->cfg = cfg;
1084
1085         /* Initialize Rx FQ's */
1086         if (getenv("DPAA_NUM_RX_QUEUES"))
1087                 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
1088         else
1089                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1090
1091         /* if push mode queues to be enabled. Currenly we are allowing only
1092          * one queue per thread.
1093          */
1094         if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
1095                 dpaa_push_mode_max_queue =
1096                                 atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
1097                 if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
1098                         dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
1099         }
1100
1101         /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX
1102          * queues.
1103          */
1104         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) {
1105                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1106                 return -EINVAL;
1107         }
1108
1109         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1110                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1111         if (!dpaa_intf->rx_queues) {
1112                 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
1113                 return -ENOMEM;
1114         }
1115
1116         /* If congestion control is enabled globally*/
1117         if (td_threshold) {
1118                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1119                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1120                 if (!dpaa_intf->cgr_rx) {
1121                         DPAA_PMD_ERR("Failed to alloc mem for cgr_rx\n");
1122                         ret = -ENOMEM;
1123                         goto free_rx;
1124                 }
1125
1126                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1127                 if (ret != num_rx_fqs) {
1128                         DPAA_PMD_WARN("insufficient CGRIDs available");
1129                         ret = -EINVAL;
1130                         goto free_rx;
1131                 }
1132         } else {
1133                 dpaa_intf->cgr_rx = NULL;
1134         }
1135
1136         for (loop = 0; loop < num_rx_fqs; loop++) {
1137                 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *
1138                         DPAA_PCD_FQID_MULTIPLIER + loop;
1139
1140                 if (dpaa_intf->cgr_rx)
1141                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1142
1143                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1144                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1145                         fqid);
1146                 if (ret)
1147                         goto free_rx;
1148                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1149         }
1150         dpaa_intf->nb_rx_queues = num_rx_fqs;
1151
1152         /* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
1153         num_cores = rte_lcore_count();
1154         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1155                 num_cores, MAX_CACHELINE);
1156         if (!dpaa_intf->tx_queues) {
1157                 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n");
1158                 ret = -ENOMEM;
1159                 goto free_rx;
1160         }
1161
1162         for (loop = 0; loop < num_cores; loop++) {
1163                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1164                                          fman_intf);
1165                 if (ret)
1166                         goto free_tx;
1167                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1168         }
1169         dpaa_intf->nb_tx_queues = num_cores;
1170
1171 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1172         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1173                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1174         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1175         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1176                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1177         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1178 #endif
1179
1180         DPAA_PMD_DEBUG("All frame queues created");
1181
1182         /* Get the initial configuration for flow control */
1183         dpaa_fc_set_default(dpaa_intf);
1184
1185         /* reset bpool list, initialize bpool dynamically */
1186         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1187                 list_del(&bp->node);
1188                 free(bp);
1189         }
1190
1191         /* Populate ethdev structure */
1192         eth_dev->dev_ops = &dpaa_devops;
1193         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1194         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1195
1196         /* Allocate memory for storing MAC addresses */
1197         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1198                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1199         if (eth_dev->data->mac_addrs == NULL) {
1200                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1201                                                 "store MAC addresses",
1202                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1203                 ret = -ENOMEM;
1204                 goto free_tx;
1205         }
1206
1207         /* copy the primary mac address */
1208         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1209
1210         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1211                 dpaa_device->name,
1212                 fman_intf->mac_addr.addr_bytes[0],
1213                 fman_intf->mac_addr.addr_bytes[1],
1214                 fman_intf->mac_addr.addr_bytes[2],
1215                 fman_intf->mac_addr.addr_bytes[3],
1216                 fman_intf->mac_addr.addr_bytes[4],
1217                 fman_intf->mac_addr.addr_bytes[5]);
1218
1219         /* Disable RX mode */
1220         fman_if_discard_rx_errors(fman_intf);
1221         fman_if_disable_rx(fman_intf);
1222         /* Disable promiscuous mode */
1223         fman_if_promiscuous_disable(fman_intf);
1224         /* Disable multicast */
1225         fman_if_reset_mcast_filter_table(fman_intf);
1226         /* Reset interface statistics */
1227         fman_if_stats_reset(fman_intf);
1228
1229         return 0;
1230
1231 free_tx:
1232         rte_free(dpaa_intf->tx_queues);
1233         dpaa_intf->tx_queues = NULL;
1234         dpaa_intf->nb_tx_queues = 0;
1235
1236 free_rx:
1237         rte_free(dpaa_intf->cgr_rx);
1238         rte_free(dpaa_intf->rx_queues);
1239         dpaa_intf->rx_queues = NULL;
1240         dpaa_intf->nb_rx_queues = 0;
1241         return ret;
1242 }
1243
1244 static int
1245 dpaa_dev_uninit(struct rte_eth_dev *dev)
1246 {
1247         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1248         int loop;
1249
1250         PMD_INIT_FUNC_TRACE();
1251
1252         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1253                 return -EPERM;
1254
1255         if (!dpaa_intf) {
1256                 DPAA_PMD_WARN("Already closed or not started");
1257                 return -1;
1258         }
1259
1260         dpaa_eth_dev_close(dev);
1261
1262         /* release configuration memory */
1263         if (dpaa_intf->fc_conf)
1264                 rte_free(dpaa_intf->fc_conf);
1265
1266         /* Release RX congestion Groups */
1267         if (dpaa_intf->cgr_rx) {
1268                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1269                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1270
1271                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1272                                          dpaa_intf->nb_rx_queues);
1273         }
1274
1275         rte_free(dpaa_intf->cgr_rx);
1276         dpaa_intf->cgr_rx = NULL;
1277
1278         rte_free(dpaa_intf->rx_queues);
1279         dpaa_intf->rx_queues = NULL;
1280
1281         rte_free(dpaa_intf->tx_queues);
1282         dpaa_intf->tx_queues = NULL;
1283
1284         /* free memory for storing MAC addresses */
1285         rte_free(dev->data->mac_addrs);
1286         dev->data->mac_addrs = NULL;
1287
1288         dev->dev_ops = NULL;
1289         dev->rx_pkt_burst = NULL;
1290         dev->tx_pkt_burst = NULL;
1291
1292         return 0;
1293 }
1294
1295 static int
1296 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv,
1297                struct rte_dpaa_device *dpaa_dev)
1298 {
1299         int diag;
1300         int ret;
1301         struct rte_eth_dev *eth_dev;
1302
1303         PMD_INIT_FUNC_TRACE();
1304
1305         /* In case of secondary process, the device is already configured
1306          * and no further action is required, except portal initialization
1307          * and verifying secondary attachment to port name.
1308          */
1309         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1310                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1311                 if (!eth_dev)
1312                         return -ENOMEM;
1313                 return 0;
1314         }
1315
1316         if (!is_global_init) {
1317                 /* One time load of Qman/Bman drivers */
1318                 ret = qman_global_init();
1319                 if (ret) {
1320                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1321                                      ret);
1322                         return ret;
1323                 }
1324                 ret = bman_global_init();
1325                 if (ret) {
1326                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1327                                      ret);
1328                         return ret;
1329                 }
1330
1331                 is_global_init = 1;
1332         }
1333
1334         ret = rte_dpaa_portal_init((void *)1);
1335         if (ret) {
1336                 DPAA_PMD_ERR("Unable to initialize portal");
1337                 return ret;
1338         }
1339
1340         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1341         if (eth_dev == NULL)
1342                 return -ENOMEM;
1343
1344         eth_dev->data->dev_private = rte_zmalloc(
1345                                         "ethdev private structure",
1346                                         sizeof(struct dpaa_if),
1347                                         RTE_CACHE_LINE_SIZE);
1348         if (!eth_dev->data->dev_private) {
1349                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1350                 rte_eth_dev_release_port(eth_dev);
1351                 return -ENOMEM;
1352         }
1353
1354         eth_dev->device = &dpaa_dev->device;
1355         eth_dev->device->driver = &dpaa_drv->driver;
1356         dpaa_dev->eth_dev = eth_dev;
1357
1358         /* Invoke PMD device initialization function */
1359         diag = dpaa_dev_init(eth_dev);
1360         if (diag == 0)
1361                 return 0;
1362
1363         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1364                 rte_free(eth_dev->data->dev_private);
1365
1366         rte_eth_dev_release_port(eth_dev);
1367         return diag;
1368 }
1369
1370 static int
1371 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1372 {
1373         struct rte_eth_dev *eth_dev;
1374
1375         PMD_INIT_FUNC_TRACE();
1376
1377         eth_dev = dpaa_dev->eth_dev;
1378         dpaa_dev_uninit(eth_dev);
1379
1380         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1381                 rte_free(eth_dev->data->dev_private);
1382
1383         rte_eth_dev_release_port(eth_dev);
1384
1385         return 0;
1386 }
1387
1388 static struct rte_dpaa_driver rte_dpaa_pmd = {
1389         .drv_type = FSL_DPAA_ETH,
1390         .probe = rte_dpaa_probe,
1391         .remove = rte_dpaa_remove,
1392 };
1393
1394 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);