drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev_driver.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Supported Rx offloads */
  49 static uint64_t dev_rx_offloads_sup =
  50                 DEV_RX_OFFLOAD_JUMBO_FRAME;
  51
  52 /* Rx offloads which cannot be disabled */
  53 static uint64_t dev_rx_offloads_nodis =
  54                 DEV_RX_OFFLOAD_IPV4_CKSUM |
  55                 DEV_RX_OFFLOAD_UDP_CKSUM |
  56                 DEV_RX_OFFLOAD_TCP_CKSUM |
  57                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  58                 DEV_RX_OFFLOAD_SCATTER;
  59
  60 /* Supported Tx offloads */
  61 static uint64_t dev_tx_offloads_sup;
  62
  63 /* Tx offloads which cannot be disabled */
  64 static uint64_t dev_tx_offloads_nodis =
  65                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  66                 DEV_TX_OFFLOAD_UDP_CKSUM |
  67                 DEV_TX_OFFLOAD_TCP_CKSUM |
  68                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  69                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  70                 DEV_TX_OFFLOAD_MULTI_SEGS |
  71                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  72                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  73
  74 /* Keep track of whether QMAN and BMAN have been globally initialized */
  75 static int is_global_init;
  76 static int default_q;   /* use default queue - FMC is not executed*/
  77 /* At present we only allow up to 4 push mode queues as default - as each of
  78  * this queue need dedicated portal and we are short of portals.
  79  */
  80 #define DPAA_MAX_PUSH_MODE_QUEUE       8
  81 #define DPAA_DEFAULT_PUSH_MODE_QUEUE   4
  82
  83 static int dpaa_push_mode_max_queue = DPAA_DEFAULT_PUSH_MODE_QUEUE;
  84 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  85
  86
  87 /* Per FQ Taildrop in frame count */
  88 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  89
  90 struct rte_dpaa_xstats_name_off {
  91         char name[RTE_ETH_XSTATS_NAME_SIZE];
  92         uint32_t offset;
  93 };
  94
  95 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  96         {"rx_align_err",
  97                 offsetof(struct dpaa_if_stats, raln)},
  98         {"rx_valid_pause",
  99                 offsetof(struct dpaa_if_stats, rxpf)},
 100         {"rx_fcs_err",
 101                 offsetof(struct dpaa_if_stats, rfcs)},
 102         {"rx_vlan_frame",
 103                 offsetof(struct dpaa_if_stats, rvlan)},
 104         {"rx_frame_err",
 105                 offsetof(struct dpaa_if_stats, rerr)},
 106         {"rx_drop_err",
 107                 offsetof(struct dpaa_if_stats, rdrp)},
 108         {"rx_undersized",
 109                 offsetof(struct dpaa_if_stats, rund)},
 110         {"rx_oversize_err",
 111                 offsetof(struct dpaa_if_stats, rovr)},
 112         {"rx_fragment_pkt",
 113                 offsetof(struct dpaa_if_stats, rfrg)},
 114         {"tx_valid_pause",
 115                 offsetof(struct dpaa_if_stats, txpf)},
 116         {"tx_fcs_err",
 117                 offsetof(struct dpaa_if_stats, terr)},
 118         {"tx_vlan_frame",
 119                 offsetof(struct dpaa_if_stats, tvlan)},
 120         {"rx_undersized",
 121                 offsetof(struct dpaa_if_stats, tund)},
 122 };
 123
 124 static struct rte_dpaa_driver rte_dpaa_pmd;
 125
 126 static void
 127 dpaa_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
 128
 129 static inline void
 130 dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
 131 {
 132         memset(opts, 0, sizeof(struct qm_mcc_initfq));
 133         opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 134         opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 135                            QM_FQCTRL_PREFERINCACHE;
 136         opts->fqd.context_a.stashing.exclusive = 0;
 137         if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 138                 opts->fqd.context_a.stashing.annotation_cl =
 139                                                 DPAA_IF_RX_ANNOTATION_STASH;
 140         opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 141         opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 142 }
 143
 144 static int
 145 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 146 {
 147         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 148         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 149                                 + VLAN_TAG_SIZE;
 150
 151         PMD_INIT_FUNC_TRACE();
 152
 153         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 154                 return -EINVAL;
 155         if (frame_size > ETHER_MAX_LEN)
 156                 dev->data->dev_conf.rxmode.offloads &=
 157                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 158         else
 159                 dev->data->dev_conf.rxmode.offloads &=
 160                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 161
 162         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 163
 164         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 165
 166         return 0;
 167 }
 168
 169 static int
 170 dpaa_eth_dev_configure(struct rte_eth_dev *dev)
 171 {
 172         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 173         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 174         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 175         uint64_t tx_offloads = eth_conf->txmode.offloads;
 176
 177         PMD_INIT_FUNC_TRACE();
 178
 179         /* Rx offloads validation */
 180         if (dev_rx_offloads_nodis & ~rx_offloads) {
 181                 DPAA_PMD_WARN(
 182                 "Rx offloads non configurable - requested 0x%" PRIx64
 183                 " ignored 0x%" PRIx64,
 184                         rx_offloads, dev_rx_offloads_nodis);
 185         }
 186
 187         /* Tx offloads validation */
 188         if (dev_tx_offloads_nodis & ~tx_offloads) {
 189                 DPAA_PMD_WARN(
 190                 "Tx offloads non configurable - requested 0x%" PRIx64
 191                 " ignored 0x%" PRIx64,
 192                         tx_offloads, dev_tx_offloads_nodis);
 193         }
 194
 195         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 196                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 197                     DPAA_MAX_RX_PKT_LEN) {
 198                         fman_if_set_maxfrm(dpaa_intf->fif,
 199                                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 200                         return 0;
 201                 } else {
 202                         return -1;
 203                 }
 204         }
 205         return 0;
 206 }
 207
 208 static const uint32_t *
 209 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 210 {
 211         static const uint32_t ptypes[] = {
 212                 /*todo -= add more types */
 213                 RTE_PTYPE_L2_ETHER,
 214                 RTE_PTYPE_L3_IPV4,
 215                 RTE_PTYPE_L3_IPV4_EXT,
 216                 RTE_PTYPE_L3_IPV6,
 217                 RTE_PTYPE_L3_IPV6_EXT,
 218                 RTE_PTYPE_L4_TCP,
 219                 RTE_PTYPE_L4_UDP,
 220                 RTE_PTYPE_L4_SCTP
 221         };
 222
 223         PMD_INIT_FUNC_TRACE();
 224
 225         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 226                 return ptypes;
 227         return NULL;
 228 }
 229
 230 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 231 {
 232         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 233
 234         PMD_INIT_FUNC_TRACE();
 235
 236         /* Change tx callback to the real one */
 237         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 238         fman_if_enable_rx(dpaa_intf->fif);
 239
 240         return 0;
 241 }
 242
 243 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 244 {
 245         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 246
 247         PMD_INIT_FUNC_TRACE();
 248
 249         fman_if_disable_rx(dpaa_intf->fif);
 250         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 251 }
 252
 253 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 254 {
 255         PMD_INIT_FUNC_TRACE();
 256
 257         dpaa_eth_dev_stop(dev);
 258 }
 259
 260 static int
 261 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 262                      char *fw_version,
 263                      size_t fw_size)
 264 {
 265         int ret;
 266         FILE *svr_file = NULL;
 267         unsigned int svr_ver = 0;
 268
 269         PMD_INIT_FUNC_TRACE();
 270
 271         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 272         if (!svr_file) {
 273                 DPAA_PMD_ERR("Unable to open SoC device");
 274                 return -ENOTSUP; /* Not supported on this infra */
 275         }
 276         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 277                 dpaa_svr_family = svr_ver & SVR_MASK;
 278         else
 279                 DPAA_PMD_ERR("Unable to read SoC device");
 280
 281         fclose(svr_file);
 282
 283         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 284                        svr_ver, fman_ip_rev);
 285         ret += 1; /* add the size of '\0' */
 286
 287         if (fw_size < (uint32_t)ret)
 288                 return ret;
 289         else
 290                 return 0;
 291 }
 292
 293 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 294                               struct rte_eth_dev_info *dev_info)
 295 {
 296         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 297
 298         PMD_INIT_FUNC_TRACE();
 299
 300         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 301         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 302         dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE;
 303         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 304         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 305         dev_info->max_hash_mac_addrs = 0;
 306         dev_info->max_vfs = 0;
 307         dev_info->max_vmdq_pools = ETH_16_POOLS;
 308         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 309         dev_info->speed_capa = (ETH_LINK_SPEED_1G |
 310                                 ETH_LINK_SPEED_10G);
 311         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 312                                         dev_rx_offloads_nodis;
 313         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 314                                         dev_tx_offloads_nodis;
 315         dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
 316         dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
 317 }
 318
 319 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 320                                 int wait_to_complete __rte_unused)
 321 {
 322         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 323         struct rte_eth_link *link = &dev->data->dev_link;
 324
 325         PMD_INIT_FUNC_TRACE();
 326
 327         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 328                 link->link_speed = ETH_SPEED_NUM_1G;
 329         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 330                 link->link_speed = ETH_SPEED_NUM_10G;
 331         else
 332                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 333                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 334
 335         link->link_status = dpaa_intf->valid;
 336         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 337         link->link_autoneg = ETH_LINK_AUTONEG;
 338         return 0;
 339 }
 340
 341 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 342                                struct rte_eth_stats *stats)
 343 {
 344         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 345
 346         PMD_INIT_FUNC_TRACE();
 347
 348         fman_if_stats_get(dpaa_intf->fif, stats);
 349         return 0;
 350 }
 351
 352 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 353 {
 354         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 355
 356         PMD_INIT_FUNC_TRACE();
 357
 358         fman_if_stats_reset(dpaa_intf->fif);
 359 }
 360
 361 static int
 362 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 363                     unsigned int n)
 364 {
 365         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 366         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 367         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 368
 369         if (n < num)
 370                 return num;
 371
 372         if (xstats == NULL)
 373                 return 0;
 374
 375         fman_if_stats_get_all(dpaa_intf->fif, values,
 376                               sizeof(struct dpaa_if_stats) / 8);
 377
 378         for (i = 0; i < num; i++) {
 379                 xstats[i].id = i;
 380                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 381         }
 382         return i;
 383 }
 384
 385 static int
 386 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 387                       struct rte_eth_xstat_name *xstats_names,
 388                       unsigned int limit)
 389 {
 390         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 391
 392         if (limit < stat_cnt)
 393                 return stat_cnt;
 394
 395         if (xstats_names != NULL)
 396                 for (i = 0; i < stat_cnt; i++)
 397                         snprintf(xstats_names[i].name,
 398                                  sizeof(xstats_names[i].name),
 399                                  "%s",
 400                                  dpaa_xstats_strings[i].name);
 401
 402         return stat_cnt;
 403 }
 404
 405 static int
 406 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 407                       uint64_t *values, unsigned int n)
 408 {
 409         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 410         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 411
 412         if (!ids) {
 413                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 414
 415                 if (n < stat_cnt)
 416                         return stat_cnt;
 417
 418                 if (!values)
 419                         return 0;
 420
 421                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 422                                       sizeof(struct dpaa_if_stats) / 8);
 423
 424                 for (i = 0; i < stat_cnt; i++)
 425                         values[i] =
 426                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 427
 428                 return stat_cnt;
 429         }
 430
 431         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 432
 433         for (i = 0; i < n; i++) {
 434                 if (ids[i] >= stat_cnt) {
 435                         DPAA_PMD_ERR("id value isn't valid");
 436                         return -1;
 437                 }
 438                 values[i] = values_copy[ids[i]];
 439         }
 440         return n;
 441 }
 442
 443 static int
 444 dpaa_xstats_get_names_by_id(
 445         struct rte_eth_dev *dev,
 446         struct rte_eth_xstat_name *xstats_names,
 447         const uint64_t *ids,
 448         unsigned int limit)
 449 {
 450         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 451         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 452
 453         if (!ids)
 454                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 455
 456         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 457
 458         for (i = 0; i < limit; i++) {
 459                 if (ids[i] >= stat_cnt) {
 460                         DPAA_PMD_ERR("id value isn't valid");
 461                         return -1;
 462                 }
 463                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 464         }
 465         return limit;
 466 }
 467
 468 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 469 {
 470         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 471
 472         PMD_INIT_FUNC_TRACE();
 473
 474         fman_if_promiscuous_enable(dpaa_intf->fif);
 475 }
 476
 477 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 478 {
 479         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 480
 481         PMD_INIT_FUNC_TRACE();
 482
 483         fman_if_promiscuous_disable(dpaa_intf->fif);
 484 }
 485
 486 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 487 {
 488         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 489
 490         PMD_INIT_FUNC_TRACE();
 491
 492         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 493 }
 494
 495 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 496 {
 497         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 498
 499         PMD_INIT_FUNC_TRACE();
 500
 501         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 502 }
 503
 504 static
 505 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 506                             uint16_t nb_desc,
 507                             unsigned int socket_id __rte_unused,
 508                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 509                             struct rte_mempool *mp)
 510 {
 511         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 512         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 513         struct qm_mcc_initfq opts = {0};
 514         u32 flags = 0;
 515         int ret;
 516
 517         PMD_INIT_FUNC_TRACE();
 518
 519         if (queue_idx >= dev->data->nb_rx_queues) {
 520                 rte_errno = EOVERFLOW;
 521                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 522                       (void *)dev, queue_idx, dev->data->nb_rx_queues);
 523                 return -rte_errno;
 524         }
 525
 526         DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
 527                         queue_idx, rxq->fqid);
 528
 529         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 530                 struct fman_if_ic_params icp;
 531                 uint32_t fd_offset;
 532                 uint32_t bp_size;
 533
 534                 if (!mp->pool_data) {
 535                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 536                         return -1;
 537                 }
 538                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 539
 540                 memset(&icp, 0, sizeof(icp));
 541                 /* set ICEOF for to the default value , which is 0*/
 542                 icp.iciof = DEFAULT_ICIOF;
 543                 icp.iceof = DEFAULT_RX_ICEOF;
 544                 icp.icsz = DEFAULT_ICSZ;
 545                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 546
 547                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 548                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 549
 550                 /* Buffer pool size should be equal to Dataroom Size*/
 551                 bp_size = rte_pktmbuf_data_room_size(mp);
 552                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 553                                dpaa_intf->bp_info->bpid, bp_size);
 554                 dpaa_intf->valid = 1;
 555                 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d",
 556                             dpaa_intf->name, fd_offset,
 557                         fman_if_get_fdoff(dpaa_intf->fif));
 558         }
 559         /* checking if push mode only, no error check for now */
 560         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 561                 dpaa_push_queue_idx++;
 562                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 563                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 564                                    QM_FQCTRL_CTXASTASHING |
 565                                    QM_FQCTRL_PREFERINCACHE;
 566                 opts.fqd.context_a.stashing.exclusive = 0;
 567                 /* In muticore scenario stashing becomes a bottleneck on LS1046.
 568                  * So do not enable stashing in this case
 569                  */
 570                 if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 571                         opts.fqd.context_a.stashing.annotation_cl =
 572                                                 DPAA_IF_RX_ANNOTATION_STASH;
 573                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 574                 opts.fqd.context_a.stashing.context_cl =
 575                                                 DPAA_IF_RX_CONTEXT_STASH;
 576
 577                 /*Create a channel and associate given queue with the channel*/
 578                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 579                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 580                 opts.fqd.dest.channel = rxq->ch_id;
 581                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 582                 flags = QMAN_INITFQ_FLAG_SCHED;
 583
 584                 /* Configure tail drop */
 585                 if (dpaa_intf->cgr_rx) {
 586                         opts.we_mask |= QM_INITFQ_WE_CGID;
 587                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 588                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 589                 }
 590                 ret = qman_init_fq(rxq, flags, &opts);
 591                 if (ret) {
 592                         DPAA_PMD_ERR("Channel/Q association failed. fqid 0x%x "
 593                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 594                         return ret;
 595                 }
 596                 rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb;
 597                 rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare;
 598                 rxq->is_static = true;
 599         }
 600         dev->data->rx_queues[queue_idx] = rxq;
 601
 602         /* configure the CGR size as per the desc size */
 603         if (dpaa_intf->cgr_rx) {
 604                 struct qm_mcc_initcgr cgr_opts = {0};
 605
 606                 /* Enable tail drop with cgr on this queue */
 607                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 608                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 609                 if (ret) {
 610                         DPAA_PMD_WARN(
 611                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 612                                 rxq->fqid, ret);
 613                 }
 614         }
 615
 616         return 0;
 617 }
 618
 619 int
 620 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
 621                 int eth_rx_queue_id,
 622                 u16 ch_id,
 623                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 624 {
 625         int ret;
 626         u32 flags = 0;
 627         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 628         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 629         struct qm_mcc_initfq opts = {0};
 630
 631         if (dpaa_push_mode_max_queue)
 632                 DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.\n"
 633                               "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n",
 634                               dpaa_push_mode_max_queue);
 635
 636         dpaa_poll_queue_default_config(&opts);
 637
 638         switch (queue_conf->ev.sched_type) {
 639         case RTE_SCHED_TYPE_ATOMIC:
 640                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
 641                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
 642                  * configuration with HOLD_ACTIVE setting
 643                  */
 644                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
 645                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
 646                 break;
 647         case RTE_SCHED_TYPE_ORDERED:
 648                 DPAA_PMD_ERR("Ordered queue schedule type is not supported\n");
 649                 return -1;
 650         default:
 651                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
 652                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
 653                 break;
 654         }
 655
 656         opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 657         opts.fqd.dest.channel = ch_id;
 658         opts.fqd.dest.wq = queue_conf->ev.priority;
 659
 660         if (dpaa_intf->cgr_rx) {
 661                 opts.we_mask |= QM_INITFQ_WE_CGID;
 662                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 663                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 664         }
 665
 666         flags = QMAN_INITFQ_FLAG_SCHED;
 667
 668         ret = qman_init_fq(rxq, flags, &opts);
 669         if (ret) {
 670                 DPAA_PMD_ERR("Ev-Channel/Q association failed. fqid 0x%x "
 671                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 672                 return ret;
 673         }
 674
 675         /* copy configuration which needs to be filled during dequeue */
 676         memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
 677         dev->data->rx_queues[eth_rx_queue_id] = rxq;
 678
 679         return ret;
 680 }
 681
 682 int
 683 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 684                 int eth_rx_queue_id)
 685 {
 686         struct qm_mcc_initfq opts;
 687         int ret;
 688         u32 flags = 0;
 689         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 690         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 691
 692         dpaa_poll_queue_default_config(&opts);
 693
 694         if (dpaa_intf->cgr_rx) {
 695                 opts.we_mask |= QM_INITFQ_WE_CGID;
 696                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 697                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 698         }
 699
 700         ret = qman_init_fq(rxq, flags, &opts);
 701         if (ret) {
 702                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
 703                              rxq->fqid, ret);
 704         }
 705
 706         rxq->cb.dqrr_dpdk_cb = NULL;
 707         dev->data->rx_queues[eth_rx_queue_id] = NULL;
 708
 709         return 0;
 710 }
 711
 712 static
 713 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 714 {
 715         PMD_INIT_FUNC_TRACE();
 716 }
 717
 718 static
 719 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 720                             uint16_t nb_desc __rte_unused,
 721                 unsigned int socket_id __rte_unused,
 722                 const struct rte_eth_txconf *tx_conf __rte_unused)
 723 {
 724         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 725
 726         PMD_INIT_FUNC_TRACE();
 727
 728         if (queue_idx >= dev->data->nb_tx_queues) {
 729                 rte_errno = EOVERFLOW;
 730                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 731                       (void *)dev, queue_idx, dev->data->nb_tx_queues);
 732                 return -rte_errno;
 733         }
 734
 735         DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)",
 736                         queue_idx, dpaa_intf->tx_queues[queue_idx].fqid);
 737         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 738         return 0;
 739 }
 740
 741 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 742 {
 743         PMD_INIT_FUNC_TRACE();
 744 }
 745
 746 static uint32_t
 747 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 748 {
 749         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 750         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 751         u32 frm_cnt = 0;
 752
 753         PMD_INIT_FUNC_TRACE();
 754
 755         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 756                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 757                         rx_queue_id, frm_cnt);
 758         }
 759         return frm_cnt;
 760 }
 761
 762 static int dpaa_link_down(struct rte_eth_dev *dev)
 763 {
 764         PMD_INIT_FUNC_TRACE();
 765
 766         dpaa_eth_dev_stop(dev);
 767         return 0;
 768 }
 769
 770 static int dpaa_link_up(struct rte_eth_dev *dev)
 771 {
 772         PMD_INIT_FUNC_TRACE();
 773
 774         dpaa_eth_dev_start(dev);
 775         return 0;
 776 }
 777
 778 static int
 779 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 780                    struct rte_eth_fc_conf *fc_conf)
 781 {
 782         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 783         struct rte_eth_fc_conf *net_fc;
 784
 785         PMD_INIT_FUNC_TRACE();
 786
 787         if (!(dpaa_intf->fc_conf)) {
 788                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 789                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 790                 if (!dpaa_intf->fc_conf) {
 791                         DPAA_PMD_ERR("unable to save flow control info");
 792                         return -ENOMEM;
 793                 }
 794         }
 795         net_fc = dpaa_intf->fc_conf;
 796
 797         if (fc_conf->high_water < fc_conf->low_water) {
 798                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 799                 return -EINVAL;
 800         }
 801
 802         if (fc_conf->mode == RTE_FC_NONE) {
 803                 return 0;
 804         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 805                  fc_conf->mode == RTE_FC_FULL) {
 806                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 807                                          fc_conf->low_water,
 808                                 dpaa_intf->bp_info->bpid);
 809                 if (fc_conf->pause_time)
 810                         fman_if_set_fc_quanta(dpaa_intf->fif,
 811                                               fc_conf->pause_time);
 812         }
 813
 814         /* Save the information in dpaa device */
 815         net_fc->pause_time = fc_conf->pause_time;
 816         net_fc->high_water = fc_conf->high_water;
 817         net_fc->low_water = fc_conf->low_water;
 818         net_fc->send_xon = fc_conf->send_xon;
 819         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 820         net_fc->mode = fc_conf->mode;
 821         net_fc->autoneg = fc_conf->autoneg;
 822
 823         return 0;
 824 }
 825
 826 static int
 827 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 828                    struct rte_eth_fc_conf *fc_conf)
 829 {
 830         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 831         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 832         int ret;
 833
 834         PMD_INIT_FUNC_TRACE();
 835
 836         if (net_fc) {
 837                 fc_conf->pause_time = net_fc->pause_time;
 838                 fc_conf->high_water = net_fc->high_water;
 839                 fc_conf->low_water = net_fc->low_water;
 840                 fc_conf->send_xon = net_fc->send_xon;
 841                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 842                 fc_conf->mode = net_fc->mode;
 843                 fc_conf->autoneg = net_fc->autoneg;
 844                 return 0;
 845         }
 846         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 847         if (ret) {
 848                 fc_conf->mode = RTE_FC_TX_PAUSE;
 849                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 850         } else {
 851                 fc_conf->mode = RTE_FC_NONE;
 852         }
 853
 854         return 0;
 855 }
 856
 857 static int
 858 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 859                              struct ether_addr *addr,
 860                              uint32_t index,
 861                              __rte_unused uint32_t pool)
 862 {
 863         int ret;
 864         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 865
 866         PMD_INIT_FUNC_TRACE();
 867
 868         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 869
 870         if (ret)
 871                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 872                         " err = %d", ret);
 873         return 0;
 874 }
 875
 876 static void
 877 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 878                           uint32_t index)
 879 {
 880         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 881
 882         PMD_INIT_FUNC_TRACE();
 883
 884         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 885 }
 886
 887 static int
 888 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 889                        struct ether_addr *addr)
 890 {
 891         int ret;
 892         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 893
 894         PMD_INIT_FUNC_TRACE();
 895
 896         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 897         if (ret)
 898                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 899
 900         return ret;
 901 }
 902
 903 static struct eth_dev_ops dpaa_devops = {
 904         .dev_configure            = dpaa_eth_dev_configure,
 905         .dev_start                = dpaa_eth_dev_start,
 906         .dev_stop                 = dpaa_eth_dev_stop,
 907         .dev_close                = dpaa_eth_dev_close,
 908         .dev_infos_get            = dpaa_eth_dev_info,
 909         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 910
 911         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 912         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 913         .rx_queue_release         = dpaa_eth_rx_queue_release,
 914         .tx_queue_release         = dpaa_eth_tx_queue_release,
 915         .rx_queue_count           = dpaa_dev_rx_queue_count,
 916
 917         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 918         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 919
 920         .link_update              = dpaa_eth_link_update,
 921         .stats_get                = dpaa_eth_stats_get,
 922         .xstats_get               = dpaa_dev_xstats_get,
 923         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 924         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 925         .xstats_get_names         = dpaa_xstats_get_names,
 926         .xstats_reset             = dpaa_eth_stats_reset,
 927         .stats_reset              = dpaa_eth_stats_reset,
 928         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
 929         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
 930         .allmulticast_enable      = dpaa_eth_multicast_enable,
 931         .allmulticast_disable     = dpaa_eth_multicast_disable,
 932         .mtu_set                  = dpaa_mtu_set,
 933         .dev_set_link_down        = dpaa_link_down,
 934         .dev_set_link_up          = dpaa_link_up,
 935         .mac_addr_add             = dpaa_dev_add_mac_addr,
 936         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
 937         .mac_addr_set             = dpaa_dev_set_mac_addr,
 938
 939         .fw_version_get           = dpaa_fw_version_get,
 940 };
 941
 942 static bool
 943 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
 944 {
 945         if (strcmp(dev->device->driver->name,
 946                    drv->driver.name))
 947                 return false;
 948
 949         return true;
 950 }
 951
 952 static bool
 953 is_dpaa_supported(struct rte_eth_dev *dev)
 954 {
 955         return is_device_supported(dev, &rte_dpaa_pmd);
 956 }
 957
 958 int
 959 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
 960 {
 961         struct rte_eth_dev *dev;
 962         struct dpaa_if *dpaa_intf;
 963
 964         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 965
 966         dev = &rte_eth_devices[port];
 967
 968         if (!is_dpaa_supported(dev))
 969                 return -ENOTSUP;
 970
 971         dpaa_intf = dev->data->dev_private;
 972
 973         if (on)
 974                 fman_if_loopback_enable(dpaa_intf->fif);
 975         else
 976                 fman_if_loopback_disable(dpaa_intf->fif);
 977
 978         return 0;
 979 }
 980
 981 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
 982 {
 983         struct rte_eth_fc_conf *fc_conf;
 984         int ret;
 985
 986         PMD_INIT_FUNC_TRACE();
 987
 988         if (!(dpaa_intf->fc_conf)) {
 989                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 990                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 991                 if (!dpaa_intf->fc_conf) {
 992                         DPAA_PMD_ERR("unable to save flow control info");
 993                         return -ENOMEM;
 994                 }
 995         }
 996         fc_conf = dpaa_intf->fc_conf;
 997         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 998         if (ret) {
 999                 fc_conf->mode = RTE_FC_TX_PAUSE;
1000                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
1001         } else {
1002                 fc_conf->mode = RTE_FC_NONE;
1003         }
1004
1005         return 0;
1006 }
1007
1008 /* Initialise an Rx FQ */
1009 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
1010                               uint32_t fqid)
1011 {
1012         struct qm_mcc_initfq opts = {0};
1013         int ret;
1014         u32 flags = 0;
1015         struct qm_mcc_initcgr cgr_opts = {
1016                 .we_mask = QM_CGR_WE_CS_THRES |
1017                                 QM_CGR_WE_CSTD_EN |
1018                                 QM_CGR_WE_MODE,
1019                 .cgr = {
1020                         .cstd_en = QM_CGR_EN,
1021                         .mode = QMAN_CGR_MODE_FRAME
1022                 }
1023         };
1024
1025         PMD_INIT_FUNC_TRACE();
1026
1027         ret = qman_reserve_fqid(fqid);
1028         if (ret) {
1029                 DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d",
1030                              fqid, ret);
1031                 return -EINVAL;
1032         }
1033
1034         DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
1035         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1036         if (ret) {
1037                 DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d",
1038                         fqid, ret);
1039                 return ret;
1040         }
1041         fq->is_static = false;
1042
1043         dpaa_poll_queue_default_config(&opts);
1044
1045         if (cgr_rx) {
1046                 /* Enable tail drop with cgr on this queue */
1047                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
1048                 cgr_rx->cb = NULL;
1049                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
1050                                       &cgr_opts);
1051                 if (ret) {
1052                         DPAA_PMD_WARN(
1053                                 "rx taildrop init fail on rx fqid 0x%x(ret=%d)",
1054                                 fqid, ret);
1055                         goto without_cgr;
1056                 }
1057                 opts.we_mask |= QM_INITFQ_WE_CGID;
1058                 opts.fqd.cgid = cgr_rx->cgrid;
1059                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
1060         }
1061 without_cgr:
1062         ret = qman_init_fq(fq, flags, &opts);
1063         if (ret)
1064                 DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret);
1065         return ret;
1066 }
1067
1068 /* Initialise a Tx FQ */
1069 static int dpaa_tx_queue_init(struct qman_fq *fq,
1070                               struct fman_if *fman_intf)
1071 {
1072         struct qm_mcc_initfq opts = {0};
1073         int ret;
1074
1075         PMD_INIT_FUNC_TRACE();
1076
1077         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
1078                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
1079         if (ret) {
1080                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
1081                 return ret;
1082         }
1083         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
1084                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
1085         opts.fqd.dest.channel = fman_intf->tx_channel_id;
1086         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
1087         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
1088         opts.fqd.context_b = 0;
1089         /* no tx-confirmation */
1090         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
1091         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
1092         DPAA_PMD_DEBUG("init tx fq %p, fqid 0x%x", fq, fq->fqid);
1093         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
1094         if (ret)
1095                 DPAA_PMD_ERR("init tx fqid 0x%x failed %d", fq->fqid, ret);
1096         return ret;
1097 }
1098
1099 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1100 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
1101 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
1102 {
1103         struct qm_mcc_initfq opts = {0};
1104         int ret;
1105
1106         PMD_INIT_FUNC_TRACE();
1107
1108         ret = qman_reserve_fqid(fqid);
1109         if (ret) {
1110                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
1111                         fqid, ret);
1112                 return -EINVAL;
1113         }
1114         /* "map" this Rx FQ to one of the interfaces Tx FQID */
1115         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
1116         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1117         if (ret) {
1118                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
1119                         fqid, ret);
1120                 return ret;
1121         }
1122         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
1123         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
1124         ret = qman_init_fq(fq, 0, &opts);
1125         if (ret)
1126                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
1127                             fqid, ret);
1128         return ret;
1129 }
1130 #endif
1131
1132 /* Initialise a network interface */
1133 static int
1134 dpaa_dev_init(struct rte_eth_dev *eth_dev)
1135 {
1136         int num_cores, num_rx_fqs, fqid;
1137         int loop, ret = 0;
1138         int dev_id;
1139         struct rte_dpaa_device *dpaa_device;
1140         struct dpaa_if *dpaa_intf;
1141         struct fm_eth_port_cfg *cfg;
1142         struct fman_if *fman_intf;
1143         struct fman_if_bpool *bp, *tmp_bp;
1144         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
1145
1146         PMD_INIT_FUNC_TRACE();
1147
1148         /* For secondary processes, the primary has done all the work */
1149         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1150                 return 0;
1151
1152         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1153         dev_id = dpaa_device->id.dev_id;
1154         dpaa_intf = eth_dev->data->dev_private;
1155         cfg = &dpaa_netcfg->port_cfg[dev_id];
1156         fman_intf = cfg->fman_if;
1157
1158         dpaa_intf->name = dpaa_device->name;
1159
1160         /* save fman_if & cfg in the interface struture */
1161         dpaa_intf->fif = fman_intf;
1162         dpaa_intf->ifid = dev_id;
1163         dpaa_intf->cfg = cfg;
1164
1165         /* Initialize Rx FQ's */
1166         if (default_q) {
1167                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1168         } else {
1169                 if (getenv("DPAA_NUM_RX_QUEUES"))
1170                         num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
1171                 else
1172                         num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1173         }
1174
1175
1176         /* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
1177          * queues.
1178          */
1179         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
1180                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1181                 return -EINVAL;
1182         }
1183
1184         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1185                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1186         if (!dpaa_intf->rx_queues) {
1187                 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
1188                 return -ENOMEM;
1189         }
1190
1191         /* If congestion control is enabled globally*/
1192         if (td_threshold) {
1193                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1194                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1195                 if (!dpaa_intf->cgr_rx) {
1196                         DPAA_PMD_ERR("Failed to alloc mem for cgr_rx\n");
1197                         ret = -ENOMEM;
1198                         goto free_rx;
1199                 }
1200
1201                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1202                 if (ret != num_rx_fqs) {
1203                         DPAA_PMD_WARN("insufficient CGRIDs available");
1204                         ret = -EINVAL;
1205                         goto free_rx;
1206                 }
1207         } else {
1208                 dpaa_intf->cgr_rx = NULL;
1209         }
1210
1211         for (loop = 0; loop < num_rx_fqs; loop++) {
1212                 if (default_q)
1213                         fqid = cfg->rx_def;
1214                 else
1215                         fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid *
1216                                 DPAA_PCD_FQID_MULTIPLIER + loop;
1217
1218                 if (dpaa_intf->cgr_rx)
1219                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1220
1221                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1222                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1223                         fqid);
1224                 if (ret)
1225                         goto free_rx;
1226                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1227         }
1228         dpaa_intf->nb_rx_queues = num_rx_fqs;
1229
1230         /* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
1231         num_cores = rte_lcore_count();
1232         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1233                 num_cores, MAX_CACHELINE);
1234         if (!dpaa_intf->tx_queues) {
1235                 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n");
1236                 ret = -ENOMEM;
1237                 goto free_rx;
1238         }
1239
1240         for (loop = 0; loop < num_cores; loop++) {
1241                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1242                                          fman_intf);
1243                 if (ret)
1244                         goto free_tx;
1245                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1246         }
1247         dpaa_intf->nb_tx_queues = num_cores;
1248
1249 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1250         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1251                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1252         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1253         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1254                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1255         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1256 #endif
1257
1258         DPAA_PMD_DEBUG("All frame queues created");
1259
1260         /* Get the initial configuration for flow control */
1261         dpaa_fc_set_default(dpaa_intf);
1262
1263         /* reset bpool list, initialize bpool dynamically */
1264         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1265                 list_del(&bp->node);
1266                 free(bp);
1267         }
1268
1269         /* Populate ethdev structure */
1270         eth_dev->dev_ops = &dpaa_devops;
1271         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1272         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1273
1274         /* Allocate memory for storing MAC addresses */
1275         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1276                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1277         if (eth_dev->data->mac_addrs == NULL) {
1278                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1279                                                 "store MAC addresses",
1280                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1281                 ret = -ENOMEM;
1282                 goto free_tx;
1283         }
1284
1285         /* copy the primary mac address */
1286         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1287
1288         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1289                 dpaa_device->name,
1290                 fman_intf->mac_addr.addr_bytes[0],
1291                 fman_intf->mac_addr.addr_bytes[1],
1292                 fman_intf->mac_addr.addr_bytes[2],
1293                 fman_intf->mac_addr.addr_bytes[3],
1294                 fman_intf->mac_addr.addr_bytes[4],
1295                 fman_intf->mac_addr.addr_bytes[5]);
1296
1297         /* Disable RX mode */
1298         fman_if_discard_rx_errors(fman_intf);
1299         fman_if_disable_rx(fman_intf);
1300         /* Disable promiscuous mode */
1301         fman_if_promiscuous_disable(fman_intf);
1302         /* Disable multicast */
1303         fman_if_reset_mcast_filter_table(fman_intf);
1304         /* Reset interface statistics */
1305         fman_if_stats_reset(fman_intf);
1306
1307         return 0;
1308
1309 free_tx:
1310         rte_free(dpaa_intf->tx_queues);
1311         dpaa_intf->tx_queues = NULL;
1312         dpaa_intf->nb_tx_queues = 0;
1313
1314 free_rx:
1315         rte_free(dpaa_intf->cgr_rx);
1316         rte_free(dpaa_intf->rx_queues);
1317         dpaa_intf->rx_queues = NULL;
1318         dpaa_intf->nb_rx_queues = 0;
1319         return ret;
1320 }
1321
1322 static int
1323 dpaa_dev_uninit(struct rte_eth_dev *dev)
1324 {
1325         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1326         int loop;
1327
1328         PMD_INIT_FUNC_TRACE();
1329
1330         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1331                 return -EPERM;
1332
1333         if (!dpaa_intf) {
1334                 DPAA_PMD_WARN("Already closed or not started");
1335                 return -1;
1336         }
1337
1338         dpaa_eth_dev_close(dev);
1339
1340         /* release configuration memory */
1341         if (dpaa_intf->fc_conf)
1342                 rte_free(dpaa_intf->fc_conf);
1343
1344         /* Release RX congestion Groups */
1345         if (dpaa_intf->cgr_rx) {
1346                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1347                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1348
1349                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1350                                          dpaa_intf->nb_rx_queues);
1351         }
1352
1353         rte_free(dpaa_intf->cgr_rx);
1354         dpaa_intf->cgr_rx = NULL;
1355
1356         rte_free(dpaa_intf->rx_queues);
1357         dpaa_intf->rx_queues = NULL;
1358
1359         rte_free(dpaa_intf->tx_queues);
1360         dpaa_intf->tx_queues = NULL;
1361
1362         /* free memory for storing MAC addresses */
1363         rte_free(dev->data->mac_addrs);
1364         dev->data->mac_addrs = NULL;
1365
1366         dev->dev_ops = NULL;
1367         dev->rx_pkt_burst = NULL;
1368         dev->tx_pkt_burst = NULL;
1369
1370         return 0;
1371 }
1372
1373 static int
1374 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
1375                struct rte_dpaa_device *dpaa_dev)
1376 {
1377         int diag;
1378         int ret;
1379         struct rte_eth_dev *eth_dev;
1380
1381         PMD_INIT_FUNC_TRACE();
1382
1383         /* In case of secondary process, the device is already configured
1384          * and no further action is required, except portal initialization
1385          * and verifying secondary attachment to port name.
1386          */
1387         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1388                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1389                 if (!eth_dev)
1390                         return -ENOMEM;
1391                 eth_dev->device = &dpaa_dev->device;
1392                 eth_dev->dev_ops = &dpaa_devops;
1393                 rte_eth_dev_probing_finish(eth_dev);
1394                 return 0;
1395         }
1396
1397         if (!is_global_init) {
1398                 /* One time load of Qman/Bman drivers */
1399                 ret = qman_global_init();
1400                 if (ret) {
1401                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1402                                      ret);
1403                         return ret;
1404                 }
1405                 ret = bman_global_init();
1406                 if (ret) {
1407                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1408                                      ret);
1409                         return ret;
1410                 }
1411
1412                 if (access("/tmp/fmc.bin", F_OK) == -1) {
1413                         RTE_LOG(INFO, PMD,
1414                                 "* FMC not configured.Enabling default mode\n");
1415                         default_q = 1;
1416                 }
1417
1418                 /* disabling the default push mode for LS1043 */
1419                 if (dpaa_svr_family == SVR_LS1043A_FAMILY)
1420                         dpaa_push_mode_max_queue = 0;
1421
1422                 /* if push mode queues to be enabled. Currenly we are allowing
1423                  * only one queue per thread.
1424                  */
1425                 if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
1426                         dpaa_push_mode_max_queue =
1427                                         atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
1428                         if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
1429                             dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
1430                 }
1431
1432                 is_global_init = 1;
1433         }
1434
1435         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
1436                 ret = rte_dpaa_portal_init((void *)1);
1437                 if (ret) {
1438                         DPAA_PMD_ERR("Unable to initialize portal");
1439                         return ret;
1440                 }
1441         }
1442
1443         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1444         if (eth_dev == NULL)
1445                 return -ENOMEM;
1446
1447         eth_dev->data->dev_private = rte_zmalloc(
1448                                         "ethdev private structure",
1449                                         sizeof(struct dpaa_if),
1450                                         RTE_CACHE_LINE_SIZE);
1451         if (!eth_dev->data->dev_private) {
1452                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1453                 rte_eth_dev_release_port(eth_dev);
1454                 return -ENOMEM;
1455         }
1456
1457         eth_dev->device = &dpaa_dev->device;
1458         dpaa_dev->eth_dev = eth_dev;
1459
1460         /* Invoke PMD device initialization function */
1461         diag = dpaa_dev_init(eth_dev);
1462         if (diag == 0) {
1463                 rte_eth_dev_probing_finish(eth_dev);
1464                 return 0;
1465         }
1466
1467         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1468                 rte_free(eth_dev->data->dev_private);
1469
1470         rte_eth_dev_release_port(eth_dev);
1471         return diag;
1472 }
1473
1474 static int
1475 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1476 {
1477         struct rte_eth_dev *eth_dev;
1478
1479         PMD_INIT_FUNC_TRACE();
1480
1481         eth_dev = dpaa_dev->eth_dev;
1482         dpaa_dev_uninit(eth_dev);
1483
1484         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1485                 rte_free(eth_dev->data->dev_private);
1486
1487         rte_eth_dev_release_port(eth_dev);
1488
1489         return 0;
1490 }
1491
1492 static struct rte_dpaa_driver rte_dpaa_pmd = {
1493         .drv_type = FSL_DPAA_ETH,
1494         .probe = rte_dpaa_probe,
1495         .remove = rte_dpaa_remove,
1496 };
1497
1498 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);