drivers/net/dpaa/dpaa_rxtx.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   5  *   Copyright 2017 NXP.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef __DPDK_RXTX_H__
  35 #define __DPDK_RXTX_H__
  36
  37 /* internal offset from where IC is copied to packet buffer*/
  38 #define DEFAULT_ICIOF          32
  39 /* IC transfer size */
  40 #define DEFAULT_ICSZ    48
  41
  42 /* IC offsets from buffer header address */
  43 #define DEFAULT_RX_ICEOF        16
  44
  45 #define DPAA_MAX_DEQUEUE_NUM_FRAMES    63
  46         /** <Maximum number of frames to be dequeued in a single rx call*/
  47
  48 /* FD structure masks and offset */
  49 #define DPAA_FD_FORMAT_MASK 0xE0000000
  50 #define DPAA_FD_OFFSET_MASK 0x1FF00000
  51 #define DPAA_FD_LENGTH_MASK 0xFFFFF
  52 #define DPAA_FD_FORMAT_SHIFT 29
  53 #define DPAA_FD_OFFSET_SHIFT 20
  54
  55 /* Parsing mask (Little Endian) - 0x00E044ED00800000
  56  *      Classification Plan ID 0x00
  57  *      L4R 0xE0 -
  58  *              0x20 - TCP
  59  *              0x40 - UDP
  60  *              0x80 - SCTP
  61  *      L3R 0xEDC4 (in Big Endian) -
  62  *              0x8000 - IPv4
  63  *              0x4000 - IPv6
  64  *              0x8140 - IPv4 Ext + Frag
  65  *              0x8040 - IPv4 Frag
  66  *              0x8100 - IPv4 Ext
  67  *              0x4140 - IPv6 Ext + Frag
  68  *              0x4040 - IPv6 Frag
  69  *              0x4100 - IPv6 Ext
  70  *      L2R 0x8000 (in Big Endian) -
  71  *              0x8000 - Ethernet type
  72  *      ShimR & Logical Port ID 0x0000
  73  */
  74 #define DPAA_PARSE_MASK                 0x00E044ED00800000
  75 #define DPAA_PARSE_VLAN_MASK            0x0000000000700000
  76
  77 /* Parsed values (Little Endian) */
  78 #define DPAA_PKT_TYPE_NONE              0x0000000000000000
  79 #define DPAA_PKT_TYPE_ETHER             0x0000000000800000
  80 #define DPAA_PKT_TYPE_IPV4 \
  81                         (0x0000008000000000 | DPAA_PKT_TYPE_ETHER)
  82 #define DPAA_PKT_TYPE_IPV6 \
  83                         (0x0000004000000000 | DPAA_PKT_TYPE_ETHER)
  84 #define DPAA_PKT_TYPE_GRE \
  85                         (0x0000002000000000 | DPAA_PKT_TYPE_ETHER)
  86 #define DPAA_PKT_TYPE_IPV4_FRAG \
  87                         (0x0000400000000000 | DPAA_PKT_TYPE_IPV4)
  88 #define DPAA_PKT_TYPE_IPV6_FRAG \
  89                         (0x0000400000000000 | DPAA_PKT_TYPE_IPV6)
  90 #define DPAA_PKT_TYPE_IPV4_EXT \
  91                         (0x0000000100000000 | DPAA_PKT_TYPE_IPV4)
  92 #define DPAA_PKT_TYPE_IPV6_EXT \
  93                         (0x0000000100000000 | DPAA_PKT_TYPE_IPV6)
  94 #define DPAA_PKT_TYPE_IPV4_TCP \
  95                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4)
  96 #define DPAA_PKT_TYPE_IPV6_TCP \
  97                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6)
  98 #define DPAA_PKT_TYPE_IPV4_UDP \
  99                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4)
 100 #define DPAA_PKT_TYPE_IPV6_UDP \
 101                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6)
 102 #define DPAA_PKT_TYPE_IPV4_SCTP \
 103                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV4)
 104 #define DPAA_PKT_TYPE_IPV6_SCTP \
 105                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV6)
 106 #define DPAA_PKT_TYPE_IPV4_FRAG_TCP \
 107                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
 108 #define DPAA_PKT_TYPE_IPV6_FRAG_TCP \
 109                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 110 #define DPAA_PKT_TYPE_IPV4_FRAG_UDP \
 111                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
 112 #define DPAA_PKT_TYPE_IPV6_FRAG_UDP \
 113                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 114 #define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \
 115                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
 116 #define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \
 117                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
 118 #define DPAA_PKT_TYPE_IPV4_EXT_UDP \
 119                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
 120 #define DPAA_PKT_TYPE_IPV6_EXT_UDP \
 121                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
 122 #define DPAA_PKT_TYPE_IPV4_EXT_TCP \
 123                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
 124 #define DPAA_PKT_TYPE_IPV6_EXT_TCP \
 125                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
 126 #define DPAA_PKT_TYPE_TUNNEL_4_4 \
 127                         (0x0000000800000000 | DPAA_PKT_TYPE_IPV4)
 128 #define DPAA_PKT_TYPE_TUNNEL_6_6 \
 129                         (0x0000000400000000 | DPAA_PKT_TYPE_IPV6)
 130 #define DPAA_PKT_TYPE_TUNNEL_4_6 \
 131                         (0x0000000400000000 | DPAA_PKT_TYPE_IPV4)
 132 #define DPAA_PKT_TYPE_TUNNEL_6_4 \
 133                         (0x0000000800000000 | DPAA_PKT_TYPE_IPV6)
 134 #define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \
 135                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
 136 #define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \
 137                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
 138 #define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \
 139                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
 140 #define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \
 141                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
 142 #define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \
 143                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
 144 #define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \
 145                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
 146 #define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \
 147                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
 148 #define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
 149                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
 150 #define DPAA_PKT_L3_LEN_SHIFT   7
 151
 152 /**
 153  * FMan parse result array
 154  */
 155 struct dpaa_eth_parse_results_t {
 156          uint8_t     lpid;               /**< Logical port id */
 157          uint8_t     shimr;              /**< Shim header result  */
 158          union {
 159                 uint16_t              l2r;      /**< Layer 2 result */
 160                 struct {
 161 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 162                         uint16_t      ethernet:1;
 163                         uint16_t      vlan:1;
 164                         uint16_t      llc_snap:1;
 165                         uint16_t      mpls:1;
 166                         uint16_t      ppoe_ppp:1;
 167                         uint16_t      unused_1:3;
 168                         uint16_t      unknown_eth_proto:1;
 169                         uint16_t      eth_frame_type:2;
 170                         uint16_t      l2r_err:5;
 171                         /*00-unicast, 01-multicast, 11-broadcast*/
 172 #else
 173                         uint16_t      l2r_err:5;
 174                         uint16_t      eth_frame_type:2;
 175                         uint16_t      unknown_eth_proto:1;
 176                         uint16_t      unused_1:3;
 177                         uint16_t      ppoe_ppp:1;
 178                         uint16_t      mpls:1;
 179                         uint16_t      llc_snap:1;
 180                         uint16_t      vlan:1;
 181                         uint16_t      ethernet:1;
 182 #endif
 183                 } __attribute__((__packed__));
 184          } __attribute__((__packed__));
 185          union {
 186                 uint16_t              l3r;      /**< Layer 3 result */
 187                 struct {
 188 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 189                         uint16_t      first_ipv4:1;
 190                         uint16_t      first_ipv6:1;
 191                         uint16_t      gre:1;
 192                         uint16_t      min_enc:1;
 193                         uint16_t      last_ipv4:1;
 194                         uint16_t      last_ipv6:1;
 195                         uint16_t      first_info_err:1;/*0 info, 1 error*/
 196                         uint16_t      first_ip_err_code:5;
 197                         uint16_t      last_info_err:1;  /*0 info, 1 error*/
 198                         uint16_t      last_ip_err_code:3;
 199 #else
 200                         uint16_t      last_ip_err_code:3;
 201                         uint16_t      last_info_err:1;  /*0 info, 1 error*/
 202                         uint16_t      first_ip_err_code:5;
 203                         uint16_t      first_info_err:1;/*0 info, 1 error*/
 204                         uint16_t      last_ipv6:1;
 205                         uint16_t      last_ipv4:1;
 206                         uint16_t      min_enc:1;
 207                         uint16_t      gre:1;
 208                         uint16_t      first_ipv6:1;
 209                         uint16_t      first_ipv4:1;
 210 #endif
 211                 } __attribute__((__packed__));
 212          } __attribute__((__packed__));
 213          union {
 214                 uint8_t               l4r;      /**< Layer 4 result */
 215                 struct{
 216 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 217                         uint8_t        l4_type:3;
 218                         uint8_t        l4_info_err:1;
 219                         uint8_t        l4_result:4;
 220                                         /* if type IPSec: 1 ESP, 2 AH */
 221 #else
 222                         uint8_t        l4_result:4;
 223                                         /* if type IPSec: 1 ESP, 2 AH */
 224                         uint8_t        l4_info_err:1;
 225                         uint8_t        l4_type:3;
 226 #endif
 227                 } __attribute__((__packed__));
 228          } __attribute__((__packed__));
 229          uint8_t     cplan;              /**< Classification plan id */
 230          uint16_t    nxthdr;             /**< Next Header  */
 231          uint16_t    cksum;              /**< Checksum */
 232          uint32_t    lcv;                /**< LCV */
 233          uint8_t     shim_off[3];        /**< Shim offset */
 234          uint8_t     eth_off;            /**< ETH offset */
 235          uint8_t     llc_snap_off;       /**< LLC_SNAP offset */
 236          uint8_t     vlan_off[2];        /**< VLAN offset */
 237          uint8_t     etype_off;          /**< ETYPE offset */
 238          uint8_t     pppoe_off;          /**< PPP offset */
 239          uint8_t     mpls_off[2];        /**< MPLS offset */
 240          uint8_t     ip_off[2];          /**< IP offset */
 241          uint8_t     gre_off;            /**< GRE offset */
 242          uint8_t     l4_off;             /**< Layer 4 offset */
 243          uint8_t     nxthdr_off;         /**< Parser end point */
 244 } __attribute__ ((__packed__));
 245
 246 /* The structure is the Prepended Data to the Frame which is used by FMAN */
 247 struct annotations_t {
 248         uint8_t reserved[DEFAULT_RX_ICEOF];
 249         struct dpaa_eth_parse_results_t parse;  /**< Pointer to Parsed result*/
 250         uint64_t reserved1;
 251         uint64_t hash;                  /**< Hash Result */
 252 };
 253
 254 #define GET_ANNOTATIONS(_buf) \
 255         (struct annotations_t *)(_buf)
 256
 257 #define GET_RX_PRS(_buf) \
 258         (struct dpaa_eth_parse_results_t *)((uint8_t *)_buf + DEFAULT_RX_ICEOF)
 259
 260 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 261
 262 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
 263
 264 uint16_t dpaa_eth_tx_drop_all(void *q  __rte_unused,
 265                               struct rte_mbuf **bufs __rte_unused,
 266                               uint16_t nb_bufs __rte_unused);
 267 #endif