net/dpaa: support checksum offload
[dpdk.git] / drivers / net / dpaa / dpaa_rxtx.h
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
5  *   Copyright 2017 NXP.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of  Freescale Semiconductor, Inc nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #ifndef __DPDK_RXTX_H__
35 #define __DPDK_RXTX_H__
36
37 /* internal offset from where IC is copied to packet buffer*/
38 #define DEFAULT_ICIOF          32
39 /* IC transfer size */
40 #define DEFAULT_ICSZ    48
41
42 /* IC offsets from buffer header address */
43 #define DEFAULT_RX_ICEOF        16
44 #define DEFAULT_TX_ICEOF        16
45
46 /*
47  * Values for the L3R field of the FM Parse Results
48  */
49 /* L3 Type field: First IP Present IPv4 */
50 #define DPAA_L3_PARSE_RESULT_IPV4 0x80
51 /* L3 Type field: First IP Present IPv6 */
52 #define DPAA_L3_PARSE_RESULT_IPV6       0x40
53 /* Values for the L4R field of the FM Parse Results
54  * See $8.8.4.7.20 - L4 HXS - L4 Results from DPAA-Rev2 Reference Manual.
55  */
56 /* L4 Type field: UDP */
57 #define DPAA_L4_PARSE_RESULT_UDP        0x40
58 /* L4 Type field: TCP */
59 #define DPAA_L4_PARSE_RESULT_TCP        0x20
60
61 #define DPAA_MAX_DEQUEUE_NUM_FRAMES    63
62         /** <Maximum number of frames to be dequeued in a single rx call*/
63
64 /* FD structure masks and offset */
65 #define DPAA_FD_FORMAT_MASK 0xE0000000
66 #define DPAA_FD_OFFSET_MASK 0x1FF00000
67 #define DPAA_FD_LENGTH_MASK 0xFFFFF
68 #define DPAA_FD_FORMAT_SHIFT 29
69 #define DPAA_FD_OFFSET_SHIFT 20
70
71 /* Parsing mask (Little Endian) - 0x00E044ED00800000
72  *      Classification Plan ID 0x00
73  *      L4R 0xE0 -
74  *              0x20 - TCP
75  *              0x40 - UDP
76  *              0x80 - SCTP
77  *      L3R 0xEDC4 (in Big Endian) -
78  *              0x8000 - IPv4
79  *              0x4000 - IPv6
80  *              0x8140 - IPv4 Ext + Frag
81  *              0x8040 - IPv4 Frag
82  *              0x8100 - IPv4 Ext
83  *              0x4140 - IPv6 Ext + Frag
84  *              0x4040 - IPv6 Frag
85  *              0x4100 - IPv6 Ext
86  *      L2R 0x8000 (in Big Endian) -
87  *              0x8000 - Ethernet type
88  *      ShimR & Logical Port ID 0x0000
89  */
90 #define DPAA_PARSE_MASK                 0x00E044ED00800000
91 #define DPAA_PARSE_VLAN_MASK            0x0000000000700000
92
93 /* Parsed values (Little Endian) */
94 #define DPAA_PKT_TYPE_NONE              0x0000000000000000
95 #define DPAA_PKT_TYPE_ETHER             0x0000000000800000
96 #define DPAA_PKT_TYPE_IPV4 \
97                         (0x0000008000000000 | DPAA_PKT_TYPE_ETHER)
98 #define DPAA_PKT_TYPE_IPV6 \
99                         (0x0000004000000000 | DPAA_PKT_TYPE_ETHER)
100 #define DPAA_PKT_TYPE_GRE \
101                         (0x0000002000000000 | DPAA_PKT_TYPE_ETHER)
102 #define DPAA_PKT_TYPE_IPV4_FRAG \
103                         (0x0000400000000000 | DPAA_PKT_TYPE_IPV4)
104 #define DPAA_PKT_TYPE_IPV6_FRAG \
105                         (0x0000400000000000 | DPAA_PKT_TYPE_IPV6)
106 #define DPAA_PKT_TYPE_IPV4_EXT \
107                         (0x0000000100000000 | DPAA_PKT_TYPE_IPV4)
108 #define DPAA_PKT_TYPE_IPV6_EXT \
109                         (0x0000000100000000 | DPAA_PKT_TYPE_IPV6)
110 #define DPAA_PKT_TYPE_IPV4_TCP \
111                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4)
112 #define DPAA_PKT_TYPE_IPV6_TCP \
113                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6)
114 #define DPAA_PKT_TYPE_IPV4_UDP \
115                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4)
116 #define DPAA_PKT_TYPE_IPV6_UDP \
117                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6)
118 #define DPAA_PKT_TYPE_IPV4_SCTP \
119                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV4)
120 #define DPAA_PKT_TYPE_IPV6_SCTP \
121                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV6)
122 #define DPAA_PKT_TYPE_IPV4_FRAG_TCP \
123                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
124 #define DPAA_PKT_TYPE_IPV6_FRAG_TCP \
125                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
126 #define DPAA_PKT_TYPE_IPV4_FRAG_UDP \
127                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
128 #define DPAA_PKT_TYPE_IPV6_FRAG_UDP \
129                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
130 #define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \
131                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
132 #define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \
133                         (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
134 #define DPAA_PKT_TYPE_IPV4_EXT_UDP \
135                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
136 #define DPAA_PKT_TYPE_IPV6_EXT_UDP \
137                         (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
138 #define DPAA_PKT_TYPE_IPV4_EXT_TCP \
139                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
140 #define DPAA_PKT_TYPE_IPV6_EXT_TCP \
141                         (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
142 #define DPAA_PKT_TYPE_TUNNEL_4_4 \
143                         (0x0000000800000000 | DPAA_PKT_TYPE_IPV4)
144 #define DPAA_PKT_TYPE_TUNNEL_6_6 \
145                         (0x0000000400000000 | DPAA_PKT_TYPE_IPV6)
146 #define DPAA_PKT_TYPE_TUNNEL_4_6 \
147                         (0x0000000400000000 | DPAA_PKT_TYPE_IPV4)
148 #define DPAA_PKT_TYPE_TUNNEL_6_4 \
149                         (0x0000000800000000 | DPAA_PKT_TYPE_IPV6)
150 #define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \
151                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
152 #define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \
153                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
154 #define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \
155                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
156 #define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \
157                         (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
158 #define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \
159                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
160 #define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \
161                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
162 #define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \
163                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
164 #define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
165                         (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
166 #define DPAA_PKT_L3_LEN_SHIFT   7
167
168 /**
169  * FMan parse result array
170  */
171 struct dpaa_eth_parse_results_t {
172          uint8_t     lpid;               /**< Logical port id */
173          uint8_t     shimr;              /**< Shim header result  */
174          union {
175                 uint16_t              l2r;      /**< Layer 2 result */
176                 struct {
177 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
178                         uint16_t      ethernet:1;
179                         uint16_t      vlan:1;
180                         uint16_t      llc_snap:1;
181                         uint16_t      mpls:1;
182                         uint16_t      ppoe_ppp:1;
183                         uint16_t      unused_1:3;
184                         uint16_t      unknown_eth_proto:1;
185                         uint16_t      eth_frame_type:2;
186                         uint16_t      l2r_err:5;
187                         /*00-unicast, 01-multicast, 11-broadcast*/
188 #else
189                         uint16_t      l2r_err:5;
190                         uint16_t      eth_frame_type:2;
191                         uint16_t      unknown_eth_proto:1;
192                         uint16_t      unused_1:3;
193                         uint16_t      ppoe_ppp:1;
194                         uint16_t      mpls:1;
195                         uint16_t      llc_snap:1;
196                         uint16_t      vlan:1;
197                         uint16_t      ethernet:1;
198 #endif
199                 } __attribute__((__packed__));
200          } __attribute__((__packed__));
201          union {
202                 uint16_t              l3r;      /**< Layer 3 result */
203                 struct {
204 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
205                         uint16_t      first_ipv4:1;
206                         uint16_t      first_ipv6:1;
207                         uint16_t      gre:1;
208                         uint16_t      min_enc:1;
209                         uint16_t      last_ipv4:1;
210                         uint16_t      last_ipv6:1;
211                         uint16_t      first_info_err:1;/*0 info, 1 error*/
212                         uint16_t      first_ip_err_code:5;
213                         uint16_t      last_info_err:1;  /*0 info, 1 error*/
214                         uint16_t      last_ip_err_code:3;
215 #else
216                         uint16_t      last_ip_err_code:3;
217                         uint16_t      last_info_err:1;  /*0 info, 1 error*/
218                         uint16_t      first_ip_err_code:5;
219                         uint16_t      first_info_err:1;/*0 info, 1 error*/
220                         uint16_t      last_ipv6:1;
221                         uint16_t      last_ipv4:1;
222                         uint16_t      min_enc:1;
223                         uint16_t      gre:1;
224                         uint16_t      first_ipv6:1;
225                         uint16_t      first_ipv4:1;
226 #endif
227                 } __attribute__((__packed__));
228          } __attribute__((__packed__));
229          union {
230                 uint8_t               l4r;      /**< Layer 4 result */
231                 struct{
232 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
233                         uint8_t        l4_type:3;
234                         uint8_t        l4_info_err:1;
235                         uint8_t        l4_result:4;
236                                         /* if type IPSec: 1 ESP, 2 AH */
237 #else
238                         uint8_t        l4_result:4;
239                                         /* if type IPSec: 1 ESP, 2 AH */
240                         uint8_t        l4_info_err:1;
241                         uint8_t        l4_type:3;
242 #endif
243                 } __attribute__((__packed__));
244          } __attribute__((__packed__));
245          uint8_t     cplan;              /**< Classification plan id */
246          uint16_t    nxthdr;             /**< Next Header  */
247          uint16_t    cksum;              /**< Checksum */
248          uint32_t    lcv;                /**< LCV */
249          uint8_t     shim_off[3];        /**< Shim offset */
250          uint8_t     eth_off;            /**< ETH offset */
251          uint8_t     llc_snap_off;       /**< LLC_SNAP offset */
252          uint8_t     vlan_off[2];        /**< VLAN offset */
253          uint8_t     etype_off;          /**< ETYPE offset */
254          uint8_t     pppoe_off;          /**< PPP offset */
255          uint8_t     mpls_off[2];        /**< MPLS offset */
256          uint8_t     ip_off[2];          /**< IP offset */
257          uint8_t     gre_off;            /**< GRE offset */
258          uint8_t     l4_off;             /**< Layer 4 offset */
259          uint8_t     nxthdr_off;         /**< Parser end point */
260 } __attribute__ ((__packed__));
261
262 /* The structure is the Prepended Data to the Frame which is used by FMAN */
263 struct annotations_t {
264         uint8_t reserved[DEFAULT_RX_ICEOF];
265         struct dpaa_eth_parse_results_t parse;  /**< Pointer to Parsed result*/
266         uint64_t reserved1;
267         uint64_t hash;                  /**< Hash Result */
268 };
269
270 #define GET_ANNOTATIONS(_buf) \
271         (struct annotations_t *)(_buf)
272
273 #define GET_RX_PRS(_buf) \
274         (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
275         DEFAULT_RX_ICEOF)
276
277 #define GET_TX_PRS(_buf) \
278         (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
279         DEFAULT_TX_ICEOF)
280
281 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
282
283 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
284
285 uint16_t dpaa_eth_tx_drop_all(void *q  __rte_unused,
286                               struct rte_mbuf **bufs __rte_unused,
287                               uint16_t nb_bufs __rte_unused);
288 #endif