4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_ethdev.h>
46 #include <rte_fslmc.h>
48 #include <fslmc_logs.h>
49 #include <fslmc_vfio.h>
50 #include <dpaa2_hw_pvt.h>
51 #include <dpaa2_hw_mempool.h>
53 #include "dpaa2_ethdev.h"
55 static struct rte_dpaa2_driver rte_dpaa2_pmd;
58 * Atomically reads the link status information from global
59 * structure rte_eth_dev.
62 * - Pointer to the structure rte_eth_dev to read from.
63 * - Pointer to the buffer to be saved with the link status.
67 * - On failure, negative value.
70 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
71 struct rte_eth_link *link)
73 struct rte_eth_link *dst = link;
74 struct rte_eth_link *src = &dev->data->dev_link;
76 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
77 *(uint64_t *)src) == 0)
84 * Atomically writes the link status information into global
85 * structure rte_eth_dev.
88 * - Pointer to the structure rte_eth_dev to read from.
89 * - Pointer to the buffer to be saved with the link status.
93 * - On failure, negative value.
96 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
97 struct rte_eth_link *link)
99 struct rte_eth_link *dst = &dev->data->dev_link;
100 struct rte_eth_link *src = link;
102 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
103 *(uint64_t *)src) == 0)
110 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
112 struct dpaa2_dev_priv *priv = dev->data->dev_private;
114 PMD_INIT_FUNC_TRACE();
116 dev_info->if_index = priv->hw_id;
118 dev_info->max_mac_addrs = priv->max_mac_filters;
119 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
120 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
121 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
122 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
123 dev_info->rx_offload_capa =
124 DEV_RX_OFFLOAD_IPV4_CKSUM |
125 DEV_RX_OFFLOAD_UDP_CKSUM |
126 DEV_RX_OFFLOAD_TCP_CKSUM |
127 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
128 dev_info->tx_offload_capa =
129 DEV_TX_OFFLOAD_IPV4_CKSUM |
130 DEV_TX_OFFLOAD_UDP_CKSUM |
131 DEV_TX_OFFLOAD_TCP_CKSUM |
132 DEV_TX_OFFLOAD_SCTP_CKSUM |
133 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
134 dev_info->speed_capa = ETH_LINK_SPEED_1G |
135 ETH_LINK_SPEED_2_5G |
140 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
142 struct dpaa2_dev_priv *priv = dev->data->dev_private;
145 struct dpaa2_queue *mc_q, *mcq;
148 struct dpaa2_queue *dpaa2_q;
150 PMD_INIT_FUNC_TRACE();
152 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
153 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
154 RTE_CACHE_LINE_SIZE);
156 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
160 for (i = 0; i < priv->nb_rx_queues; i++) {
162 priv->rx_vq[i] = mc_q++;
163 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
164 dpaa2_q->q_storage = rte_malloc("dq_storage",
165 sizeof(struct queue_storage_info_t),
166 RTE_CACHE_LINE_SIZE);
167 if (!dpaa2_q->q_storage)
170 memset(dpaa2_q->q_storage, 0,
171 sizeof(struct queue_storage_info_t));
172 dpaa2_q->q_storage->dq_storage[0] = rte_malloc(NULL,
173 DPAA2_DQRR_RING_SIZE * sizeof(struct qbman_result),
174 RTE_CACHE_LINE_SIZE);
177 for (i = 0; i < priv->nb_tx_queues; i++) {
179 mc_q->flow_id = DPNI_NEW_FLOW_ID;
180 priv->tx_vq[i] = mc_q++;
184 for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
186 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
187 mcq->tc_index = DPAA2_DEF_TC;
188 mcq->flow_id = dist_idx;
195 mc_q = priv->rx_vq[0];
197 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
198 rte_free(dpaa2_q->q_storage->dq_storage[0]);
199 rte_free(dpaa2_q->q_storage);
200 priv->rx_vq[i--] = NULL;
207 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
209 struct rte_eth_dev_data *data = dev->data;
210 struct rte_eth_conf *eth_conf = &data->dev_conf;
213 PMD_INIT_FUNC_TRACE();
215 /* Check for correct configuration */
216 if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
217 data->nb_rx_queues > 1) {
218 PMD_INIT_LOG(ERR, "Distribution is not enabled, "
219 "but Rx queues more than 1\n");
223 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
224 /* Return in case number of Rx queues is 1 */
225 if (data->nb_rx_queues == 1)
227 ret = dpaa2_setup_flow_dist(dev,
228 eth_conf->rx_adv_conf.rss_conf.rss_hf);
230 PMD_INIT_LOG(ERR, "unable to set flow distribution."
231 "please check queue config\n");
238 /* Function to setup RX flow information. It contains traffic class ID,
239 * flow ID, destination configuration etc.
242 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
243 uint16_t rx_queue_id,
244 uint16_t nb_rx_desc __rte_unused,
245 unsigned int socket_id __rte_unused,
246 const struct rte_eth_rxconf *rx_conf __rte_unused,
247 struct rte_mempool *mb_pool)
249 struct dpaa2_dev_priv *priv = dev->data->dev_private;
250 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
251 struct dpaa2_queue *dpaa2_q;
252 struct dpni_queue cfg;
258 PMD_INIT_FUNC_TRACE();
260 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
261 dev, rx_queue_id, mb_pool, rx_conf);
263 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
264 bpid = mempool_to_bpid(mb_pool);
265 ret = dpaa2_attach_bp_list(priv,
266 rte_dpaa2_bpid_info[bpid].bp_list);
270 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
271 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
273 /*Get the tc id and flow id from given VQ id*/
274 flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
275 memset(&cfg, 0, sizeof(struct dpni_queue));
277 options = options | DPNI_QUEUE_OPT_USER_CTX;
278 cfg.user_context = (uint64_t)(dpaa2_q);
280 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
281 dpaa2_q->tc_index, flow_id, options, &cfg);
283 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
287 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
292 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
293 uint16_t tx_queue_id,
294 uint16_t nb_tx_desc __rte_unused,
295 unsigned int socket_id __rte_unused,
296 const struct rte_eth_txconf *tx_conf __rte_unused)
298 struct dpaa2_dev_priv *priv = dev->data->dev_private;
299 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
300 priv->tx_vq[tx_queue_id];
301 struct fsl_mc_io *dpni = priv->hw;
302 struct dpni_queue tx_conf_cfg;
303 struct dpni_queue tx_flow_cfg;
304 uint8_t options = 0, flow_id;
308 PMD_INIT_FUNC_TRACE();
310 /* Return if queue already configured */
311 if (dpaa2_q->flow_id != DPNI_NEW_FLOW_ID)
314 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
315 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
317 if (priv->num_tc == 1) {
319 flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
325 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
326 tc_id, flow_id, options, &tx_flow_cfg);
328 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
329 "tc_id=%d, flow =%d ErrorCode = %x\n",
330 tc_id, flow_id, -ret);
334 dpaa2_q->flow_id = flow_id;
336 if (tx_queue_id == 0) {
337 /*Set tx-conf and error configuration*/
338 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
342 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
343 " ErrorCode = %x", ret);
347 dpaa2_q->tc_index = tc_id;
349 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
354 dpaa2_dev_rx_queue_release(void *q __rte_unused)
356 PMD_INIT_FUNC_TRACE();
360 dpaa2_dev_tx_queue_release(void *q __rte_unused)
362 PMD_INIT_FUNC_TRACE();
365 static const uint32_t *
366 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
368 static const uint32_t ptypes[] = {
369 /*todo -= add more types */
372 RTE_PTYPE_L3_IPV4_EXT,
374 RTE_PTYPE_L3_IPV6_EXT,
382 if (dev->rx_pkt_burst == dpaa2_dev_rx)
388 dpaa2_dev_start(struct rte_eth_dev *dev)
390 struct rte_eth_dev_data *data = dev->data;
391 struct dpaa2_dev_priv *priv = data->dev_private;
392 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
393 struct dpni_queue cfg;
394 struct dpni_error_cfg err_cfg;
396 struct dpni_queue_id qid;
397 struct dpaa2_queue *dpaa2_q;
400 PMD_INIT_FUNC_TRACE();
402 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
404 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
409 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
410 DPNI_QUEUE_TX, &qdid);
412 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
417 for (i = 0; i < data->nb_rx_queues; i++) {
418 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
419 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
420 DPNI_QUEUE_RX, dpaa2_q->tc_index,
421 dpaa2_q->flow_id, &cfg, &qid);
423 PMD_INIT_LOG(ERR, "Error to get flow "
424 "information Error code = %d\n", ret);
427 dpaa2_q->fqid = qid.fqid;
430 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
431 DPNI_OFF_RX_L3_CSUM, true);
433 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
437 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
438 DPNI_OFF_RX_L4_CSUM, true);
440 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
444 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
445 DPNI_OFF_TX_L3_CSUM, true);
447 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
451 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
452 DPNI_OFF_TX_L4_CSUM, true);
454 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
458 /*checksum errors, send them to normal path and set it in annotation */
459 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
461 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
462 err_cfg.set_frame_annotation = true;
464 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
465 priv->token, &err_cfg);
467 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
476 * This routine disables all traffic on the adapter by issuing a
477 * global reset on the MAC.
480 dpaa2_dev_stop(struct rte_eth_dev *dev)
482 struct dpaa2_dev_priv *priv = dev->data->dev_private;
483 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
485 struct rte_eth_link link;
487 PMD_INIT_FUNC_TRACE();
489 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
491 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
496 /* clear the recorded link status */
497 memset(&link, 0, sizeof(link));
498 dpaa2_dev_atomic_write_link_status(dev, &link);
502 dpaa2_dev_close(struct rte_eth_dev *dev)
504 struct dpaa2_dev_priv *priv = dev->data->dev_private;
505 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
508 PMD_INIT_FUNC_TRACE();
510 /* Clean the device first */
511 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
513 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
514 " error code %d\n", ret);
520 dpaa2_dev_promiscuous_enable(
521 struct rte_eth_dev *dev)
524 struct dpaa2_dev_priv *priv = dev->data->dev_private;
525 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
527 PMD_INIT_FUNC_TRACE();
530 RTE_LOG(ERR, PMD, "dpni is NULL");
534 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
536 RTE_LOG(ERR, PMD, "Unable to enable promiscuous mode %d", ret);
540 dpaa2_dev_promiscuous_disable(
541 struct rte_eth_dev *dev)
544 struct dpaa2_dev_priv *priv = dev->data->dev_private;
545 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
547 PMD_INIT_FUNC_TRACE();
550 RTE_LOG(ERR, PMD, "dpni is NULL");
554 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
556 RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret);
560 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
563 struct dpaa2_dev_priv *priv = dev->data->dev_private;
564 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
565 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
567 PMD_INIT_FUNC_TRACE();
570 RTE_LOG(ERR, PMD, "dpni is NULL");
574 /* check that mtu is within the allowed range */
575 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
578 /* Set the Max Rx frame length as 'mtu' +
579 * Maximum Ethernet header length
581 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
582 mtu + ETH_VLAN_HLEN);
584 PMD_DRV_LOG(ERR, "setting the max frame length failed");
587 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
592 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
593 struct rte_eth_stats *stats)
595 struct dpaa2_dev_priv *priv = dev->data->dev_private;
596 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
598 uint8_t page0 = 0, page1 = 1, page2 = 2;
599 union dpni_statistics value;
601 memset(&value, 0, sizeof(union dpni_statistics));
603 PMD_INIT_FUNC_TRACE();
606 RTE_LOG(ERR, PMD, "dpni is NULL");
611 RTE_LOG(ERR, PMD, "stats is NULL");
615 /*Get Counters from page_0*/
616 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
621 stats->ipackets = value.page_0.ingress_all_frames;
622 stats->ibytes = value.page_0.ingress_all_bytes;
624 /*Get Counters from page_1*/
625 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
630 stats->opackets = value.page_1.egress_all_frames;
631 stats->obytes = value.page_1.egress_all_bytes;
633 /*Get Counters from page_2*/
634 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
639 stats->ierrors = value.page_2.ingress_discarded_frames;
640 stats->oerrors = value.page_2.egress_discarded_frames;
641 stats->imissed = value.page_2.ingress_nobuffer_discards;
646 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
651 void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
653 struct dpaa2_dev_priv *priv = dev->data->dev_private;
654 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
657 PMD_INIT_FUNC_TRACE();
660 RTE_LOG(ERR, PMD, "dpni is NULL");
664 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
671 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
675 /* return 0 means link status changed, -1 means not changed */
677 dpaa2_dev_link_update(struct rte_eth_dev *dev,
678 int wait_to_complete __rte_unused)
681 struct dpaa2_dev_priv *priv = dev->data->dev_private;
682 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
683 struct rte_eth_link link, old;
684 struct dpni_link_state state = {0};
686 PMD_INIT_FUNC_TRACE();
689 RTE_LOG(ERR, PMD, "error : dpni is NULL");
692 memset(&old, 0, sizeof(old));
693 dpaa2_dev_atomic_read_link_status(dev, &old);
695 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
697 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
701 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
702 RTE_LOG(DEBUG, PMD, "No change in status\n");
706 memset(&link, 0, sizeof(struct rte_eth_link));
707 link.link_status = state.up;
708 link.link_speed = state.rate;
710 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
711 link.link_duplex = ETH_LINK_HALF_DUPLEX;
713 link.link_duplex = ETH_LINK_FULL_DUPLEX;
715 dpaa2_dev_atomic_write_link_status(dev, &link);
717 if (link.link_status)
718 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
720 PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
724 static struct eth_dev_ops dpaa2_ethdev_ops = {
725 .dev_configure = dpaa2_eth_dev_configure,
726 .dev_start = dpaa2_dev_start,
727 .dev_stop = dpaa2_dev_stop,
728 .dev_close = dpaa2_dev_close,
729 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
730 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
731 .link_update = dpaa2_dev_link_update,
732 .stats_get = dpaa2_dev_stats_get,
733 .stats_reset = dpaa2_dev_stats_reset,
734 .dev_infos_get = dpaa2_dev_info_get,
735 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
736 .mtu_set = dpaa2_dev_mtu_set,
737 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
738 .rx_queue_release = dpaa2_dev_rx_queue_release,
739 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
740 .tx_queue_release = dpaa2_dev_tx_queue_release,
744 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
746 struct rte_device *dev = eth_dev->device;
747 struct rte_dpaa2_device *dpaa2_dev;
748 struct fsl_mc_io *dpni_dev;
749 struct dpni_attr attr;
750 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
751 struct dpni_buffer_layout layout;
755 PMD_INIT_FUNC_TRACE();
757 /* For secondary processes, the primary has done all the work */
758 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
761 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
763 hw_id = dpaa2_dev->object_id;
765 dpni_dev = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
767 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
771 dpni_dev->regs = rte_mcp_ptr_list[0];
772 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
774 PMD_INIT_LOG(ERR, "Failure in opening dpni@%d device with"
775 " error code %d\n", hw_id, ret);
779 /* Clean the device first */
780 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
782 PMD_INIT_LOG(ERR, "Failure cleaning dpni@%d device with"
783 " error code %d\n", hw_id, ret);
787 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
789 PMD_INIT_LOG(ERR, "Failure in getting dpni@%d attribute, "
790 " error code %d\n", hw_id, ret);
794 priv->num_tc = attr.num_tcs;
795 for (i = 0; i < attr.num_tcs; i++) {
796 priv->num_dist_per_tc[i] = attr.num_queues;
800 /* Distribution is per Tc only,
801 * so choosing RX queues from default TC only
803 priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
805 if (attr.num_tcs == 1)
806 priv->nb_tx_queues = attr.num_queues;
808 priv->nb_tx_queues = attr.num_tcs;
810 PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
811 PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
815 priv->options = attr.options;
816 priv->max_mac_filters = attr.mac_filter_entries;
817 priv->max_vlan_filters = attr.vlan_filter_entries;
820 /* Allocate memory for hardware structure for queues */
821 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
823 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
827 /* Allocate memory for storing MAC addresses */
828 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
829 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
830 if (eth_dev->data->mac_addrs == NULL) {
831 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
832 "store MAC addresses",
833 ETHER_ADDR_LEN * attr.mac_filter_entries);
837 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
839 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
841 PMD_INIT_LOG(ERR, "DPNI get mac address failed:"
842 " Error Code = %d\n", ret);
846 /* ... rx buffer layout ... */
847 tot_size = DPAA2_HW_BUF_RESERVE + RTE_PKTMBUF_HEADROOM;
848 tot_size = RTE_ALIGN_CEIL(tot_size,
849 DPAA2_PACKET_LAYOUT_ALIGN);
851 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
852 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
853 DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
854 DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
855 DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE;
857 layout.pass_frame_status = 1;
858 layout.data_head_room = tot_size
859 - DPAA2_FD_PTA_SIZE - DPAA2_MBUF_HW_ANNOTATION;
860 layout.private_data_size = DPAA2_FD_PTA_SIZE;
861 layout.pass_parser_result = 1;
862 PMD_INIT_LOG(DEBUG, "Tot_size = %d, head room = %d, private = %d",
863 tot_size, layout.data_head_room, layout.private_data_size);
864 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
865 DPNI_QUEUE_RX, &layout);
867 PMD_INIT_LOG(ERR, "Err(%d) in setting rx buffer layout", ret);
871 /* ... tx buffer layout ... */
872 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
873 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
874 layout.pass_frame_status = 1;
875 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
876 DPNI_QUEUE_TX, &layout);
878 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer"
883 /* ... tx-conf and error buffer layout ... */
884 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
885 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
886 layout.pass_frame_status = 1;
887 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
888 DPNI_QUEUE_TX_CONFIRM, &layout);
890 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer"
895 eth_dev->dev_ops = &dpaa2_ethdev_ops;
896 eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
898 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
899 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
904 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
906 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
907 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
909 struct dpaa2_queue *dpaa2_q;
911 PMD_INIT_FUNC_TRACE();
913 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
917 PMD_INIT_LOG(WARNING, "Already closed or not started");
921 dpaa2_dev_close(eth_dev);
923 if (priv->rx_vq[0]) {
924 /* cleaning up queue storage */
925 for (i = 0; i < priv->nb_rx_queues; i++) {
926 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
927 if (dpaa2_q->q_storage)
928 rte_free(dpaa2_q->q_storage);
930 /*free the all queue memory */
931 rte_free(priv->rx_vq[0]);
932 priv->rx_vq[0] = NULL;
935 /* Allocate memory for storing MAC addresses */
936 if (eth_dev->data->mac_addrs) {
937 rte_free(eth_dev->data->mac_addrs);
938 eth_dev->data->mac_addrs = NULL;
941 /*Close the device at underlying layer*/
942 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
944 PMD_INIT_LOG(ERR, "Failure closing dpni device with"
945 " error code %d\n", ret);
948 /*Free the allocated memory for ethernet private data and dpni*/
952 eth_dev->dev_ops = NULL;
953 eth_dev->rx_pkt_burst = NULL;
954 eth_dev->tx_pkt_burst = NULL;
960 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
961 struct rte_dpaa2_device *dpaa2_dev)
963 struct rte_eth_dev *eth_dev;
964 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
968 sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
970 eth_dev = rte_eth_dev_allocate(ethdev_name);
974 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
975 eth_dev->data->dev_private = rte_zmalloc(
976 "ethdev private structure",
977 sizeof(struct dpaa2_dev_priv),
978 RTE_CACHE_LINE_SIZE);
979 if (eth_dev->data->dev_private == NULL) {
980 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
981 " private port data\n");
982 rte_eth_dev_release_port(eth_dev);
986 eth_dev->device = &dpaa2_dev->device;
987 dpaa2_dev->eth_dev = eth_dev;
988 eth_dev->data->rx_mbuf_alloc_failed = 0;
990 /* Invoke PMD device initialization function */
991 diag = dpaa2_dev_init(eth_dev);
995 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
996 rte_free(eth_dev->data->dev_private);
997 rte_eth_dev_release_port(eth_dev);
1002 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1004 struct rte_eth_dev *eth_dev;
1006 eth_dev = dpaa2_dev->eth_dev;
1007 dpaa2_dev_uninit(eth_dev);
1009 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1010 rte_free(eth_dev->data->dev_private);
1011 rte_eth_dev_release_port(eth_dev);
1016 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1017 .drv_type = DPAA2_MC_DPNI_DEVID,
1018 .probe = rte_dpaa2_probe,
1019 .remove = rte_dpaa2_remove,
1022 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);