4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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15 * the documentation and/or other materials provided with the
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_fslmc.h>
47 #include <fslmc_logs.h>
48 #include <fslmc_vfio.h>
49 #include <dpaa2_hw_pvt.h>
50 #include <dpaa2_hw_mempool.h>
51 #include <dpaa2_hw_dpio.h>
52 #include <mc/fsl_dpmng.h>
53 #include "dpaa2_ethdev.h"
55 struct rte_dpaa2_xstats_name_off {
56 char name[RTE_ETH_XSTATS_NAME_SIZE];
57 uint8_t page_id; /* dpni statistics page id */
58 uint8_t stats_id; /* stats id in the given page */
61 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
62 {"ingress_multicast_frames", 0, 2},
63 {"ingress_multicast_bytes", 0, 3},
64 {"ingress_broadcast_frames", 0, 4},
65 {"ingress_broadcast_bytes", 0, 5},
66 {"egress_multicast_frames", 1, 2},
67 {"egress_multicast_bytes", 1, 3},
68 {"egress_broadcast_frames", 1, 4},
69 {"egress_broadcast_bytes", 1, 5},
70 {"ingress_filtered_frames", 2, 0},
71 {"ingress_discarded_frames", 2, 1},
72 {"ingress_nobuffer_discards", 2, 2},
73 {"egress_discarded_frames", 2, 3},
74 {"egress_confirmed_frames", 2, 4},
77 static struct rte_dpaa2_driver rte_dpaa2_pmd;
78 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
79 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
80 int wait_to_complete);
81 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
82 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
83 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
86 * Atomically reads the link status information from global
87 * structure rte_eth_dev.
90 * - Pointer to the structure rte_eth_dev to read from.
91 * - Pointer to the buffer to be saved with the link status.
95 * - On failure, negative value.
98 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
99 struct rte_eth_link *link)
101 struct rte_eth_link *dst = link;
102 struct rte_eth_link *src = &dev->data->dev_link;
104 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
105 *(uint64_t *)src) == 0)
112 * Atomically writes the link status information into global
113 * structure rte_eth_dev.
116 * - Pointer to the structure rte_eth_dev to read from.
117 * - Pointer to the buffer to be saved with the link status.
120 * - On success, zero.
121 * - On failure, negative value.
124 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
125 struct rte_eth_link *link)
127 struct rte_eth_link *dst = &dev->data->dev_link;
128 struct rte_eth_link *src = link;
130 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
131 *(uint64_t *)src) == 0)
138 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
141 struct dpaa2_dev_priv *priv = dev->data->dev_private;
142 struct fsl_mc_io *dpni = priv->hw;
144 PMD_INIT_FUNC_TRACE();
147 RTE_LOG(ERR, PMD, "dpni is NULL\n");
152 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
153 priv->token, vlan_id);
155 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
156 priv->token, vlan_id);
159 PMD_DRV_LOG(ERR, "ret = %d Unable to add/rem vlan %d hwid =%d",
160 ret, vlan_id, priv->hw_id);
166 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
168 struct dpaa2_dev_priv *priv = dev->data->dev_private;
169 struct fsl_mc_io *dpni = priv->hw;
172 PMD_INIT_FUNC_TRACE();
174 if (mask & ETH_VLAN_FILTER_MASK) {
175 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
176 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
179 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
182 RTE_LOG(ERR, PMD, "Unable to set vlan filter = %d\n",
186 if (mask & ETH_VLAN_EXTEND_MASK) {
187 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
189 "VLAN extend offload not supported\n");
194 dpaa2_fw_version_get(struct rte_eth_dev *dev,
199 struct dpaa2_dev_priv *priv = dev->data->dev_private;
200 struct fsl_mc_io *dpni = priv->hw;
201 struct mc_soc_version mc_plat_info = {0};
202 struct mc_version mc_ver_info = {0};
204 PMD_INIT_FUNC_TRACE();
206 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
207 RTE_LOG(WARNING, PMD, "\tmc_get_soc_version failed\n");
209 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
210 RTE_LOG(WARNING, PMD, "\tmc_get_version failed\n");
212 ret = snprintf(fw_version, fw_size,
217 mc_ver_info.revision);
219 ret += 1; /* add the size of '\0' */
220 if (fw_size < (uint32_t)ret)
227 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
229 struct dpaa2_dev_priv *priv = dev->data->dev_private;
231 PMD_INIT_FUNC_TRACE();
233 dev_info->if_index = priv->hw_id;
235 dev_info->max_mac_addrs = priv->max_mac_filters;
236 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
237 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
238 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
239 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
240 dev_info->rx_offload_capa =
241 DEV_RX_OFFLOAD_IPV4_CKSUM |
242 DEV_RX_OFFLOAD_UDP_CKSUM |
243 DEV_RX_OFFLOAD_TCP_CKSUM |
244 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
245 dev_info->tx_offload_capa =
246 DEV_TX_OFFLOAD_IPV4_CKSUM |
247 DEV_TX_OFFLOAD_UDP_CKSUM |
248 DEV_TX_OFFLOAD_TCP_CKSUM |
249 DEV_TX_OFFLOAD_SCTP_CKSUM |
250 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
251 dev_info->speed_capa = ETH_LINK_SPEED_1G |
252 ETH_LINK_SPEED_2_5G |
257 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
259 struct dpaa2_dev_priv *priv = dev->data->dev_private;
262 struct dpaa2_queue *mc_q, *mcq;
265 struct dpaa2_queue *dpaa2_q;
267 PMD_INIT_FUNC_TRACE();
269 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
270 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
271 RTE_CACHE_LINE_SIZE);
273 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
277 for (i = 0; i < priv->nb_rx_queues; i++) {
279 priv->rx_vq[i] = mc_q++;
280 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
281 dpaa2_q->q_storage = rte_malloc("dq_storage",
282 sizeof(struct queue_storage_info_t),
283 RTE_CACHE_LINE_SIZE);
284 if (!dpaa2_q->q_storage)
287 memset(dpaa2_q->q_storage, 0,
288 sizeof(struct queue_storage_info_t));
289 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
293 for (i = 0; i < priv->nb_tx_queues; i++) {
295 mc_q->flow_id = 0xffff;
296 priv->tx_vq[i] = mc_q++;
297 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
298 dpaa2_q->cscn = rte_malloc(NULL,
299 sizeof(struct qbman_result), 16);
305 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
306 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
307 mcq->tc_index = DPAA2_DEF_TC;
308 mcq->flow_id = dist_idx;
316 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
317 rte_free(dpaa2_q->cscn);
318 priv->tx_vq[i--] = NULL;
320 i = priv->nb_rx_queues;
323 mc_q = priv->rx_vq[0];
325 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
326 dpaa2_free_dq_storage(dpaa2_q->q_storage);
327 rte_free(dpaa2_q->q_storage);
328 priv->rx_vq[i--] = NULL;
335 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
337 struct rte_eth_dev_data *data = dev->data;
338 struct rte_eth_conf *eth_conf = &data->dev_conf;
341 PMD_INIT_FUNC_TRACE();
343 if (eth_conf->rxmode.jumbo_frame == 1) {
344 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
345 ret = dpaa2_dev_mtu_set(dev,
346 eth_conf->rxmode.max_rx_pkt_len);
349 "unable to set mtu. check config\n");
357 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
358 ret = dpaa2_setup_flow_dist(dev,
359 eth_conf->rx_adv_conf.rss_conf.rss_hf);
361 PMD_INIT_LOG(ERR, "unable to set flow distribution."
362 "please check queue config\n");
367 /* update the current status */
368 dpaa2_dev_link_update(dev, 0);
373 /* Function to setup RX flow information. It contains traffic class ID,
374 * flow ID, destination configuration etc.
377 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
378 uint16_t rx_queue_id,
379 uint16_t nb_rx_desc __rte_unused,
380 unsigned int socket_id __rte_unused,
381 const struct rte_eth_rxconf *rx_conf __rte_unused,
382 struct rte_mempool *mb_pool)
384 struct dpaa2_dev_priv *priv = dev->data->dev_private;
385 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
386 struct mc_soc_version mc_plat_info = {0};
387 struct dpaa2_queue *dpaa2_q;
388 struct dpni_queue cfg;
394 PMD_INIT_FUNC_TRACE();
396 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
397 dev, rx_queue_id, mb_pool, rx_conf);
399 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
400 bpid = mempool_to_bpid(mb_pool);
401 ret = dpaa2_attach_bp_list(priv,
402 rte_dpaa2_bpid_info[bpid].bp_list);
406 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
407 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
409 /*Get the flow id from given VQ id*/
410 flow_id = rx_queue_id % priv->nb_rx_queues;
411 memset(&cfg, 0, sizeof(struct dpni_queue));
413 options = options | DPNI_QUEUE_OPT_USER_CTX;
414 cfg.user_context = (uint64_t)(dpaa2_q);
416 /*if ls2088 or rev2 device, enable the stashing */
418 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
419 PMD_INIT_LOG(ERR, "\tmc_get_soc_version failed\n");
421 if ((mc_plat_info.svr & 0xffff0000) != SVR_LS2080A) {
422 options |= DPNI_QUEUE_OPT_FLC;
423 cfg.flc.stash_control = true;
424 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
425 /* 00 00 00 - last 6 bit represent annotation, context stashing,
426 * data stashing setting 01 01 00 (0x14) to enable
427 * 1 line data, 1 line annotation
429 cfg.flc.value |= 0x14;
431 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
432 dpaa2_q->tc_index, flow_id, options, &cfg);
434 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
438 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
439 struct dpni_taildrop taildrop;
442 /*enabling per rx queue congestion control */
443 taildrop.threshold = CONG_THRESHOLD_RX_Q;
444 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
445 taildrop.oal = CONG_RX_OAL;
446 PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
448 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
449 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
450 dpaa2_q->tc_index, flow_id, &taildrop);
452 PMD_INIT_LOG(ERR, "Error in setting the rx flow"
453 " err : = %d\n", ret);
458 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
463 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
464 uint16_t tx_queue_id,
465 uint16_t nb_tx_desc __rte_unused,
466 unsigned int socket_id __rte_unused,
467 const struct rte_eth_txconf *tx_conf __rte_unused)
469 struct dpaa2_dev_priv *priv = dev->data->dev_private;
470 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
471 priv->tx_vq[tx_queue_id];
472 struct fsl_mc_io *dpni = priv->hw;
473 struct dpni_queue tx_conf_cfg;
474 struct dpni_queue tx_flow_cfg;
475 uint8_t options = 0, flow_id;
479 PMD_INIT_FUNC_TRACE();
481 /* Return if queue already configured */
482 if (dpaa2_q->flow_id != 0xffff)
485 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
486 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
491 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
492 tc_id, flow_id, options, &tx_flow_cfg);
494 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
495 "tc_id=%d, flow =%d ErrorCode = %x\n",
496 tc_id, flow_id, -ret);
500 dpaa2_q->flow_id = flow_id;
502 if (tx_queue_id == 0) {
503 /*Set tx-conf and error configuration*/
504 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
508 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
509 " ErrorCode = %x", ret);
513 dpaa2_q->tc_index = tc_id;
515 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
516 struct dpni_congestion_notification_cfg cong_notif_cfg;
518 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
519 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
520 /* Notify that the queue is not congested when the data in
521 * the queue is below this thershold.
523 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
524 cong_notif_cfg.message_ctx = 0;
525 cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
526 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
527 cong_notif_cfg.notification_mode =
528 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
529 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
530 DPNI_CONG_OPT_COHERENT_WRITE;
532 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
539 "Error in setting tx congestion notification: = %d",
544 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
549 dpaa2_dev_rx_queue_release(void *q __rte_unused)
551 PMD_INIT_FUNC_TRACE();
555 dpaa2_dev_tx_queue_release(void *q __rte_unused)
557 PMD_INIT_FUNC_TRACE();
560 static const uint32_t *
561 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
563 static const uint32_t ptypes[] = {
564 /*todo -= add more types */
567 RTE_PTYPE_L3_IPV4_EXT,
569 RTE_PTYPE_L3_IPV6_EXT,
577 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
583 * Dpaa2 link Interrupt handler
586 * The address of parameter (struct rte_eth_dev *) regsitered before.
592 dpaa2_interrupt_handler(void *param)
594 struct rte_eth_dev *dev = param;
595 struct dpaa2_dev_priv *priv = dev->data->dev_private;
596 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
598 int irq_index = DPNI_IRQ_INDEX;
599 unsigned int status = 0, clear = 0;
601 PMD_INIT_FUNC_TRACE();
604 RTE_LOG(ERR, PMD, "dpni is NULL");
608 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
611 RTE_LOG(ERR, PMD, "Can't get irq status (err %d)", ret);
616 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
617 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
618 dpaa2_dev_link_update(dev, 0);
619 /* calling all the apps registered for link status event */
620 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
624 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
627 RTE_LOG(ERR, PMD, "Can't clear irq status (err %d)", ret);
631 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
634 struct dpaa2_dev_priv *priv = dev->data->dev_private;
635 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
636 int irq_index = DPNI_IRQ_INDEX;
637 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
639 PMD_INIT_FUNC_TRACE();
641 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
644 PMD_INIT_LOG(ERR, "Error: dpni_set_irq_mask():%d (%s)", err,
649 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
652 PMD_INIT_LOG(ERR, "Error: dpni_set_irq_enable():%d (%s)", err,
659 dpaa2_dev_start(struct rte_eth_dev *dev)
661 struct rte_device *rdev = dev->device;
662 struct rte_dpaa2_device *dpaa2_dev;
663 struct rte_eth_dev_data *data = dev->data;
664 struct dpaa2_dev_priv *priv = data->dev_private;
665 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
666 struct dpni_queue cfg;
667 struct dpni_error_cfg err_cfg;
669 struct dpni_queue_id qid;
670 struct dpaa2_queue *dpaa2_q;
672 struct rte_intr_handle *intr_handle;
674 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
675 intr_handle = &dpaa2_dev->intr_handle;
677 PMD_INIT_FUNC_TRACE();
679 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
681 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
686 /* Power up the phy. Needed to make the link go UP */
687 dpaa2_dev_set_link_up(dev);
689 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
690 DPNI_QUEUE_TX, &qdid);
692 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
697 for (i = 0; i < data->nb_rx_queues; i++) {
698 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
699 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
700 DPNI_QUEUE_RX, dpaa2_q->tc_index,
701 dpaa2_q->flow_id, &cfg, &qid);
703 PMD_INIT_LOG(ERR, "Error to get flow "
704 "information Error code = %d\n", ret);
707 dpaa2_q->fqid = qid.fqid;
710 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
711 DPNI_OFF_RX_L3_CSUM, true);
713 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
717 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
718 DPNI_OFF_RX_L4_CSUM, true);
720 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
724 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
725 DPNI_OFF_TX_L3_CSUM, true);
727 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
731 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
732 DPNI_OFF_TX_L4_CSUM, true);
734 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
738 /*checksum errors, send them to normal path and set it in annotation */
739 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
741 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
742 err_cfg.set_frame_annotation = true;
744 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
745 priv->token, &err_cfg);
747 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
751 /* VLAN Offload Settings */
752 if (priv->max_vlan_filters)
753 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
755 /* if the interrupts were configured on this devices*/
756 if (intr_handle && (intr_handle->fd) &&
757 (dev->data->dev_conf.intr_conf.lsc != 0)) {
758 /* Registering LSC interrupt handler */
759 rte_intr_callback_register(intr_handle,
760 dpaa2_interrupt_handler,
763 /* enable vfio intr/eventfd mapping
764 * Interrupt index 0 is required, so we can not use
767 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
769 /* enable dpni_irqs */
770 dpaa2_eth_setup_irqs(dev, 1);
777 * This routine disables all traffic on the adapter by issuing a
778 * global reset on the MAC.
781 dpaa2_dev_stop(struct rte_eth_dev *dev)
783 struct dpaa2_dev_priv *priv = dev->data->dev_private;
784 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
786 struct rte_eth_link link;
787 struct rte_intr_handle *intr_handle = dev->intr_handle;
789 PMD_INIT_FUNC_TRACE();
791 /* reset interrupt callback */
792 if (intr_handle && (intr_handle->fd) &&
793 (dev->data->dev_conf.intr_conf.lsc != 0)) {
794 /*disable dpni irqs */
795 dpaa2_eth_setup_irqs(dev, 0);
797 /* disable vfio intr before callback unregister */
798 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
800 /* Unregistering LSC interrupt handler */
801 rte_intr_callback_unregister(intr_handle,
802 dpaa2_interrupt_handler,
806 dpaa2_dev_set_link_down(dev);
808 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
810 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
815 /* clear the recorded link status */
816 memset(&link, 0, sizeof(link));
817 dpaa2_dev_atomic_write_link_status(dev, &link);
821 dpaa2_dev_close(struct rte_eth_dev *dev)
823 struct rte_eth_dev_data *data = dev->data;
824 struct dpaa2_dev_priv *priv = dev->data->dev_private;
825 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
827 struct rte_eth_link link;
828 struct dpaa2_queue *dpaa2_q;
830 PMD_INIT_FUNC_TRACE();
832 for (i = 0; i < data->nb_tx_queues; i++) {
833 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
834 if (!dpaa2_q->cscn) {
835 rte_free(dpaa2_q->cscn);
836 dpaa2_q->cscn = NULL;
840 /* Clean the device first */
841 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
843 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
844 " error code %d\n", ret);
848 memset(&link, 0, sizeof(link));
849 dpaa2_dev_atomic_write_link_status(dev, &link);
853 dpaa2_dev_promiscuous_enable(
854 struct rte_eth_dev *dev)
857 struct dpaa2_dev_priv *priv = dev->data->dev_private;
858 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
860 PMD_INIT_FUNC_TRACE();
863 RTE_LOG(ERR, PMD, "dpni is NULL\n");
867 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
869 RTE_LOG(ERR, PMD, "Unable to enable U promisc mode %d\n", ret);
871 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
873 RTE_LOG(ERR, PMD, "Unable to enable M promisc mode %d\n", ret);
877 dpaa2_dev_promiscuous_disable(
878 struct rte_eth_dev *dev)
881 struct dpaa2_dev_priv *priv = dev->data->dev_private;
882 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
884 PMD_INIT_FUNC_TRACE();
887 RTE_LOG(ERR, PMD, "dpni is NULL\n");
891 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
893 RTE_LOG(ERR, PMD, "Unable to disable U promisc mode %d\n", ret);
895 if (dev->data->all_multicast == 0) {
896 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
900 "Unable to disable M promisc mode %d\n",
906 dpaa2_dev_allmulticast_enable(
907 struct rte_eth_dev *dev)
910 struct dpaa2_dev_priv *priv = dev->data->dev_private;
911 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
913 PMD_INIT_FUNC_TRACE();
916 RTE_LOG(ERR, PMD, "dpni is NULL\n");
920 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
922 RTE_LOG(ERR, PMD, "Unable to enable multicast mode %d\n", ret);
926 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
929 struct dpaa2_dev_priv *priv = dev->data->dev_private;
930 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
932 PMD_INIT_FUNC_TRACE();
935 RTE_LOG(ERR, PMD, "dpni is NULL\n");
939 /* must remain on for all promiscuous */
940 if (dev->data->promiscuous == 1)
943 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
945 RTE_LOG(ERR, PMD, "Unable to disable multicast mode %d\n", ret);
949 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
952 struct dpaa2_dev_priv *priv = dev->data->dev_private;
953 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
954 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
956 PMD_INIT_FUNC_TRACE();
959 RTE_LOG(ERR, PMD, "dpni is NULL\n");
963 /* check that mtu is within the allowed range */
964 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
967 if (frame_size > ETHER_MAX_LEN)
968 dev->data->dev_conf.rxmode.jumbo_frame = 1;
970 dev->data->dev_conf.rxmode.jumbo_frame = 0;
972 /* Set the Max Rx frame length as 'mtu' +
973 * Maximum Ethernet header length
975 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
976 mtu + ETH_VLAN_HLEN);
978 PMD_DRV_LOG(ERR, "setting the max frame length failed");
981 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
986 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
987 struct ether_addr *addr,
988 __rte_unused uint32_t index,
989 __rte_unused uint32_t pool)
992 struct dpaa2_dev_priv *priv = dev->data->dev_private;
993 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
995 PMD_INIT_FUNC_TRACE();
998 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1002 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1003 priv->token, addr->addr_bytes);
1006 "error: Adding the MAC ADDR failed: err = %d\n", ret);
1011 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1015 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1016 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1017 struct rte_eth_dev_data *data = dev->data;
1018 struct ether_addr *macaddr;
1020 PMD_INIT_FUNC_TRACE();
1022 macaddr = &data->mac_addrs[index];
1025 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1029 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1030 priv->token, macaddr->addr_bytes);
1033 "error: Removing the MAC ADDR failed: err = %d\n", ret);
1037 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1038 struct ether_addr *addr)
1041 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1042 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1044 PMD_INIT_FUNC_TRACE();
1047 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1051 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1052 priv->token, addr->addr_bytes);
1056 "error: Setting the MAC ADDR failed %d\n", ret);
1059 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1060 struct rte_eth_stats *stats)
1062 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1063 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1065 uint8_t page0 = 0, page1 = 1, page2 = 2;
1066 union dpni_statistics value;
1068 memset(&value, 0, sizeof(union dpni_statistics));
1070 PMD_INIT_FUNC_TRACE();
1073 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1078 RTE_LOG(ERR, PMD, "stats is NULL\n");
1082 /*Get Counters from page_0*/
1083 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1088 stats->ipackets = value.page_0.ingress_all_frames;
1089 stats->ibytes = value.page_0.ingress_all_bytes;
1091 /*Get Counters from page_1*/
1092 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1097 stats->opackets = value.page_1.egress_all_frames;
1098 stats->obytes = value.page_1.egress_all_bytes;
1100 /*Get Counters from page_2*/
1101 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1106 /* Ingress drop frame count due to configured rules */
1107 stats->ierrors = value.page_2.ingress_filtered_frames;
1108 /* Ingress drop frame count due to error */
1109 stats->ierrors += value.page_2.ingress_discarded_frames;
1111 stats->oerrors = value.page_2.egress_discarded_frames;
1112 stats->imissed = value.page_2.ingress_nobuffer_discards;
1117 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
1122 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1125 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1126 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1128 union dpni_statistics value[3] = {};
1129 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1137 /* Get Counters from page_0*/
1138 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1143 /* Get Counters from page_1*/
1144 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1149 /* Get Counters from page_2*/
1150 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1155 for (i = 0; i < num; i++) {
1157 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1158 raw.counter[dpaa2_xstats_strings[i].stats_id];
1162 RTE_LOG(ERR, PMD, "Error in obtaining extended stats (%d)\n", retcode);
1167 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1168 struct rte_eth_xstat_name *xstats_names,
1169 __rte_unused unsigned int limit)
1171 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1173 if (xstats_names != NULL)
1174 for (i = 0; i < stat_cnt; i++)
1175 snprintf(xstats_names[i].name,
1176 sizeof(xstats_names[i].name),
1178 dpaa2_xstats_strings[i].name);
1184 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1185 uint64_t *values, unsigned int n)
1187 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1188 uint64_t values_copy[stat_cnt];
1191 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1192 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1194 union dpni_statistics value[3] = {};
1202 /* Get Counters from page_0*/
1203 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1208 /* Get Counters from page_1*/
1209 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1214 /* Get Counters from page_2*/
1215 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1220 for (i = 0; i < stat_cnt; i++) {
1221 values[i] = value[dpaa2_xstats_strings[i].page_id].
1222 raw.counter[dpaa2_xstats_strings[i].stats_id];
1227 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1229 for (i = 0; i < n; i++) {
1230 if (ids[i] >= stat_cnt) {
1231 PMD_INIT_LOG(ERR, "id value isn't valid");
1234 values[i] = values_copy[ids[i]];
1240 dpaa2_xstats_get_names_by_id(
1241 struct rte_eth_dev *dev,
1242 struct rte_eth_xstat_name *xstats_names,
1243 const uint64_t *ids,
1246 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1247 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1250 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1252 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1254 for (i = 0; i < limit; i++) {
1255 if (ids[i] >= stat_cnt) {
1256 PMD_INIT_LOG(ERR, "id value isn't valid");
1259 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1265 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1267 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1268 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1271 PMD_INIT_FUNC_TRACE();
1274 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1278 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1285 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
1289 /* return 0 means link status changed, -1 means not changed */
1291 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1292 int wait_to_complete __rte_unused)
1295 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1296 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1297 struct rte_eth_link link, old;
1298 struct dpni_link_state state = {0};
1301 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1304 memset(&old, 0, sizeof(old));
1305 dpaa2_dev_atomic_read_link_status(dev, &old);
1307 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1309 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d\n", ret);
1313 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
1314 RTE_LOG(DEBUG, PMD, "No change in status\n");
1318 memset(&link, 0, sizeof(struct rte_eth_link));
1319 link.link_status = state.up;
1320 link.link_speed = state.rate;
1322 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1323 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1325 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1327 dpaa2_dev_atomic_write_link_status(dev, &link);
1329 if (link.link_status)
1330 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
1332 PMD_DRV_LOG(INFO, "Port %d Link is Down", dev->data->port_id);
1337 * Toggle the DPNI to enable, if not already enabled.
1338 * This is not strictly PHY up/down - it is more of logical toggling.
1341 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1344 struct dpaa2_dev_priv *priv;
1345 struct fsl_mc_io *dpni;
1347 struct dpni_link_state state = {0};
1349 priv = dev->data->dev_private;
1350 dpni = (struct fsl_mc_io *)priv->hw;
1353 RTE_LOG(ERR, PMD, "DPNI is NULL\n");
1357 /* Check if DPNI is currently enabled */
1358 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1360 /* Unable to obtain dpni status; Not continuing */
1361 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1365 /* Enable link if not already enabled */
1367 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1369 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1373 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1375 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d\n", ret);
1379 /* changing tx burst function to start enqueues */
1380 dev->tx_pkt_burst = dpaa2_dev_tx;
1381 dev->data->dev_link.link_status = state.up;
1384 PMD_DRV_LOG(INFO, "Port %d Link is set as UP",
1385 dev->data->port_id);
1387 PMD_DRV_LOG(INFO, "Port %d Link is DOWN", dev->data->port_id);
1392 * Toggle the DPNI to disable, if not already disabled.
1393 * This is not strictly PHY up/down - it is more of logical toggling.
1396 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1399 struct dpaa2_dev_priv *priv;
1400 struct fsl_mc_io *dpni;
1401 int dpni_enabled = 0;
1404 PMD_INIT_FUNC_TRACE();
1406 priv = dev->data->dev_private;
1407 dpni = (struct fsl_mc_io *)priv->hw;
1410 RTE_LOG(ERR, PMD, "Device has not yet been configured\n");
1414 /*changing tx burst function to avoid any more enqueues */
1415 dev->tx_pkt_burst = dummy_dev_tx;
1417 /* Loop while dpni_disable() attempts to drain the egress FQs
1418 * and confirm them back to us.
1421 ret = dpni_disable(dpni, 0, priv->token);
1423 PMD_DRV_LOG(ERR, "dpni disable failed (%d)", ret);
1426 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1428 PMD_DRV_LOG(ERR, "dpni_is_enabled failed (%d)", ret);
1432 /* Allow the MC some slack */
1433 rte_delay_us(100 * 1000);
1434 } while (dpni_enabled && --retries);
1437 PMD_DRV_LOG(WARNING, "Retry count exceeded disabling DPNI\n");
1438 /* todo- we may have to manually cleanup queues.
1441 PMD_DRV_LOG(INFO, "Port %d Link DOWN successful",
1442 dev->data->port_id);
1445 dev->data->dev_link.link_status = 0;
1451 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1454 struct dpaa2_dev_priv *priv;
1455 struct fsl_mc_io *dpni;
1456 struct dpni_link_state state = {0};
1458 PMD_INIT_FUNC_TRACE();
1460 priv = dev->data->dev_private;
1461 dpni = (struct fsl_mc_io *)priv->hw;
1463 if (dpni == NULL || fc_conf == NULL) {
1464 RTE_LOG(ERR, PMD, "device not configured\n");
1468 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1470 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d\n", ret);
1474 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1475 if (state.options & DPNI_LINK_OPT_PAUSE) {
1476 /* DPNI_LINK_OPT_PAUSE set
1477 * if ASYM_PAUSE not set,
1478 * RX Side flow control (handle received Pause frame)
1479 * TX side flow control (send Pause frame)
1480 * if ASYM_PAUSE set,
1481 * RX Side flow control (handle received Pause frame)
1482 * No TX side flow control (send Pause frame disabled)
1484 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1485 fc_conf->mode = RTE_FC_FULL;
1487 fc_conf->mode = RTE_FC_RX_PAUSE;
1489 /* DPNI_LINK_OPT_PAUSE not set
1490 * if ASYM_PAUSE set,
1491 * TX side flow control (send Pause frame)
1492 * No RX side flow control (No action on pause frame rx)
1493 * if ASYM_PAUSE not set,
1494 * Flow control disabled
1496 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1497 fc_conf->mode = RTE_FC_TX_PAUSE;
1499 fc_conf->mode = RTE_FC_NONE;
1506 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1509 struct dpaa2_dev_priv *priv;
1510 struct fsl_mc_io *dpni;
1511 struct dpni_link_state state = {0};
1512 struct dpni_link_cfg cfg = {0};
1514 PMD_INIT_FUNC_TRACE();
1516 priv = dev->data->dev_private;
1517 dpni = (struct fsl_mc_io *)priv->hw;
1520 RTE_LOG(ERR, PMD, "dpni is NULL\n");
1524 /* It is necessary to obtain the current state before setting fc_conf
1525 * as MC would return error in case rate, autoneg or duplex values are
1528 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1530 RTE_LOG(ERR, PMD, "Unable to get link state (err=%d)\n", ret);
1534 /* Disable link before setting configuration */
1535 dpaa2_dev_set_link_down(dev);
1537 /* Based on fc_conf, update cfg */
1538 cfg.rate = state.rate;
1539 cfg.options = state.options;
1541 /* update cfg with fc_conf */
1542 switch (fc_conf->mode) {
1544 /* Full flow control;
1545 * OPT_PAUSE set, ASYM_PAUSE not set
1547 cfg.options |= DPNI_LINK_OPT_PAUSE;
1548 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1550 case RTE_FC_TX_PAUSE:
1551 /* Enable RX flow control
1552 * OPT_PAUSE not set;
1555 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1556 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1558 case RTE_FC_RX_PAUSE:
1559 /* Enable TX Flow control
1563 cfg.options |= DPNI_LINK_OPT_PAUSE;
1564 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1567 /* Disable Flow control
1569 * ASYM_PAUSE not set
1571 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1572 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1575 RTE_LOG(ERR, PMD, "Incorrect Flow control flag (%d)\n",
1580 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1583 "Unable to set Link configuration (err=%d)\n",
1587 dpaa2_dev_set_link_up(dev);
1593 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1594 struct rte_eth_rss_conf *rss_conf)
1596 struct rte_eth_dev_data *data = dev->data;
1597 struct rte_eth_conf *eth_conf = &data->dev_conf;
1600 PMD_INIT_FUNC_TRACE();
1602 if (rss_conf->rss_hf) {
1603 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1605 PMD_INIT_LOG(ERR, "unable to set flow dist");
1609 ret = dpaa2_remove_flow_dist(dev, 0);
1611 PMD_INIT_LOG(ERR, "unable to remove flow dist");
1615 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1620 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1621 struct rte_eth_rss_conf *rss_conf)
1623 struct rte_eth_dev_data *data = dev->data;
1624 struct rte_eth_conf *eth_conf = &data->dev_conf;
1626 /* dpaa2 does not support rss_key, so length should be 0*/
1627 rss_conf->rss_key_len = 0;
1628 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1632 static struct eth_dev_ops dpaa2_ethdev_ops = {
1633 .dev_configure = dpaa2_eth_dev_configure,
1634 .dev_start = dpaa2_dev_start,
1635 .dev_stop = dpaa2_dev_stop,
1636 .dev_close = dpaa2_dev_close,
1637 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1638 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1639 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1640 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1641 .dev_set_link_up = dpaa2_dev_set_link_up,
1642 .dev_set_link_down = dpaa2_dev_set_link_down,
1643 .link_update = dpaa2_dev_link_update,
1644 .stats_get = dpaa2_dev_stats_get,
1645 .xstats_get = dpaa2_dev_xstats_get,
1646 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1647 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1648 .xstats_get_names = dpaa2_xstats_get_names,
1649 .stats_reset = dpaa2_dev_stats_reset,
1650 .xstats_reset = dpaa2_dev_stats_reset,
1651 .fw_version_get = dpaa2_fw_version_get,
1652 .dev_infos_get = dpaa2_dev_info_get,
1653 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1654 .mtu_set = dpaa2_dev_mtu_set,
1655 .vlan_filter_set = dpaa2_vlan_filter_set,
1656 .vlan_offload_set = dpaa2_vlan_offload_set,
1657 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1658 .rx_queue_release = dpaa2_dev_rx_queue_release,
1659 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1660 .tx_queue_release = dpaa2_dev_tx_queue_release,
1661 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1662 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1663 .mac_addr_add = dpaa2_dev_add_mac_addr,
1664 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1665 .mac_addr_set = dpaa2_dev_set_mac_addr,
1666 .rss_hash_update = dpaa2_dev_rss_hash_update,
1667 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1671 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1673 struct rte_device *dev = eth_dev->device;
1674 struct rte_dpaa2_device *dpaa2_dev;
1675 struct fsl_mc_io *dpni_dev;
1676 struct dpni_attr attr;
1677 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1678 struct dpni_buffer_layout layout;
1681 PMD_INIT_FUNC_TRACE();
1683 /* For secondary processes, the primary has done all the work */
1684 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1687 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1689 hw_id = dpaa2_dev->object_id;
1691 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1693 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
1697 dpni_dev->regs = rte_mcp_ptr_list[0];
1698 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1701 "Failure in opening dpni@%d with err code %d\n",
1707 /* Clean the device first */
1708 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1711 "Failure cleaning dpni@%d with err code %d\n",
1716 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1719 "Failure in get dpni@%d attribute, err code %d\n",
1724 priv->num_rx_tc = attr.num_rx_tcs;
1726 /* Resetting the "num_rx_queues" to equal number of queues in first TC
1727 * as only one TC is supported on Rx Side. Once Multiple TCs will be
1728 * in use for Rx processing then this will be changed or removed.
1730 priv->nb_rx_queues = attr.num_queues;
1732 /* Using number of TX queues as number of TX TCs */
1733 priv->nb_tx_queues = attr.num_tx_tcs;
1735 PMD_DRV_LOG(DEBUG, "RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
1736 priv->num_tc, priv->nb_rx_queues, priv->nb_tx_queues);
1738 priv->hw = dpni_dev;
1739 priv->hw_id = hw_id;
1740 priv->options = attr.options;
1741 priv->max_mac_filters = attr.mac_filter_entries;
1742 priv->max_vlan_filters = attr.vlan_filter_entries;
1745 /* Allocate memory for hardware structure for queues */
1746 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1748 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
1752 /* Allocate memory for storing MAC addresses */
1753 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1754 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1755 if (eth_dev->data->mac_addrs == NULL) {
1757 "Failed to allocate %d bytes needed to store MAC addresses",
1758 ETHER_ADDR_LEN * attr.mac_filter_entries);
1763 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1765 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1767 PMD_INIT_LOG(ERR, "DPNI get mac address failed:Err Code = %d\n",
1772 /* ... tx buffer layout ... */
1773 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1774 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1775 layout.pass_frame_status = 1;
1776 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1777 DPNI_QUEUE_TX, &layout);
1779 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer layout",
1784 /* ... tx-conf and error buffer layout ... */
1785 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1786 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1787 layout.pass_frame_status = 1;
1788 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1789 DPNI_QUEUE_TX_CONFIRM, &layout);
1791 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer layout",
1796 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1797 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
1799 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1800 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1801 rte_fslmc_vfio_dmamap();
1805 dpaa2_dev_uninit(eth_dev);
1810 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1812 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1813 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1815 struct dpaa2_queue *dpaa2_q;
1817 PMD_INIT_FUNC_TRACE();
1819 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1823 PMD_INIT_LOG(WARNING, "Already closed or not started");
1827 dpaa2_dev_close(eth_dev);
1829 if (priv->rx_vq[0]) {
1830 /* cleaning up queue storage */
1831 for (i = 0; i < priv->nb_rx_queues; i++) {
1832 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1833 if (dpaa2_q->q_storage)
1834 rte_free(dpaa2_q->q_storage);
1836 /*free the all queue memory */
1837 rte_free(priv->rx_vq[0]);
1838 priv->rx_vq[0] = NULL;
1841 /* free memory for storing MAC addresses */
1842 if (eth_dev->data->mac_addrs) {
1843 rte_free(eth_dev->data->mac_addrs);
1844 eth_dev->data->mac_addrs = NULL;
1847 /* Close the device at underlying layer*/
1848 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1851 "Failure closing dpni device with err code %d\n",
1855 /* Free the allocated memory for ethernet private data and dpni*/
1859 eth_dev->dev_ops = NULL;
1860 eth_dev->rx_pkt_burst = NULL;
1861 eth_dev->tx_pkt_burst = NULL;
1867 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
1868 struct rte_dpaa2_device *dpaa2_dev)
1870 struct rte_eth_dev *eth_dev;
1873 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1874 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
1877 eth_dev->data->dev_private = rte_zmalloc(
1878 "ethdev private structure",
1879 sizeof(struct dpaa2_dev_priv),
1880 RTE_CACHE_LINE_SIZE);
1881 if (eth_dev->data->dev_private == NULL) {
1882 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
1883 " private port data\n");
1884 rte_eth_dev_release_port(eth_dev);
1888 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
1893 eth_dev->device = &dpaa2_dev->device;
1894 eth_dev->device->driver = &dpaa2_drv->driver;
1896 dpaa2_dev->eth_dev = eth_dev;
1897 eth_dev->data->rx_mbuf_alloc_failed = 0;
1899 /* Invoke PMD device initialization function */
1900 diag = dpaa2_dev_init(eth_dev);
1904 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1905 rte_free(eth_dev->data->dev_private);
1906 rte_eth_dev_release_port(eth_dev);
1911 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1913 struct rte_eth_dev *eth_dev;
1915 eth_dev = dpaa2_dev->eth_dev;
1916 dpaa2_dev_uninit(eth_dev);
1918 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1919 rte_free(eth_dev->data->dev_private);
1920 rte_eth_dev_release_port(eth_dev);
1925 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1926 .drv_type = DPAA2_ETH,
1927 .probe = rte_dpaa2_probe,
1928 .remove = rte_dpaa2_remove,
1931 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);