4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_ethdev.h>
46 #include <rte_fslmc.h>
48 #include <fslmc_logs.h>
49 #include <fslmc_vfio.h>
50 #include <dpaa2_hw_pvt.h>
51 #include <dpaa2_hw_mempool.h>
52 #include <dpaa2_hw_dpio.h>
54 #include "dpaa2_ethdev.h"
56 static struct rte_dpaa2_driver rte_dpaa2_pmd;
57 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
60 * Atomically reads the link status information from global
61 * structure rte_eth_dev.
64 * - Pointer to the structure rte_eth_dev to read from.
65 * - Pointer to the buffer to be saved with the link status.
69 * - On failure, negative value.
72 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
73 struct rte_eth_link *link)
75 struct rte_eth_link *dst = link;
76 struct rte_eth_link *src = &dev->data->dev_link;
78 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
79 *(uint64_t *)src) == 0)
86 * Atomically writes the link status information into global
87 * structure rte_eth_dev.
90 * - Pointer to the structure rte_eth_dev to read from.
91 * - Pointer to the buffer to be saved with the link status.
95 * - On failure, negative value.
98 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
99 struct rte_eth_link *link)
101 struct rte_eth_link *dst = &dev->data->dev_link;
102 struct rte_eth_link *src = link;
104 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
105 *(uint64_t *)src) == 0)
112 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
114 struct dpaa2_dev_priv *priv = dev->data->dev_private;
116 PMD_INIT_FUNC_TRACE();
118 dev_info->if_index = priv->hw_id;
120 dev_info->max_mac_addrs = priv->max_mac_filters;
121 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
122 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
123 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
124 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
125 dev_info->rx_offload_capa =
126 DEV_RX_OFFLOAD_IPV4_CKSUM |
127 DEV_RX_OFFLOAD_UDP_CKSUM |
128 DEV_RX_OFFLOAD_TCP_CKSUM |
129 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
130 dev_info->tx_offload_capa =
131 DEV_TX_OFFLOAD_IPV4_CKSUM |
132 DEV_TX_OFFLOAD_UDP_CKSUM |
133 DEV_TX_OFFLOAD_TCP_CKSUM |
134 DEV_TX_OFFLOAD_SCTP_CKSUM |
135 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
136 dev_info->speed_capa = ETH_LINK_SPEED_1G |
137 ETH_LINK_SPEED_2_5G |
142 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
144 struct dpaa2_dev_priv *priv = dev->data->dev_private;
147 struct dpaa2_queue *mc_q, *mcq;
150 struct dpaa2_queue *dpaa2_q;
152 PMD_INIT_FUNC_TRACE();
154 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
155 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
156 RTE_CACHE_LINE_SIZE);
158 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
162 for (i = 0; i < priv->nb_rx_queues; i++) {
164 priv->rx_vq[i] = mc_q++;
165 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
166 dpaa2_q->q_storage = rte_malloc("dq_storage",
167 sizeof(struct queue_storage_info_t),
168 RTE_CACHE_LINE_SIZE);
169 if (!dpaa2_q->q_storage)
172 memset(dpaa2_q->q_storage, 0,
173 sizeof(struct queue_storage_info_t));
174 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
178 for (i = 0; i < priv->nb_tx_queues; i++) {
180 mc_q->flow_id = 0xffff;
181 priv->tx_vq[i] = mc_q++;
182 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
183 dpaa2_q->cscn = rte_malloc(NULL,
184 sizeof(struct qbman_result), 16);
190 for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
192 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
193 mcq->tc_index = DPAA2_DEF_TC;
194 mcq->flow_id = dist_idx;
202 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
203 rte_free(dpaa2_q->cscn);
204 priv->tx_vq[i--] = NULL;
206 i = priv->nb_rx_queues;
209 mc_q = priv->rx_vq[0];
211 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
212 dpaa2_free_dq_storage(dpaa2_q->q_storage);
213 rte_free(dpaa2_q->q_storage);
214 priv->rx_vq[i--] = NULL;
221 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
223 struct rte_eth_dev_data *data = dev->data;
224 struct rte_eth_conf *eth_conf = &data->dev_conf;
227 PMD_INIT_FUNC_TRACE();
229 /* Check for correct configuration */
230 if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
231 data->nb_rx_queues > 1) {
232 PMD_INIT_LOG(ERR, "Distribution is not enabled, "
233 "but Rx queues more than 1\n");
237 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
238 /* Return in case number of Rx queues is 1 */
239 if (data->nb_rx_queues == 1)
241 ret = dpaa2_setup_flow_dist(dev,
242 eth_conf->rx_adv_conf.rss_conf.rss_hf);
244 PMD_INIT_LOG(ERR, "unable to set flow distribution."
245 "please check queue config\n");
252 /* Function to setup RX flow information. It contains traffic class ID,
253 * flow ID, destination configuration etc.
256 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
257 uint16_t rx_queue_id,
258 uint16_t nb_rx_desc __rte_unused,
259 unsigned int socket_id __rte_unused,
260 const struct rte_eth_rxconf *rx_conf __rte_unused,
261 struct rte_mempool *mb_pool)
263 struct dpaa2_dev_priv *priv = dev->data->dev_private;
264 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
265 struct dpaa2_queue *dpaa2_q;
266 struct dpni_queue cfg;
272 PMD_INIT_FUNC_TRACE();
274 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
275 dev, rx_queue_id, mb_pool, rx_conf);
277 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
278 bpid = mempool_to_bpid(mb_pool);
279 ret = dpaa2_attach_bp_list(priv,
280 rte_dpaa2_bpid_info[bpid].bp_list);
284 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
285 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
287 /*Get the tc id and flow id from given VQ id*/
288 flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
289 memset(&cfg, 0, sizeof(struct dpni_queue));
291 options = options | DPNI_QUEUE_OPT_USER_CTX;
292 cfg.user_context = (uint64_t)(dpaa2_q);
294 /*if ls2088 or rev2 device, enable the stashing */
295 if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
296 options |= DPNI_QUEUE_OPT_FLC;
297 cfg.flc.stash_control = true;
298 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
299 /* 00 00 00 - last 6 bit represent annotation, context stashing,
300 * data stashing setting 01 01 00 (0x14) to enable
301 * 1 line data, 1 line annotation
303 cfg.flc.value |= 0x14;
305 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
306 dpaa2_q->tc_index, flow_id, options, &cfg);
308 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
312 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
317 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
318 uint16_t tx_queue_id,
319 uint16_t nb_tx_desc __rte_unused,
320 unsigned int socket_id __rte_unused,
321 const struct rte_eth_txconf *tx_conf __rte_unused)
323 struct dpaa2_dev_priv *priv = dev->data->dev_private;
324 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
325 priv->tx_vq[tx_queue_id];
326 struct fsl_mc_io *dpni = priv->hw;
327 struct dpni_queue tx_conf_cfg;
328 struct dpni_queue tx_flow_cfg;
329 uint8_t options = 0, flow_id;
333 PMD_INIT_FUNC_TRACE();
335 /* Return if queue already configured */
336 if (dpaa2_q->flow_id != 0xffff)
339 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
340 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
342 if (priv->num_tc == 1) {
344 flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
350 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
351 tc_id, flow_id, options, &tx_flow_cfg);
353 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
354 "tc_id=%d, flow =%d ErrorCode = %x\n",
355 tc_id, flow_id, -ret);
359 dpaa2_q->flow_id = flow_id;
361 if (tx_queue_id == 0) {
362 /*Set tx-conf and error configuration*/
363 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
367 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
368 " ErrorCode = %x", ret);
372 dpaa2_q->tc_index = tc_id;
374 if (priv->flags & DPAA2_TX_CGR_SUPPORT) {
375 struct dpni_congestion_notification_cfg cong_notif_cfg;
377 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
378 /* Notify about congestion when the queue size is 32 KB */
379 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
380 /* Notify that the queue is not congested when the data in
381 * the queue is below this thershold.
383 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
384 cong_notif_cfg.message_ctx = 0;
385 cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
386 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
387 cong_notif_cfg.notification_mode =
388 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
389 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
390 DPNI_CONG_OPT_COHERENT_WRITE;
392 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
399 "Error in setting tx congestion notification: = %d",
404 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
409 dpaa2_dev_rx_queue_release(void *q __rte_unused)
411 PMD_INIT_FUNC_TRACE();
415 dpaa2_dev_tx_queue_release(void *q __rte_unused)
417 PMD_INIT_FUNC_TRACE();
420 static const uint32_t *
421 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
423 static const uint32_t ptypes[] = {
424 /*todo -= add more types */
427 RTE_PTYPE_L3_IPV4_EXT,
429 RTE_PTYPE_L3_IPV6_EXT,
437 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
443 dpaa2_dev_start(struct rte_eth_dev *dev)
445 struct rte_eth_dev_data *data = dev->data;
446 struct dpaa2_dev_priv *priv = data->dev_private;
447 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
448 struct dpni_queue cfg;
449 struct dpni_error_cfg err_cfg;
451 struct dpni_queue_id qid;
452 struct dpaa2_queue *dpaa2_q;
455 PMD_INIT_FUNC_TRACE();
457 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
459 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
464 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
465 DPNI_QUEUE_TX, &qdid);
467 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
472 for (i = 0; i < data->nb_rx_queues; i++) {
473 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
474 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
475 DPNI_QUEUE_RX, dpaa2_q->tc_index,
476 dpaa2_q->flow_id, &cfg, &qid);
478 PMD_INIT_LOG(ERR, "Error to get flow "
479 "information Error code = %d\n", ret);
482 dpaa2_q->fqid = qid.fqid;
485 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
486 DPNI_OFF_RX_L3_CSUM, true);
488 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
492 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
493 DPNI_OFF_RX_L4_CSUM, true);
495 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
499 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
500 DPNI_OFF_TX_L3_CSUM, true);
502 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
506 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
507 DPNI_OFF_TX_L4_CSUM, true);
509 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
513 /*checksum errors, send them to normal path and set it in annotation */
514 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
516 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
517 err_cfg.set_frame_annotation = true;
519 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
520 priv->token, &err_cfg);
522 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
531 * This routine disables all traffic on the adapter by issuing a
532 * global reset on the MAC.
535 dpaa2_dev_stop(struct rte_eth_dev *dev)
537 struct dpaa2_dev_priv *priv = dev->data->dev_private;
538 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
540 struct rte_eth_link link;
542 PMD_INIT_FUNC_TRACE();
544 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
546 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
551 /* clear the recorded link status */
552 memset(&link, 0, sizeof(link));
553 dpaa2_dev_atomic_write_link_status(dev, &link);
557 dpaa2_dev_close(struct rte_eth_dev *dev)
559 struct rte_eth_dev_data *data = dev->data;
560 struct dpaa2_dev_priv *priv = dev->data->dev_private;
561 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
563 struct dpaa2_queue *dpaa2_q;
565 PMD_INIT_FUNC_TRACE();
567 for (i = 0; i < data->nb_tx_queues; i++) {
568 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
569 if (!dpaa2_q->cscn) {
570 rte_free(dpaa2_q->cscn);
571 dpaa2_q->cscn = NULL;
575 /* Clean the device first */
576 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
578 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
579 " error code %d\n", ret);
585 dpaa2_dev_promiscuous_enable(
586 struct rte_eth_dev *dev)
589 struct dpaa2_dev_priv *priv = dev->data->dev_private;
590 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
592 PMD_INIT_FUNC_TRACE();
595 RTE_LOG(ERR, PMD, "dpni is NULL");
599 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
601 RTE_LOG(ERR, PMD, "Unable to enable promiscuous mode %d", ret);
605 dpaa2_dev_promiscuous_disable(
606 struct rte_eth_dev *dev)
609 struct dpaa2_dev_priv *priv = dev->data->dev_private;
610 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
612 PMD_INIT_FUNC_TRACE();
615 RTE_LOG(ERR, PMD, "dpni is NULL");
619 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
621 RTE_LOG(ERR, PMD, "Unable to disable promiscuous mode %d", ret);
625 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
628 struct dpaa2_dev_priv *priv = dev->data->dev_private;
629 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
630 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
632 PMD_INIT_FUNC_TRACE();
635 RTE_LOG(ERR, PMD, "dpni is NULL");
639 /* check that mtu is within the allowed range */
640 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
643 /* Set the Max Rx frame length as 'mtu' +
644 * Maximum Ethernet header length
646 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
647 mtu + ETH_VLAN_HLEN);
649 PMD_DRV_LOG(ERR, "setting the max frame length failed");
652 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
657 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
658 struct rte_eth_stats *stats)
660 struct dpaa2_dev_priv *priv = dev->data->dev_private;
661 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
663 uint8_t page0 = 0, page1 = 1, page2 = 2;
664 union dpni_statistics value;
666 memset(&value, 0, sizeof(union dpni_statistics));
668 PMD_INIT_FUNC_TRACE();
671 RTE_LOG(ERR, PMD, "dpni is NULL");
676 RTE_LOG(ERR, PMD, "stats is NULL");
680 /*Get Counters from page_0*/
681 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
686 stats->ipackets = value.page_0.ingress_all_frames;
687 stats->ibytes = value.page_0.ingress_all_bytes;
689 /*Get Counters from page_1*/
690 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
695 stats->opackets = value.page_1.egress_all_frames;
696 stats->obytes = value.page_1.egress_all_bytes;
698 /*Get Counters from page_2*/
699 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
704 stats->ierrors = value.page_2.ingress_discarded_frames;
705 stats->oerrors = value.page_2.egress_discarded_frames;
706 stats->imissed = value.page_2.ingress_nobuffer_discards;
711 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
716 void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
718 struct dpaa2_dev_priv *priv = dev->data->dev_private;
719 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
722 PMD_INIT_FUNC_TRACE();
725 RTE_LOG(ERR, PMD, "dpni is NULL");
729 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
736 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
740 /* return 0 means link status changed, -1 means not changed */
742 dpaa2_dev_link_update(struct rte_eth_dev *dev,
743 int wait_to_complete __rte_unused)
746 struct dpaa2_dev_priv *priv = dev->data->dev_private;
747 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
748 struct rte_eth_link link, old;
749 struct dpni_link_state state = {0};
751 PMD_INIT_FUNC_TRACE();
754 RTE_LOG(ERR, PMD, "error : dpni is NULL");
757 memset(&old, 0, sizeof(old));
758 dpaa2_dev_atomic_read_link_status(dev, &old);
760 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
762 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
766 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
767 RTE_LOG(DEBUG, PMD, "No change in status\n");
771 memset(&link, 0, sizeof(struct rte_eth_link));
772 link.link_status = state.up;
773 link.link_speed = state.rate;
775 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
776 link.link_duplex = ETH_LINK_HALF_DUPLEX;
778 link.link_duplex = ETH_LINK_FULL_DUPLEX;
780 dpaa2_dev_atomic_write_link_status(dev, &link);
782 if (link.link_status)
783 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
785 PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
789 static struct eth_dev_ops dpaa2_ethdev_ops = {
790 .dev_configure = dpaa2_eth_dev_configure,
791 .dev_start = dpaa2_dev_start,
792 .dev_stop = dpaa2_dev_stop,
793 .dev_close = dpaa2_dev_close,
794 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
795 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
796 .link_update = dpaa2_dev_link_update,
797 .stats_get = dpaa2_dev_stats_get,
798 .stats_reset = dpaa2_dev_stats_reset,
799 .dev_infos_get = dpaa2_dev_info_get,
800 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
801 .mtu_set = dpaa2_dev_mtu_set,
802 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
803 .rx_queue_release = dpaa2_dev_rx_queue_release,
804 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
805 .tx_queue_release = dpaa2_dev_tx_queue_release,
809 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
811 struct rte_device *dev = eth_dev->device;
812 struct rte_dpaa2_device *dpaa2_dev;
813 struct fsl_mc_io *dpni_dev;
814 struct dpni_attr attr;
815 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
816 struct dpni_buffer_layout layout;
819 PMD_INIT_FUNC_TRACE();
821 /* For secondary processes, the primary has done all the work */
822 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
825 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
827 hw_id = dpaa2_dev->object_id;
829 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
831 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
835 dpni_dev->regs = rte_mcp_ptr_list[0];
836 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
839 "Failure in opening dpni@%d with err code %d\n",
845 /* Clean the device first */
846 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
849 "Failure cleaning dpni@%d with err code %d\n",
854 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
857 "Failure in get dpni@%d attribute, err code %d\n",
862 priv->num_tc = attr.num_tcs;
863 for (i = 0; i < attr.num_tcs; i++) {
864 priv->num_dist_per_tc[i] = attr.num_queues;
868 /* Distribution is per Tc only,
869 * so choosing RX queues from default TC only
871 priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
873 if (attr.num_tcs == 1)
874 priv->nb_tx_queues = attr.num_queues;
876 priv->nb_tx_queues = attr.num_tcs;
878 PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
879 PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
883 priv->options = attr.options;
884 priv->max_mac_filters = attr.mac_filter_entries;
885 priv->max_vlan_filters = attr.vlan_filter_entries;
888 priv->flags |= DPAA2_TX_CGR_SUPPORT;
889 PMD_INIT_LOG(INFO, "Enable the tx congestion control support");
891 /* Allocate memory for hardware structure for queues */
892 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
894 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
898 /* Allocate memory for storing MAC addresses */
899 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
900 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
901 if (eth_dev->data->mac_addrs == NULL) {
903 "Failed to allocate %d bytes needed to store MAC addresses",
904 ETHER_ADDR_LEN * attr.mac_filter_entries);
909 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
911 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
913 PMD_INIT_LOG(ERR, "DPNI get mac address failed:Err Code = %d\n",
918 /* ... tx buffer layout ... */
919 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
920 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
921 layout.pass_frame_status = 1;
922 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
923 DPNI_QUEUE_TX, &layout);
925 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer layout",
930 /* ... tx-conf and error buffer layout ... */
931 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
932 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
933 layout.pass_frame_status = 1;
934 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
935 DPNI_QUEUE_TX_CONFIRM, &layout);
937 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer layout",
942 eth_dev->dev_ops = &dpaa2_ethdev_ops;
943 eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
945 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
946 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
947 rte_fslmc_vfio_dmamap();
951 dpaa2_dev_uninit(eth_dev);
956 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
958 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
959 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
961 struct dpaa2_queue *dpaa2_q;
963 PMD_INIT_FUNC_TRACE();
965 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
969 PMD_INIT_LOG(WARNING, "Already closed or not started");
973 dpaa2_dev_close(eth_dev);
975 if (priv->rx_vq[0]) {
976 /* cleaning up queue storage */
977 for (i = 0; i < priv->nb_rx_queues; i++) {
978 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
979 if (dpaa2_q->q_storage)
980 rte_free(dpaa2_q->q_storage);
982 /*free the all queue memory */
983 rte_free(priv->rx_vq[0]);
984 priv->rx_vq[0] = NULL;
987 /* free memory for storing MAC addresses */
988 if (eth_dev->data->mac_addrs) {
989 rte_free(eth_dev->data->mac_addrs);
990 eth_dev->data->mac_addrs = NULL;
993 /* Close the device at underlying layer*/
994 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
997 "Failure closing dpni device with err code %d\n",
1001 /* Free the allocated memory for ethernet private data and dpni*/
1005 eth_dev->dev_ops = NULL;
1006 eth_dev->rx_pkt_burst = NULL;
1007 eth_dev->tx_pkt_burst = NULL;
1013 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
1014 struct rte_dpaa2_device *dpaa2_dev)
1016 struct rte_eth_dev *eth_dev;
1017 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
1021 sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
1023 eth_dev = rte_eth_dev_allocate(ethdev_name);
1024 if (eth_dev == NULL)
1027 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1028 eth_dev->data->dev_private = rte_zmalloc(
1029 "ethdev private structure",
1030 sizeof(struct dpaa2_dev_priv),
1031 RTE_CACHE_LINE_SIZE);
1032 if (eth_dev->data->dev_private == NULL) {
1033 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
1034 " private port data\n");
1035 rte_eth_dev_release_port(eth_dev);
1039 eth_dev->device = &dpaa2_dev->device;
1040 dpaa2_dev->eth_dev = eth_dev;
1041 eth_dev->data->rx_mbuf_alloc_failed = 0;
1043 /* Invoke PMD device initialization function */
1044 diag = dpaa2_dev_init(eth_dev);
1048 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1049 rte_free(eth_dev->data->dev_private);
1050 rte_eth_dev_release_port(eth_dev);
1055 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1057 struct rte_eth_dev *eth_dev;
1059 eth_dev = dpaa2_dev->eth_dev;
1060 dpaa2_dev_uninit(eth_dev);
1062 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1063 rte_free(eth_dev->data->dev_private);
1064 rte_eth_dev_release_port(eth_dev);
1069 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1070 .drv_type = DPAA2_MC_DPNI_DEVID,
1071 .probe = rte_dpaa2_probe,
1072 .remove = rte_dpaa2_remove,
1075 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);