drivers/net/enetc/enetc_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018-2019 NXP
   3  */
   4
   5 #include <stdbool.h>
   6 #include <rte_ethdev_pci.h>
   7
   8 #include "enetc_logs.h"
   9 #include "enetc.h"
  10
  11 int enetc_logtype_pmd;
  12
  13 static int
  14 enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)
  15 {
  16         PMD_INIT_FUNC_TRACE();
  17         return 0;
  18 }
  19
  20 static int
  21 enetc_dev_start(struct rte_eth_dev *dev)
  22 {
  23         struct enetc_eth_hw *hw =
  24                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  25         struct enetc_hw *enetc_hw = &hw->hw;
  26         uint32_t val;
  27
  28         PMD_INIT_FUNC_TRACE();
  29         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  30         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  31                       val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
  32
  33         /* Enable port */
  34         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  35         enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
  36
  37         /* set auto-speed for RGMII */
  38         if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
  39                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  40                               ENETC_PM0_IFM_RGAUTO);
  41                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  42                               ENETC_PM0_IFM_RGAUTO);
  43         }
  44         if (enetc_global_rd(enetc_hw,
  45                             ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
  46                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  47                               ENETC_PM0_IFM_XGMII);
  48                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  49                               ENETC_PM0_IFM_XGMII);
  50         }
  51
  52         return 0;
  53 }
  54
  55 static void
  56 enetc_dev_stop(struct rte_eth_dev *dev)
  57 {
  58         struct enetc_eth_hw *hw =
  59                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  60         struct enetc_hw *enetc_hw = &hw->hw;
  61         uint32_t val;
  62
  63         PMD_INIT_FUNC_TRACE();
  64         /* Disable port */
  65         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  66         enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
  67
  68         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  69         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  70                       val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
  71 }
  72
  73 static const uint32_t *
  74 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
  75 {
  76         static const uint32_t ptypes[] = {
  77                 RTE_PTYPE_L2_ETHER,
  78                 RTE_PTYPE_L3_IPV4,
  79                 RTE_PTYPE_L3_IPV6,
  80                 RTE_PTYPE_L4_TCP,
  81                 RTE_PTYPE_L4_UDP,
  82                 RTE_PTYPE_L4_SCTP,
  83                 RTE_PTYPE_L4_ICMP,
  84                 RTE_PTYPE_UNKNOWN
  85         };
  86
  87         return ptypes;
  88 }
  89
  90 /* return 0 means link status changed, -1 means not changed */
  91 static int
  92 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
  93 {
  94         struct enetc_eth_hw *hw =
  95                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  96         struct enetc_hw *enetc_hw = &hw->hw;
  97         struct rte_eth_link link;
  98         uint32_t status;
  99
 100         PMD_INIT_FUNC_TRACE();
 101
 102         memset(&link, 0, sizeof(link));
 103
 104         status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
 105
 106         if (status & ENETC_LINK_MODE)
 107                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 108         else
 109                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 110
 111         if (status & ENETC_LINK_STATUS)
 112                 link.link_status = ETH_LINK_UP;
 113         else
 114                 link.link_status = ETH_LINK_DOWN;
 115
 116         switch (status & ENETC_LINK_SPEED_MASK) {
 117         case ENETC_LINK_SPEED_1G:
 118                 link.link_speed = ETH_SPEED_NUM_1G;
 119                 break;
 120
 121         case ENETC_LINK_SPEED_100M:
 122                 link.link_speed = ETH_SPEED_NUM_100M;
 123                 break;
 124
 125         default:
 126         case ENETC_LINK_SPEED_10M:
 127                 link.link_speed = ETH_SPEED_NUM_10M;
 128         }
 129
 130         return rte_eth_linkstatus_set(dev, &link);
 131 }
 132
 133 static int
 134 enetc_hardware_init(struct enetc_eth_hw *hw)
 135 {
 136         uint32_t psipmr = 0;
 137         struct enetc_hw *enetc_hw = &hw->hw;
 138
 139         PMD_INIT_FUNC_TRACE();
 140         /* Calculating and storing the base HW addresses */
 141         hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
 142         hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
 143
 144         /* Enabling Station Interface */
 145         enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
 146
 147         /* Setting to accept broadcast packets for each inetrface */
 148         psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) |
 149                   ENETC_PSIPMR_SET_VLAN_MP(0);
 150         psipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) |
 151                   ENETC_PSIPMR_SET_VLAN_MP(1);
 152         psipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) |
 153                   ENETC_PSIPMR_SET_VLAN_MP(2);
 154
 155         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 156
 157         /* Enabling broadcast address */
 158         enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), 0xFFFFFFFF);
 159         enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), 0xFFFF << 16);
 160
 161         return 0;
 162 }
 163
 164 static void
 165 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 166                     struct rte_eth_dev_info *dev_info)
 167 {
 168         PMD_INIT_FUNC_TRACE();
 169         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 170                 .nb_max = MAX_BD_COUNT,
 171                 .nb_min = MIN_BD_COUNT,
 172                 .nb_align = BD_ALIGN,
 173         };
 174         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 175                 .nb_max = MAX_BD_COUNT,
 176                 .nb_min = MIN_BD_COUNT,
 177                 .nb_align = BD_ALIGN,
 178         };
 179         dev_info->max_rx_queues = MAX_RX_RINGS;
 180         dev_info->max_tx_queues = MAX_TX_RINGS;
 181         dev_info->max_rx_pktlen = 1500;
 182 }
 183
 184 static int
 185 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
 186 {
 187         int size;
 188
 189         size = nb_desc * sizeof(struct enetc_swbd);
 190         txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 191         if (txr->q_swbd == NULL)
 192                 return -ENOMEM;
 193
 194         size = nb_desc * sizeof(struct enetc_tx_bd);
 195         txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 196         if (txr->bd_base == NULL) {
 197                 rte_free(txr->q_swbd);
 198                 txr->q_swbd = NULL;
 199                 return -ENOMEM;
 200         }
 201
 202         txr->bd_count = nb_desc;
 203         txr->next_to_clean = 0;
 204         txr->next_to_use = 0;
 205
 206         return 0;
 207 }
 208
 209 static void
 210 enetc_free_bdr(struct enetc_bdr *rxr)
 211 {
 212         rte_free(rxr->q_swbd);
 213         rte_free(rxr->bd_base);
 214         rxr->q_swbd = NULL;
 215         rxr->bd_base = NULL;
 216 }
 217
 218 static void
 219 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
 220 {
 221         int idx = tx_ring->index;
 222         uint32_t tbmr;
 223         phys_addr_t bd_address;
 224
 225         bd_address = (phys_addr_t)
 226                      rte_mem_virt2iova((const void *)tx_ring->bd_base);
 227         enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
 228                        lower_32_bits((uint64_t)bd_address));
 229         enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
 230                        upper_32_bits((uint64_t)bd_address));
 231         enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
 232                        ENETC_RTBLENR_LEN(tx_ring->bd_count));
 233
 234         tbmr = ENETC_TBMR_EN;
 235         /* enable ring */
 236         enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
 237         enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
 238         enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
 239         tx_ring->tcir = (void *)((size_t)hw->reg +
 240                         ENETC_BDR(TX, idx, ENETC_TBCIR));
 241         tx_ring->tcisr = (void *)((size_t)hw->reg +
 242                          ENETC_BDR(TX, idx, ENETC_TBCISR));
 243 }
 244
 245 static int
 246 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
 247                          uint16_t queue_idx,
 248                          uint16_t nb_desc)
 249 {
 250         int err;
 251         struct enetc_bdr *tx_ring;
 252         struct rte_eth_dev_data *data = dev->data;
 253         struct enetc_eth_adapter *priv =
 254                         ENETC_DEV_PRIVATE(data->dev_private);
 255
 256         tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 257         if (tx_ring == NULL) {
 258                 ENETC_PMD_ERR("Failed to allocate TX ring memory");
 259                 err = -ENOMEM;
 260                 return -1;
 261         }
 262
 263         err = enetc_alloc_txbdr(tx_ring, nb_desc);
 264         if (err)
 265                 goto fail;
 266
 267         tx_ring->index = queue_idx;
 268         tx_ring->ndev = dev;
 269         enetc_setup_txbdr(&priv->hw.hw, tx_ring);
 270         data->tx_queues[queue_idx] = tx_ring;
 271
 272         return 0;
 273 fail:
 274         rte_free(tx_ring);
 275
 276         return err;
 277 }
 278
 279 static int
 280 enetc_tx_queue_setup(struct rte_eth_dev *dev,
 281                      uint16_t queue_idx,
 282                      uint16_t nb_desc,
 283                      unsigned int socket_id __rte_unused,
 284                      const struct rte_eth_txconf *tx_conf __rte_unused)
 285 {
 286         int err = 0;
 287
 288         PMD_INIT_FUNC_TRACE();
 289         if (nb_desc > MAX_BD_COUNT)
 290                 return -1;
 291
 292         err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
 293
 294         return err;
 295 }
 296
 297 static void
 298 enetc_tx_queue_release(void *txq)
 299 {
 300         if (txq == NULL)
 301                 return;
 302
 303         struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
 304         struct enetc_eth_hw *eth_hw =
 305                 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
 306         struct enetc_hw *hw;
 307         struct enetc_swbd *tx_swbd;
 308         int i;
 309         uint32_t val;
 310
 311         /* Disable the ring */
 312         hw = &eth_hw->hw;
 313         val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
 314         val &= (~ENETC_TBMR_EN);
 315         enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
 316
 317         /* clean the ring*/
 318         i = tx_ring->next_to_clean;
 319         tx_swbd = &tx_ring->q_swbd[i];
 320         while (tx_swbd->buffer_addr != NULL) {
 321                 rte_pktmbuf_free(tx_swbd->buffer_addr);
 322                 tx_swbd->buffer_addr = NULL;
 323                 tx_swbd++;
 324                 i++;
 325                 if (unlikely(i == tx_ring->bd_count)) {
 326                         i = 0;
 327                         tx_swbd = &tx_ring->q_swbd[i];
 328                 }
 329         }
 330
 331         enetc_free_bdr(tx_ring);
 332         rte_free(tx_ring);
 333 }
 334
 335 static int
 336 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
 337                   uint16_t nb_rx_desc)
 338 {
 339         int size;
 340
 341         size = nb_rx_desc * sizeof(struct enetc_swbd);
 342         rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 343         if (rxr->q_swbd == NULL)
 344                 return -ENOMEM;
 345
 346         size = nb_rx_desc * sizeof(union enetc_rx_bd);
 347         rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
 348         if (rxr->bd_base == NULL) {
 349                 rte_free(rxr->q_swbd);
 350                 rxr->q_swbd = NULL;
 351                 return -ENOMEM;
 352         }
 353
 354         rxr->bd_count = nb_rx_desc;
 355         rxr->next_to_clean = 0;
 356         rxr->next_to_use = 0;
 357         rxr->next_to_alloc = 0;
 358
 359         return 0;
 360 }
 361
 362 static void
 363 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
 364                   struct rte_mempool *mb_pool)
 365 {
 366         int idx = rx_ring->index;
 367         uint16_t buf_size;
 368         phys_addr_t bd_address;
 369
 370         bd_address = (phys_addr_t)
 371                      rte_mem_virt2iova((const void *)rx_ring->bd_base);
 372         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
 373                        lower_32_bits((uint64_t)bd_address));
 374         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
 375                        upper_32_bits((uint64_t)bd_address));
 376         enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
 377                        ENETC_RTBLENR_LEN(rx_ring->bd_count));
 378
 379         rx_ring->mb_pool = mb_pool;
 380         rx_ring->rcir = (void *)((size_t)hw->reg +
 381                         ENETC_BDR(RX, idx, ENETC_RBCIR));
 382         enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
 383         buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
 384                    RTE_PKTMBUF_HEADROOM);
 385         enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
 386         /* enable ring */
 387         enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
 388         enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
 389 }
 390
 391 static int
 392 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
 393                          uint16_t rx_queue_id,
 394                          uint16_t nb_rx_desc,
 395                          struct rte_mempool *mb_pool)
 396 {
 397         int err;
 398         struct enetc_bdr *rx_ring;
 399         struct rte_eth_dev_data *data =  dev->data;
 400         struct enetc_eth_adapter *adapter =
 401                         ENETC_DEV_PRIVATE(data->dev_private);
 402
 403         rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 404         if (rx_ring == NULL) {
 405                 ENETC_PMD_ERR("Failed to allocate RX ring memory");
 406                 err = -ENOMEM;
 407                 return err;
 408         }
 409
 410         err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
 411         if (err)
 412                 goto fail;
 413
 414         rx_ring->index = rx_queue_id;
 415         rx_ring->ndev = dev;
 416         enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
 417         data->rx_queues[rx_queue_id] = rx_ring;
 418
 419         return 0;
 420 fail:
 421         rte_free(rx_ring);
 422
 423         return err;
 424 }
 425
 426 static int
 427 enetc_rx_queue_setup(struct rte_eth_dev *dev,
 428                      uint16_t rx_queue_id,
 429                      uint16_t nb_rx_desc,
 430                      unsigned int socket_id __rte_unused,
 431                      const struct rte_eth_rxconf *rx_conf __rte_unused,
 432                      struct rte_mempool *mb_pool)
 433 {
 434         int err = 0;
 435
 436         PMD_INIT_FUNC_TRACE();
 437         if (nb_rx_desc > MAX_BD_COUNT)
 438                 return -1;
 439
 440         err = enetc_alloc_rx_resources(dev, rx_queue_id,
 441                                        nb_rx_desc,
 442                                        mb_pool);
 443
 444         return err;
 445 }
 446
 447 static void
 448 enetc_rx_queue_release(void *rxq)
 449 {
 450         if (rxq == NULL)
 451                 return;
 452
 453         struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
 454         struct enetc_eth_hw *eth_hw =
 455                 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
 456         struct enetc_swbd *q_swbd;
 457         struct enetc_hw *hw;
 458         uint32_t val;
 459         int i;
 460
 461         /* Disable the ring */
 462         hw = &eth_hw->hw;
 463         val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
 464         val &= (~ENETC_RBMR_EN);
 465         enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
 466
 467         /* Clean the ring */
 468         i = rx_ring->next_to_clean;
 469         q_swbd = &rx_ring->q_swbd[i];
 470         while (i != rx_ring->next_to_use) {
 471                 rte_pktmbuf_free(q_swbd->buffer_addr);
 472                 q_swbd->buffer_addr = NULL;
 473                 q_swbd++;
 474                 i++;
 475                 if (unlikely(i == rx_ring->bd_count)) {
 476                         i = 0;
 477                         q_swbd = &rx_ring->q_swbd[i];
 478                 }
 479         }
 480
 481         enetc_free_bdr(rx_ring);
 482         rte_free(rx_ring);
 483 }
 484
 485 static
 486 int enetc_stats_get(struct rte_eth_dev *dev,
 487                     struct rte_eth_stats *stats)
 488 {
 489         struct enetc_eth_hw *hw =
 490                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 491         struct enetc_hw *enetc_hw = &hw->hw;
 492
 493         /* Total received packets, bad + good, if we want to get counters of
 494          * only good received packets then use ENETC_PM0_RFRM,
 495          * ENETC_PM0_TFRM registers.
 496          */
 497         stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
 498         stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
 499         stats->ibytes =  enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
 500         stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
 501         /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
 502          * truncated packets
 503          */
 504         stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
 505         stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
 506         stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
 507
 508         return 0;
 509 }
 510
 511 static void
 512 enetc_stats_reset(struct rte_eth_dev *dev)
 513 {
 514         struct enetc_eth_hw *hw =
 515                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 516         struct enetc_hw *enetc_hw = &hw->hw;
 517
 518         enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
 519 }
 520
 521 static void
 522 enetc_dev_close(struct rte_eth_dev *dev)
 523 {
 524         uint16_t i;
 525
 526         PMD_INIT_FUNC_TRACE();
 527         enetc_dev_stop(dev);
 528
 529         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 530                 enetc_rx_queue_release(dev->data->rx_queues[i]);
 531                 dev->data->rx_queues[i] = NULL;
 532         }
 533         dev->data->nb_rx_queues = 0;
 534
 535         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 536                 enetc_tx_queue_release(dev->data->tx_queues[i]);
 537                 dev->data->tx_queues[i] = NULL;
 538         }
 539         dev->data->nb_tx_queues = 0;
 540 }
 541
 542 /*
 543  * The set of PCI devices this driver supports
 544  */
 545 static const struct rte_pci_id pci_id_enetc_map[] = {
 546         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
 547         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
 548         { .vendor_id = 0, /* sentinel */ },
 549 };
 550
 551 /* Features supported by this driver */
 552 static const struct eth_dev_ops enetc_ops = {
 553         .dev_configure        = enetc_dev_configure,
 554         .dev_start            = enetc_dev_start,
 555         .dev_stop             = enetc_dev_stop,
 556         .dev_close            = enetc_dev_close,
 557         .link_update          = enetc_link_update,
 558         .stats_get            = enetc_stats_get,
 559         .stats_reset          = enetc_stats_reset,
 560         .dev_infos_get        = enetc_dev_infos_get,
 561         .rx_queue_setup       = enetc_rx_queue_setup,
 562         .rx_queue_release     = enetc_rx_queue_release,
 563         .tx_queue_setup       = enetc_tx_queue_setup,
 564         .tx_queue_release     = enetc_tx_queue_release,
 565         .dev_supported_ptypes_get = enetc_supported_ptypes_get,
 566 };
 567
 568 /**
 569  * Initialisation of the enetc device
 570  *
 571  * @param eth_dev
 572  *   - Pointer to the structure rte_eth_dev
 573  *
 574  * @return
 575  *   - On success, zero.
 576  *   - On failure, negative value.
 577  */
 578 static int
 579 enetc_dev_init(struct rte_eth_dev *eth_dev)
 580 {
 581         int error = 0;
 582         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 583         struct enetc_eth_hw *hw =
 584                 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
 585
 586         PMD_INIT_FUNC_TRACE();
 587         eth_dev->dev_ops = &enetc_ops;
 588         eth_dev->rx_pkt_burst = &enetc_recv_pkts;
 589         eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
 590
 591         /* Retrieving and storing the HW base address of device */
 592         hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
 593         hw->device_id = pci_dev->id.device_id;
 594
 595         error = enetc_hardware_init(hw);
 596         if (error != 0) {
 597                 ENETC_PMD_ERR("Hardware initialization failed");
 598                 return -1;
 599         }
 600
 601         /* Allocate memory for storing MAC addresses */
 602         eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
 603         if (!eth_dev->data->mac_addrs) {
 604                 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
 605                               "store MAC addresses",
 606                               ETHER_ADDR_LEN * 1);
 607                 error = -ENOMEM;
 608                 return -1;
 609         }
 610
 611         /* Copy the permanent MAC address */
 612         ether_addr_copy((struct ether_addr *)hw->mac.addr,
 613                         &eth_dev->data->mac_addrs[0]);
 614
 615         ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
 616                         eth_dev->data->port_id, pci_dev->id.vendor_id,
 617                         pci_dev->id.device_id);
 618         return 0;
 619 }
 620
 621 static int
 622 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
 623 {
 624         PMD_INIT_FUNC_TRACE();
 625         return 0;
 626 }
 627
 628 static int
 629 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 630                            struct rte_pci_device *pci_dev)
 631 {
 632         return rte_eth_dev_pci_generic_probe(pci_dev,
 633                                              sizeof(struct enetc_eth_adapter),
 634                                              enetc_dev_init);
 635 }
 636
 637 static int
 638 enetc_pci_remove(struct rte_pci_device *pci_dev)
 639 {
 640         return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
 641 }
 642
 643 static struct rte_pci_driver rte_enetc_pmd = {
 644         .id_table = pci_id_enetc_map,
 645         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 646         .probe = enetc_pci_probe,
 647         .remove = enetc_pci_remove,
 648 };
 649
 650 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
 651 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
 652 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
 653
 654 RTE_INIT(enetc_pmd_init_log)
 655 {
 656         enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
 657         if (enetc_logtype_pmd >= 0)
 658                 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
 659 }