1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
11 #include <rte_bus_pci.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_ethdev_pci.h>
14 #include <rte_string_fns.h>
16 #include "vnic_intr.h"
20 #include "vnic_enet.h"
23 int enicpmd_logtype_init;
24 int enicpmd_logtype_flow;
26 #define PMD_INIT_LOG(level, fmt, args...) \
27 rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \
28 "%s" fmt "\n", __func__, ##args)
30 #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
33 * The set of PCI devices this driver supports
35 #define CISCO_PCI_VENDOR_ID 0x1137
36 static const struct rte_pci_id pci_id_enic_map[] = {
37 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) },
38 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
39 {.vendor_id = 0, /* sentinel */},
42 RTE_INIT(enicpmd_init_log);
44 enicpmd_init_log(void)
46 enicpmd_logtype_init = rte_log_register("pmd.net.enic.init");
47 if (enicpmd_logtype_init >= 0)
48 rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE);
49 enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow");
50 if (enicpmd_logtype_flow >= 0)
51 rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE);
55 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
56 enum rte_filter_op filter_op, void *arg)
58 struct enic *enic = pmd_priv(eth_dev);
62 if (filter_op == RTE_ETH_FILTER_NOP)
65 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
69 case RTE_ETH_FILTER_ADD:
70 case RTE_ETH_FILTER_UPDATE:
71 ret = enic_fdir_add_fltr(enic,
72 (struct rte_eth_fdir_filter *)arg);
75 case RTE_ETH_FILTER_DELETE:
76 ret = enic_fdir_del_fltr(enic,
77 (struct rte_eth_fdir_filter *)arg);
80 case RTE_ETH_FILTER_STATS:
81 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
84 case RTE_ETH_FILTER_FLUSH:
85 dev_warning(enic, "unsupported operation %u", filter_op);
88 case RTE_ETH_FILTER_INFO:
89 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
92 dev_err(enic, "unknown operation %u", filter_op);
100 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
101 enum rte_filter_type filter_type,
102 enum rte_filter_op filter_op,
107 ENICPMD_FUNC_TRACE();
109 switch (filter_type) {
110 case RTE_ETH_FILTER_GENERIC:
111 if (filter_op != RTE_ETH_FILTER_GET)
113 *(const void **)arg = &enic_flow_ops;
115 case RTE_ETH_FILTER_FDIR:
116 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
119 dev_warning(enic, "Filter type (%d) not supported",
128 static void enicpmd_dev_tx_queue_release(void *txq)
130 ENICPMD_FUNC_TRACE();
132 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
138 static int enicpmd_dev_setup_intr(struct enic *enic)
143 ENICPMD_FUNC_TRACE();
145 /* Are we done with the init of all the queues? */
146 for (index = 0; index < enic->cq_count; index++) {
147 if (!enic->cq[index].ctrl)
150 if (enic->cq_count != index)
152 for (index = 0; index < enic->wq_count; index++) {
153 if (!enic->wq[index].ctrl)
156 if (enic->wq_count != index)
158 /* check start of packet (SOP) RQs only in case scatter is disabled. */
159 for (index = 0; index < enic->rq_count; index++) {
160 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
163 if (enic->rq_count != index)
166 ret = enic_alloc_intr_resources(enic);
168 dev_err(enic, "alloc intr failed\n");
171 enic_init_vnic_resources(enic);
173 ret = enic_setup_finish(enic);
175 dev_err(enic, "setup could not be finished\n");
180 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
183 unsigned int socket_id,
184 __rte_unused const struct rte_eth_txconf *tx_conf)
187 struct enic *enic = pmd_priv(eth_dev);
189 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
190 return -E_RTE_SECONDARY;
192 ENICPMD_FUNC_TRACE();
193 RTE_ASSERT(queue_idx < enic->conf_wq_count);
194 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];
196 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
198 dev_err(enic, "error in allocating wq\n");
202 return enicpmd_dev_setup_intr(enic);
205 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
208 struct enic *enic = pmd_priv(eth_dev);
210 ENICPMD_FUNC_TRACE();
212 enic_start_wq(enic, queue_idx);
217 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
221 struct enic *enic = pmd_priv(eth_dev);
223 ENICPMD_FUNC_TRACE();
225 ret = enic_stop_wq(enic, queue_idx);
227 dev_err(enic, "error in stopping wq %d\n", queue_idx);
232 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
235 struct enic *enic = pmd_priv(eth_dev);
237 ENICPMD_FUNC_TRACE();
239 enic_start_rq(enic, queue_idx);
244 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
248 struct enic *enic = pmd_priv(eth_dev);
250 ENICPMD_FUNC_TRACE();
252 ret = enic_stop_rq(enic, queue_idx);
254 dev_err(enic, "error in stopping rq %d\n", queue_idx);
259 static void enicpmd_dev_rx_queue_release(void *rxq)
261 ENICPMD_FUNC_TRACE();
263 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
269 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
270 uint16_t rx_queue_id)
272 struct enic *enic = pmd_priv(dev);
273 uint32_t queue_count = 0;
279 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
280 cq = &enic->cq[enic_cq_rq(enic, rq_num)];
281 cq_idx = cq->to_clean;
283 cq_tail = ioread32(&cq->ctrl->cq_tail);
285 if (cq_tail < cq_idx)
286 cq_tail += cq->ring.desc_count;
288 queue_count = cq_tail - cq_idx;
293 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
296 unsigned int socket_id,
297 const struct rte_eth_rxconf *rx_conf,
298 struct rte_mempool *mp)
301 struct enic *enic = pmd_priv(eth_dev);
303 ENICPMD_FUNC_TRACE();
305 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
306 return -E_RTE_SECONDARY;
307 RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
308 eth_dev->data->rx_queues[queue_idx] =
309 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
311 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
312 rx_conf->rx_free_thresh);
314 dev_err(enic, "error in allocating rq\n");
318 return enicpmd_dev_setup_intr(enic);
321 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
323 struct enic *enic = pmd_priv(eth_dev);
326 ENICPMD_FUNC_TRACE();
328 offloads = eth_dev->data->dev_conf.rxmode.offloads;
329 if (mask & ETH_VLAN_STRIP_MASK) {
330 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
331 enic->ig_vlan_strip_en = 1;
333 enic->ig_vlan_strip_en = 0;
336 if ((mask & ETH_VLAN_FILTER_MASK) &&
337 (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
339 "Configuration of VLAN filter is not supported\n");
342 if ((mask & ETH_VLAN_EXTEND_MASK) &&
343 (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
345 "Configuration of extended VLAN is not supported\n");
348 return enic_set_vlan_strip(enic);
351 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
355 struct enic *enic = pmd_priv(eth_dev);
357 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
358 return -E_RTE_SECONDARY;
360 ENICPMD_FUNC_TRACE();
361 ret = enic_set_vnic_res(enic);
363 dev_err(enic, "Set vNIC resource num failed, aborting\n");
367 enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
368 DEV_RX_OFFLOAD_CHECKSUM);
369 /* All vlan offload masks to apply the current settings */
370 mask = ETH_VLAN_STRIP_MASK |
371 ETH_VLAN_FILTER_MASK |
372 ETH_VLAN_EXTEND_MASK;
373 ret = enicpmd_vlan_offload_set(eth_dev, mask);
375 dev_err(enic, "Failed to configure VLAN offloads\n");
379 * Initialize RSS with the default reta and key. If the user key is
380 * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
383 return enic_init_rss_nic_cfg(enic);
387 * It returns 0 on success.
389 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
391 struct enic *enic = pmd_priv(eth_dev);
393 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
394 return -E_RTE_SECONDARY;
396 ENICPMD_FUNC_TRACE();
397 return enic_enable(enic);
401 * Stop device: disable rx and tx functions to allow for reconfiguring.
403 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
405 struct rte_eth_link link;
406 struct enic *enic = pmd_priv(eth_dev);
408 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
411 ENICPMD_FUNC_TRACE();
413 memset(&link, 0, sizeof(link));
414 rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link,
415 *(uint64_t *)ð_dev->data->dev_link,
422 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
424 struct enic *enic = pmd_priv(eth_dev);
426 ENICPMD_FUNC_TRACE();
430 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
431 __rte_unused int wait_to_complete)
433 struct enic *enic = pmd_priv(eth_dev);
435 ENICPMD_FUNC_TRACE();
436 return enic_link_update(enic);
439 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
440 struct rte_eth_stats *stats)
442 struct enic *enic = pmd_priv(eth_dev);
444 ENICPMD_FUNC_TRACE();
445 return enic_dev_stats_get(enic, stats);
448 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
450 struct enic *enic = pmd_priv(eth_dev);
452 ENICPMD_FUNC_TRACE();
453 enic_dev_stats_clear(enic);
456 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
457 struct rte_eth_dev_info *device_info)
459 struct enic *enic = pmd_priv(eth_dev);
461 ENICPMD_FUNC_TRACE();
462 device_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
463 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
464 device_info->max_rx_queues = enic->conf_rq_count / 2;
465 device_info->max_tx_queues = enic->conf_wq_count;
466 device_info->min_rx_bufsize = ENIC_MIN_MTU;
467 /* "Max" mtu is not a typo. HW receives packet sizes up to the
468 * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
469 * a hint to the driver to size receive buffers accordingly so that
470 * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
471 * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
474 device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
475 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR;
476 device_info->rx_offload_capa =
477 DEV_RX_OFFLOAD_VLAN_STRIP |
478 DEV_RX_OFFLOAD_IPV4_CKSUM |
479 DEV_RX_OFFLOAD_UDP_CKSUM |
480 DEV_RX_OFFLOAD_TCP_CKSUM;
481 device_info->tx_offload_capa =
482 DEV_TX_OFFLOAD_VLAN_INSERT |
483 DEV_TX_OFFLOAD_IPV4_CKSUM |
484 DEV_TX_OFFLOAD_UDP_CKSUM |
485 DEV_TX_OFFLOAD_TCP_CKSUM |
486 DEV_TX_OFFLOAD_TCP_TSO;
487 device_info->default_rxconf = (struct rte_eth_rxconf) {
488 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
490 device_info->reta_size = enic->reta_size;
491 device_info->hash_key_size = enic->hash_key_size;
492 device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
495 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
497 static const uint32_t ptypes[] = {
499 RTE_PTYPE_L2_ETHER_VLAN,
500 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
501 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
505 RTE_PTYPE_L4_NONFRAG,
509 if (dev->rx_pkt_burst == enic_recv_pkts)
514 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
516 struct enic *enic = pmd_priv(eth_dev);
518 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
521 ENICPMD_FUNC_TRACE();
524 enic_add_packet_filter(enic);
527 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
529 struct enic *enic = pmd_priv(eth_dev);
531 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
534 ENICPMD_FUNC_TRACE();
536 enic_add_packet_filter(enic);
539 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
541 struct enic *enic = pmd_priv(eth_dev);
543 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
546 ENICPMD_FUNC_TRACE();
548 enic_add_packet_filter(enic);
551 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
553 struct enic *enic = pmd_priv(eth_dev);
555 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
558 ENICPMD_FUNC_TRACE();
560 enic_add_packet_filter(enic);
563 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
564 struct ether_addr *mac_addr,
565 __rte_unused uint32_t index, __rte_unused uint32_t pool)
567 struct enic *enic = pmd_priv(eth_dev);
569 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
570 return -E_RTE_SECONDARY;
572 ENICPMD_FUNC_TRACE();
573 return enic_set_mac_address(enic, mac_addr->addr_bytes);
576 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
578 struct enic *enic = pmd_priv(eth_dev);
580 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
583 ENICPMD_FUNC_TRACE();
584 enic_del_mac_address(enic, index);
587 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
589 struct enic *enic = pmd_priv(eth_dev);
591 ENICPMD_FUNC_TRACE();
592 return enic_set_mtu(enic, mtu);
595 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
596 struct rte_eth_rss_reta_entry64
600 struct enic *enic = pmd_priv(dev);
601 uint16_t i, idx, shift;
603 ENICPMD_FUNC_TRACE();
604 if (reta_size != ENIC_RSS_RETA_SIZE) {
605 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
606 reta_size, ENIC_RSS_RETA_SIZE);
610 for (i = 0; i < reta_size; i++) {
611 idx = i / RTE_RETA_GROUP_SIZE;
612 shift = i % RTE_RETA_GROUP_SIZE;
613 if (reta_conf[idx].mask & (1ULL << shift))
614 reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
615 enic->rss_cpu.cpu[i / 4].b[i % 4]);
621 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
622 struct rte_eth_rss_reta_entry64
626 struct enic *enic = pmd_priv(dev);
627 union vnic_rss_cpu rss_cpu;
628 uint16_t i, idx, shift;
630 ENICPMD_FUNC_TRACE();
631 if (reta_size != ENIC_RSS_RETA_SIZE) {
632 dev_err(enic, "reta_update: wrong reta_size. given=%u"
634 reta_size, ENIC_RSS_RETA_SIZE);
638 * Start with the current reta and modify it per reta_conf, as we
639 * need to push the entire reta even if we only modify one entry.
641 rss_cpu = enic->rss_cpu;
642 for (i = 0; i < reta_size; i++) {
643 idx = i / RTE_RETA_GROUP_SIZE;
644 shift = i % RTE_RETA_GROUP_SIZE;
645 if (reta_conf[idx].mask & (1ULL << shift))
646 rss_cpu.cpu[i / 4].b[i % 4] =
647 enic_rte_rq_idx_to_sop_idx(
648 reta_conf[idx].reta[shift]);
650 return enic_set_rss_reta(enic, &rss_cpu);
653 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
654 struct rte_eth_rss_conf *rss_conf)
656 struct enic *enic = pmd_priv(dev);
658 ENICPMD_FUNC_TRACE();
659 return enic_set_rss_conf(enic, rss_conf);
662 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
663 struct rte_eth_rss_conf *rss_conf)
665 struct enic *enic = pmd_priv(dev);
667 ENICPMD_FUNC_TRACE();
668 if (rss_conf == NULL)
670 if (rss_conf->rss_key != NULL &&
671 rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
672 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
674 rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
677 rss_conf->rss_hf = enic->rss_hf;
678 if (rss_conf->rss_key != NULL) {
680 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
681 rss_conf->rss_key[i] =
682 enic->rss_key.key[i / 10].b[i % 10];
684 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
689 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
690 .dev_configure = enicpmd_dev_configure,
691 .dev_start = enicpmd_dev_start,
692 .dev_stop = enicpmd_dev_stop,
693 .dev_set_link_up = NULL,
694 .dev_set_link_down = NULL,
695 .dev_close = enicpmd_dev_close,
696 .promiscuous_enable = enicpmd_dev_promiscuous_enable,
697 .promiscuous_disable = enicpmd_dev_promiscuous_disable,
698 .allmulticast_enable = enicpmd_dev_allmulticast_enable,
699 .allmulticast_disable = enicpmd_dev_allmulticast_disable,
700 .link_update = enicpmd_dev_link_update,
701 .stats_get = enicpmd_dev_stats_get,
702 .stats_reset = enicpmd_dev_stats_reset,
703 .queue_stats_mapping_set = NULL,
704 .dev_infos_get = enicpmd_dev_info_get,
705 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
706 .mtu_set = enicpmd_mtu_set,
707 .vlan_filter_set = NULL,
708 .vlan_tpid_set = NULL,
709 .vlan_offload_set = enicpmd_vlan_offload_set,
710 .vlan_strip_queue_set = NULL,
711 .rx_queue_start = enicpmd_dev_rx_queue_start,
712 .rx_queue_stop = enicpmd_dev_rx_queue_stop,
713 .tx_queue_start = enicpmd_dev_tx_queue_start,
714 .tx_queue_stop = enicpmd_dev_tx_queue_stop,
715 .rx_queue_setup = enicpmd_dev_rx_queue_setup,
716 .rx_queue_release = enicpmd_dev_rx_queue_release,
717 .rx_queue_count = enicpmd_dev_rx_queue_count,
718 .rx_descriptor_done = NULL,
719 .tx_queue_setup = enicpmd_dev_tx_queue_setup,
720 .tx_queue_release = enicpmd_dev_tx_queue_release,
723 .flow_ctrl_get = NULL,
724 .flow_ctrl_set = NULL,
725 .priority_flow_ctrl_set = NULL,
726 .mac_addr_add = enicpmd_add_mac_addr,
727 .mac_addr_remove = enicpmd_remove_mac_addr,
728 .filter_ctrl = enicpmd_dev_filter_ctrl,
729 .reta_query = enicpmd_dev_rss_reta_query,
730 .reta_update = enicpmd_dev_rss_reta_update,
731 .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get,
732 .rss_hash_update = enicpmd_dev_rss_hash_update,
735 struct enic *enicpmd_list_head = NULL;
736 /* Initialize the driver
737 * It returns 0 on success.
739 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
741 struct rte_pci_device *pdev;
742 struct rte_pci_addr *addr;
743 struct enic *enic = pmd_priv(eth_dev);
745 ENICPMD_FUNC_TRACE();
747 enic->port_id = eth_dev->data->port_id;
748 enic->rte_dev = eth_dev;
749 eth_dev->dev_ops = &enicpmd_eth_dev_ops;
750 eth_dev->rx_pkt_burst = &enic_recv_pkts;
751 eth_dev->tx_pkt_burst = &enic_xmit_pkts;
752 eth_dev->tx_pkt_prepare = &enic_prep_pkts;
754 pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
755 rte_eth_copy_pci_info(eth_dev, pdev);
759 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
760 addr->domain, addr->bus, addr->devid, addr->function);
762 return enic_probe(enic);
765 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
766 struct rte_pci_device *pci_dev)
768 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
769 eth_enicpmd_dev_init);
772 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
774 return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
777 static struct rte_pci_driver rte_enic_pmd = {
778 .id_table = pci_id_enic_map,
779 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
780 .probe = eth_enic_pci_probe,
781 .remove = eth_enic_pci_remove,
784 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
785 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
786 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");