drivers/net/hinic/hinic_pmd_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
   3  */
   4
   5 #include <rte_pci.h>
   6 #include <rte_bus_pci.h>
   7 #include <rte_ethdev_pci.h>
   8 #include <rte_mbuf.h>
   9 #include <rte_malloc.h>
  10 #include <rte_memcpy.h>
  11 #include <rte_mempool.h>
  12 #include <rte_errno.h>
  13 #include <rte_ether.h>
  14
  15 #include "base/hinic_compat.h"
  16 #include "base/hinic_pmd_hwdev.h"
  17 #include "base/hinic_pmd_hwif.h"
  18 #include "base/hinic_pmd_wq.h"
  19 #include "base/hinic_pmd_cfg.h"
  20 #include "base/hinic_pmd_mgmt.h"
  21 #include "base/hinic_pmd_cmdq.h"
  22 #include "base/hinic_pmd_niccfg.h"
  23 #include "base/hinic_pmd_nicio.h"
  24 #include "base/hinic_pmd_mbox.h"
  25 #include "hinic_pmd_ethdev.h"
  26 #include "hinic_pmd_tx.h"
  27 #include "hinic_pmd_rx.h"
  28
  29 /* Vendor ID used by Huawei devices */
  30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
  31
  32 /* Hinic devices */
  33 #define HINIC_DEV_ID_PRD                0x1822
  34 #define HINIC_DEV_ID_VF                 0x375E
  35 #define HINIC_DEV_ID_VF_HV              0x379E
  36
  37 /* Mezz card for Blade Server */
  38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
  39 #define HINIC_DEV_ID_MEZZ_40GE          0x020D
  40 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
  41
  42 /* 2*25G and 2*100G card */
  43 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
  44 #define HINIC_DEV_ID_1822_100GE         0x0200
  45
  46 #define HINIC_SERVICE_MODE_NIC          2
  47
  48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
  49
  50 #define DEFAULT_BASE_COS                4
  51 #define NR_MAX_COS                      8
  52
  53 #define HINIC_MIN_RX_BUF_SIZE           1024
  54 #define HINIC_MAX_UC_MAC_ADDRS          128
  55 #define HINIC_MAX_MC_MAC_ADDRS          2048
  56 /*
  57  * vlan_id is a 12 bit number.
  58  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
  59  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
  60  * The higher 7 bit val specifies VFTA array index.
  61  */
  62 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
  63 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
  64
  65 #define HINIC_VLAN_FILTER_EN            (1U << 0)
  66
  67 #define HINIC_MTU_TO_PKTLEN(mtu)        \
  68         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
  69
  70 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
  71         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
  72
  73 /* Driver-specific log messages type */
  74 int hinic_logtype;
  75
  76 struct hinic_xstats_name_off {
  77         char name[RTE_ETH_XSTATS_NAME_SIZE];
  78         u32  offset;
  79 };
  80
  81 #define HINIC_FUNC_STAT(_stat_item) {   \
  82         .name = #_stat_item, \
  83         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
  84 }
  85
  86 #define HINIC_PORT_STAT(_stat_item) { \
  87         .name = #_stat_item, \
  88         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
  89 }
  90
  91 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
  92         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
  93         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
  94         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
  95         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
  96         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
  97         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
  98
  99         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
 100         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
 101         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
 102         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
 103         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
 104         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
 105
 106         HINIC_FUNC_STAT(tx_discard_vport),
 107         HINIC_FUNC_STAT(rx_discard_vport),
 108         HINIC_FUNC_STAT(tx_err_vport),
 109         HINIC_FUNC_STAT(rx_err_vport),
 110 };
 111
 112 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
 113                 sizeof(hinic_vport_stats_strings[0]))
 114
 115 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
 116         HINIC_PORT_STAT(mac_rx_total_pkt_num),
 117         HINIC_PORT_STAT(mac_rx_total_oct_num),
 118         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
 119         HINIC_PORT_STAT(mac_rx_bad_oct_num),
 120         HINIC_PORT_STAT(mac_rx_good_pkt_num),
 121         HINIC_PORT_STAT(mac_rx_good_oct_num),
 122         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
 123         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
 124         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
 125         HINIC_PORT_STAT(mac_tx_total_pkt_num),
 126         HINIC_PORT_STAT(mac_tx_total_oct_num),
 127         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
 128         HINIC_PORT_STAT(mac_tx_bad_oct_num),
 129         HINIC_PORT_STAT(mac_tx_good_pkt_num),
 130         HINIC_PORT_STAT(mac_tx_good_oct_num),
 131         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
 132         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
 133         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
 134         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
 135         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
 136         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
 137         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
 138         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
 139         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
 140         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
 141         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
 142         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
 143         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
 144         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
 145         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
 146         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
 147         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
 148         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
 149         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
 150         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
 151         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
 152         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
 153         HINIC_PORT_STAT(mac_rx_mac_pause_num),
 154         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
 155         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
 156         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
 157         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
 158         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
 159         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
 160         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
 161         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
 162         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
 163         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
 164         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
 165         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
 166         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
 167         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
 168         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
 169         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
 170         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
 171         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
 172         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
 173         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
 174         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
 175         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
 176         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
 177         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
 178         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
 179         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
 180         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
 181         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
 182         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
 183         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
 184         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
 185         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
 186         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
 187         HINIC_PORT_STAT(mac_tx_mac_pause_num),
 188         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
 189         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
 190         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
 191         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
 192         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
 193         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
 194         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
 195         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
 196         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
 197         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
 198         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
 199         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
 200         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
 201 };
 202
 203 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
 204                 sizeof(hinic_phyport_stats_strings[0]))
 205
 206 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
 207         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
 208         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
 209 };
 210
 211 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
 212                 sizeof(hinic_rxq_stats_strings[0]))
 213
 214 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
 215         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
 216         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
 217         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
 218         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
 219         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
 220 };
 221
 222 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
 223                 sizeof(hinic_txq_stats_strings[0]))
 224
 225 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
 226 {
 227         if (HINIC_IS_VF(nic_dev->hwdev)) {
 228                 return (HINIC_VPORT_XSTATS_NUM +
 229                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 230                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 231         } else {
 232                 return (HINIC_VPORT_XSTATS_NUM +
 233                         HINIC_PHYPORT_XSTATS_NUM +
 234                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
 235                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
 236         }
 237 }
 238
 239 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
 240         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 241         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 242         .nb_align = HINIC_RXD_ALIGN,
 243 };
 244
 245 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
 246         .nb_max = HINIC_MAX_QUEUE_DEPTH,
 247         .nb_min = HINIC_MIN_QUEUE_DEPTH,
 248         .nb_align = HINIC_TXD_ALIGN,
 249 };
 250
 251 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 252
 253 /**
 254  * Interrupt handler triggered by NIC  for handling
 255  * specific event.
 256  *
 257  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
 258  **/
 259 static void hinic_dev_interrupt_handler(void *param)
 260 {
 261         struct rte_eth_dev *dev = param;
 262         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 263
 264         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
 265                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
 266                             nic_dev->proc_dev_name, dev->data->port_id);
 267                 return;
 268         }
 269
 270         /* aeq0 msg handler */
 271         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
 272 }
 273
 274 /**
 275  * Ethernet device configuration.
 276  *
 277  * Prepare the driver for a given number of TX and RX queues, mtu size
 278  * and configure RSS.
 279  *
 280  * @param dev
 281  *   Pointer to Ethernet device structure.
 282  *
 283  * @return
 284  *   0 on success, negative error value otherwise.
 285  */
 286 static int hinic_dev_configure(struct rte_eth_dev *dev)
 287 {
 288         struct hinic_nic_dev *nic_dev;
 289         struct hinic_nic_io *nic_io;
 290         int err;
 291
 292         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 293         nic_io = nic_dev->hwdev->nic_io;
 294
 295         nic_dev->num_sq =  dev->data->nb_tx_queues;
 296         nic_dev->num_rq = dev->data->nb_rx_queues;
 297
 298         nic_io->num_sqs =  dev->data->nb_tx_queues;
 299         nic_io->num_rqs = dev->data->nb_rx_queues;
 300
 301         /* queue pair is max_num(sq, rq) */
 302         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
 303                         nic_dev->num_sq : nic_dev->num_rq;
 304         nic_io->num_qps = nic_dev->num_qps;
 305
 306         if (nic_dev->num_qps > nic_io->max_qps) {
 307                 PMD_DRV_LOG(ERR,
 308                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
 309                         nic_dev->num_qps, nic_io->max_qps);
 310                 return -EINVAL;
 311         }
 312
 313         /* mtu size is 256~9600 */
 314         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
 315             dev->data->dev_conf.rxmode.max_rx_pkt_len >
 316             HINIC_MAX_JUMBO_FRAME_SIZE) {
 317                 PMD_DRV_LOG(ERR,
 318                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
 319                         "expect between %d and %d",
 320                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
 321                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
 322                 return -EINVAL;
 323         }
 324
 325         nic_dev->mtu_size =
 326                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
 327
 328         /* rss template */
 329         err = hinic_config_mq_mode(dev, TRUE);
 330         if (err) {
 331                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
 332                 return err;
 333         }
 334
 335         /* init vlan offoad */
 336         err = hinic_vlan_offload_set(dev,
 337                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 338         if (err) {
 339                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
 340                 (void)hinic_config_mq_mode(dev, FALSE);
 341                 return err;
 342         }
 343
 344         /*clear fdir filter flag in function table*/
 345         hinic_free_fdir_filter(nic_dev);
 346
 347         return HINIC_OK;
 348 }
 349
 350 /**
 351  * DPDK callback to create the receive queue.
 352  *
 353  * @param dev
 354  *   Pointer to Ethernet device structure.
 355  * @param queue_idx
 356  *   RX queue index.
 357  * @param nb_desc
 358  *   Number of descriptors for receive queue.
 359  * @param socket_id
 360  *   NUMA socket on which memory must be allocated.
 361  * @param rx_conf
 362  *   Thresholds parameters (unused_).
 363  * @param mp
 364  *   Memory pool for buffer allocations.
 365  *
 366  * @return
 367  *   0 on success, negative error value otherwise.
 368  */
 369 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 370                          uint16_t nb_desc, unsigned int socket_id,
 371                          __rte_unused const struct rte_eth_rxconf *rx_conf,
 372                          struct rte_mempool *mp)
 373 {
 374         int rc;
 375         struct hinic_nic_dev *nic_dev;
 376         struct hinic_hwdev *hwdev;
 377         struct hinic_rxq *rxq;
 378         u16 rq_depth, rx_free_thresh;
 379         u32 buf_size;
 380
 381         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 382         hwdev = nic_dev->hwdev;
 383
 384         /* queue depth must be power of 2, otherwise will be aligned up */
 385         rq_depth = (nb_desc & (nb_desc - 1)) ?
 386                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 387
 388         /*
 389          * Validate number of receive descriptors.
 390          * It must not exceed hardware maximum and minimum.
 391          */
 392         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
 393                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
 394                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 395                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 396                             (int)nb_desc, (int)rq_depth,
 397                             (int)dev->data->port_id, (int)queue_idx);
 398                 return -EINVAL;
 399         }
 400
 401         /*
 402          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
 403          * descriptors are used or if the number of descriptors required
 404          * to transmit a packet is greater than the number of free RX
 405          * descriptors.
 406          * The following constraints must be satisfied:
 407          *  rx_free_thresh must be greater than 0.
 408          *  rx_free_thresh must be less than the size of the ring minus 1.
 409          * When set to zero use default values.
 410          */
 411         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
 412                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
 413         if (rx_free_thresh >= (rq_depth - 1)) {
 414                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
 415                             (unsigned int)rx_free_thresh,
 416                             (int)dev->data->port_id,
 417                             (int)queue_idx);
 418                 return -EINVAL;
 419         }
 420
 421         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
 422                                  RTE_CACHE_LINE_SIZE, socket_id);
 423         if (!rxq) {
 424                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
 425                             queue_idx, dev->data->name);
 426                 return -ENOMEM;
 427         }
 428         nic_dev->rxqs[queue_idx] = rxq;
 429
 430         /* alloc rx sq hw wqepage*/
 431         rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
 432         if (rc) {
 433                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
 434                             queue_idx, dev->data->name, rq_depth);
 435                 goto ceate_rq_fail;
 436         }
 437
 438         /* mbuf pool must be assigned before setup rx resources */
 439         rxq->mb_pool = mp;
 440
 441         rc =
 442         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
 443                                   RTE_PKTMBUF_HEADROOM, &buf_size);
 444         if (rc) {
 445                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
 446                             dev->data->name);
 447                 goto adjust_bufsize_fail;
 448         }
 449
 450         /* rx queue info, rearm control */
 451         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
 452         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
 453         rxq->nic_dev = nic_dev;
 454         rxq->q_id = queue_idx;
 455         rxq->q_depth = rq_depth;
 456         rxq->buf_len = (u16)buf_size;
 457         rxq->rx_free_thresh = rx_free_thresh;
 458
 459         /* the last point cant do mbuf rearm in bulk */
 460         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
 461
 462         /* device port identifier */
 463         rxq->port_id = dev->data->port_id;
 464
 465         /* alloc rx_cqe and prepare rq_wqe */
 466         rc = hinic_setup_rx_resources(rxq);
 467         if (rc) {
 468                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
 469                             queue_idx, dev->data->name);
 470                 goto setup_rx_res_err;
 471         }
 472
 473         /* record nic_dev rxq in rte_eth rx_queues */
 474         dev->data->rx_queues[queue_idx] = rxq;
 475
 476         return 0;
 477
 478 setup_rx_res_err:
 479 adjust_bufsize_fail:
 480         hinic_destroy_rq(hwdev, queue_idx);
 481
 482 ceate_rq_fail:
 483         rte_free(rxq);
 484
 485         return rc;
 486 }
 487
 488 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
 489 {
 490         struct hinic_rxq *rxq;
 491         struct hinic_nic_dev *nic_dev;
 492         int q_id = 0;
 493
 494         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 495
 496         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
 497                 rxq = dev->data->rx_queues[q_id];
 498
 499                 rxq->wq->cons_idx = 0;
 500                 rxq->wq->prod_idx = 0;
 501                 rxq->wq->delta = rxq->q_depth;
 502                 rxq->wq->mask = rxq->q_depth - 1;
 503
 504                 /* alloc mbuf to rq */
 505                 hinic_rx_alloc_pkts(rxq);
 506         }
 507 }
 508
 509 /**
 510  * DPDK callback to configure the transmit queue.
 511  *
 512  * @param dev
 513  *   Pointer to Ethernet device structure.
 514  * @param queue_idx
 515  *   Transmit queue index.
 516  * @param nb_desc
 517  *   Number of descriptors for transmit queue.
 518  * @param socket_id
 519  *   NUMA socket on which memory must be allocated.
 520  * @param tx_conf
 521  *   Tx queue configuration parameters.
 522  *
 523  * @return
 524  *   0 on success, negative error value otherwise.
 525  */
 526 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 527                          uint16_t nb_desc, unsigned int socket_id,
 528                          __rte_unused const struct rte_eth_txconf *tx_conf)
 529 {
 530         int rc;
 531         struct hinic_nic_dev *nic_dev;
 532         struct hinic_hwdev *hwdev;
 533         struct hinic_txq *txq;
 534         u16 sq_depth, tx_free_thresh;
 535
 536         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 537         hwdev = nic_dev->hwdev;
 538
 539         /* queue depth must be power of 2, otherwise will be aligned up */
 540         sq_depth = (nb_desc & (nb_desc - 1)) ?
 541                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
 542
 543         /*
 544          * Validate number of transmit descriptors.
 545          * It must not exceed hardware maximum and minimum.
 546          */
 547         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
 548                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
 549                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
 550                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
 551                           (int)nb_desc, (int)sq_depth,
 552                           (int)dev->data->port_id, (int)queue_idx);
 553                 return -EINVAL;
 554         }
 555
 556         /*
 557          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
 558          * descriptors are used or if the number of descriptors required
 559          * to transmit a packet is greater than the number of free TX
 560          * descriptors.
 561          * The following constraints must be satisfied:
 562          *  tx_free_thresh must be greater than 0.
 563          *  tx_free_thresh must be less than the size of the ring minus 1.
 564          * When set to zero use default values.
 565          */
 566         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
 567                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
 568         if (tx_free_thresh >= (sq_depth - 1)) {
 569                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
 570                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
 571                         (int)queue_idx);
 572                 return -EINVAL;
 573         }
 574
 575         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
 576                                  RTE_CACHE_LINE_SIZE, socket_id);
 577         if (!txq) {
 578                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
 579                             queue_idx, dev->data->name);
 580                 return -ENOMEM;
 581         }
 582         nic_dev->txqs[queue_idx] = txq;
 583
 584         /* alloc tx sq hw wqepage */
 585         rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
 586         if (rc) {
 587                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
 588                             queue_idx, dev->data->name, sq_depth);
 589                 goto create_sq_fail;
 590         }
 591
 592         txq->q_id = queue_idx;
 593         txq->q_depth = sq_depth;
 594         txq->port_id = dev->data->port_id;
 595         txq->tx_free_thresh = tx_free_thresh;
 596         txq->nic_dev = nic_dev;
 597         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
 598         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
 599         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
 600         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
 601         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
 602                                         sizeof(struct hinic_sq_bufdesc);
 603         txq->cos = nic_dev->default_cos;
 604
 605         /* alloc software txinfo */
 606         rc = hinic_setup_tx_resources(txq);
 607         if (rc) {
 608                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
 609                             queue_idx, dev->data->name);
 610                 goto setup_tx_res_fail;
 611         }
 612
 613         /* record nic_dev txq in rte_eth tx_queues */
 614         dev->data->tx_queues[queue_idx] = txq;
 615
 616         return HINIC_OK;
 617
 618 setup_tx_res_fail:
 619         hinic_destroy_sq(hwdev, queue_idx);
 620
 621 create_sq_fail:
 622         rte_free(txq);
 623
 624         return rc;
 625 }
 626
 627 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
 628 {
 629         struct hinic_nic_dev *nic_dev;
 630         struct hinic_txq *txq;
 631         struct hinic_nic_io *nic_io;
 632         struct hinic_hwdev *hwdev;
 633         volatile u32 *ci_addr;
 634         int q_id = 0;
 635
 636         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 637         hwdev = nic_dev->hwdev;
 638         nic_io = hwdev->nic_io;
 639
 640         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
 641                 txq = dev->data->tx_queues[q_id];
 642
 643                 txq->wq->cons_idx = 0;
 644                 txq->wq->prod_idx = 0;
 645                 txq->wq->delta = txq->q_depth;
 646                 txq->wq->mask  = txq->q_depth - 1;
 647
 648                 /* clear hardware ci */
 649                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
 650                                                         q_id);
 651                 *ci_addr = 0;
 652         }
 653 }
 654
 655 /**
 656  * Get link speed from NIC.
 657  *
 658  * @param dev
 659  *   Pointer to Ethernet device structure.
 660  * @param speed_capa
 661  *   Pointer to link speed structure.
 662  */
 663 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
 664 {
 665         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 666         u32 supported_link, advertised_link;
 667         int err;
 668
 669 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
 670
 671 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
 672
 673 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
 674                                         (1U << HINIC_25GE_BASE_CR_S) | \
 675                                         (1U << HINIC_25GE_BASE_KR) | \
 676                                         (1U << HINIC_25GE_BASE_CR))
 677
 678 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
 679                                         (1U << HINIC_40GE_BASE_CR4))
 680
 681 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
 682                                         (1U << HINIC_100GE_BASE_CR4))
 683
 684         err = hinic_get_link_mode(nic_dev->hwdev,
 685                                   &supported_link, &advertised_link);
 686         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
 687             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
 688                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
 689                           nic_dev->proc_dev_name, dev->data->port_id);
 690         } else {
 691                 *speed_capa = 0;
 692                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
 693                         *speed_capa |= ETH_LINK_SPEED_1G;
 694                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
 695                         *speed_capa |= ETH_LINK_SPEED_10G;
 696                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
 697                         *speed_capa |= ETH_LINK_SPEED_25G;
 698                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
 699                         *speed_capa |= ETH_LINK_SPEED_40G;
 700                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
 701                         *speed_capa |= ETH_LINK_SPEED_100G;
 702         }
 703 }
 704
 705 /**
 706  * DPDK callback to get information about the device.
 707  *
 708  * @param dev
 709  *   Pointer to Ethernet device structure.
 710  * @param info
 711  *   Pointer to Info structure output buffer.
 712  */
 713 static int
 714 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 715 {
 716         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 717
 718         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
 719         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
 720         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
 721         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
 722         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
 723         info->min_mtu = HINIC_MIN_MTU_SIZE;
 724         info->max_mtu = HINIC_MAX_MTU_SIZE;
 725
 726         hinic_get_speed_capa(dev, &info->speed_capa);
 727         info->rx_queue_offload_capa = 0;
 728         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 729                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 730                                 DEV_RX_OFFLOAD_UDP_CKSUM |
 731                                 DEV_RX_OFFLOAD_TCP_CKSUM |
 732                                 DEV_RX_OFFLOAD_VLAN_FILTER |
 733                                 DEV_RX_OFFLOAD_SCATTER |
 734                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 735
 736         info->tx_queue_offload_capa = 0;
 737         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 738                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 739                                 DEV_TX_OFFLOAD_UDP_CKSUM |
 740                                 DEV_TX_OFFLOAD_TCP_CKSUM |
 741                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 742                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 743                                 DEV_TX_OFFLOAD_TCP_TSO |
 744                                 DEV_TX_OFFLOAD_MULTI_SEGS;
 745
 746         info->hash_key_size = HINIC_RSS_KEY_SIZE;
 747         info->reta_size = HINIC_RSS_INDIR_SIZE;
 748         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
 749         info->rx_desc_lim = hinic_rx_desc_lim;
 750         info->tx_desc_lim = hinic_tx_desc_lim;
 751
 752         return 0;
 753 }
 754
 755 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
 756                                 size_t fw_size)
 757 {
 758         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 759         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
 760         int err;
 761
 762         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
 763         if (err) {
 764                 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
 765                 return -EINVAL;
 766         }
 767
 768         if (fw_size < strlen(fw_ver) + 1)
 769                 return (strlen(fw_ver) + 1);
 770
 771         snprintf(fw_version, fw_size, "%s", fw_ver);
 772
 773         return 0;
 774 }
 775
 776 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
 777 {
 778         int err;
 779
 780         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
 781         if (err) {
 782                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
 783                 return -EINVAL;
 784         }
 785         nic_dev->rx_mode_status = rx_mode_ctrl;
 786
 787         return 0;
 788 }
 789
 790
 791 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 792 {
 793         int err;
 794         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 795
 796         /* rx configure, if rss enable, need to init default configuration */
 797         err = hinic_rx_configure(dev);
 798         if (err) {
 799                 PMD_DRV_LOG(ERR, "Configure rss failed");
 800                 return err;
 801         }
 802
 803         /* rx mode init */
 804         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
 805         if (err) {
 806                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
 807                         HINIC_DEFAULT_RX_MODE);
 808                 goto set_rx_mode_fail;
 809         }
 810
 811         return HINIC_OK;
 812
 813 set_rx_mode_fail:
 814         hinic_rx_remove_configure(dev);
 815
 816         return err;
 817 }
 818
 819 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
 820 {
 821         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 822
 823         (void)hinic_config_rx_mode(nic_dev, 0);
 824         hinic_rx_remove_configure(dev);
 825 }
 826
 827 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
 828                                           struct rte_eth_link *link)
 829 {
 830         int rc;
 831         u8 port_link_status = 0;
 832         struct nic_port_info port_link_info;
 833         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
 834         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
 835                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
 836                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
 837                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
 838
 839         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
 840         if (rc)
 841                 return rc;
 842
 843         if (!port_link_status) {
 844                 link->link_status = ETH_LINK_DOWN;
 845                 link->link_speed = 0;
 846                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
 847                 link->link_autoneg = ETH_LINK_FIXED;
 848                 return HINIC_OK;
 849         }
 850
 851         memset(&port_link_info, 0, sizeof(port_link_info));
 852         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
 853         if (rc)
 854                 return rc;
 855
 856         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
 857         link->link_duplex = port_link_info.duplex;
 858         link->link_autoneg = port_link_info.autoneg_state;
 859         link->link_status = port_link_status;
 860
 861         return HINIC_OK;
 862 }
 863
 864 /**
 865  * DPDK callback to retrieve physical link information.
 866  *
 867  * @param dev
 868  *   Pointer to Ethernet device structure.
 869  * @param wait_to_complete
 870  *   Wait for request completion.
 871  *
 872  * @return
 873  *   0 link status changed, -1 link status not changed
 874  */
 875 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 876 {
 877 #define CHECK_INTERVAL 10  /* 10ms */
 878 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
 879         int rc = HINIC_OK;
 880         struct rte_eth_link link;
 881         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 882         unsigned int rep_cnt = MAX_REPEAT_TIME;
 883
 884         memset(&link, 0, sizeof(link));
 885         do {
 886                 /* Get link status information from hardware */
 887                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
 888                 if (rc != HINIC_OK) {
 889                         link.link_speed = ETH_SPEED_NUM_NONE;
 890                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 891                         PMD_DRV_LOG(ERR, "Get link status failed");
 892                         goto out;
 893                 }
 894
 895                 if (!wait_to_complete || link.link_status)
 896                         break;
 897
 898                 rte_delay_ms(CHECK_INTERVAL);
 899         } while (rep_cnt--);
 900
 901 out:
 902         rc = rte_eth_linkstatus_set(dev, &link);
 903         return rc;
 904 }
 905
 906 /**
 907  * DPDK callback to bring the link UP.
 908  *
 909  * @param dev
 910  *   Pointer to Ethernet device structure.
 911  *
 912  * @return
 913  *   0 on success, negative errno value on failure.
 914  */
 915 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
 916 {
 917         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 918         int ret;
 919
 920         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
 921         if (ret) {
 922                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
 923                             nic_dev->proc_dev_name, dev->data->port_id);
 924                 return ret;
 925         }
 926
 927         /* link status follow phy port status, up will open pma */
 928         ret = hinic_set_port_enable(nic_dev->hwdev, true);
 929         if (ret)
 930                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
 931                             nic_dev->proc_dev_name, dev->data->port_id);
 932
 933         return ret;
 934 }
 935
 936 /**
 937  * DPDK callback to bring the link DOWN.
 938  *
 939  * @param dev
 940  *   Pointer to Ethernet device structure.
 941  *
 942  * @return
 943  *   0 on success, negative errno value on failure.
 944  */
 945 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
 946 {
 947         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 948         int ret;
 949
 950         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
 951         if (ret) {
 952                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
 953                             nic_dev->proc_dev_name, dev->data->port_id);
 954                 return ret;
 955         }
 956
 957         /* link status follow phy port status, up will close pma */
 958         ret = hinic_set_port_enable(nic_dev->hwdev, false);
 959         if (ret)
 960                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
 961                             nic_dev->proc_dev_name, dev->data->port_id);
 962
 963         return ret;
 964 }
 965
 966 /**
 967  * DPDK callback to start the device.
 968  *
 969  * @param dev
 970  *   Pointer to Ethernet device structure.
 971  *
 972  * @return
 973  *   0 on success, negative errno value on failure.
 974  */
 975 static int hinic_dev_start(struct rte_eth_dev *dev)
 976 {
 977         int rc;
 978         char *name;
 979         struct hinic_nic_dev *nic_dev;
 980
 981         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
 982         name = dev->data->name;
 983
 984         /* reset rx and tx queue */
 985         hinic_reset_rx_queue(dev);
 986         hinic_reset_tx_queue(dev);
 987
 988         /* get func rx buf size */
 989         hinic_get_func_rx_buf_size(nic_dev);
 990
 991         /* init txq and rxq context */
 992         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
 993         if (rc) {
 994                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
 995                             name);
 996                 goto init_qp_fail;
 997         }
 998
 999         /* rss template */
1000         rc = hinic_config_mq_mode(dev, TRUE);
1001         if (rc) {
1002                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1003                             name);
1004                 goto cfg_mq_mode_fail;
1005         }
1006
1007         /* set default mtu */
1008         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1009         if (rc) {
1010                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1011                             nic_dev->mtu_size, name);
1012                 goto set_mtu_fail;
1013         }
1014
1015         /* configure rss rx_mode and other rx or tx default feature */
1016         rc = hinic_rxtx_configure(dev);
1017         if (rc) {
1018                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1019                             name);
1020                 goto cfg_rxtx_fail;
1021         }
1022
1023         /* reactive pf status, so that uP report asyn event */
1024         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1025
1026         /* open virtual port and ready to start packet receiving */
1027         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1028         if (rc) {
1029                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1030                 goto en_vport_fail;
1031         }
1032
1033         /* open physical port and start packet receiving */
1034         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1035         if (rc) {
1036                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1037                             name);
1038                 goto en_port_fail;
1039         }
1040
1041         /* update eth_dev link status */
1042         if (dev->data->dev_conf.intr_conf.lsc != 0)
1043                 (void)hinic_link_update(dev, 0);
1044
1045         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1046
1047         return 0;
1048
1049 en_port_fail:
1050         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1051
1052 en_vport_fail:
1053         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1054
1055         /* Flush tx && rx chip resources in case of set vport fake fail */
1056         (void)hinic_flush_qp_res(nic_dev->hwdev);
1057         rte_delay_ms(100);
1058
1059         hinic_remove_rxtx_configure(dev);
1060
1061 cfg_rxtx_fail:
1062 set_mtu_fail:
1063 cfg_mq_mode_fail:
1064         hinic_free_qp_ctxts(nic_dev->hwdev);
1065
1066 init_qp_fail:
1067         hinic_free_all_rx_mbuf(dev);
1068         hinic_free_all_tx_mbuf(dev);
1069
1070         return rc;
1071 }
1072
1073 /**
1074  * DPDK callback to release the receive queue.
1075  *
1076  * @param queue
1077  *   Generic receive queue pointer.
1078  */
1079 static void hinic_rx_queue_release(void *queue)
1080 {
1081         struct hinic_rxq *rxq = queue;
1082         struct hinic_nic_dev *nic_dev;
1083
1084         if (!rxq) {
1085                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1086                 return;
1087         }
1088         nic_dev = rxq->nic_dev;
1089
1090         /* free rxq_pkt mbuf */
1091         hinic_free_all_rx_skbs(rxq);
1092
1093         /* free rxq_cqe, rxq_info */
1094         hinic_free_rx_resources(rxq);
1095
1096         /* free root rq wq */
1097         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1098
1099         nic_dev->rxqs[rxq->q_id] = NULL;
1100
1101         /* free rxq */
1102         rte_free(rxq);
1103 }
1104
1105 /**
1106  * DPDK callback to release the transmit queue.
1107  *
1108  * @param queue
1109  *   Generic transmit queue pointer.
1110  */
1111 static void hinic_tx_queue_release(void *queue)
1112 {
1113         struct hinic_txq *txq = queue;
1114         struct hinic_nic_dev *nic_dev;
1115
1116         if (!txq) {
1117                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1118                 return;
1119         }
1120         nic_dev = txq->nic_dev;
1121
1122         /* free txq_pkt mbuf */
1123         hinic_free_all_tx_skbs(txq);
1124
1125         /* free txq_info */
1126         hinic_free_tx_resources(txq);
1127
1128         /* free root sq wq */
1129         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1130         nic_dev->txqs[txq->q_id] = NULL;
1131
1132         /* free txq */
1133         rte_free(txq);
1134 }
1135
1136 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1137 {
1138         u16 q_id;
1139
1140         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1141                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1142 }
1143
1144 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1145 {
1146         u16 q_id;
1147
1148         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1149                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1150 }
1151
1152 /**
1153  * DPDK callback to stop the device.
1154  *
1155  * @param dev
1156  *   Pointer to Ethernet device structure.
1157  */
1158 static void hinic_dev_stop(struct rte_eth_dev *dev)
1159 {
1160         int rc;
1161         char *name;
1162         uint16_t port_id;
1163         struct hinic_nic_dev *nic_dev;
1164         struct rte_eth_link link;
1165
1166         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1167         name = dev->data->name;
1168         port_id = dev->data->port_id;
1169
1170         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1171                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1172                 return;
1173         }
1174
1175         /* just stop phy port and vport */
1176         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1177         if (rc)
1178                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1179                           rc, name, port_id);
1180
1181         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1182         if (rc)
1183                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1184                           rc, name, port_id);
1185
1186         /* Clear recorded link status */
1187         memset(&link, 0, sizeof(link));
1188         (void)rte_eth_linkstatus_set(dev, &link);
1189
1190         /* flush pending io request */
1191         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1192         if (rc)
1193                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1194                             rc, name, port_id);
1195
1196         /* clean rss table and rx_mode */
1197         hinic_remove_rxtx_configure(dev);
1198
1199         /* clean root context */
1200         hinic_free_qp_ctxts(nic_dev->hwdev);
1201
1202         hinic_free_fdir_filter(nic_dev);
1203
1204         /* free mbuf */
1205         hinic_free_all_rx_mbuf(dev);
1206         hinic_free_all_tx_mbuf(dev);
1207 }
1208
1209 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1210 {
1211         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1212         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1213         int ret, retries = 0;
1214
1215         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1216
1217         /* disable msix interrupt in hardware */
1218         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1219
1220         /* disable rte interrupt */
1221         ret = rte_intr_disable(&pci_dev->intr_handle);
1222         if (ret)
1223                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1224
1225         do {
1226                 ret =
1227                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1228                                              hinic_dev_interrupt_handler, dev);
1229                 if (ret >= 0) {
1230                         break;
1231                 } else if (ret == -EAGAIN) {
1232                         rte_delay_ms(100);
1233                         retries++;
1234                 } else {
1235                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1236                                     ret);
1237                         break;
1238                 }
1239         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1240
1241         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1242                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1243                             retries);
1244 }
1245
1246 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1247 {
1248         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1249
1250         if (enable)
1251                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1252         else
1253                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1254
1255         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1256 }
1257
1258 /**
1259  * DPDK callback to get device statistics.
1260  *
1261  * @param dev
1262  *   Pointer to Ethernet device structure.
1263  * @param stats
1264  *   Stats structure output buffer.
1265  *
1266  * @return
1267  *   0 on success and stats is filled,
1268  *   negative error value otherwise.
1269  */
1270 static int
1271 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1272 {
1273         int i, err, q_num;
1274         u64 rx_discards_pmd = 0;
1275         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1276         struct hinic_vport_stats vport_stats;
1277         struct hinic_rxq        *rxq = NULL;
1278         struct hinic_rxq_stats rxq_stats;
1279         struct hinic_txq        *txq = NULL;
1280         struct hinic_txq_stats txq_stats;
1281
1282         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1283         if (err) {
1284                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1285                         nic_dev->proc_dev_name);
1286                 return err;
1287         }
1288
1289         /* rx queue stats */
1290         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1291                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1292         for (i = 0; i < q_num; i++) {
1293                 rxq = nic_dev->rxqs[i];
1294                 hinic_rxq_get_stats(rxq, &rxq_stats);
1295                 stats->q_ipackets[i] = rxq_stats.packets;
1296                 stats->q_ibytes[i] = rxq_stats.bytes;
1297                 stats->q_errors[i] = rxq_stats.rx_discards;
1298
1299                 stats->ierrors += rxq_stats.errors;
1300                 rx_discards_pmd += rxq_stats.rx_discards;
1301                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1302         }
1303
1304         /* tx queue stats */
1305         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1306                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1307         for (i = 0; i < q_num; i++) {
1308                 txq = nic_dev->txqs[i];
1309                 hinic_txq_get_stats(txq, &txq_stats);
1310                 stats->q_opackets[i] = txq_stats.packets;
1311                 stats->q_obytes[i] = txq_stats.bytes;
1312                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1313         }
1314
1315         /* vport stats */
1316         stats->oerrors += vport_stats.tx_discard_vport;
1317
1318         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1319
1320         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1321                         vport_stats.rx_multicast_pkts_vport +
1322                         vport_stats.rx_broadcast_pkts_vport -
1323                         rx_discards_pmd);
1324
1325         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1326                         vport_stats.tx_multicast_pkts_vport +
1327                         vport_stats.tx_broadcast_pkts_vport);
1328
1329         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1330                         vport_stats.rx_multicast_bytes_vport +
1331                         vport_stats.rx_broadcast_bytes_vport);
1332
1333         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1334                         vport_stats.tx_multicast_bytes_vport +
1335                         vport_stats.tx_broadcast_bytes_vport);
1336         return 0;
1337 }
1338
1339 /**
1340  * DPDK callback to clear device statistics.
1341  *
1342  * @param dev
1343  *   Pointer to Ethernet device structure.
1344  */
1345 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1346 {
1347         int qid;
1348         struct hinic_rxq        *rxq = NULL;
1349         struct hinic_txq        *txq = NULL;
1350         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1351         int ret;
1352
1353         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1354         if (ret != 0)
1355                 return ret;
1356
1357         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1358                 rxq = nic_dev->rxqs[qid];
1359                 hinic_rxq_stats_reset(rxq);
1360         }
1361
1362         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1363                 txq = nic_dev->txqs[qid];
1364                 hinic_txq_stats_reset(txq);
1365         }
1366
1367         return 0;
1368 }
1369
1370 /**
1371  * DPDK callback to clear device extended statistics.
1372  *
1373  * @param dev
1374  *   Pointer to Ethernet device structure.
1375  */
1376 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1377 {
1378         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1379         int ret;
1380
1381         ret = hinic_dev_stats_reset(dev);
1382         if (ret != 0)
1383                 return ret;
1384
1385         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1386                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1387                 if (ret != 0)
1388                         return ret;
1389         }
1390
1391         return 0;
1392 }
1393
1394 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1395 {
1396         uint64_t random_value;
1397
1398         /* Set Organizationally Unique Identifier (OUI) prefix */
1399         mac_addr->addr_bytes[0] = 0x00;
1400         mac_addr->addr_bytes[1] = 0x09;
1401         mac_addr->addr_bytes[2] = 0xC0;
1402         /* Force indication of locally assigned MAC address. */
1403         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1404         /* Generate the last 3 bytes of the MAC address with a random number. */
1405         random_value = rte_rand();
1406         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1407 }
1408
1409 /**
1410  * Init mac_vlan table in NIC.
1411  *
1412  * @param dev
1413  *   Pointer to Ethernet device structure.
1414  *
1415  * @return
1416  *   0 on success and stats is filled,
1417  *   negative error value otherwise.
1418  */
1419 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1420 {
1421         struct hinic_nic_dev *nic_dev =
1422                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1423         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1424         u16 func_id = 0;
1425         int rc = 0;
1426
1427         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1428         if (rc)
1429                 return rc;
1430
1431         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1432                 &eth_dev->data->mac_addrs[0]);
1433         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1434                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1435
1436         func_id = hinic_global_func_id(nic_dev->hwdev);
1437         rc = hinic_set_mac(nic_dev->hwdev,
1438                         eth_dev->data->mac_addrs[0].addr_bytes,
1439                         0, func_id);
1440         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1441                 return rc;
1442
1443         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1444                         &nic_dev->default_addr);
1445
1446         return 0;
1447 }
1448
1449 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1450 {
1451         u16 func_id;
1452         u32 i;
1453
1454         func_id = hinic_global_func_id(nic_dev->hwdev);
1455
1456         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1457                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1458                         break;
1459
1460                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1461                               0, func_id);
1462                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1463         }
1464 }
1465
1466 /**
1467  * Deinit mac_vlan table in NIC.
1468  *
1469  * @param dev
1470  *   Pointer to Ethernet device structure.
1471  *
1472  * @return
1473  *   0 on success and stats is filled,
1474  *   negative error value otherwise.
1475  */
1476 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1477 {
1478         struct hinic_nic_dev *nic_dev =
1479                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1480         u16 func_id = 0;
1481         int rc;
1482         int i;
1483
1484         func_id = hinic_global_func_id(nic_dev->hwdev);
1485
1486         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1487                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1488                         continue;
1489
1490                 rc = hinic_del_mac(nic_dev->hwdev,
1491                                    eth_dev->data->mac_addrs[i].addr_bytes,
1492                                    0, func_id);
1493                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1494                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1495                                     eth_dev->data->name);
1496
1497                 memset(&eth_dev->data->mac_addrs[i], 0,
1498                        sizeof(struct rte_ether_addr));
1499         }
1500
1501         /* delete multicast mac addrs */
1502         hinic_delete_mc_addr_list(nic_dev);
1503 }
1504
1505 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1506 {
1507         int ret = 0;
1508         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1509
1510         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1511                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1512
1513         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1514                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1515                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1516                 return -EINVAL;
1517         }
1518
1519         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1520         if (ret) {
1521                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1522                 return ret;
1523         }
1524
1525         /* update max frame size */
1526         dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1527         nic_dev->mtu_size = mtu;
1528
1529         return ret;
1530 }
1531
1532 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1533                                         u16 vlan_id, bool on)
1534 {
1535         u32 vid_idx, vid_bit;
1536
1537         vid_idx = HINIC_VFTA_IDX(vlan_id);
1538         vid_bit = HINIC_VFTA_BIT(vlan_id);
1539
1540         if (on)
1541                 nic_dev->vfta[vid_idx] |= vid_bit;
1542         else
1543                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1544 }
1545
1546 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1547                                 uint16_t vlan_id)
1548 {
1549         u32 vid_idx, vid_bit;
1550
1551         vid_idx = HINIC_VFTA_IDX(vlan_id);
1552         vid_bit = HINIC_VFTA_BIT(vlan_id);
1553
1554         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1555 }
1556
1557 /**
1558  * DPDK callback to set vlan filter.
1559  *
1560  * @param dev
1561  *   Pointer to Ethernet device structure.
1562  * @param vlan_id
1563  *   vlan id is used to filter vlan packets
1564  * @param enable
1565  *   enable disable or enable vlan filter function
1566  */
1567 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1568                                 uint16_t vlan_id, int enable)
1569 {
1570         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1571         int err = 0;
1572         u16 func_id;
1573
1574         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1575                 return -EINVAL;
1576
1577         func_id = hinic_global_func_id(nic_dev->hwdev);
1578
1579         if (enable) {
1580                 /* If vlanid is already set, just return */
1581                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1582                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1583                                   vlan_id, nic_dev->proc_dev_name);
1584                         return 0;
1585                 }
1586
1587                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1588                                             func_id, TRUE);
1589         } else {
1590                 /* If vlanid can't be found, just return */
1591                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1592                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1593                                   vlan_id, nic_dev->proc_dev_name);
1594                         return 0;
1595                 }
1596
1597                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1598                                             func_id, FALSE);
1599         }
1600
1601         if (err) {
1602                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1603                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1604                 return err;
1605         }
1606
1607         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1608
1609         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1610                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1611         return 0;
1612 }
1613
1614 /**
1615  * DPDK callback to enable or disable vlan offload.
1616  *
1617  * @param dev
1618  *   Pointer to Ethernet device structure.
1619  * @param mask
1620  *   Definitions used for VLAN setting
1621  */
1622 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1623 {
1624         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1625         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1626         bool on;
1627         int err;
1628
1629         /* Enable or disable VLAN filter */
1630         if (mask & ETH_VLAN_FILTER_MASK) {
1631                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1632                         TRUE : FALSE;
1633                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1634                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1635                         PMD_DRV_LOG(WARNING,
1636                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1637                                   nic_dev->proc_dev_name, dev->data->port_id);
1638                 } else if (err) {
1639                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1640                                   on ? "enable" : "disable",
1641                                   nic_dev->proc_dev_name,
1642                                   dev->data->port_id, err);
1643                         return err;
1644                 }
1645
1646                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1647                           on ? "Enable" : "Disable",
1648                           nic_dev->proc_dev_name, dev->data->port_id);
1649         }
1650
1651         /* Enable or disable VLAN stripping */
1652         if (mask & ETH_VLAN_STRIP_MASK) {
1653                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1654                         TRUE : FALSE;
1655                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1656                 if (err) {
1657                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1658                                   on ? "enable" : "disable",
1659                                   nic_dev->proc_dev_name,
1660                                   dev->data->port_id, err);
1661                         return err;
1662                 }
1663
1664                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1665                           on ? "Enable" : "Disable",
1666                           nic_dev->proc_dev_name, dev->data->port_id);
1667         }
1668
1669         if (mask & ETH_VLAN_EXTEND_MASK) {
1670                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1671                           nic_dev->proc_dev_name, dev->data->port_id);
1672                 return -ENOTSUP;
1673         }
1674
1675         return 0;
1676 }
1677
1678 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1679 {
1680         struct hinic_nic_dev *nic_dev =
1681                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1682         u16 func_id;
1683         int i;
1684
1685         func_id = hinic_global_func_id(nic_dev->hwdev);
1686         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1687                 /* If can't find it, continue */
1688                 if (!hinic_find_vlan_filter(nic_dev, i))
1689                         continue;
1690
1691                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1692                 hinic_store_vlan_filter(nic_dev, i, false);
1693         }
1694 }
1695
1696 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1697                                 bool enable)
1698 {
1699         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1700
1701         if (enable)
1702                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1703         else
1704                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1705
1706         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1707 }
1708
1709 /**
1710  * DPDK callback to enable allmulticast mode.
1711  *
1712  * @param dev
1713  *   Pointer to Ethernet device structure.
1714  *
1715  * @return
1716  *   0 on success,
1717  *   negative error value otherwise.
1718  */
1719 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1720 {
1721         int ret = HINIC_OK;
1722         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1723
1724         ret = hinic_set_dev_allmulticast(nic_dev, true);
1725         if (ret) {
1726                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1727                 return ret;
1728         }
1729
1730         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1731                 nic_dev->proc_dev_name, dev->data->port_id);
1732         return 0;
1733 }
1734
1735 /**
1736  * DPDK callback to disable allmulticast mode.
1737  *
1738  * @param dev
1739  *   Pointer to Ethernet device structure.
1740  *
1741  * @return
1742  *   0 on success,
1743  *   negative error value otherwise.
1744  */
1745 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1746 {
1747         int ret = HINIC_OK;
1748         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1749
1750         ret = hinic_set_dev_allmulticast(nic_dev, false);
1751         if (ret) {
1752                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1753                 return ret;
1754         }
1755
1756         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1757                 nic_dev->proc_dev_name, dev->data->port_id);
1758         return 0;
1759 }
1760
1761 /**
1762  * DPDK callback to enable promiscuous mode.
1763  *
1764  * @param dev
1765  *   Pointer to Ethernet device structure.
1766  *
1767  * @return
1768  *   0 on success,
1769  *   negative error value otherwise.
1770  */
1771 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1772 {
1773         int rc = HINIC_OK;
1774         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1775
1776         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1777                     nic_dev->proc_dev_name, dev->data->port_id,
1778                     dev->data->promiscuous);
1779
1780         rc = hinic_set_dev_promiscuous(nic_dev, true);
1781         if (rc)
1782                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1783
1784         return rc;
1785 }
1786
1787 /**
1788  * DPDK callback to disable promiscuous mode.
1789  *
1790  * @param dev
1791  *   Pointer to Ethernet device structure.
1792  *
1793  * @return
1794  *   0 on success,
1795  *   negative error value otherwise.
1796  */
1797 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1798 {
1799         int rc = HINIC_OK;
1800         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1801
1802         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1803                     nic_dev->proc_dev_name, dev->data->port_id,
1804                     dev->data->promiscuous);
1805
1806         rc = hinic_set_dev_promiscuous(nic_dev, false);
1807         if (rc)
1808                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1809
1810         return rc;
1811 }
1812
1813 /**
1814  * DPDK callback to update the RSS hash key and RSS hash type.
1815  *
1816  * @param dev
1817  *   Pointer to Ethernet device structure.
1818  * @param rss_conf
1819  *   RSS configuration data.
1820  *
1821  * @return
1822  *   0 on success, negative error value otherwise.
1823  */
1824 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1825                           struct rte_eth_rss_conf *rss_conf)
1826 {
1827         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1828         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1829         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1830         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1831         u64 rss_hf = rss_conf->rss_hf;
1832         struct nic_rss_type rss_type = {0};
1833         int err = 0;
1834
1835         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1836                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1837                 return HINIC_OK;
1838         }
1839
1840         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1841                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1842                             rss_conf->rss_key_len);
1843                 return HINIC_ERROR;
1844         }
1845
1846         if (rss_conf->rss_key) {
1847                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1848                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1849                                                  hashkey);
1850                 if (err) {
1851                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1852                         goto disable_rss;
1853                 }
1854         }
1855
1856         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1857         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1858         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1859         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1860         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1861         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1862         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1863         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1864
1865         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1866         if (err) {
1867                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1868                 goto disable_rss;
1869         }
1870
1871         return 0;
1872
1873 disable_rss:
1874         memset(prio_tc, 0, sizeof(prio_tc));
1875         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1876         return err;
1877 }
1878
1879 /**
1880  * DPDK callback to get the RSS hash configuration.
1881  *
1882  * @param dev
1883  *   Pointer to Ethernet device structure.
1884  * @param rss_conf
1885  *   RSS configuration data.
1886  *
1887  * @return
1888  *   0 on success, negative error value otherwise.
1889  */
1890 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1891                        struct rte_eth_rss_conf *rss_conf)
1892 {
1893         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1894         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1895         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1896         struct nic_rss_type rss_type = {0};
1897         int err;
1898
1899         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1900                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1901                 return HINIC_ERROR;
1902         }
1903
1904         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1905         if (err)
1906                 return err;
1907
1908         if (rss_conf->rss_key &&
1909             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1910                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1911                 rss_conf->rss_key_len = sizeof(hashkey);
1912         }
1913
1914         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1915         if (err)
1916                 return err;
1917
1918         rss_conf->rss_hf = 0;
1919         rss_conf->rss_hf |=  rss_type.ipv4 ?
1920                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1921         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1922         rss_conf->rss_hf |=  rss_type.ipv6 ?
1923                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1924         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1925         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1926         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1927         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1928         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1929
1930         return HINIC_OK;
1931 }
1932
1933 /**
1934  * DPDK callback to update the RETA indirection table.
1935  *
1936  * @param dev
1937  *   Pointer to Ethernet device structure.
1938  * @param reta_conf
1939  *   Pointer to RETA configuration structure array.
1940  * @param reta_size
1941  *   Size of the RETA table.
1942  *
1943  * @return
1944  *   0 on success, negative error value otherwise.
1945  */
1946 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1947                               struct rte_eth_rss_reta_entry64 *reta_conf,
1948                               uint16_t reta_size)
1949 {
1950         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1951         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1952         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1953         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1954         int err = 0;
1955         u16 i = 0;
1956         u16 idx, shift;
1957
1958         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1959                 return HINIC_OK;
1960
1961         if (reta_size != NIC_RSS_INDIR_SIZE) {
1962                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1963                 return HINIC_ERROR;
1964         }
1965
1966         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1967         if (err)
1968                 return err;
1969
1970         /* update rss indir_tbl */
1971         for (i = 0; i < reta_size; i++) {
1972                 idx = i / RTE_RETA_GROUP_SIZE;
1973                 shift = i % RTE_RETA_GROUP_SIZE;
1974                 if (reta_conf[idx].mask & (1ULL << shift))
1975                         indirtbl[i] = reta_conf[idx].reta[shift];
1976         }
1977
1978         for (i = 0 ; i < reta_size; i++) {
1979                 if (indirtbl[i] >= nic_dev->num_rq) {
1980                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
1981                                     i, nic_dev->num_rq);
1982                         goto disable_rss;
1983                 }
1984         }
1985
1986         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1987         if (err)
1988                 goto disable_rss;
1989
1990         nic_dev->rss_indir_flag = true;
1991
1992         return 0;
1993
1994 disable_rss:
1995         memset(prio_tc, 0, sizeof(prio_tc));
1996         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1997
1998         return HINIC_ERROR;
1999 }
2000
2001
2002 /**
2003  * DPDK callback to get the RETA indirection table.
2004  *
2005  * @param dev
2006  *   Pointer to Ethernet device structure.
2007  * @param reta_conf
2008  *   Pointer to RETA configuration structure array.
2009  * @param reta_size
2010  *   Size of the RETA table.
2011  *
2012  * @return
2013  *   0 on success, negative error value otherwise.
2014  */
2015 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2016                              struct rte_eth_rss_reta_entry64 *reta_conf,
2017                              uint16_t reta_size)
2018 {
2019         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2020         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2021         int err = 0;
2022         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2023         u16 idx, shift;
2024         u16 i = 0;
2025
2026         if (reta_size != NIC_RSS_INDIR_SIZE) {
2027                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2028                 return HINIC_ERROR;
2029         }
2030
2031         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2032         if (err) {
2033                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2034                             err);
2035                 return err;
2036         }
2037
2038         for (i = 0; i < reta_size; i++) {
2039                 idx = i / RTE_RETA_GROUP_SIZE;
2040                 shift = i % RTE_RETA_GROUP_SIZE;
2041                 if (reta_conf[idx].mask & (1ULL << shift))
2042                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2043         }
2044
2045         return HINIC_OK;
2046 }
2047
2048 /**
2049  * DPDK callback to get extended device statistics.
2050  *
2051  * @param dev
2052  *   Pointer to Ethernet device.
2053  * @param xstats
2054  *   Pointer to rte extended stats table.
2055  * @param n
2056  *   The size of the stats table.
2057  *
2058  * @return
2059  *   Number of extended stats on success and stats is filled,
2060  *   negative error value otherwise.
2061  */
2062 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2063                          struct rte_eth_xstat *xstats,
2064                          unsigned int n)
2065 {
2066         u16 qid = 0;
2067         u32 i;
2068         int err, count;
2069         struct hinic_nic_dev *nic_dev;
2070         struct hinic_phy_port_stats port_stats;
2071         struct hinic_vport_stats vport_stats;
2072         struct hinic_rxq        *rxq = NULL;
2073         struct hinic_rxq_stats rxq_stats;
2074         struct hinic_txq        *txq = NULL;
2075         struct hinic_txq_stats txq_stats;
2076
2077         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2078         count = hinic_xstats_calc_num(nic_dev);
2079         if ((int)n < count)
2080                 return count;
2081
2082         count = 0;
2083
2084         /* Get stats from hinic_rxq_stats */
2085         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2086                 rxq = nic_dev->rxqs[qid];
2087                 hinic_rxq_get_stats(rxq, &rxq_stats);
2088
2089                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2090                         xstats[count].value =
2091                                 *(uint64_t *)(((char *)&rxq_stats) +
2092                                 hinic_rxq_stats_strings[i].offset);
2093                         xstats[count].id = count;
2094                         count++;
2095                 }
2096         }
2097
2098         /* Get stats from hinic_txq_stats */
2099         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2100                 txq = nic_dev->txqs[qid];
2101                 hinic_txq_get_stats(txq, &txq_stats);
2102
2103                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2104                         xstats[count].value =
2105                                 *(uint64_t *)(((char *)&txq_stats) +
2106                                 hinic_txq_stats_strings[i].offset);
2107                         xstats[count].id = count;
2108                         count++;
2109                 }
2110         }
2111
2112         /* Get stats from hinic_vport_stats */
2113         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2114         if (err)
2115                 return err;
2116
2117         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2118                 xstats[count].value =
2119                         *(uint64_t *)(((char *)&vport_stats) +
2120                         hinic_vport_stats_strings[i].offset);
2121                 xstats[count].id = count;
2122                 count++;
2123         }
2124
2125         if (HINIC_IS_VF(nic_dev->hwdev))
2126                 return count;
2127
2128         /* Get stats from hinic_phy_port_stats */
2129         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2130         if (err)
2131                 return err;
2132
2133         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2134                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2135                                 hinic_phyport_stats_strings[i].offset);
2136                 xstats[count].id = count;
2137                 count++;
2138         }
2139
2140         return count;
2141 }
2142
2143 /**
2144  * DPDK callback to retrieve names of extended device statistics
2145  *
2146  * @param dev
2147  *   Pointer to Ethernet device structure.
2148  * @param xstats_names
2149  *   Buffer to insert names into.
2150  *
2151  * @return
2152  *   Number of xstats names.
2153  */
2154 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2155                                struct rte_eth_xstat_name *xstats_names,
2156                                __rte_unused unsigned int limit)
2157 {
2158         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2159         int count = 0;
2160         u16 i = 0, q_num;
2161
2162         if (xstats_names == NULL)
2163                 return hinic_xstats_calc_num(nic_dev);
2164
2165         /* get pmd rxq stats */
2166         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2167                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2168                         snprintf(xstats_names[count].name,
2169                                  sizeof(xstats_names[count].name),
2170                                  "rxq%d_%s_pmd",
2171                                  q_num, hinic_rxq_stats_strings[i].name);
2172                         count++;
2173                 }
2174         }
2175
2176         /* get pmd txq stats */
2177         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2178                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2179                         snprintf(xstats_names[count].name,
2180                                  sizeof(xstats_names[count].name),
2181                                  "txq%d_%s_pmd",
2182                                  q_num, hinic_txq_stats_strings[i].name);
2183                         count++;
2184                 }
2185         }
2186
2187         /* get vport stats */
2188         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2189                 snprintf(xstats_names[count].name,
2190                          sizeof(xstats_names[count].name),
2191                          "%s",
2192                          hinic_vport_stats_strings[i].name);
2193                 count++;
2194         }
2195
2196         if (HINIC_IS_VF(nic_dev->hwdev))
2197                 return count;
2198
2199         /* get phy port stats */
2200         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2201                 snprintf(xstats_names[count].name,
2202                          sizeof(xstats_names[count].name),
2203                          "%s",
2204                          hinic_phyport_stats_strings[i].name);
2205                 count++;
2206         }
2207
2208         return count;
2209 }
2210 /**
2211  *  DPDK callback to set mac address
2212  *
2213  * @param dev
2214  *   Pointer to Ethernet device structure.
2215  * @param addr
2216  *   Pointer to mac address
2217  * @return
2218  *   0 on success, negative error value otherwise.
2219  */
2220 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2221                               struct rte_ether_addr *addr)
2222 {
2223         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2224         u16 func_id;
2225         int err;
2226
2227         func_id = hinic_global_func_id(nic_dev->hwdev);
2228         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2229                                addr->addr_bytes, 0, func_id);
2230         if (err)
2231                 return err;
2232
2233         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2234
2235         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2236                     addr->addr_bytes[0], addr->addr_bytes[1],
2237                     addr->addr_bytes[2], addr->addr_bytes[3],
2238                     addr->addr_bytes[4], addr->addr_bytes[5]);
2239
2240         return 0;
2241 }
2242
2243 /**
2244  * DPDK callback to remove a MAC address.
2245  *
2246  * @param dev
2247  *   Pointer to Ethernet device structure.
2248  * @param index
2249  *   MAC address index.
2250  */
2251 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2252 {
2253         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2254         u16 func_id;
2255         int ret;
2256
2257         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2258                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2259                             index);
2260                 return;
2261         }
2262
2263         func_id = hinic_global_func_id(nic_dev->hwdev);
2264         ret = hinic_del_mac(nic_dev->hwdev,
2265                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2266         if (ret)
2267                 return;
2268
2269         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2270 }
2271
2272 /**
2273  * DPDK callback to add a MAC address.
2274  *
2275  * @param dev
2276  *   Pointer to Ethernet device structure.
2277  * @param mac_addr
2278  *   MAC address to register.
2279  * @param index
2280  *   MAC address index.
2281  * @param vmdq
2282  *   VMDq pool index to associate address with (ignored).
2283  *
2284  * @return
2285  *   0 on success, a negative errno value otherwise and rte_errno is set.
2286  */
2287
2288 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2289                               struct rte_ether_addr *mac_addr, uint32_t index,
2290                               __rte_unused uint32_t vmdq)
2291 {
2292         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2293         unsigned int i;
2294         u16 func_id;
2295         int ret;
2296
2297         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2298                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2299                 return -EINVAL;
2300         }
2301
2302         /* First, make sure this address isn't already configured. */
2303         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2304                 /* Skip this index, it's going to be reconfigured. */
2305                 if (i == index)
2306                         continue;
2307
2308                 if (memcmp(&dev->data->mac_addrs[i],
2309                         mac_addr, sizeof(*mac_addr)))
2310                         continue;
2311
2312                 PMD_DRV_LOG(INFO, "MAC address already configured");
2313                 return -EADDRINUSE;
2314         }
2315
2316         func_id = hinic_global_func_id(nic_dev->hwdev);
2317         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2318         if (ret)
2319                 return ret;
2320
2321         dev->data->mac_addrs[index] = *mac_addr;
2322         return 0;
2323 }
2324
2325 /**
2326  *  DPDK callback to set multicast mac address
2327  *
2328  * @param dev
2329  *   Pointer to Ethernet device structure.
2330  * @param mc_addr_set
2331  *   Pointer to multicast mac address
2332  * @param nb_mc_addr
2333  *   mc addr count
2334  * @return
2335  *   0 on success, negative error value otherwise.
2336  */
2337 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2338                                   struct rte_ether_addr *mc_addr_set,
2339                                   uint32_t nb_mc_addr)
2340 {
2341         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2342         u16 func_id;
2343         int ret;
2344         u32 i;
2345
2346         func_id = hinic_global_func_id(nic_dev->hwdev);
2347
2348         /* delete old multi_cast addrs firstly */
2349         hinic_delete_mc_addr_list(nic_dev);
2350
2351         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2352                 goto allmulti;
2353
2354         for (i = 0; i < nb_mc_addr; i++) {
2355                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2356                                     0, func_id);
2357                 /* if add mc addr failed, set all multi_cast */
2358                 if (ret) {
2359                         hinic_delete_mc_addr_list(nic_dev);
2360                         goto allmulti;
2361                 }
2362
2363                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2364         }
2365
2366         return 0;
2367
2368 allmulti:
2369         hinic_dev_allmulticast_enable(dev);
2370
2371         return 0;
2372 }
2373
2374 /**
2375  * DPDK callback to manage filter operations
2376  *
2377  * @param dev
2378  *   Pointer to Ethernet device structure.
2379  * @param filter_type
2380  *   Filter type.
2381  * @param filter_op
2382  *   Operation to perform.
2383  * @param arg
2384  *   Pointer to operation-specific structure.
2385  *
2386  * @return
2387  *   0 on success, negative errno value on failure.
2388  */
2389 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2390                      enum rte_filter_type filter_type,
2391                      enum rte_filter_op filter_op,
2392                      void *arg)
2393 {
2394         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2395         int func_id = hinic_global_func_id(nic_dev->hwdev);
2396
2397         switch (filter_type) {
2398         case RTE_ETH_FILTER_GENERIC:
2399                 if (filter_op != RTE_ETH_FILTER_GET)
2400                         return -EINVAL;
2401                 *(const void **)arg = &hinic_flow_ops;
2402                 break;
2403         default:
2404                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2405                         filter_type);
2406                 return -EINVAL;
2407         }
2408
2409         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2410                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2411         return 0;
2412 }
2413
2414 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2415 {
2416         struct nic_pause_config pause_config = {0};
2417
2418         pause_config.auto_neg = 0;
2419         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2420         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2421
2422         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2423 }
2424
2425 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2426 {
2427         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2428         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2429         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2430         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2431         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2432         int i = 0;
2433
2434         pg_bw[0] = 100;
2435         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2436                 up_bw[i] = 100;
2437
2438         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2439                                         up_pgid, up_bw, up_strict);
2440 }
2441
2442 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2443 {
2444         u8 cos_id = 0;
2445         int err;
2446
2447         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2448                 nic_dev->default_cos =
2449                                 (hinic_global_func_id(nic_dev->hwdev) +
2450                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2451         } else {
2452                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2453                 if (err) {
2454                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2455                                         err);
2456                         return HINIC_ERROR;
2457                 }
2458
2459                 nic_dev->default_cos = cos_id;
2460         }
2461
2462         return 0;
2463 }
2464
2465 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2466 {
2467         int err;
2468
2469         err = hinic_init_default_cos(nic_dev);
2470         if (err)
2471                 return err;
2472
2473         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2474                 return 0;
2475
2476         /* Restore DCB configure to default status */
2477         err = hinic_set_default_dcb_feature(nic_dev);
2478         if (err)
2479                 return err;
2480
2481         /* disable LRO */
2482         err = hinic_set_rx_lro(nic_dev->hwdev, 0, 0, (u8)0);
2483         if (err)
2484                 return err;
2485
2486         /* Set pause enable, and up will disable pfc. */
2487         err = hinic_set_default_pause_feature(nic_dev);
2488         if (err)
2489                 return err;
2490
2491         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2492         if (err)
2493                 return err;
2494
2495         err = hinic_set_link_status_follow(nic_dev->hwdev,
2496                                            HINIC_LINK_FOLLOW_PORT);
2497         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2498                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2499         else if (err)
2500                 return err;
2501
2502         return hinic_set_anti_attack(nic_dev->hwdev, true);
2503 }
2504
2505 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2506 {
2507         struct hinic_board_info info = { 0 };
2508         int rc;
2509
2510         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2511                 return 0;
2512
2513         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2514         if (rc)
2515                 return rc;
2516
2517         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2518                                                 HINIC_ERROR);
2519 }
2520
2521 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2522 {
2523         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2524         if (nic_dev->cpy_mpool == NULL) {
2525                 nic_dev->cpy_mpool =
2526                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2527                                         HINIC_COPY_MEMPOOL_DEPTH,
2528                                         0, 0,
2529                                         HINIC_COPY_MBUF_SIZE,
2530                                         rte_socket_id());
2531                 if (!nic_dev->cpy_mpool) {
2532                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2533                                     rte_errno, nic_dev->proc_dev_name);
2534                         return -ENOMEM;
2535                 }
2536         }
2537
2538         return 0;
2539 }
2540
2541 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2542 {
2543         if (nic_dev->cpy_mpool != NULL)
2544                 rte_mempool_free(nic_dev->cpy_mpool);
2545 }
2546
2547 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2548 {
2549         u32 txq_size;
2550         u32 rxq_size;
2551
2552         /* allocate software txq array */
2553         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2554         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2555         if (!nic_dev->txqs) {
2556                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2557                 return -ENOMEM;
2558         }
2559
2560         /* allocate software rxq array */
2561         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2562         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2563         if (!nic_dev->rxqs) {
2564                 /* free txqs */
2565                 kfree(nic_dev->txqs);
2566                 nic_dev->txqs = NULL;
2567
2568                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2569                 return -ENOMEM;
2570         }
2571
2572         return HINIC_OK;
2573 }
2574
2575 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2576 {
2577         kfree(nic_dev->txqs);
2578         nic_dev->txqs = NULL;
2579
2580         kfree(nic_dev->rxqs);
2581         nic_dev->rxqs = NULL;
2582 }
2583
2584 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2585 {
2586         struct hinic_nic_dev *nic_dev =
2587                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2588         int rc;
2589
2590         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2591                                      RTE_CACHE_LINE_SIZE);
2592         if (!nic_dev->hwdev) {
2593                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2594                             eth_dev->data->name);
2595                 return -ENOMEM;
2596         }
2597         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2598
2599         /* init osdep*/
2600         rc = hinic_osdep_init(nic_dev->hwdev);
2601         if (rc) {
2602                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2603                             eth_dev->data->name);
2604                 goto init_osdep_fail;
2605         }
2606
2607         /* init_hwif */
2608         rc = hinic_hwif_res_init(nic_dev->hwdev);
2609         if (rc) {
2610                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2611                             eth_dev->data->name);
2612                 goto init_hwif_fail;
2613         }
2614
2615         /* init_cfg_mgmt */
2616         rc = init_cfg_mgmt(nic_dev->hwdev);
2617         if (rc) {
2618                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2619                             eth_dev->data->name);
2620                 goto init_cfgmgnt_fail;
2621         }
2622
2623         /* init_aeqs */
2624         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2625         if (rc) {
2626                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2627                             eth_dev->data->name);
2628                 goto init_aeqs_fail;
2629         }
2630
2631         /* init_pf_to_mgnt */
2632         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2633         if (rc) {
2634                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2635                             eth_dev->data->name);
2636                 goto init_pf_to_mgmt_fail;
2637         }
2638
2639         /* init mailbox */
2640         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2641         if (rc) {
2642                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2643                             eth_dev->data->name);
2644                 goto init_func_to_func_fail;
2645         }
2646
2647         rc = hinic_card_workmode_check(nic_dev);
2648         if (rc) {
2649                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2650                             eth_dev->data->name);
2651                 goto workmode_check_fail;
2652         }
2653
2654         /* do l2nic reset to make chip clear */
2655         rc = hinic_l2nic_reset(nic_dev->hwdev);
2656         if (rc) {
2657                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2658                             eth_dev->data->name);
2659                 goto l2nic_reset_fail;
2660         }
2661
2662         /* init dma and aeq msix attribute table */
2663         (void)hinic_init_attr_table(nic_dev->hwdev);
2664
2665         /* init_cmdqs */
2666         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2667         if (rc) {
2668                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2669                             eth_dev->data->name);
2670                 goto init_cmdq_fail;
2671         }
2672
2673         /* set hardware state active */
2674         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2675         if (rc) {
2676                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2677                             eth_dev->data->name);
2678                 goto init_resources_state_fail;
2679         }
2680
2681         /* init_capability */
2682         rc = hinic_init_capability(nic_dev->hwdev);
2683         if (rc) {
2684                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2685                             eth_dev->data->name);
2686                 goto init_cap_fail;
2687         }
2688
2689         /* get nic capability */
2690         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2691                 goto nic_check_fail;
2692
2693         /* init root cla and function table */
2694         rc = hinic_init_nicio(nic_dev->hwdev);
2695         if (rc) {
2696                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2697                             eth_dev->data->name);
2698                 goto init_nicio_fail;
2699         }
2700
2701         /* init_software_txrxq */
2702         rc = hinic_init_sw_rxtxqs(nic_dev);
2703         if (rc) {
2704                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2705                             eth_dev->data->name);
2706                 goto init_sw_rxtxqs_fail;
2707         }
2708
2709         rc = hinic_copy_mempool_init(nic_dev);
2710         if (rc) {
2711                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2712                          eth_dev->data->name);
2713                 goto init_mpool_fail;
2714         }
2715
2716         /* set hardware feature to default status */
2717         rc = hinic_set_default_hw_feature(nic_dev);
2718         if (rc) {
2719                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2720                             eth_dev->data->name);
2721                 goto set_default_hw_feature_fail;
2722         }
2723
2724         return 0;
2725
2726 set_default_hw_feature_fail:
2727         hinic_copy_mempool_uninit(nic_dev);
2728
2729 init_mpool_fail:
2730         hinic_deinit_sw_rxtxqs(nic_dev);
2731
2732 init_sw_rxtxqs_fail:
2733         hinic_deinit_nicio(nic_dev->hwdev);
2734
2735 nic_check_fail:
2736 init_nicio_fail:
2737 init_cap_fail:
2738         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2739
2740 init_resources_state_fail:
2741         hinic_comm_cmdqs_free(nic_dev->hwdev);
2742
2743 init_cmdq_fail:
2744 l2nic_reset_fail:
2745 workmode_check_fail:
2746         hinic_comm_func_to_func_free(nic_dev->hwdev);
2747
2748 init_func_to_func_fail:
2749         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2750
2751 init_pf_to_mgmt_fail:
2752         hinic_comm_aeqs_free(nic_dev->hwdev);
2753
2754 init_aeqs_fail:
2755         free_cfg_mgmt(nic_dev->hwdev);
2756
2757 init_cfgmgnt_fail:
2758         hinic_hwif_res_free(nic_dev->hwdev);
2759
2760 init_hwif_fail:
2761         hinic_osdep_deinit(nic_dev->hwdev);
2762
2763 init_osdep_fail:
2764         rte_free(nic_dev->hwdev);
2765         nic_dev->hwdev = NULL;
2766
2767         return rc;
2768 }
2769
2770 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2771 {
2772         struct hinic_nic_dev *nic_dev =
2773                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2774
2775         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2776                                            HINIC_LINK_FOLLOW_DEFAULT);
2777         hinic_copy_mempool_uninit(nic_dev);
2778         hinic_deinit_sw_rxtxqs(nic_dev);
2779         hinic_deinit_nicio(nic_dev->hwdev);
2780         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2781         hinic_comm_cmdqs_free(nic_dev->hwdev);
2782         hinic_comm_func_to_func_free(nic_dev->hwdev);
2783         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2784         hinic_comm_aeqs_free(nic_dev->hwdev);
2785         free_cfg_mgmt(nic_dev->hwdev);
2786         hinic_hwif_res_free(nic_dev->hwdev);
2787         hinic_osdep_deinit(nic_dev->hwdev);
2788         rte_free(nic_dev->hwdev);
2789         nic_dev->hwdev = NULL;
2790 }
2791
2792 /**
2793  * DPDK callback to close the device.
2794  *
2795  * @param dev
2796  *   Pointer to Ethernet device structure.
2797  */
2798 static void hinic_dev_close(struct rte_eth_dev *dev)
2799 {
2800         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2801
2802         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2803                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2804                             dev->data->name);
2805                 return;
2806         }
2807
2808         /* stop device first */
2809         hinic_dev_stop(dev);
2810
2811         /* rx_cqe, rx_info */
2812         hinic_free_all_rx_resources(dev);
2813
2814         /* tx_info */
2815         hinic_free_all_tx_resources(dev);
2816
2817         /* free wq, pi_dma_addr */
2818         hinic_free_all_rq(nic_dev);
2819
2820         /* free wq, db_addr */
2821         hinic_free_all_sq(nic_dev);
2822
2823         /* deinit mac vlan tbl */
2824         hinic_deinit_mac_addr(dev);
2825         hinic_remove_all_vlanid(dev);
2826
2827         /* disable hardware and uio interrupt */
2828         hinic_disable_interrupt(dev);
2829
2830         /* deinit nic hardware device */
2831         hinic_nic_dev_destroy(dev);
2832 }
2833
2834 static const struct eth_dev_ops hinic_pmd_ops = {
2835         .dev_configure                 = hinic_dev_configure,
2836         .dev_infos_get                 = hinic_dev_infos_get,
2837         .fw_version_get                = hinic_fw_version_get,
2838         .rx_queue_setup                = hinic_rx_queue_setup,
2839         .tx_queue_setup                = hinic_tx_queue_setup,
2840         .dev_start                     = hinic_dev_start,
2841         .dev_set_link_up               = hinic_dev_set_link_up,
2842         .dev_set_link_down             = hinic_dev_set_link_down,
2843         .link_update                   = hinic_link_update,
2844         .rx_queue_release              = hinic_rx_queue_release,
2845         .tx_queue_release              = hinic_tx_queue_release,
2846         .dev_stop                      = hinic_dev_stop,
2847         .dev_close                     = hinic_dev_close,
2848         .mtu_set                       = hinic_dev_set_mtu,
2849         .vlan_filter_set               = hinic_vlan_filter_set,
2850         .vlan_offload_set              = hinic_vlan_offload_set,
2851         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2852         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2853         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2854         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2855         .rss_hash_update               = hinic_rss_hash_update,
2856         .rss_hash_conf_get             = hinic_rss_conf_get,
2857         .reta_update                   = hinic_rss_indirtbl_update,
2858         .reta_query                    = hinic_rss_indirtbl_query,
2859         .stats_get                     = hinic_dev_stats_get,
2860         .stats_reset                   = hinic_dev_stats_reset,
2861         .xstats_get                    = hinic_dev_xstats_get,
2862         .xstats_reset                  = hinic_dev_xstats_reset,
2863         .xstats_get_names              = hinic_dev_xstats_get_names,
2864         .mac_addr_set                  = hinic_set_mac_addr,
2865         .mac_addr_remove               = hinic_mac_addr_remove,
2866         .mac_addr_add                  = hinic_mac_addr_add,
2867         .set_mc_addr_list              = hinic_set_mc_addr_list,
2868         .filter_ctrl                   = hinic_dev_filter_ctrl,
2869 };
2870
2871 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2872         .dev_configure                 = hinic_dev_configure,
2873         .dev_infos_get                 = hinic_dev_infos_get,
2874         .fw_version_get                = hinic_fw_version_get,
2875         .rx_queue_setup                = hinic_rx_queue_setup,
2876         .tx_queue_setup                = hinic_tx_queue_setup,
2877         .dev_start                     = hinic_dev_start,
2878         .link_update                   = hinic_link_update,
2879         .rx_queue_release              = hinic_rx_queue_release,
2880         .tx_queue_release              = hinic_tx_queue_release,
2881         .dev_stop                      = hinic_dev_stop,
2882         .dev_close                     = hinic_dev_close,
2883         .mtu_set                       = hinic_dev_set_mtu,
2884         .vlan_filter_set               = hinic_vlan_filter_set,
2885         .vlan_offload_set              = hinic_vlan_offload_set,
2886         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2887         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2888         .rss_hash_update               = hinic_rss_hash_update,
2889         .rss_hash_conf_get             = hinic_rss_conf_get,
2890         .reta_update                   = hinic_rss_indirtbl_update,
2891         .reta_query                    = hinic_rss_indirtbl_query,
2892         .stats_get                     = hinic_dev_stats_get,
2893         .stats_reset                   = hinic_dev_stats_reset,
2894         .xstats_get                    = hinic_dev_xstats_get,
2895         .xstats_reset                  = hinic_dev_xstats_reset,
2896         .xstats_get_names              = hinic_dev_xstats_get_names,
2897         .mac_addr_set                  = hinic_set_mac_addr,
2898         .mac_addr_remove               = hinic_mac_addr_remove,
2899         .mac_addr_add                  = hinic_mac_addr_add,
2900         .set_mc_addr_list              = hinic_set_mc_addr_list,
2901         .filter_ctrl                   = hinic_dev_filter_ctrl,
2902 };
2903
2904 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2905 {
2906         struct rte_pci_device *pci_dev;
2907         struct rte_ether_addr *eth_addr;
2908         struct hinic_nic_dev *nic_dev;
2909         struct hinic_filter_info *filter_info;
2910         u32 mac_size;
2911         int rc;
2912
2913         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2914
2915         /* EAL is SECONDARY and eth_dev is already created */
2916         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2917                 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2918                                                 hinic_dev_interrupt_handler,
2919                                                 (void *)eth_dev);
2920                 if (rc)
2921                         PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2922                                     eth_dev->data->name);
2923
2924                 return rc;
2925         }
2926
2927         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2928         memset(nic_dev, 0, sizeof(*nic_dev));
2929
2930         snprintf(nic_dev->proc_dev_name,
2931                  sizeof(nic_dev->proc_dev_name),
2932                  "hinic-%.4x:%.2x:%.2x.%x",
2933                  pci_dev->addr.domain, pci_dev->addr.bus,
2934                  pci_dev->addr.devid, pci_dev->addr.function);
2935
2936         /* alloc mac_addrs */
2937         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2938         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2939         if (!eth_addr) {
2940                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2941                             eth_dev->data->name);
2942                 rc = -ENOMEM;
2943                 goto eth_addr_fail;
2944         }
2945         eth_dev->data->mac_addrs = eth_addr;
2946
2947         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2948         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2949         if (!nic_dev->mc_list) {
2950                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2951                             eth_dev->data->name);
2952                 rc = -ENOMEM;
2953                 goto mc_addr_fail;
2954         }
2955
2956         /*
2957          * Pass the information to the rte_eth_dev_close() that it should also
2958          * release the private port resources.
2959          */
2960         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2961
2962         /* create hardware nic_device */
2963         rc = hinic_nic_dev_create(eth_dev);
2964         if (rc) {
2965                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
2966                             eth_dev->data->name);
2967                 goto create_nic_dev_fail;
2968         }
2969
2970         if (HINIC_IS_VF(nic_dev->hwdev))
2971                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
2972         else
2973                 eth_dev->dev_ops = &hinic_pmd_ops;
2974
2975         rc = hinic_init_mac_addr(eth_dev);
2976         if (rc) {
2977                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
2978                             eth_dev->data->name);
2979                 goto init_mac_fail;
2980         }
2981
2982         /* register callback func to eal lib */
2983         rc = rte_intr_callback_register(&pci_dev->intr_handle,
2984                                         hinic_dev_interrupt_handler,
2985                                         (void *)eth_dev);
2986         if (rc) {
2987                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
2988                             eth_dev->data->name);
2989                 goto reg_intr_cb_fail;
2990         }
2991
2992         /* enable uio/vfio intr/eventfd mapping */
2993         rc = rte_intr_enable(&pci_dev->intr_handle);
2994         if (rc) {
2995                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
2996                             eth_dev->data->name);
2997                 goto enable_intr_fail;
2998         }
2999         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3000
3001         /* initialize filter info */
3002         filter_info = &nic_dev->filter;
3003         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3004         /* initialize 5tuple filter list */
3005         TAILQ_INIT(&filter_info->fivetuple_list);
3006         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3007         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3008         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3009         TAILQ_INIT(&nic_dev->hinic_flow_list);
3010
3011         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3012         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3013                     eth_dev->data->name);
3014
3015         return 0;
3016
3017 enable_intr_fail:
3018         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3019                                            hinic_dev_interrupt_handler,
3020                                            (void *)eth_dev);
3021
3022 reg_intr_cb_fail:
3023         hinic_deinit_mac_addr(eth_dev);
3024
3025 init_mac_fail:
3026         eth_dev->dev_ops = NULL;
3027         hinic_nic_dev_destroy(eth_dev);
3028
3029 create_nic_dev_fail:
3030         rte_free(nic_dev->mc_list);
3031         nic_dev->mc_list = NULL;
3032
3033 mc_addr_fail:
3034         rte_free(eth_addr);
3035         eth_dev->data->mac_addrs = NULL;
3036
3037 eth_addr_fail:
3038         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3039                     eth_dev->data->name);
3040         return rc;
3041 }
3042
3043 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3044 {
3045         struct rte_pci_device *pci_dev;
3046
3047         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3048
3049         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3050                     pci_dev->addr.domain, pci_dev->addr.bus,
3051                     pci_dev->addr.devid, pci_dev->addr.function,
3052                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3053                     "primary" : "secondary");
3054
3055         /* rte_eth_dev rx_burst and tx_burst */
3056         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3057         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3058
3059         return hinic_func_init(eth_dev);
3060 }
3061
3062 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3063 {
3064         struct hinic_nic_dev *nic_dev;
3065
3066         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3067         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3068
3069         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3070                 return 0;
3071
3072         hinic_dev_close(dev);
3073
3074         dev->dev_ops = NULL;
3075         dev->rx_pkt_burst = NULL;
3076         dev->tx_pkt_burst = NULL;
3077
3078         rte_free(nic_dev->mc_list);
3079
3080         rte_free(dev->data->mac_addrs);
3081         dev->data->mac_addrs = NULL;
3082
3083         return HINIC_OK;
3084 }
3085
3086 static struct rte_pci_id pci_id_hinic_map[] = {
3087         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3088         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3089         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
3090         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3091         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3092         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3093         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3094         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3095         {.vendor_id = 0},
3096 };
3097
3098 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3099                            struct rte_pci_device *pci_dev)
3100 {
3101         return rte_eth_dev_pci_generic_probe(pci_dev,
3102                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3103 }
3104
3105 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3106 {
3107         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3108 }
3109
3110 static struct rte_pci_driver rte_hinic_pmd = {
3111         .id_table = pci_id_hinic_map,
3112         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3113         .probe = hinic_pci_probe,
3114         .remove = hinic_pci_remove,
3115 };
3116
3117 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3118 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3119
3120 RTE_INIT(hinic_init_log)
3121 {
3122         hinic_logtype = rte_log_register("pmd.net.hinic");
3123         if (hinic_logtype >= 0)
3124                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
3125 }