net/hinic: add flow director filter
[dpdk.git] / drivers / net / hinic / hinic_pmd_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
3  */
4
5 #include <rte_pci.h>
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
8 #include <rte_mbuf.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
14
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
28
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
31
32 /* Hinic devices */
33 #define HINIC_DEV_ID_PRD                0x1822
34 #define HINIC_DEV_ID_VF                 0x375E
35 #define HINIC_DEV_ID_VF_HV              0x379E
36
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
39 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
40
41 /* 2*25G and 2*100G card */
42 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
43 #define HINIC_DEV_ID_1822_100GE         0x0200
44
45 #define HINIC_SERVICE_MODE_NIC          2
46
47 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
48
49 #define DEFAULT_BASE_COS                4
50 #define NR_MAX_COS                      8
51
52 #define HINIC_MIN_RX_BUF_SIZE           1024
53 #define HINIC_MAX_UC_MAC_ADDRS          128
54 #define HINIC_MAX_MC_MAC_ADDRS          2048
55
56 #define HINIC_DEFAULT_BURST_SIZE        32
57 #define HINIC_DEFAULT_NB_QUEUES         1
58 #define HINIC_DEFAULT_RING_SIZE         1024
59 #define HINIC_MAX_LRO_SIZE              65536
60
61 /*
62  * vlan_id is a 12 bit number.
63  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
64  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
65  * The higher 7 bit val specifies VFTA array index.
66  */
67 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
68 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
69
70 #define HINIC_VLAN_FILTER_EN            (1U << 0)
71
72 #define HINIC_MTU_TO_PKTLEN(mtu)        \
73         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
74
75 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
76         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
77
78 /* lro numer limit for one packet */
79 #define HINIC_LRO_WQE_NUM_DEFAULT       8
80
81 /* Driver-specific log messages type */
82 int hinic_logtype;
83
84 struct hinic_xstats_name_off {
85         char name[RTE_ETH_XSTATS_NAME_SIZE];
86         u32  offset;
87 };
88
89 #define HINIC_FUNC_STAT(_stat_item) {   \
90         .name = #_stat_item, \
91         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
92 }
93
94 #define HINIC_PORT_STAT(_stat_item) { \
95         .name = #_stat_item, \
96         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
97 }
98
99 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
100         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
101         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
102         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
103         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
104         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
105         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
106
107         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
108         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
109         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
110         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
111         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
112         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
113
114         HINIC_FUNC_STAT(tx_discard_vport),
115         HINIC_FUNC_STAT(rx_discard_vport),
116         HINIC_FUNC_STAT(tx_err_vport),
117         HINIC_FUNC_STAT(rx_err_vport),
118 };
119
120 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
121                 sizeof(hinic_vport_stats_strings[0]))
122
123 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
124         HINIC_PORT_STAT(mac_rx_total_pkt_num),
125         HINIC_PORT_STAT(mac_rx_total_oct_num),
126         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
127         HINIC_PORT_STAT(mac_rx_bad_oct_num),
128         HINIC_PORT_STAT(mac_rx_good_pkt_num),
129         HINIC_PORT_STAT(mac_rx_good_oct_num),
130         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
131         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
132         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
133         HINIC_PORT_STAT(mac_tx_total_pkt_num),
134         HINIC_PORT_STAT(mac_tx_total_oct_num),
135         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
136         HINIC_PORT_STAT(mac_tx_bad_oct_num),
137         HINIC_PORT_STAT(mac_tx_good_pkt_num),
138         HINIC_PORT_STAT(mac_tx_good_oct_num),
139         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
140         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
141         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
142         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
143         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
144         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
145         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
146         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
147         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
148         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
149         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
150         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
151         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
152         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
153         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
154         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
155         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
156         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
157         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
158         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
159         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
160         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
161         HINIC_PORT_STAT(mac_rx_mac_pause_num),
162         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
163         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
164         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
165         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
166         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
167         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
168         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
169         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
170         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
171         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
172         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
173         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
174         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
175         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
176         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
177         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
178         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
179         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
180         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
181         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
182         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
183         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
184         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
185         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
186         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
187         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
188         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
189         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
190         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
191         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
192         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
193         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
194         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
195         HINIC_PORT_STAT(mac_tx_mac_pause_num),
196         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
197         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
198         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
199         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
200         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
201         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
202         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
203         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
204         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
205         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
206         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
207         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
208         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
209 };
210
211 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
212                 sizeof(hinic_phyport_stats_strings[0]))
213
214 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
215         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
216         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
217 };
218
219 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
220                 sizeof(hinic_rxq_stats_strings[0]))
221
222 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
223         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
224         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
225         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
226         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
227         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
228 };
229
230 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
231                 sizeof(hinic_txq_stats_strings[0]))
232
233 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
234 {
235         if (HINIC_IS_VF(nic_dev->hwdev)) {
236                 return (HINIC_VPORT_XSTATS_NUM +
237                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
238                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
239         } else {
240                 return (HINIC_VPORT_XSTATS_NUM +
241                         HINIC_PHYPORT_XSTATS_NUM +
242                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
243                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
244         }
245 }
246
247 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
248         .nb_max = HINIC_MAX_QUEUE_DEPTH,
249         .nb_min = HINIC_MIN_QUEUE_DEPTH,
250         .nb_align = HINIC_RXD_ALIGN,
251 };
252
253 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
254         .nb_max = HINIC_MAX_QUEUE_DEPTH,
255         .nb_min = HINIC_MIN_QUEUE_DEPTH,
256         .nb_align = HINIC_TXD_ALIGN,
257 };
258
259 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
260
261 /**
262  * Interrupt handler triggered by NIC  for handling
263  * specific event.
264  *
265  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
266  */
267 static void hinic_dev_interrupt_handler(void *param)
268 {
269         struct rte_eth_dev *dev = param;
270         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
271
272         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
273                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
274                             nic_dev->proc_dev_name, dev->data->port_id);
275                 return;
276         }
277
278         /* aeq0 msg handler */
279         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
280 }
281
282 /**
283  * Ethernet device configuration.
284  *
285  * Prepare the driver for a given number of TX and RX queues, mtu size
286  * and configure RSS.
287  *
288  * @param dev
289  *   Pointer to Ethernet device structure.
290  *
291  * @return
292  *   0 on success, negative error value otherwise.
293  */
294 static int hinic_dev_configure(struct rte_eth_dev *dev)
295 {
296         struct hinic_nic_dev *nic_dev;
297         struct hinic_nic_io *nic_io;
298         int err;
299
300         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
301         nic_io = nic_dev->hwdev->nic_io;
302
303         nic_dev->num_sq =  dev->data->nb_tx_queues;
304         nic_dev->num_rq = dev->data->nb_rx_queues;
305
306         nic_io->num_sqs =  dev->data->nb_tx_queues;
307         nic_io->num_rqs = dev->data->nb_rx_queues;
308
309         /* queue pair is max_num(sq, rq) */
310         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
311                         nic_dev->num_sq : nic_dev->num_rq;
312         nic_io->num_qps = nic_dev->num_qps;
313
314         if (nic_dev->num_qps > nic_io->max_qps) {
315                 PMD_DRV_LOG(ERR,
316                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
317                         nic_dev->num_qps, nic_io->max_qps);
318                 return -EINVAL;
319         }
320
321         if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
322                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
323
324         /* mtu size is 256~9600 */
325         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
326             dev->data->dev_conf.rxmode.max_rx_pkt_len >
327             HINIC_MAX_JUMBO_FRAME_SIZE) {
328                 PMD_DRV_LOG(ERR,
329                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
330                         "expect between %d and %d",
331                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
332                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
333                 return -EINVAL;
334         }
335
336         nic_dev->mtu_size =
337                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
338
339         /* rss template */
340         err = hinic_config_mq_mode(dev, TRUE);
341         if (err) {
342                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
343                 return err;
344         }
345
346         /* init vlan offoad */
347         err = hinic_vlan_offload_set(dev,
348                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
349         if (err) {
350                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
351                 (void)hinic_config_mq_mode(dev, FALSE);
352                 return err;
353         }
354
355         /*clear fdir filter flag in function table*/
356         hinic_free_fdir_filter(nic_dev);
357
358         return HINIC_OK;
359 }
360
361 /**
362  * DPDK callback to create the receive queue.
363  *
364  * @param dev
365  *   Pointer to Ethernet device structure.
366  * @param queue_idx
367  *   RX queue index.
368  * @param nb_desc
369  *   Number of descriptors for receive queue.
370  * @param socket_id
371  *   NUMA socket on which memory must be allocated.
372  * @param rx_conf
373  *   Thresholds parameters (unused_).
374  * @param mp
375  *   Memory pool for buffer allocations.
376  *
377  * @return
378  *   0 on success, negative error value otherwise.
379  */
380 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
381                          uint16_t nb_desc, unsigned int socket_id,
382                          __rte_unused const struct rte_eth_rxconf *rx_conf,
383                          struct rte_mempool *mp)
384 {
385         int rc;
386         struct hinic_nic_dev *nic_dev;
387         struct hinic_hwdev *hwdev;
388         struct hinic_rxq *rxq;
389         u16 rq_depth, rx_free_thresh;
390         u32 buf_size;
391
392         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
393         hwdev = nic_dev->hwdev;
394
395         /* queue depth must be power of 2, otherwise will be aligned up */
396         rq_depth = (nb_desc & (nb_desc - 1)) ?
397                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
398
399         /*
400          * Validate number of receive descriptors.
401          * It must not exceed hardware maximum and minimum.
402          */
403         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
404                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
405                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
406                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
407                             (int)nb_desc, (int)rq_depth,
408                             (int)dev->data->port_id, (int)queue_idx);
409                 return -EINVAL;
410         }
411
412         /*
413          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
414          * descriptors are used or if the number of descriptors required
415          * to transmit a packet is greater than the number of free RX
416          * descriptors.
417          * The following constraints must be satisfied:
418          *  rx_free_thresh must be greater than 0.
419          *  rx_free_thresh must be less than the size of the ring minus 1.
420          * When set to zero use default values.
421          */
422         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
423                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
424         if (rx_free_thresh >= (rq_depth - 1)) {
425                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
426                             (unsigned int)rx_free_thresh,
427                             (int)dev->data->port_id,
428                             (int)queue_idx);
429                 return -EINVAL;
430         }
431
432         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
433                                  RTE_CACHE_LINE_SIZE, socket_id);
434         if (!rxq) {
435                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
436                             queue_idx, dev->data->name);
437                 return -ENOMEM;
438         }
439         nic_dev->rxqs[queue_idx] = rxq;
440
441         /* alloc rx sq hw wqepage*/
442         rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
443         if (rc) {
444                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
445                             queue_idx, dev->data->name, rq_depth);
446                 goto ceate_rq_fail;
447         }
448
449         /* mbuf pool must be assigned before setup rx resources */
450         rxq->mb_pool = mp;
451
452         rc =
453         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
454                                   RTE_PKTMBUF_HEADROOM, &buf_size);
455         if (rc) {
456                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
457                             dev->data->name);
458                 goto adjust_bufsize_fail;
459         }
460
461         /* rx queue info, rearm control */
462         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
463         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
464         rxq->nic_dev = nic_dev;
465         rxq->q_id = queue_idx;
466         rxq->q_depth = rq_depth;
467         rxq->buf_len = (u16)buf_size;
468         rxq->rx_free_thresh = rx_free_thresh;
469         rxq->socket_id = socket_id;
470
471         /* the last point cant do mbuf rearm in bulk */
472         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
473
474         /* device port identifier */
475         rxq->port_id = dev->data->port_id;
476
477         /* alloc rx_cqe and prepare rq_wqe */
478         rc = hinic_setup_rx_resources(rxq);
479         if (rc) {
480                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
481                             queue_idx, dev->data->name);
482                 goto setup_rx_res_err;
483         }
484
485         /* record nic_dev rxq in rte_eth rx_queues */
486         dev->data->rx_queues[queue_idx] = rxq;
487
488         return 0;
489
490 setup_rx_res_err:
491 adjust_bufsize_fail:
492         hinic_destroy_rq(hwdev, queue_idx);
493
494 ceate_rq_fail:
495         rte_free(rxq);
496
497         return rc;
498 }
499
500 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
501 {
502         struct hinic_rxq *rxq;
503         struct hinic_nic_dev *nic_dev;
504         int q_id = 0;
505
506         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
507
508         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
509                 rxq = dev->data->rx_queues[q_id];
510
511                 rxq->wq->cons_idx = 0;
512                 rxq->wq->prod_idx = 0;
513                 rxq->wq->delta = rxq->q_depth;
514                 rxq->wq->mask = rxq->q_depth - 1;
515
516                 /* alloc mbuf to rq */
517                 hinic_rx_alloc_pkts(rxq);
518         }
519 }
520
521 /**
522  * DPDK callback to configure the transmit queue.
523  *
524  * @param dev
525  *   Pointer to Ethernet device structure.
526  * @param queue_idx
527  *   Transmit queue index.
528  * @param nb_desc
529  *   Number of descriptors for transmit queue.
530  * @param socket_id
531  *   NUMA socket on which memory must be allocated.
532  * @param tx_conf
533  *   Tx queue configuration parameters.
534  *
535  * @return
536  *   0 on success, negative error value otherwise.
537  */
538 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
539                          uint16_t nb_desc, unsigned int socket_id,
540                          __rte_unused const struct rte_eth_txconf *tx_conf)
541 {
542         int rc;
543         struct hinic_nic_dev *nic_dev;
544         struct hinic_hwdev *hwdev;
545         struct hinic_txq *txq;
546         u16 sq_depth, tx_free_thresh;
547
548         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
549         hwdev = nic_dev->hwdev;
550
551         /* queue depth must be power of 2, otherwise will be aligned up */
552         sq_depth = (nb_desc & (nb_desc - 1)) ?
553                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
554
555         /*
556          * Validate number of transmit descriptors.
557          * It must not exceed hardware maximum and minimum.
558          */
559         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
560                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
561                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
562                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
563                           (int)nb_desc, (int)sq_depth,
564                           (int)dev->data->port_id, (int)queue_idx);
565                 return -EINVAL;
566         }
567
568         /*
569          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
570          * descriptors are used or if the number of descriptors required
571          * to transmit a packet is greater than the number of free TX
572          * descriptors.
573          * The following constraints must be satisfied:
574          *  tx_free_thresh must be greater than 0.
575          *  tx_free_thresh must be less than the size of the ring minus 1.
576          * When set to zero use default values.
577          */
578         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
579                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
580         if (tx_free_thresh >= (sq_depth - 1)) {
581                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
582                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
583                         (int)queue_idx);
584                 return -EINVAL;
585         }
586
587         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
588                                  RTE_CACHE_LINE_SIZE, socket_id);
589         if (!txq) {
590                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
591                             queue_idx, dev->data->name);
592                 return -ENOMEM;
593         }
594         nic_dev->txqs[queue_idx] = txq;
595
596         /* alloc tx sq hw wqepage */
597         rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
598         if (rc) {
599                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
600                             queue_idx, dev->data->name, sq_depth);
601                 goto create_sq_fail;
602         }
603
604         txq->q_id = queue_idx;
605         txq->q_depth = sq_depth;
606         txq->port_id = dev->data->port_id;
607         txq->tx_free_thresh = tx_free_thresh;
608         txq->nic_dev = nic_dev;
609         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
610         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
611         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
612         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
613         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
614                                         sizeof(struct hinic_sq_bufdesc);
615         txq->cos = nic_dev->default_cos;
616         txq->socket_id = socket_id;
617
618         /* alloc software txinfo */
619         rc = hinic_setup_tx_resources(txq);
620         if (rc) {
621                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
622                             queue_idx, dev->data->name);
623                 goto setup_tx_res_fail;
624         }
625
626         /* record nic_dev txq in rte_eth tx_queues */
627         dev->data->tx_queues[queue_idx] = txq;
628
629         return HINIC_OK;
630
631 setup_tx_res_fail:
632         hinic_destroy_sq(hwdev, queue_idx);
633
634 create_sq_fail:
635         rte_free(txq);
636
637         return rc;
638 }
639
640 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
641 {
642         struct hinic_nic_dev *nic_dev;
643         struct hinic_txq *txq;
644         struct hinic_nic_io *nic_io;
645         struct hinic_hwdev *hwdev;
646         volatile u32 *ci_addr;
647         int q_id = 0;
648
649         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
650         hwdev = nic_dev->hwdev;
651         nic_io = hwdev->nic_io;
652
653         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
654                 txq = dev->data->tx_queues[q_id];
655
656                 txq->wq->cons_idx = 0;
657                 txq->wq->prod_idx = 0;
658                 txq->wq->delta = txq->q_depth;
659                 txq->wq->mask  = txq->q_depth - 1;
660
661                 /* clear hardware ci */
662                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
663                                                         q_id);
664                 *ci_addr = 0;
665         }
666 }
667
668 /**
669  * Get link speed from NIC.
670  *
671  * @param dev
672  *   Pointer to Ethernet device structure.
673  * @param speed_capa
674  *   Pointer to link speed structure.
675  */
676 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
677 {
678         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
679         u32 supported_link, advertised_link;
680         int err;
681
682 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
683
684 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
685
686 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
687                                         (1U << HINIC_25GE_BASE_CR_S) | \
688                                         (1U << HINIC_25GE_BASE_KR) | \
689                                         (1U << HINIC_25GE_BASE_CR))
690
691 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
692                                         (1U << HINIC_40GE_BASE_CR4))
693
694 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
695                                         (1U << HINIC_100GE_BASE_CR4))
696
697         err = hinic_get_link_mode(nic_dev->hwdev,
698                                   &supported_link, &advertised_link);
699         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
700             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
701                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
702                           nic_dev->proc_dev_name, dev->data->port_id);
703         } else {
704                 *speed_capa = 0;
705                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
706                         *speed_capa |= ETH_LINK_SPEED_1G;
707                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
708                         *speed_capa |= ETH_LINK_SPEED_10G;
709                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
710                         *speed_capa |= ETH_LINK_SPEED_25G;
711                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
712                         *speed_capa |= ETH_LINK_SPEED_40G;
713                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
714                         *speed_capa |= ETH_LINK_SPEED_100G;
715         }
716 }
717
718 /**
719  * DPDK callback to get information about the device.
720  *
721  * @param dev
722  *   Pointer to Ethernet device structure.
723  * @param info
724  *   Pointer to Info structure output buffer.
725  */
726 static int
727 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
728 {
729         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
730
731         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
732         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
733         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
734         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
735         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
736         info->min_mtu = HINIC_MIN_MTU_SIZE;
737         info->max_mtu = HINIC_MAX_MTU_SIZE;
738         info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
739
740         hinic_get_speed_capa(dev, &info->speed_capa);
741         info->rx_queue_offload_capa = 0;
742         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
743                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
744                                 DEV_RX_OFFLOAD_UDP_CKSUM |
745                                 DEV_RX_OFFLOAD_TCP_CKSUM |
746                                 DEV_RX_OFFLOAD_VLAN_FILTER |
747                                 DEV_RX_OFFLOAD_SCATTER |
748                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
749                                 DEV_RX_OFFLOAD_TCP_LRO |
750                                 DEV_RX_OFFLOAD_RSS_HASH;
751
752         info->tx_queue_offload_capa = 0;
753         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
754                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
755                                 DEV_TX_OFFLOAD_UDP_CKSUM |
756                                 DEV_TX_OFFLOAD_TCP_CKSUM |
757                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
758                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
759                                 DEV_TX_OFFLOAD_TCP_TSO |
760                                 DEV_TX_OFFLOAD_MULTI_SEGS;
761
762         info->hash_key_size = HINIC_RSS_KEY_SIZE;
763         info->reta_size = HINIC_RSS_INDIR_SIZE;
764         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
765         info->rx_desc_lim = hinic_rx_desc_lim;
766         info->tx_desc_lim = hinic_tx_desc_lim;
767
768         /* Driver-preferred Rx/Tx parameters */
769         info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
770         info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
771         info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
772         info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
773         info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
774         info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
775
776         return 0;
777 }
778
779 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
780                                 size_t fw_size)
781 {
782         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
783         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
784         int err;
785
786         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
787         if (err) {
788                 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
789                 return -EINVAL;
790         }
791
792         if (fw_size < strlen(fw_ver) + 1)
793                 return (strlen(fw_ver) + 1);
794
795         snprintf(fw_version, fw_size, "%s", fw_ver);
796
797         return 0;
798 }
799
800 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
801 {
802         int err;
803
804         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
805         if (err) {
806                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
807                 return -EINVAL;
808         }
809         nic_dev->rx_mode_status = rx_mode_ctrl;
810
811         return 0;
812 }
813
814 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
815 {
816         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
817         int err;
818
819         /* rx configure, if rss enable, need to init default configuration */
820         err = hinic_rx_configure(dev);
821         if (err) {
822                 PMD_DRV_LOG(ERR, "Configure rss failed");
823                 return err;
824         }
825
826         /* rx mode init */
827         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
828         if (err) {
829                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
830                         HINIC_DEFAULT_RX_MODE);
831                 goto set_rx_mode_fail;
832         }
833
834         return HINIC_OK;
835
836 set_rx_mode_fail:
837         hinic_rx_remove_configure(dev);
838
839         return err;
840 }
841
842 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
843 {
844         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
845
846         (void)hinic_config_rx_mode(nic_dev, 0);
847         hinic_rx_remove_configure(dev);
848 }
849
850 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
851                                           struct rte_eth_link *link)
852 {
853         int rc;
854         u8 port_link_status = 0;
855         struct nic_port_info port_link_info;
856         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
857         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
858                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
859                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
860                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
861
862         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
863         if (rc)
864                 return rc;
865
866         if (!port_link_status) {
867                 link->link_status = ETH_LINK_DOWN;
868                 link->link_speed = 0;
869                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
870                 link->link_autoneg = ETH_LINK_FIXED;
871                 return HINIC_OK;
872         }
873
874         memset(&port_link_info, 0, sizeof(port_link_info));
875         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
876         if (rc)
877                 return rc;
878
879         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
880         link->link_duplex = port_link_info.duplex;
881         link->link_autoneg = port_link_info.autoneg_state;
882         link->link_status = port_link_status;
883
884         return HINIC_OK;
885 }
886
887 /**
888  * DPDK callback to retrieve physical link information.
889  *
890  * @param dev
891  *   Pointer to Ethernet device structure.
892  * @param wait_to_complete
893  *   Wait for request completion.
894  *
895  * @return
896  *   0 link status changed, -1 link status not changed
897  */
898 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
899 {
900 #define CHECK_INTERVAL 10  /* 10ms */
901 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
902         int rc = HINIC_OK;
903         struct rte_eth_link link;
904         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
905         unsigned int rep_cnt = MAX_REPEAT_TIME;
906
907         memset(&link, 0, sizeof(link));
908         do {
909                 /* Get link status information from hardware */
910                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
911                 if (rc != HINIC_OK) {
912                         link.link_speed = ETH_SPEED_NUM_NONE;
913                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
914                         PMD_DRV_LOG(ERR, "Get link status failed");
915                         goto out;
916                 }
917
918                 if (!wait_to_complete || link.link_status)
919                         break;
920
921                 rte_delay_ms(CHECK_INTERVAL);
922         } while (rep_cnt--);
923
924 out:
925         rc = rte_eth_linkstatus_set(dev, &link);
926         return rc;
927 }
928
929 /**
930  * DPDK callback to bring the link UP.
931  *
932  * @param dev
933  *   Pointer to Ethernet device structure.
934  *
935  * @return
936  *   0 on success, negative errno value on failure.
937  */
938 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
939 {
940         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
941         int ret;
942
943         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
944         if (ret) {
945                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
946                             nic_dev->proc_dev_name, dev->data->port_id);
947                 return ret;
948         }
949
950         /* link status follow phy port status, up will open pma */
951         ret = hinic_set_port_enable(nic_dev->hwdev, true);
952         if (ret)
953                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
954                             nic_dev->proc_dev_name, dev->data->port_id);
955
956         return ret;
957 }
958
959 /**
960  * DPDK callback to bring the link DOWN.
961  *
962  * @param dev
963  *   Pointer to Ethernet device structure.
964  *
965  * @return
966  *   0 on success, negative errno value on failure.
967  */
968 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
969 {
970         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
971         int ret;
972
973         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
974         if (ret) {
975                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
976                             nic_dev->proc_dev_name, dev->data->port_id);
977                 return ret;
978         }
979
980         /* link status follow phy port status, up will close pma */
981         ret = hinic_set_port_enable(nic_dev->hwdev, false);
982         if (ret)
983                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
984                             nic_dev->proc_dev_name, dev->data->port_id);
985
986         return ret;
987 }
988
989 /**
990  * DPDK callback to start the device.
991  *
992  * @param dev
993  *   Pointer to Ethernet device structure.
994  *
995  * @return
996  *   0 on success, negative errno value on failure.
997  */
998 static int hinic_dev_start(struct rte_eth_dev *dev)
999 {
1000         int rc;
1001         char *name;
1002         struct hinic_nic_dev *nic_dev;
1003
1004         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1005         name = dev->data->name;
1006
1007         /* reset rx and tx queue */
1008         hinic_reset_rx_queue(dev);
1009         hinic_reset_tx_queue(dev);
1010
1011         /* get func rx buf size */
1012         hinic_get_func_rx_buf_size(nic_dev);
1013
1014         /* init txq and rxq context */
1015         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1016         if (rc) {
1017                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
1018                             name);
1019                 goto init_qp_fail;
1020         }
1021
1022         /* rss template */
1023         rc = hinic_config_mq_mode(dev, TRUE);
1024         if (rc) {
1025                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1026                             name);
1027                 goto cfg_mq_mode_fail;
1028         }
1029
1030         /* set default mtu */
1031         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1032         if (rc) {
1033                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1034                             nic_dev->mtu_size, name);
1035                 goto set_mtu_fail;
1036         }
1037
1038         /* configure rss rx_mode and other rx or tx default feature */
1039         rc = hinic_rxtx_configure(dev);
1040         if (rc) {
1041                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1042                             name);
1043                 goto cfg_rxtx_fail;
1044         }
1045
1046         /* reactive pf status, so that uP report asyn event */
1047         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1048
1049         /* open virtual port and ready to start packet receiving */
1050         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1051         if (rc) {
1052                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1053                 goto en_vport_fail;
1054         }
1055
1056         /* open physical port and start packet receiving */
1057         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1058         if (rc) {
1059                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1060                             name);
1061                 goto en_port_fail;
1062         }
1063
1064         /* update eth_dev link status */
1065         if (dev->data->dev_conf.intr_conf.lsc != 0)
1066                 (void)hinic_link_update(dev, 0);
1067
1068         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1069
1070         return 0;
1071
1072 en_port_fail:
1073         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1074
1075 en_vport_fail:
1076         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1077
1078         /* Flush tx && rx chip resources in case of set vport fake fail */
1079         (void)hinic_flush_qp_res(nic_dev->hwdev);
1080         rte_delay_ms(100);
1081
1082         hinic_remove_rxtx_configure(dev);
1083
1084 cfg_rxtx_fail:
1085 set_mtu_fail:
1086 cfg_mq_mode_fail:
1087         hinic_free_qp_ctxts(nic_dev->hwdev);
1088
1089 init_qp_fail:
1090         hinic_free_all_rx_mbuf(dev);
1091         hinic_free_all_tx_mbuf(dev);
1092
1093         return rc;
1094 }
1095
1096 /**
1097  * DPDK callback to release the receive queue.
1098  *
1099  * @param queue
1100  *   Generic receive queue pointer.
1101  */
1102 static void hinic_rx_queue_release(void *queue)
1103 {
1104         struct hinic_rxq *rxq = queue;
1105         struct hinic_nic_dev *nic_dev;
1106
1107         if (!rxq) {
1108                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1109                 return;
1110         }
1111         nic_dev = rxq->nic_dev;
1112
1113         /* free rxq_pkt mbuf */
1114         hinic_free_all_rx_mbufs(rxq);
1115
1116         /* free rxq_cqe, rxq_info */
1117         hinic_free_rx_resources(rxq);
1118
1119         /* free root rq wq */
1120         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1121
1122         nic_dev->rxqs[rxq->q_id] = NULL;
1123
1124         /* free rxq */
1125         rte_free(rxq);
1126 }
1127
1128 /**
1129  * DPDK callback to release the transmit queue.
1130  *
1131  * @param queue
1132  *   Generic transmit queue pointer.
1133  */
1134 static void hinic_tx_queue_release(void *queue)
1135 {
1136         struct hinic_txq *txq = queue;
1137         struct hinic_nic_dev *nic_dev;
1138
1139         if (!txq) {
1140                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1141                 return;
1142         }
1143         nic_dev = txq->nic_dev;
1144
1145         /* free txq_pkt mbuf */
1146         hinic_free_all_tx_mbufs(txq);
1147
1148         /* free txq_info */
1149         hinic_free_tx_resources(txq);
1150
1151         /* free root sq wq */
1152         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1153         nic_dev->txqs[txq->q_id] = NULL;
1154
1155         /* free txq */
1156         rte_free(txq);
1157 }
1158
1159 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1160 {
1161         u16 q_id;
1162
1163         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1164                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1165 }
1166
1167 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1168 {
1169         u16 q_id;
1170
1171         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1172                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1173 }
1174
1175 /**
1176  * DPDK callback to stop the device.
1177  *
1178  * @param dev
1179  *   Pointer to Ethernet device structure.
1180  */
1181 static void hinic_dev_stop(struct rte_eth_dev *dev)
1182 {
1183         int rc;
1184         char *name;
1185         uint16_t port_id;
1186         struct hinic_nic_dev *nic_dev;
1187         struct rte_eth_link link;
1188
1189         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1190         name = dev->data->name;
1191         port_id = dev->data->port_id;
1192
1193         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1194                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1195                 return;
1196         }
1197
1198         /* just stop phy port and vport */
1199         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1200         if (rc)
1201                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1202                           rc, name, port_id);
1203
1204         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1205         if (rc)
1206                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1207                           rc, name, port_id);
1208
1209         /* Clear recorded link status */
1210         memset(&link, 0, sizeof(link));
1211         (void)rte_eth_linkstatus_set(dev, &link);
1212
1213         /* flush pending io request */
1214         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1215         if (rc)
1216                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1217                             rc, name, port_id);
1218
1219         /* clean rss table and rx_mode */
1220         hinic_remove_rxtx_configure(dev);
1221
1222         /* clean root context */
1223         hinic_free_qp_ctxts(nic_dev->hwdev);
1224
1225         hinic_destroy_fdir_filter(dev);
1226
1227         /* free mbuf */
1228         hinic_free_all_rx_mbuf(dev);
1229         hinic_free_all_tx_mbuf(dev);
1230 }
1231
1232 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1233 {
1234         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1235         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1236         int ret, retries = 0;
1237
1238         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1239
1240         /* disable msix interrupt in hardware */
1241         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1242
1243         /* disable rte interrupt */
1244         ret = rte_intr_disable(&pci_dev->intr_handle);
1245         if (ret)
1246                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1247
1248         do {
1249                 ret =
1250                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1251                                              hinic_dev_interrupt_handler, dev);
1252                 if (ret >= 0) {
1253                         break;
1254                 } else if (ret == -EAGAIN) {
1255                         rte_delay_ms(100);
1256                         retries++;
1257                 } else {
1258                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1259                                     ret);
1260                         break;
1261                 }
1262         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1263
1264         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1265                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1266                             retries);
1267 }
1268
1269 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1270 {
1271         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1272
1273         if (enable)
1274                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1275         else
1276                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1277
1278         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1279 }
1280
1281 /**
1282  * DPDK callback to get device statistics.
1283  *
1284  * @param dev
1285  *   Pointer to Ethernet device structure.
1286  * @param stats
1287  *   Stats structure output buffer.
1288  *
1289  * @return
1290  *   0 on success and stats is filled,
1291  *   negative error value otherwise.
1292  */
1293 static int
1294 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1295 {
1296         int i, err, q_num;
1297         u64 rx_discards_pmd = 0;
1298         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1299         struct hinic_vport_stats vport_stats;
1300         struct hinic_rxq        *rxq = NULL;
1301         struct hinic_rxq_stats rxq_stats;
1302         struct hinic_txq        *txq = NULL;
1303         struct hinic_txq_stats txq_stats;
1304
1305         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1306         if (err) {
1307                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1308                         nic_dev->proc_dev_name);
1309                 return err;
1310         }
1311
1312         /* rx queue stats */
1313         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1314                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1315         for (i = 0; i < q_num; i++) {
1316                 rxq = nic_dev->rxqs[i];
1317                 hinic_rxq_get_stats(rxq, &rxq_stats);
1318                 stats->q_ipackets[i] = rxq_stats.packets;
1319                 stats->q_ibytes[i] = rxq_stats.bytes;
1320                 stats->q_errors[i] = rxq_stats.rx_discards;
1321
1322                 stats->ierrors += rxq_stats.errors;
1323                 rx_discards_pmd += rxq_stats.rx_discards;
1324                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1325         }
1326
1327         /* tx queue stats */
1328         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1329                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1330         for (i = 0; i < q_num; i++) {
1331                 txq = nic_dev->txqs[i];
1332                 hinic_txq_get_stats(txq, &txq_stats);
1333                 stats->q_opackets[i] = txq_stats.packets;
1334                 stats->q_obytes[i] = txq_stats.bytes;
1335                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1336         }
1337
1338         /* vport stats */
1339         stats->oerrors += vport_stats.tx_discard_vport;
1340
1341         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1342
1343         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1344                         vport_stats.rx_multicast_pkts_vport +
1345                         vport_stats.rx_broadcast_pkts_vport -
1346                         rx_discards_pmd);
1347
1348         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1349                         vport_stats.tx_multicast_pkts_vport +
1350                         vport_stats.tx_broadcast_pkts_vport);
1351
1352         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1353                         vport_stats.rx_multicast_bytes_vport +
1354                         vport_stats.rx_broadcast_bytes_vport);
1355
1356         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1357                         vport_stats.tx_multicast_bytes_vport +
1358                         vport_stats.tx_broadcast_bytes_vport);
1359         return 0;
1360 }
1361
1362 /**
1363  * DPDK callback to clear device statistics.
1364  *
1365  * @param dev
1366  *   Pointer to Ethernet device structure.
1367  */
1368 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1369 {
1370         int qid;
1371         struct hinic_rxq        *rxq = NULL;
1372         struct hinic_txq        *txq = NULL;
1373         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1374         int ret;
1375
1376         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1377         if (ret != 0)
1378                 return ret;
1379
1380         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1381                 rxq = nic_dev->rxqs[qid];
1382                 hinic_rxq_stats_reset(rxq);
1383         }
1384
1385         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1386                 txq = nic_dev->txqs[qid];
1387                 hinic_txq_stats_reset(txq);
1388         }
1389
1390         return 0;
1391 }
1392
1393 /**
1394  * DPDK callback to clear device extended statistics.
1395  *
1396  * @param dev
1397  *   Pointer to Ethernet device structure.
1398  */
1399 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1400 {
1401         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1402         int ret;
1403
1404         ret = hinic_dev_stats_reset(dev);
1405         if (ret != 0)
1406                 return ret;
1407
1408         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1409                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1410                 if (ret != 0)
1411                         return ret;
1412         }
1413
1414         return 0;
1415 }
1416
1417 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1418 {
1419         uint64_t random_value;
1420
1421         /* Set Organizationally Unique Identifier (OUI) prefix */
1422         mac_addr->addr_bytes[0] = 0x00;
1423         mac_addr->addr_bytes[1] = 0x09;
1424         mac_addr->addr_bytes[2] = 0xC0;
1425         /* Force indication of locally assigned MAC address. */
1426         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1427         /* Generate the last 3 bytes of the MAC address with a random number. */
1428         random_value = rte_rand();
1429         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1430 }
1431
1432 /**
1433  * Init mac_vlan table in NIC.
1434  *
1435  * @param dev
1436  *   Pointer to Ethernet device structure.
1437  *
1438  * @return
1439  *   0 on success and stats is filled,
1440  *   negative error value otherwise.
1441  */
1442 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1443 {
1444         struct hinic_nic_dev *nic_dev =
1445                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1446         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1447         u16 func_id = 0;
1448         int rc = 0;
1449
1450         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1451         if (rc)
1452                 return rc;
1453
1454         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1455                 &eth_dev->data->mac_addrs[0]);
1456         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1457                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1458
1459         func_id = hinic_global_func_id(nic_dev->hwdev);
1460         rc = hinic_set_mac(nic_dev->hwdev,
1461                         eth_dev->data->mac_addrs[0].addr_bytes,
1462                         0, func_id);
1463         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1464                 return rc;
1465
1466         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1467                         &nic_dev->default_addr);
1468
1469         return 0;
1470 }
1471
1472 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1473 {
1474         u16 func_id;
1475         u32 i;
1476
1477         func_id = hinic_global_func_id(nic_dev->hwdev);
1478
1479         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1480                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1481                         break;
1482
1483                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1484                               0, func_id);
1485                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1486         }
1487 }
1488
1489 /**
1490  * Deinit mac_vlan table in NIC.
1491  *
1492  * @param dev
1493  *   Pointer to Ethernet device structure.
1494  *
1495  * @return
1496  *   0 on success and stats is filled,
1497  *   negative error value otherwise.
1498  */
1499 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1500 {
1501         struct hinic_nic_dev *nic_dev =
1502                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1503         u16 func_id = 0;
1504         int rc;
1505         int i;
1506
1507         func_id = hinic_global_func_id(nic_dev->hwdev);
1508
1509         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1510                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1511                         continue;
1512
1513                 rc = hinic_del_mac(nic_dev->hwdev,
1514                                    eth_dev->data->mac_addrs[i].addr_bytes,
1515                                    0, func_id);
1516                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1517                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1518                                     eth_dev->data->name);
1519
1520                 memset(&eth_dev->data->mac_addrs[i], 0,
1521                        sizeof(struct rte_ether_addr));
1522         }
1523
1524         /* delete multicast mac addrs */
1525         hinic_delete_mc_addr_list(nic_dev);
1526 }
1527
1528 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1529 {
1530         int ret = 0;
1531         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1532
1533         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1534                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1535
1536         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1537                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1538                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1539                 return -EINVAL;
1540         }
1541
1542         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1543         if (ret) {
1544                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1545                 return ret;
1546         }
1547
1548         /* update max frame size */
1549         dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1550         nic_dev->mtu_size = mtu;
1551
1552         return ret;
1553 }
1554
1555 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1556                                         u16 vlan_id, bool on)
1557 {
1558         u32 vid_idx, vid_bit;
1559
1560         vid_idx = HINIC_VFTA_IDX(vlan_id);
1561         vid_bit = HINIC_VFTA_BIT(vlan_id);
1562
1563         if (on)
1564                 nic_dev->vfta[vid_idx] |= vid_bit;
1565         else
1566                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1567 }
1568
1569 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1570                                 uint16_t vlan_id)
1571 {
1572         u32 vid_idx, vid_bit;
1573
1574         vid_idx = HINIC_VFTA_IDX(vlan_id);
1575         vid_bit = HINIC_VFTA_BIT(vlan_id);
1576
1577         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1578 }
1579
1580 /**
1581  * DPDK callback to set vlan filter.
1582  *
1583  * @param dev
1584  *   Pointer to Ethernet device structure.
1585  * @param vlan_id
1586  *   vlan id is used to filter vlan packets
1587  * @param enable
1588  *   enable disable or enable vlan filter function
1589  */
1590 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1591                                 uint16_t vlan_id, int enable)
1592 {
1593         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1594         int err = 0;
1595         u16 func_id;
1596
1597         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1598                 return -EINVAL;
1599
1600         func_id = hinic_global_func_id(nic_dev->hwdev);
1601
1602         if (enable) {
1603                 /* If vlanid is already set, just return */
1604                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1605                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1606                                   vlan_id, nic_dev->proc_dev_name);
1607                         return 0;
1608                 }
1609
1610                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1611                                             func_id, TRUE);
1612         } else {
1613                 /* If vlanid can't be found, just return */
1614                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1615                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1616                                   vlan_id, nic_dev->proc_dev_name);
1617                         return 0;
1618                 }
1619
1620                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1621                                             func_id, FALSE);
1622         }
1623
1624         if (err) {
1625                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1626                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1627                 return err;
1628         }
1629
1630         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1631
1632         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1633                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1634         return 0;
1635 }
1636
1637 /**
1638  * DPDK callback to enable or disable vlan offload.
1639  *
1640  * @param dev
1641  *   Pointer to Ethernet device structure.
1642  * @param mask
1643  *   Definitions used for VLAN setting
1644  */
1645 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1646 {
1647         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1648         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1649         bool on;
1650         int err;
1651
1652         /* Enable or disable VLAN filter */
1653         if (mask & ETH_VLAN_FILTER_MASK) {
1654                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1655                         TRUE : FALSE;
1656                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1657                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1658                         PMD_DRV_LOG(WARNING,
1659                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1660                                   nic_dev->proc_dev_name, dev->data->port_id);
1661                 } else if (err) {
1662                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1663                                   on ? "enable" : "disable",
1664                                   nic_dev->proc_dev_name,
1665                                   dev->data->port_id, err);
1666                         return err;
1667                 }
1668
1669                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1670                           on ? "Enable" : "Disable",
1671                           nic_dev->proc_dev_name, dev->data->port_id);
1672         }
1673
1674         /* Enable or disable VLAN stripping */
1675         if (mask & ETH_VLAN_STRIP_MASK) {
1676                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1677                         TRUE : FALSE;
1678                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1679                 if (err) {
1680                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1681                                   on ? "enable" : "disable",
1682                                   nic_dev->proc_dev_name,
1683                                   dev->data->port_id, err);
1684                         return err;
1685                 }
1686
1687                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1688                           on ? "Enable" : "Disable",
1689                           nic_dev->proc_dev_name, dev->data->port_id);
1690         }
1691
1692         if (mask & ETH_VLAN_EXTEND_MASK) {
1693                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1694                           nic_dev->proc_dev_name, dev->data->port_id);
1695                 return -ENOTSUP;
1696         }
1697
1698         return 0;
1699 }
1700
1701 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1702 {
1703         struct hinic_nic_dev *nic_dev =
1704                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1705         u16 func_id;
1706         int i;
1707
1708         func_id = hinic_global_func_id(nic_dev->hwdev);
1709         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1710                 /* If can't find it, continue */
1711                 if (!hinic_find_vlan_filter(nic_dev, i))
1712                         continue;
1713
1714                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1715                 hinic_store_vlan_filter(nic_dev, i, false);
1716         }
1717 }
1718
1719 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1720                                 bool enable)
1721 {
1722         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1723
1724         if (enable)
1725                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1726         else
1727                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1728
1729         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1730 }
1731
1732 /**
1733  * DPDK callback to enable allmulticast mode.
1734  *
1735  * @param dev
1736  *   Pointer to Ethernet device structure.
1737  *
1738  * @return
1739  *   0 on success,
1740  *   negative error value otherwise.
1741  */
1742 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1743 {
1744         int ret = HINIC_OK;
1745         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1746
1747         ret = hinic_set_dev_allmulticast(nic_dev, true);
1748         if (ret) {
1749                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1750                 return ret;
1751         }
1752
1753         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1754                 nic_dev->proc_dev_name, dev->data->port_id);
1755         return 0;
1756 }
1757
1758 /**
1759  * DPDK callback to disable allmulticast mode.
1760  *
1761  * @param dev
1762  *   Pointer to Ethernet device structure.
1763  *
1764  * @return
1765  *   0 on success,
1766  *   negative error value otherwise.
1767  */
1768 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1769 {
1770         int ret = HINIC_OK;
1771         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1772
1773         ret = hinic_set_dev_allmulticast(nic_dev, false);
1774         if (ret) {
1775                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1776                 return ret;
1777         }
1778
1779         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1780                 nic_dev->proc_dev_name, dev->data->port_id);
1781         return 0;
1782 }
1783
1784 /**
1785  * DPDK callback to enable promiscuous mode.
1786  *
1787  * @param dev
1788  *   Pointer to Ethernet device structure.
1789  *
1790  * @return
1791  *   0 on success,
1792  *   negative error value otherwise.
1793  */
1794 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1795 {
1796         int rc = HINIC_OK;
1797         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1798
1799         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1800                     nic_dev->proc_dev_name, dev->data->port_id,
1801                     dev->data->promiscuous);
1802
1803         rc = hinic_set_dev_promiscuous(nic_dev, true);
1804         if (rc)
1805                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1806
1807         return rc;
1808 }
1809
1810 /**
1811  * DPDK callback to disable promiscuous mode.
1812  *
1813  * @param dev
1814  *   Pointer to Ethernet device structure.
1815  *
1816  * @return
1817  *   0 on success,
1818  *   negative error value otherwise.
1819  */
1820 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1821 {
1822         int rc = HINIC_OK;
1823         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1824
1825         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1826                     nic_dev->proc_dev_name, dev->data->port_id,
1827                     dev->data->promiscuous);
1828
1829         rc = hinic_set_dev_promiscuous(nic_dev, false);
1830         if (rc)
1831                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1832
1833         return rc;
1834 }
1835
1836 /**
1837  * DPDK callback to update the RSS hash key and RSS hash type.
1838  *
1839  * @param dev
1840  *   Pointer to Ethernet device structure.
1841  * @param rss_conf
1842  *   RSS configuration data.
1843  *
1844  * @return
1845  *   0 on success, negative error value otherwise.
1846  */
1847 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1848                           struct rte_eth_rss_conf *rss_conf)
1849 {
1850         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1851         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1852         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1853         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1854         u64 rss_hf = rss_conf->rss_hf;
1855         struct nic_rss_type rss_type = {0};
1856         int err = 0;
1857
1858         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1859                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1860                 return HINIC_OK;
1861         }
1862
1863         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1864                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1865                             rss_conf->rss_key_len);
1866                 return HINIC_ERROR;
1867         }
1868
1869         if (rss_conf->rss_key) {
1870                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1871                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1872                                                  hashkey);
1873                 if (err) {
1874                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1875                         goto disable_rss;
1876                 }
1877         }
1878
1879         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1880         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1881         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1882         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1883         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1884         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1885         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1886         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1887
1888         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1889         if (err) {
1890                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1891                 goto disable_rss;
1892         }
1893
1894         return 0;
1895
1896 disable_rss:
1897         memset(prio_tc, 0, sizeof(prio_tc));
1898         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1899         return err;
1900 }
1901
1902 /**
1903  * DPDK callback to get the RSS hash configuration.
1904  *
1905  * @param dev
1906  *   Pointer to Ethernet device structure.
1907  * @param rss_conf
1908  *   RSS configuration data.
1909  *
1910  * @return
1911  *   0 on success, negative error value otherwise.
1912  */
1913 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1914                        struct rte_eth_rss_conf *rss_conf)
1915 {
1916         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1917         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1918         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1919         struct nic_rss_type rss_type = {0};
1920         int err;
1921
1922         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1923                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1924                 return HINIC_ERROR;
1925         }
1926
1927         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1928         if (err)
1929                 return err;
1930
1931         if (rss_conf->rss_key &&
1932             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1933                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1934                 rss_conf->rss_key_len = sizeof(hashkey);
1935         }
1936
1937         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1938         if (err)
1939                 return err;
1940
1941         rss_conf->rss_hf = 0;
1942         rss_conf->rss_hf |=  rss_type.ipv4 ?
1943                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1944         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1945         rss_conf->rss_hf |=  rss_type.ipv6 ?
1946                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1947         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1948         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1949         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1950         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1951         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1952
1953         return HINIC_OK;
1954 }
1955
1956 /**
1957  * DPDK callback to update the RETA indirection table.
1958  *
1959  * @param dev
1960  *   Pointer to Ethernet device structure.
1961  * @param reta_conf
1962  *   Pointer to RETA configuration structure array.
1963  * @param reta_size
1964  *   Size of the RETA table.
1965  *
1966  * @return
1967  *   0 on success, negative error value otherwise.
1968  */
1969 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1970                               struct rte_eth_rss_reta_entry64 *reta_conf,
1971                               uint16_t reta_size)
1972 {
1973         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1974         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1975         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1976         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1977         int err = 0;
1978         u16 i = 0;
1979         u16 idx, shift;
1980
1981         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1982                 return HINIC_OK;
1983
1984         if (reta_size != NIC_RSS_INDIR_SIZE) {
1985                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1986                 return HINIC_ERROR;
1987         }
1988
1989         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1990         if (err)
1991                 return err;
1992
1993         /* update rss indir_tbl */
1994         for (i = 0; i < reta_size; i++) {
1995                 idx = i / RTE_RETA_GROUP_SIZE;
1996                 shift = i % RTE_RETA_GROUP_SIZE;
1997                 if (reta_conf[idx].mask & (1ULL << shift))
1998                         indirtbl[i] = reta_conf[idx].reta[shift];
1999         }
2000
2001         for (i = 0 ; i < reta_size; i++) {
2002                 if (indirtbl[i] >= nic_dev->num_rq) {
2003                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
2004                                     i, nic_dev->num_rq);
2005                         goto disable_rss;
2006                 }
2007         }
2008
2009         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2010         if (err)
2011                 goto disable_rss;
2012
2013         nic_dev->rss_indir_flag = true;
2014
2015         return 0;
2016
2017 disable_rss:
2018         memset(prio_tc, 0, sizeof(prio_tc));
2019         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2020
2021         return HINIC_ERROR;
2022 }
2023
2024
2025 /**
2026  * DPDK callback to get the RETA indirection table.
2027  *
2028  * @param dev
2029  *   Pointer to Ethernet device structure.
2030  * @param reta_conf
2031  *   Pointer to RETA configuration structure array.
2032  * @param reta_size
2033  *   Size of the RETA table.
2034  *
2035  * @return
2036  *   0 on success, negative error value otherwise.
2037  */
2038 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2039                              struct rte_eth_rss_reta_entry64 *reta_conf,
2040                              uint16_t reta_size)
2041 {
2042         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2043         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2044         int err = 0;
2045         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2046         u16 idx, shift;
2047         u16 i = 0;
2048
2049         if (reta_size != NIC_RSS_INDIR_SIZE) {
2050                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2051                 return HINIC_ERROR;
2052         }
2053
2054         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2055         if (err) {
2056                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2057                             err);
2058                 return err;
2059         }
2060
2061         for (i = 0; i < reta_size; i++) {
2062                 idx = i / RTE_RETA_GROUP_SIZE;
2063                 shift = i % RTE_RETA_GROUP_SIZE;
2064                 if (reta_conf[idx].mask & (1ULL << shift))
2065                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2066         }
2067
2068         return HINIC_OK;
2069 }
2070
2071 /**
2072  * DPDK callback to get extended device statistics.
2073  *
2074  * @param dev
2075  *   Pointer to Ethernet device.
2076  * @param xstats
2077  *   Pointer to rte extended stats table.
2078  * @param n
2079  *   The size of the stats table.
2080  *
2081  * @return
2082  *   Number of extended stats on success and stats is filled,
2083  *   negative error value otherwise.
2084  */
2085 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2086                          struct rte_eth_xstat *xstats,
2087                          unsigned int n)
2088 {
2089         u16 qid = 0;
2090         u32 i;
2091         int err, count;
2092         struct hinic_nic_dev *nic_dev;
2093         struct hinic_phy_port_stats port_stats;
2094         struct hinic_vport_stats vport_stats;
2095         struct hinic_rxq        *rxq = NULL;
2096         struct hinic_rxq_stats rxq_stats;
2097         struct hinic_txq        *txq = NULL;
2098         struct hinic_txq_stats txq_stats;
2099
2100         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2101         count = hinic_xstats_calc_num(nic_dev);
2102         if ((int)n < count)
2103                 return count;
2104
2105         count = 0;
2106
2107         /* Get stats from hinic_rxq_stats */
2108         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2109                 rxq = nic_dev->rxqs[qid];
2110                 hinic_rxq_get_stats(rxq, &rxq_stats);
2111
2112                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2113                         xstats[count].value =
2114                                 *(uint64_t *)(((char *)&rxq_stats) +
2115                                 hinic_rxq_stats_strings[i].offset);
2116                         xstats[count].id = count;
2117                         count++;
2118                 }
2119         }
2120
2121         /* Get stats from hinic_txq_stats */
2122         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2123                 txq = nic_dev->txqs[qid];
2124                 hinic_txq_get_stats(txq, &txq_stats);
2125
2126                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2127                         xstats[count].value =
2128                                 *(uint64_t *)(((char *)&txq_stats) +
2129                                 hinic_txq_stats_strings[i].offset);
2130                         xstats[count].id = count;
2131                         count++;
2132                 }
2133         }
2134
2135         /* Get stats from hinic_vport_stats */
2136         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2137         if (err)
2138                 return err;
2139
2140         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2141                 xstats[count].value =
2142                         *(uint64_t *)(((char *)&vport_stats) +
2143                         hinic_vport_stats_strings[i].offset);
2144                 xstats[count].id = count;
2145                 count++;
2146         }
2147
2148         if (HINIC_IS_VF(nic_dev->hwdev))
2149                 return count;
2150
2151         /* Get stats from hinic_phy_port_stats */
2152         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2153         if (err)
2154                 return err;
2155
2156         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2157                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2158                                 hinic_phyport_stats_strings[i].offset);
2159                 xstats[count].id = count;
2160                 count++;
2161         }
2162
2163         return count;
2164 }
2165
2166 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2167                                 struct rte_eth_rxq_info *qinfo)
2168 {
2169         struct hinic_rxq  *rxq = dev->data->rx_queues[queue_id];
2170
2171         qinfo->mp = rxq->mb_pool;
2172         qinfo->nb_desc = rxq->q_depth;
2173 }
2174
2175 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2176                                 struct rte_eth_txq_info *qinfo)
2177 {
2178         struct hinic_txq  *txq = dev->data->tx_queues[queue_id];
2179
2180         qinfo->nb_desc = txq->q_depth;
2181 }
2182
2183 /**
2184  * DPDK callback to retrieve names of extended device statistics
2185  *
2186  * @param dev
2187  *   Pointer to Ethernet device structure.
2188  * @param xstats_names
2189  *   Buffer to insert names into.
2190  *
2191  * @return
2192  *   Number of xstats names.
2193  */
2194 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2195                                struct rte_eth_xstat_name *xstats_names,
2196                                __rte_unused unsigned int limit)
2197 {
2198         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2199         int count = 0;
2200         u16 i = 0, q_num;
2201
2202         if (xstats_names == NULL)
2203                 return hinic_xstats_calc_num(nic_dev);
2204
2205         /* get pmd rxq stats */
2206         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2207                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2208                         snprintf(xstats_names[count].name,
2209                                  sizeof(xstats_names[count].name),
2210                                  "rxq%d_%s_pmd",
2211                                  q_num, hinic_rxq_stats_strings[i].name);
2212                         count++;
2213                 }
2214         }
2215
2216         /* get pmd txq stats */
2217         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2218                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2219                         snprintf(xstats_names[count].name,
2220                                  sizeof(xstats_names[count].name),
2221                                  "txq%d_%s_pmd",
2222                                  q_num, hinic_txq_stats_strings[i].name);
2223                         count++;
2224                 }
2225         }
2226
2227         /* get vport stats */
2228         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2229                 snprintf(xstats_names[count].name,
2230                          sizeof(xstats_names[count].name),
2231                          "%s",
2232                          hinic_vport_stats_strings[i].name);
2233                 count++;
2234         }
2235
2236         if (HINIC_IS_VF(nic_dev->hwdev))
2237                 return count;
2238
2239         /* get phy port stats */
2240         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2241                 snprintf(xstats_names[count].name,
2242                          sizeof(xstats_names[count].name),
2243                          "%s",
2244                          hinic_phyport_stats_strings[i].name);
2245                 count++;
2246         }
2247
2248         return count;
2249 }
2250 /**
2251  *  DPDK callback to set mac address
2252  *
2253  * @param dev
2254  *   Pointer to Ethernet device structure.
2255  * @param addr
2256  *   Pointer to mac address
2257  * @return
2258  *   0 on success, negative error value otherwise.
2259  */
2260 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2261                               struct rte_ether_addr *addr)
2262 {
2263         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2264         u16 func_id;
2265         int err;
2266
2267         func_id = hinic_global_func_id(nic_dev->hwdev);
2268         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2269                                addr->addr_bytes, 0, func_id);
2270         if (err)
2271                 return err;
2272
2273         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2274
2275         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2276                     addr->addr_bytes[0], addr->addr_bytes[1],
2277                     addr->addr_bytes[2], addr->addr_bytes[3],
2278                     addr->addr_bytes[4], addr->addr_bytes[5]);
2279
2280         return 0;
2281 }
2282
2283 /**
2284  * DPDK callback to remove a MAC address.
2285  *
2286  * @param dev
2287  *   Pointer to Ethernet device structure.
2288  * @param index
2289  *   MAC address index.
2290  */
2291 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2292 {
2293         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2294         u16 func_id;
2295         int ret;
2296
2297         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2298                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2299                             index);
2300                 return;
2301         }
2302
2303         func_id = hinic_global_func_id(nic_dev->hwdev);
2304         ret = hinic_del_mac(nic_dev->hwdev,
2305                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2306         if (ret)
2307                 return;
2308
2309         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2310 }
2311
2312 /**
2313  * DPDK callback to add a MAC address.
2314  *
2315  * @param dev
2316  *   Pointer to Ethernet device structure.
2317  * @param mac_addr
2318  *   MAC address to register.
2319  * @param index
2320  *   MAC address index.
2321  * @param vmdq
2322  *   VMDq pool index to associate address with (ignored).
2323  *
2324  * @return
2325  *   0 on success, a negative errno value otherwise and rte_errno is set.
2326  */
2327
2328 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2329                               struct rte_ether_addr *mac_addr, uint32_t index,
2330                               __rte_unused uint32_t vmdq)
2331 {
2332         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2333         unsigned int i;
2334         u16 func_id;
2335         int ret;
2336
2337         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2338                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2339                 return -EINVAL;
2340         }
2341
2342         /* First, make sure this address isn't already configured. */
2343         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2344                 /* Skip this index, it's going to be reconfigured. */
2345                 if (i == index)
2346                         continue;
2347
2348                 if (memcmp(&dev->data->mac_addrs[i],
2349                         mac_addr, sizeof(*mac_addr)))
2350                         continue;
2351
2352                 PMD_DRV_LOG(INFO, "MAC address already configured");
2353                 return -EADDRINUSE;
2354         }
2355
2356         func_id = hinic_global_func_id(nic_dev->hwdev);
2357         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2358         if (ret)
2359                 return ret;
2360
2361         dev->data->mac_addrs[index] = *mac_addr;
2362         return 0;
2363 }
2364
2365 /**
2366  *  DPDK callback to set multicast mac address
2367  *
2368  * @param dev
2369  *   Pointer to Ethernet device structure.
2370  * @param mc_addr_set
2371  *   Pointer to multicast mac address
2372  * @param nb_mc_addr
2373  *   mc addr count
2374  * @return
2375  *   0 on success, negative error value otherwise.
2376  */
2377 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2378                                   struct rte_ether_addr *mc_addr_set,
2379                                   uint32_t nb_mc_addr)
2380 {
2381         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2382         u16 func_id;
2383         int ret;
2384         u32 i;
2385
2386         func_id = hinic_global_func_id(nic_dev->hwdev);
2387
2388         /* delete old multi_cast addrs firstly */
2389         hinic_delete_mc_addr_list(nic_dev);
2390
2391         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2392                 goto allmulti;
2393
2394         for (i = 0; i < nb_mc_addr; i++) {
2395                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2396                                     0, func_id);
2397                 /* if add mc addr failed, set all multi_cast */
2398                 if (ret) {
2399                         hinic_delete_mc_addr_list(nic_dev);
2400                         goto allmulti;
2401                 }
2402
2403                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2404         }
2405
2406         return 0;
2407
2408 allmulti:
2409         hinic_dev_allmulticast_enable(dev);
2410
2411         return 0;
2412 }
2413
2414 /**
2415  * DPDK callback to manage filter operations
2416  *
2417  * @param dev
2418  *   Pointer to Ethernet device structure.
2419  * @param filter_type
2420  *   Filter type.
2421  * @param filter_op
2422  *   Operation to perform.
2423  * @param arg
2424  *   Pointer to operation-specific structure.
2425  *
2426  * @return
2427  *   0 on success, negative errno value on failure.
2428  */
2429 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2430                      enum rte_filter_type filter_type,
2431                      enum rte_filter_op filter_op,
2432                      void *arg)
2433 {
2434         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2435         int func_id = hinic_global_func_id(nic_dev->hwdev);
2436
2437         switch (filter_type) {
2438         case RTE_ETH_FILTER_GENERIC:
2439                 if (filter_op != RTE_ETH_FILTER_GET)
2440                         return -EINVAL;
2441                 *(const void **)arg = &hinic_flow_ops;
2442                 break;
2443         default:
2444                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2445                         filter_type);
2446                 return -EINVAL;
2447         }
2448
2449         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2450                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2451         return 0;
2452 }
2453
2454 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2455 {
2456         struct nic_pause_config pause_config = {0};
2457
2458         pause_config.auto_neg = 0;
2459         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2460         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2461
2462         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2463 }
2464
2465 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2466 {
2467         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2468         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2469         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2470         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2471         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2472         int i = 0;
2473
2474         pg_bw[0] = 100;
2475         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2476                 up_bw[i] = 100;
2477
2478         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2479                                         up_pgid, up_bw, up_strict);
2480 }
2481
2482 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2483 {
2484         u8 cos_id = 0;
2485         int err;
2486
2487         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2488                 nic_dev->default_cos =
2489                                 (hinic_global_func_id(nic_dev->hwdev) +
2490                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2491         } else {
2492                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2493                 if (err) {
2494                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2495                                         err);
2496                         return HINIC_ERROR;
2497                 }
2498
2499                 nic_dev->default_cos = cos_id;
2500         }
2501
2502         return 0;
2503 }
2504
2505 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2506 {
2507         int err;
2508
2509         err = hinic_init_default_cos(nic_dev);
2510         if (err)
2511                 return err;
2512
2513         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2514                 return 0;
2515
2516         /* Restore DCB configure to default status */
2517         err = hinic_set_default_dcb_feature(nic_dev);
2518         if (err)
2519                 return err;
2520
2521         /* Set pause enable, and up will disable pfc. */
2522         err = hinic_set_default_pause_feature(nic_dev);
2523         if (err)
2524                 return err;
2525
2526         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2527         if (err)
2528                 return err;
2529
2530         err = hinic_set_link_status_follow(nic_dev->hwdev,
2531                                            HINIC_LINK_FOLLOW_PORT);
2532         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2533                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2534         else if (err)
2535                 return err;
2536
2537         return hinic_set_anti_attack(nic_dev->hwdev, true);
2538 }
2539
2540 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2541 {
2542         struct hinic_board_info info = { 0 };
2543         int rc;
2544
2545         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2546                 return 0;
2547
2548         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2549         if (rc)
2550                 return rc;
2551
2552         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2553                                                 HINIC_ERROR);
2554 }
2555
2556 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2557 {
2558         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2559         if (nic_dev->cpy_mpool == NULL) {
2560                 nic_dev->cpy_mpool =
2561                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2562                                         HINIC_COPY_MEMPOOL_DEPTH,
2563                                         0, 0,
2564                                         HINIC_COPY_MBUF_SIZE,
2565                                         rte_socket_id());
2566                 if (!nic_dev->cpy_mpool) {
2567                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2568                                     rte_errno, nic_dev->proc_dev_name);
2569                         return -ENOMEM;
2570                 }
2571         }
2572
2573         return 0;
2574 }
2575
2576 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2577 {
2578         if (nic_dev->cpy_mpool != NULL)
2579                 rte_mempool_free(nic_dev->cpy_mpool);
2580 }
2581
2582 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2583 {
2584         u32 txq_size;
2585         u32 rxq_size;
2586
2587         /* allocate software txq array */
2588         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2589         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2590         if (!nic_dev->txqs) {
2591                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2592                 return -ENOMEM;
2593         }
2594
2595         /* allocate software rxq array */
2596         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2597         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2598         if (!nic_dev->rxqs) {
2599                 /* free txqs */
2600                 kfree(nic_dev->txqs);
2601                 nic_dev->txqs = NULL;
2602
2603                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2604                 return -ENOMEM;
2605         }
2606
2607         return HINIC_OK;
2608 }
2609
2610 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2611 {
2612         kfree(nic_dev->txqs);
2613         nic_dev->txqs = NULL;
2614
2615         kfree(nic_dev->rxqs);
2616         nic_dev->rxqs = NULL;
2617 }
2618
2619 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2620 {
2621         struct hinic_nic_dev *nic_dev =
2622                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2623         int rc;
2624
2625         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2626                                      RTE_CACHE_LINE_SIZE);
2627         if (!nic_dev->hwdev) {
2628                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2629                             eth_dev->data->name);
2630                 return -ENOMEM;
2631         }
2632         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2633
2634         /* init osdep*/
2635         rc = hinic_osdep_init(nic_dev->hwdev);
2636         if (rc) {
2637                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2638                             eth_dev->data->name);
2639                 goto init_osdep_fail;
2640         }
2641
2642         /* init_hwif */
2643         rc = hinic_hwif_res_init(nic_dev->hwdev);
2644         if (rc) {
2645                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2646                             eth_dev->data->name);
2647                 goto init_hwif_fail;
2648         }
2649
2650         /* init_cfg_mgmt */
2651         rc = init_cfg_mgmt(nic_dev->hwdev);
2652         if (rc) {
2653                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2654                             eth_dev->data->name);
2655                 goto init_cfgmgnt_fail;
2656         }
2657
2658         /* init_aeqs */
2659         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2660         if (rc) {
2661                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2662                             eth_dev->data->name);
2663                 goto init_aeqs_fail;
2664         }
2665
2666         /* init_pf_to_mgnt */
2667         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2668         if (rc) {
2669                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2670                             eth_dev->data->name);
2671                 goto init_pf_to_mgmt_fail;
2672         }
2673
2674         /* init mailbox */
2675         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2676         if (rc) {
2677                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2678                             eth_dev->data->name);
2679                 goto init_func_to_func_fail;
2680         }
2681
2682         rc = hinic_card_workmode_check(nic_dev);
2683         if (rc) {
2684                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2685                             eth_dev->data->name);
2686                 goto workmode_check_fail;
2687         }
2688
2689         /* do l2nic reset to make chip clear */
2690         rc = hinic_l2nic_reset(nic_dev->hwdev);
2691         if (rc) {
2692                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2693                             eth_dev->data->name);
2694                 goto l2nic_reset_fail;
2695         }
2696
2697         /* init dma and aeq msix attribute table */
2698         (void)hinic_init_attr_table(nic_dev->hwdev);
2699
2700         /* init_cmdqs */
2701         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2702         if (rc) {
2703                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2704                             eth_dev->data->name);
2705                 goto init_cmdq_fail;
2706         }
2707
2708         /* set hardware state active */
2709         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2710         if (rc) {
2711                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2712                             eth_dev->data->name);
2713                 goto init_resources_state_fail;
2714         }
2715
2716         /* init_capability */
2717         rc = hinic_init_capability(nic_dev->hwdev);
2718         if (rc) {
2719                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2720                             eth_dev->data->name);
2721                 goto init_cap_fail;
2722         }
2723
2724         /* get nic capability */
2725         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2726                 goto nic_check_fail;
2727
2728         /* init root cla and function table */
2729         rc = hinic_init_nicio(nic_dev->hwdev);
2730         if (rc) {
2731                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2732                             eth_dev->data->name);
2733                 goto init_nicio_fail;
2734         }
2735
2736         /* init_software_txrxq */
2737         rc = hinic_init_sw_rxtxqs(nic_dev);
2738         if (rc) {
2739                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2740                             eth_dev->data->name);
2741                 goto init_sw_rxtxqs_fail;
2742         }
2743
2744         rc = hinic_copy_mempool_init(nic_dev);
2745         if (rc) {
2746                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2747                          eth_dev->data->name);
2748                 goto init_mpool_fail;
2749         }
2750
2751         /* set hardware feature to default status */
2752         rc = hinic_set_default_hw_feature(nic_dev);
2753         if (rc) {
2754                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2755                             eth_dev->data->name);
2756                 goto set_default_hw_feature_fail;
2757         }
2758
2759         return 0;
2760
2761 set_default_hw_feature_fail:
2762         hinic_copy_mempool_uninit(nic_dev);
2763
2764 init_mpool_fail:
2765         hinic_deinit_sw_rxtxqs(nic_dev);
2766
2767 init_sw_rxtxqs_fail:
2768         hinic_deinit_nicio(nic_dev->hwdev);
2769
2770 nic_check_fail:
2771 init_nicio_fail:
2772 init_cap_fail:
2773         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2774
2775 init_resources_state_fail:
2776         hinic_comm_cmdqs_free(nic_dev->hwdev);
2777
2778 init_cmdq_fail:
2779 l2nic_reset_fail:
2780 workmode_check_fail:
2781         hinic_comm_func_to_func_free(nic_dev->hwdev);
2782
2783 init_func_to_func_fail:
2784         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2785
2786 init_pf_to_mgmt_fail:
2787         hinic_comm_aeqs_free(nic_dev->hwdev);
2788
2789 init_aeqs_fail:
2790         free_cfg_mgmt(nic_dev->hwdev);
2791
2792 init_cfgmgnt_fail:
2793         hinic_hwif_res_free(nic_dev->hwdev);
2794
2795 init_hwif_fail:
2796         hinic_osdep_deinit(nic_dev->hwdev);
2797
2798 init_osdep_fail:
2799         rte_free(nic_dev->hwdev);
2800         nic_dev->hwdev = NULL;
2801
2802         return rc;
2803 }
2804
2805 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2806 {
2807         struct hinic_nic_dev *nic_dev =
2808                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2809
2810         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2811                                            HINIC_LINK_FOLLOW_DEFAULT);
2812         hinic_copy_mempool_uninit(nic_dev);
2813         hinic_deinit_sw_rxtxqs(nic_dev);
2814         hinic_deinit_nicio(nic_dev->hwdev);
2815         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2816         hinic_comm_cmdqs_free(nic_dev->hwdev);
2817         hinic_comm_func_to_func_free(nic_dev->hwdev);
2818         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2819         hinic_comm_aeqs_free(nic_dev->hwdev);
2820         free_cfg_mgmt(nic_dev->hwdev);
2821         hinic_hwif_res_free(nic_dev->hwdev);
2822         hinic_osdep_deinit(nic_dev->hwdev);
2823         rte_free(nic_dev->hwdev);
2824         nic_dev->hwdev = NULL;
2825 }
2826
2827 /**
2828  * DPDK callback to close the device.
2829  *
2830  * @param dev
2831  *   Pointer to Ethernet device structure.
2832  */
2833 static void hinic_dev_close(struct rte_eth_dev *dev)
2834 {
2835         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2836
2837         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2838                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2839                             dev->data->name);
2840                 return;
2841         }
2842
2843         /* stop device first */
2844         hinic_dev_stop(dev);
2845
2846         /* rx_cqe, rx_info */
2847         hinic_free_all_rx_resources(dev);
2848
2849         /* tx_info */
2850         hinic_free_all_tx_resources(dev);
2851
2852         /* free wq, pi_dma_addr */
2853         hinic_free_all_rq(nic_dev);
2854
2855         /* free wq, db_addr */
2856         hinic_free_all_sq(nic_dev);
2857
2858         /* deinit mac vlan tbl */
2859         hinic_deinit_mac_addr(dev);
2860         hinic_remove_all_vlanid(dev);
2861
2862         /* disable hardware and uio interrupt */
2863         hinic_disable_interrupt(dev);
2864
2865         /* deinit nic hardware device */
2866         hinic_nic_dev_destroy(dev);
2867 }
2868
2869 static const struct eth_dev_ops hinic_pmd_ops = {
2870         .dev_configure                 = hinic_dev_configure,
2871         .dev_infos_get                 = hinic_dev_infos_get,
2872         .fw_version_get                = hinic_fw_version_get,
2873         .rx_queue_setup                = hinic_rx_queue_setup,
2874         .tx_queue_setup                = hinic_tx_queue_setup,
2875         .dev_start                     = hinic_dev_start,
2876         .dev_set_link_up               = hinic_dev_set_link_up,
2877         .dev_set_link_down             = hinic_dev_set_link_down,
2878         .link_update                   = hinic_link_update,
2879         .rx_queue_release              = hinic_rx_queue_release,
2880         .tx_queue_release              = hinic_tx_queue_release,
2881         .dev_stop                      = hinic_dev_stop,
2882         .dev_close                     = hinic_dev_close,
2883         .mtu_set                       = hinic_dev_set_mtu,
2884         .vlan_filter_set               = hinic_vlan_filter_set,
2885         .vlan_offload_set              = hinic_vlan_offload_set,
2886         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2887         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2888         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2889         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2890         .rss_hash_update               = hinic_rss_hash_update,
2891         .rss_hash_conf_get             = hinic_rss_conf_get,
2892         .reta_update                   = hinic_rss_indirtbl_update,
2893         .reta_query                    = hinic_rss_indirtbl_query,
2894         .stats_get                     = hinic_dev_stats_get,
2895         .stats_reset                   = hinic_dev_stats_reset,
2896         .xstats_get                    = hinic_dev_xstats_get,
2897         .xstats_reset                  = hinic_dev_xstats_reset,
2898         .xstats_get_names              = hinic_dev_xstats_get_names,
2899         .rxq_info_get                  = hinic_rxq_info_get,
2900         .txq_info_get                  = hinic_txq_info_get,
2901         .mac_addr_set                  = hinic_set_mac_addr,
2902         .mac_addr_remove               = hinic_mac_addr_remove,
2903         .mac_addr_add                  = hinic_mac_addr_add,
2904         .set_mc_addr_list              = hinic_set_mc_addr_list,
2905         .filter_ctrl                   = hinic_dev_filter_ctrl,
2906 };
2907
2908 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2909         .dev_configure                 = hinic_dev_configure,
2910         .dev_infos_get                 = hinic_dev_infos_get,
2911         .fw_version_get                = hinic_fw_version_get,
2912         .rx_queue_setup                = hinic_rx_queue_setup,
2913         .tx_queue_setup                = hinic_tx_queue_setup,
2914         .dev_start                     = hinic_dev_start,
2915         .link_update                   = hinic_link_update,
2916         .rx_queue_release              = hinic_rx_queue_release,
2917         .tx_queue_release              = hinic_tx_queue_release,
2918         .dev_stop                      = hinic_dev_stop,
2919         .dev_close                     = hinic_dev_close,
2920         .mtu_set                       = hinic_dev_set_mtu,
2921         .vlan_filter_set               = hinic_vlan_filter_set,
2922         .vlan_offload_set              = hinic_vlan_offload_set,
2923         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2924         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2925         .rss_hash_update               = hinic_rss_hash_update,
2926         .rss_hash_conf_get             = hinic_rss_conf_get,
2927         .reta_update                   = hinic_rss_indirtbl_update,
2928         .reta_query                    = hinic_rss_indirtbl_query,
2929         .stats_get                     = hinic_dev_stats_get,
2930         .stats_reset                   = hinic_dev_stats_reset,
2931         .xstats_get                    = hinic_dev_xstats_get,
2932         .xstats_reset                  = hinic_dev_xstats_reset,
2933         .xstats_get_names              = hinic_dev_xstats_get_names,
2934         .rxq_info_get                  = hinic_rxq_info_get,
2935         .txq_info_get                  = hinic_txq_info_get,
2936         .mac_addr_set                  = hinic_set_mac_addr,
2937         .mac_addr_remove               = hinic_mac_addr_remove,
2938         .mac_addr_add                  = hinic_mac_addr_add,
2939         .set_mc_addr_list              = hinic_set_mc_addr_list,
2940         .filter_ctrl                   = hinic_dev_filter_ctrl,
2941 };
2942
2943 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2944 {
2945         struct rte_pci_device *pci_dev;
2946         struct rte_ether_addr *eth_addr;
2947         struct hinic_nic_dev *nic_dev;
2948         struct hinic_filter_info *filter_info;
2949         struct hinic_tcam_info *tcam_info;
2950         u32 mac_size;
2951         int rc;
2952
2953         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2954
2955         /* EAL is SECONDARY and eth_dev is already created */
2956         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2957                 PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
2958                             eth_dev->data->name);
2959
2960                 return 0;
2961         }
2962
2963         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2964         memset(nic_dev, 0, sizeof(*nic_dev));
2965
2966         snprintf(nic_dev->proc_dev_name,
2967                  sizeof(nic_dev->proc_dev_name),
2968                  "hinic-%.4x:%.2x:%.2x.%x",
2969                  pci_dev->addr.domain, pci_dev->addr.bus,
2970                  pci_dev->addr.devid, pci_dev->addr.function);
2971
2972         /* alloc mac_addrs */
2973         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2974         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2975         if (!eth_addr) {
2976                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2977                             eth_dev->data->name);
2978                 rc = -ENOMEM;
2979                 goto eth_addr_fail;
2980         }
2981         eth_dev->data->mac_addrs = eth_addr;
2982
2983         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2984         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2985         if (!nic_dev->mc_list) {
2986                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2987                             eth_dev->data->name);
2988                 rc = -ENOMEM;
2989                 goto mc_addr_fail;
2990         }
2991
2992         /*
2993          * Pass the information to the rte_eth_dev_close() that it should also
2994          * release the private port resources.
2995          */
2996         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2997
2998         /* create hardware nic_device */
2999         rc = hinic_nic_dev_create(eth_dev);
3000         if (rc) {
3001                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3002                             eth_dev->data->name);
3003                 goto create_nic_dev_fail;
3004         }
3005
3006         if (HINIC_IS_VF(nic_dev->hwdev))
3007                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3008         else
3009                 eth_dev->dev_ops = &hinic_pmd_ops;
3010
3011         rc = hinic_init_mac_addr(eth_dev);
3012         if (rc) {
3013                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3014                             eth_dev->data->name);
3015                 goto init_mac_fail;
3016         }
3017
3018         /* register callback func to eal lib */
3019         rc = rte_intr_callback_register(&pci_dev->intr_handle,
3020                                         hinic_dev_interrupt_handler,
3021                                         (void *)eth_dev);
3022         if (rc) {
3023                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3024                             eth_dev->data->name);
3025                 goto reg_intr_cb_fail;
3026         }
3027
3028         /* enable uio/vfio intr/eventfd mapping */
3029         rc = rte_intr_enable(&pci_dev->intr_handle);
3030         if (rc) {
3031                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3032                             eth_dev->data->name);
3033                 goto enable_intr_fail;
3034         }
3035         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3036
3037         /* initialize filter info */
3038         filter_info = &nic_dev->filter;
3039         tcam_info = &nic_dev->tcam;
3040         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3041         memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
3042         /* initialize 5tuple filter list */
3043         TAILQ_INIT(&filter_info->fivetuple_list);
3044         TAILQ_INIT(&tcam_info->tcam_list);
3045         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3046         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3047         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3048         TAILQ_INIT(&nic_dev->hinic_flow_list);
3049
3050         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3051         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3052                     eth_dev->data->name);
3053
3054         return 0;
3055
3056 enable_intr_fail:
3057         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3058                                            hinic_dev_interrupt_handler,
3059                                            (void *)eth_dev);
3060
3061 reg_intr_cb_fail:
3062         hinic_deinit_mac_addr(eth_dev);
3063
3064 init_mac_fail:
3065         eth_dev->dev_ops = NULL;
3066         hinic_nic_dev_destroy(eth_dev);
3067
3068 create_nic_dev_fail:
3069         rte_free(nic_dev->mc_list);
3070         nic_dev->mc_list = NULL;
3071
3072 mc_addr_fail:
3073         rte_free(eth_addr);
3074         eth_dev->data->mac_addrs = NULL;
3075
3076 eth_addr_fail:
3077         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3078                     eth_dev->data->name);
3079         return rc;
3080 }
3081
3082 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3083 {
3084         struct rte_pci_device *pci_dev;
3085
3086         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3087
3088         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3089                     pci_dev->addr.domain, pci_dev->addr.bus,
3090                     pci_dev->addr.devid, pci_dev->addr.function,
3091                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3092                     "primary" : "secondary");
3093
3094         /* rte_eth_dev rx_burst and tx_burst */
3095         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3096         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3097
3098         return hinic_func_init(eth_dev);
3099 }
3100
3101 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3102 {
3103         struct hinic_nic_dev *nic_dev;
3104
3105         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3106         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3107
3108         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3109                 return 0;
3110
3111         hinic_dev_close(dev);
3112
3113         dev->dev_ops = NULL;
3114         dev->rx_pkt_burst = NULL;
3115         dev->tx_pkt_burst = NULL;
3116
3117         rte_free(nic_dev->mc_list);
3118
3119         rte_free(dev->data->mac_addrs);
3120         dev->data->mac_addrs = NULL;
3121
3122         return HINIC_OK;
3123 }
3124
3125 static struct rte_pci_id pci_id_hinic_map[] = {
3126         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3127         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3128         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3129         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3130         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3131         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3132         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3133         {.vendor_id = 0},
3134 };
3135
3136 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3137                            struct rte_pci_device *pci_dev)
3138 {
3139         return rte_eth_dev_pci_generic_probe(pci_dev,
3140                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3141 }
3142
3143 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3144 {
3145         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3146 }
3147
3148 static struct rte_pci_driver rte_hinic_pmd = {
3149         .id_table = pci_id_hinic_map,
3150         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3151         .probe = hinic_pci_probe,
3152         .remove = hinic_pci_remove,
3153 };
3154
3155 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3156 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3157
3158 RTE_INIT(hinic_init_log)
3159 {
3160         hinic_logtype = rte_log_register("pmd.net.hinic");
3161         if (hinic_logtype >= 0)
3162                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
3163 }