net/hinic: support getting Rx/Tx queues info
[dpdk.git] / drivers / net / hinic / hinic_pmd_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2017 Huawei Technologies Co., Ltd
3  */
4
5 #include <rte_pci.h>
6 #include <rte_bus_pci.h>
7 #include <rte_ethdev_pci.h>
8 #include <rte_mbuf.h>
9 #include <rte_malloc.h>
10 #include <rte_memcpy.h>
11 #include <rte_mempool.h>
12 #include <rte_errno.h>
13 #include <rte_ether.h>
14
15 #include "base/hinic_compat.h"
16 #include "base/hinic_pmd_hwdev.h"
17 #include "base/hinic_pmd_hwif.h"
18 #include "base/hinic_pmd_wq.h"
19 #include "base/hinic_pmd_cfg.h"
20 #include "base/hinic_pmd_mgmt.h"
21 #include "base/hinic_pmd_cmdq.h"
22 #include "base/hinic_pmd_niccfg.h"
23 #include "base/hinic_pmd_nicio.h"
24 #include "base/hinic_pmd_mbox.h"
25 #include "hinic_pmd_ethdev.h"
26 #include "hinic_pmd_tx.h"
27 #include "hinic_pmd_rx.h"
28
29 /* Vendor ID used by Huawei devices */
30 #define HINIC_HUAWEI_VENDOR_ID          0x19E5
31
32 /* Hinic devices */
33 #define HINIC_DEV_ID_PRD                0x1822
34 #define HINIC_DEV_ID_VF                 0x375E
35 #define HINIC_DEV_ID_VF_HV              0x379E
36
37 /* Mezz card for Blade Server */
38 #define HINIC_DEV_ID_MEZZ_25GE          0x0210
39 #define HINIC_DEV_ID_MEZZ_40GE          0x020D
40 #define HINIC_DEV_ID_MEZZ_100GE         0x0205
41
42 /* 2*25G and 2*100G card */
43 #define HINIC_DEV_ID_1822_DUAL_25GE     0x0206
44 #define HINIC_DEV_ID_1822_100GE         0x0200
45
46 #define HINIC_SERVICE_MODE_NIC          2
47
48 #define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
49
50 #define DEFAULT_BASE_COS                4
51 #define NR_MAX_COS                      8
52
53 #define HINIC_MIN_RX_BUF_SIZE           1024
54 #define HINIC_MAX_UC_MAC_ADDRS          128
55 #define HINIC_MAX_MC_MAC_ADDRS          2048
56
57 #define HINIC_DEFAULT_BURST_SIZE        32
58 #define HINIC_DEFAULT_NB_QUEUES         1
59 #define HINIC_DEFAULT_RING_SIZE         1024
60
61 /*
62  * vlan_id is a 12 bit number.
63  * The VFTA array is actually a 4096 bit array, 128 of 32bit elements.
64  * 2^5 = 32. The val of lower 5 bits specifies the bit in the 32bit element.
65  * The higher 7 bit val specifies VFTA array index.
66  */
67 #define HINIC_VFTA_BIT(vlan_id)    (1 << ((vlan_id) & 0x1F))
68 #define HINIC_VFTA_IDX(vlan_id)    ((vlan_id) >> 5)
69
70 #define HINIC_VLAN_FILTER_EN            (1U << 0)
71
72 #define HINIC_MTU_TO_PKTLEN(mtu)        \
73         ((mtu) + ETH_HLEN + ETH_CRC_LEN)
74
75 #define HINIC_PKTLEN_TO_MTU(pktlen)     \
76         ((pktlen) - (ETH_HLEN + ETH_CRC_LEN))
77
78 /* lro numer limit for one packet */
79 #define HINIC_LRO_WQE_NUM_DEFAULT       8
80
81 /* Driver-specific log messages type */
82 int hinic_logtype;
83
84 struct hinic_xstats_name_off {
85         char name[RTE_ETH_XSTATS_NAME_SIZE];
86         u32  offset;
87 };
88
89 #define HINIC_FUNC_STAT(_stat_item) {   \
90         .name = #_stat_item, \
91         .offset = offsetof(struct hinic_vport_stats, _stat_item) \
92 }
93
94 #define HINIC_PORT_STAT(_stat_item) { \
95         .name = #_stat_item, \
96         .offset = offsetof(struct hinic_phy_port_stats, _stat_item) \
97 }
98
99 static const struct hinic_xstats_name_off hinic_vport_stats_strings[] = {
100         HINIC_FUNC_STAT(tx_unicast_pkts_vport),
101         HINIC_FUNC_STAT(tx_unicast_bytes_vport),
102         HINIC_FUNC_STAT(tx_multicast_pkts_vport),
103         HINIC_FUNC_STAT(tx_multicast_bytes_vport),
104         HINIC_FUNC_STAT(tx_broadcast_pkts_vport),
105         HINIC_FUNC_STAT(tx_broadcast_bytes_vport),
106
107         HINIC_FUNC_STAT(rx_unicast_pkts_vport),
108         HINIC_FUNC_STAT(rx_unicast_bytes_vport),
109         HINIC_FUNC_STAT(rx_multicast_pkts_vport),
110         HINIC_FUNC_STAT(rx_multicast_bytes_vport),
111         HINIC_FUNC_STAT(rx_broadcast_pkts_vport),
112         HINIC_FUNC_STAT(rx_broadcast_bytes_vport),
113
114         HINIC_FUNC_STAT(tx_discard_vport),
115         HINIC_FUNC_STAT(rx_discard_vport),
116         HINIC_FUNC_STAT(tx_err_vport),
117         HINIC_FUNC_STAT(rx_err_vport),
118 };
119
120 #define HINIC_VPORT_XSTATS_NUM (sizeof(hinic_vport_stats_strings) / \
121                 sizeof(hinic_vport_stats_strings[0]))
122
123 static const struct hinic_xstats_name_off hinic_phyport_stats_strings[] = {
124         HINIC_PORT_STAT(mac_rx_total_pkt_num),
125         HINIC_PORT_STAT(mac_rx_total_oct_num),
126         HINIC_PORT_STAT(mac_rx_bad_pkt_num),
127         HINIC_PORT_STAT(mac_rx_bad_oct_num),
128         HINIC_PORT_STAT(mac_rx_good_pkt_num),
129         HINIC_PORT_STAT(mac_rx_good_oct_num),
130         HINIC_PORT_STAT(mac_rx_uni_pkt_num),
131         HINIC_PORT_STAT(mac_rx_multi_pkt_num),
132         HINIC_PORT_STAT(mac_rx_broad_pkt_num),
133         HINIC_PORT_STAT(mac_tx_total_pkt_num),
134         HINIC_PORT_STAT(mac_tx_total_oct_num),
135         HINIC_PORT_STAT(mac_tx_bad_pkt_num),
136         HINIC_PORT_STAT(mac_tx_bad_oct_num),
137         HINIC_PORT_STAT(mac_tx_good_pkt_num),
138         HINIC_PORT_STAT(mac_tx_good_oct_num),
139         HINIC_PORT_STAT(mac_tx_uni_pkt_num),
140         HINIC_PORT_STAT(mac_tx_multi_pkt_num),
141         HINIC_PORT_STAT(mac_tx_broad_pkt_num),
142         HINIC_PORT_STAT(mac_rx_fragment_pkt_num),
143         HINIC_PORT_STAT(mac_rx_undersize_pkt_num),
144         HINIC_PORT_STAT(mac_rx_undermin_pkt_num),
145         HINIC_PORT_STAT(mac_rx_64_oct_pkt_num),
146         HINIC_PORT_STAT(mac_rx_65_127_oct_pkt_num),
147         HINIC_PORT_STAT(mac_rx_128_255_oct_pkt_num),
148         HINIC_PORT_STAT(mac_rx_256_511_oct_pkt_num),
149         HINIC_PORT_STAT(mac_rx_512_1023_oct_pkt_num),
150         HINIC_PORT_STAT(mac_rx_1024_1518_oct_pkt_num),
151         HINIC_PORT_STAT(mac_rx_1519_2047_oct_pkt_num),
152         HINIC_PORT_STAT(mac_rx_2048_4095_oct_pkt_num),
153         HINIC_PORT_STAT(mac_rx_4096_8191_oct_pkt_num),
154         HINIC_PORT_STAT(mac_rx_8192_9216_oct_pkt_num),
155         HINIC_PORT_STAT(mac_rx_9217_12287_oct_pkt_num),
156         HINIC_PORT_STAT(mac_rx_12288_16383_oct_pkt_num),
157         HINIC_PORT_STAT(mac_rx_1519_max_bad_pkt_num),
158         HINIC_PORT_STAT(mac_rx_1519_max_good_pkt_num),
159         HINIC_PORT_STAT(mac_rx_oversize_pkt_num),
160         HINIC_PORT_STAT(mac_rx_jabber_pkt_num),
161         HINIC_PORT_STAT(mac_rx_mac_pause_num),
162         HINIC_PORT_STAT(mac_rx_pfc_pkt_num),
163         HINIC_PORT_STAT(mac_rx_pfc_pri0_pkt_num),
164         HINIC_PORT_STAT(mac_rx_pfc_pri1_pkt_num),
165         HINIC_PORT_STAT(mac_rx_pfc_pri2_pkt_num),
166         HINIC_PORT_STAT(mac_rx_pfc_pri3_pkt_num),
167         HINIC_PORT_STAT(mac_rx_pfc_pri4_pkt_num),
168         HINIC_PORT_STAT(mac_rx_pfc_pri5_pkt_num),
169         HINIC_PORT_STAT(mac_rx_pfc_pri6_pkt_num),
170         HINIC_PORT_STAT(mac_rx_pfc_pri7_pkt_num),
171         HINIC_PORT_STAT(mac_rx_mac_control_pkt_num),
172         HINIC_PORT_STAT(mac_rx_sym_err_pkt_num),
173         HINIC_PORT_STAT(mac_rx_fcs_err_pkt_num),
174         HINIC_PORT_STAT(mac_rx_send_app_good_pkt_num),
175         HINIC_PORT_STAT(mac_rx_send_app_bad_pkt_num),
176         HINIC_PORT_STAT(mac_tx_fragment_pkt_num),
177         HINIC_PORT_STAT(mac_tx_undersize_pkt_num),
178         HINIC_PORT_STAT(mac_tx_undermin_pkt_num),
179         HINIC_PORT_STAT(mac_tx_64_oct_pkt_num),
180         HINIC_PORT_STAT(mac_tx_65_127_oct_pkt_num),
181         HINIC_PORT_STAT(mac_tx_128_255_oct_pkt_num),
182         HINIC_PORT_STAT(mac_tx_256_511_oct_pkt_num),
183         HINIC_PORT_STAT(mac_tx_512_1023_oct_pkt_num),
184         HINIC_PORT_STAT(mac_tx_1024_1518_oct_pkt_num),
185         HINIC_PORT_STAT(mac_tx_1519_2047_oct_pkt_num),
186         HINIC_PORT_STAT(mac_tx_2048_4095_oct_pkt_num),
187         HINIC_PORT_STAT(mac_tx_4096_8191_oct_pkt_num),
188         HINIC_PORT_STAT(mac_tx_8192_9216_oct_pkt_num),
189         HINIC_PORT_STAT(mac_tx_9217_12287_oct_pkt_num),
190         HINIC_PORT_STAT(mac_tx_12288_16383_oct_pkt_num),
191         HINIC_PORT_STAT(mac_tx_1519_max_bad_pkt_num),
192         HINIC_PORT_STAT(mac_tx_1519_max_good_pkt_num),
193         HINIC_PORT_STAT(mac_tx_oversize_pkt_num),
194         HINIC_PORT_STAT(mac_trans_jabber_pkt_num),
195         HINIC_PORT_STAT(mac_tx_mac_pause_num),
196         HINIC_PORT_STAT(mac_tx_pfc_pkt_num),
197         HINIC_PORT_STAT(mac_tx_pfc_pri0_pkt_num),
198         HINIC_PORT_STAT(mac_tx_pfc_pri1_pkt_num),
199         HINIC_PORT_STAT(mac_tx_pfc_pri2_pkt_num),
200         HINIC_PORT_STAT(mac_tx_pfc_pri3_pkt_num),
201         HINIC_PORT_STAT(mac_tx_pfc_pri4_pkt_num),
202         HINIC_PORT_STAT(mac_tx_pfc_pri5_pkt_num),
203         HINIC_PORT_STAT(mac_tx_pfc_pri6_pkt_num),
204         HINIC_PORT_STAT(mac_tx_pfc_pri7_pkt_num),
205         HINIC_PORT_STAT(mac_tx_mac_control_pkt_num),
206         HINIC_PORT_STAT(mac_tx_err_all_pkt_num),
207         HINIC_PORT_STAT(mac_tx_from_app_good_pkt_num),
208         HINIC_PORT_STAT(mac_tx_from_app_bad_pkt_num),
209 };
210
211 #define HINIC_PHYPORT_XSTATS_NUM (sizeof(hinic_phyport_stats_strings) / \
212                 sizeof(hinic_phyport_stats_strings[0]))
213
214 static const struct hinic_xstats_name_off hinic_rxq_stats_strings[] = {
215         {"rx_nombuf", offsetof(struct hinic_rxq_stats, rx_nombuf)},
216         {"burst_pkt", offsetof(struct hinic_rxq_stats, burst_pkts)},
217 };
218
219 #define HINIC_RXQ_XSTATS_NUM (sizeof(hinic_rxq_stats_strings) / \
220                 sizeof(hinic_rxq_stats_strings[0]))
221
222 static const struct hinic_xstats_name_off hinic_txq_stats_strings[] = {
223         {"tx_busy", offsetof(struct hinic_txq_stats, tx_busy)},
224         {"offload_errors", offsetof(struct hinic_txq_stats, off_errs)},
225         {"copy_pkts", offsetof(struct hinic_txq_stats, cpy_pkts)},
226         {"rl_drop", offsetof(struct hinic_txq_stats, rl_drop)},
227         {"burst_pkts", offsetof(struct hinic_txq_stats, burst_pkts)},
228 };
229
230 #define HINIC_TXQ_XSTATS_NUM (sizeof(hinic_txq_stats_strings) / \
231                 sizeof(hinic_txq_stats_strings[0]))
232
233 static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
234 {
235         if (HINIC_IS_VF(nic_dev->hwdev)) {
236                 return (HINIC_VPORT_XSTATS_NUM +
237                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
238                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
239         } else {
240                 return (HINIC_VPORT_XSTATS_NUM +
241                         HINIC_PHYPORT_XSTATS_NUM +
242                         HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
243                         HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
244         }
245 }
246
247 static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
248         .nb_max = HINIC_MAX_QUEUE_DEPTH,
249         .nb_min = HINIC_MIN_QUEUE_DEPTH,
250         .nb_align = HINIC_RXD_ALIGN,
251 };
252
253 static const struct rte_eth_desc_lim hinic_tx_desc_lim = {
254         .nb_max = HINIC_MAX_QUEUE_DEPTH,
255         .nb_min = HINIC_MIN_QUEUE_DEPTH,
256         .nb_align = HINIC_TXD_ALIGN,
257 };
258
259 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask);
260
261 /**
262  * Interrupt handler triggered by NIC  for handling
263  * specific event.
264  *
265  * @param: The address of parameter (struct rte_eth_dev *) regsitered before.
266  */
267 static void hinic_dev_interrupt_handler(void *param)
268 {
269         struct rte_eth_dev *dev = param;
270         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
271
272         if (!hinic_test_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status)) {
273                 PMD_DRV_LOG(WARNING, "Device's interrupt is disabled, ignore interrupt event, dev_name: %s, port_id: %d",
274                             nic_dev->proc_dev_name, dev->data->port_id);
275                 return;
276         }
277
278         /* aeq0 msg handler */
279         hinic_dev_handle_aeq_event(nic_dev->hwdev, param);
280 }
281
282 /**
283  * Ethernet device configuration.
284  *
285  * Prepare the driver for a given number of TX and RX queues, mtu size
286  * and configure RSS.
287  *
288  * @param dev
289  *   Pointer to Ethernet device structure.
290  *
291  * @return
292  *   0 on success, negative error value otherwise.
293  */
294 static int hinic_dev_configure(struct rte_eth_dev *dev)
295 {
296         struct hinic_nic_dev *nic_dev;
297         struct hinic_nic_io *nic_io;
298         int err;
299
300         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
301         nic_io = nic_dev->hwdev->nic_io;
302
303         nic_dev->num_sq =  dev->data->nb_tx_queues;
304         nic_dev->num_rq = dev->data->nb_rx_queues;
305
306         nic_io->num_sqs =  dev->data->nb_tx_queues;
307         nic_io->num_rqs = dev->data->nb_rx_queues;
308
309         /* queue pair is max_num(sq, rq) */
310         nic_dev->num_qps = (nic_dev->num_sq > nic_dev->num_rq) ?
311                         nic_dev->num_sq : nic_dev->num_rq;
312         nic_io->num_qps = nic_dev->num_qps;
313
314         if (nic_dev->num_qps > nic_io->max_qps) {
315                 PMD_DRV_LOG(ERR,
316                         "Queue number out of range, get queue_num:%d, max_queue_num:%d",
317                         nic_dev->num_qps, nic_io->max_qps);
318                 return -EINVAL;
319         }
320
321         /* mtu size is 256~9600 */
322         if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
323             dev->data->dev_conf.rxmode.max_rx_pkt_len >
324             HINIC_MAX_JUMBO_FRAME_SIZE) {
325                 PMD_DRV_LOG(ERR,
326                         "Max rx pkt len out of range, get max_rx_pkt_len:%d, "
327                         "expect between %d and %d",
328                         dev->data->dev_conf.rxmode.max_rx_pkt_len,
329                         HINIC_MIN_FRAME_SIZE, HINIC_MAX_JUMBO_FRAME_SIZE);
330                 return -EINVAL;
331         }
332
333         nic_dev->mtu_size =
334                 HINIC_PKTLEN_TO_MTU(dev->data->dev_conf.rxmode.max_rx_pkt_len);
335
336         /* rss template */
337         err = hinic_config_mq_mode(dev, TRUE);
338         if (err) {
339                 PMD_DRV_LOG(ERR, "Config multi-queue failed");
340                 return err;
341         }
342
343         /* init vlan offoad */
344         err = hinic_vlan_offload_set(dev,
345                                 ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
346         if (err) {
347                 PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
348                 (void)hinic_config_mq_mode(dev, FALSE);
349                 return err;
350         }
351
352         /*clear fdir filter flag in function table*/
353         hinic_free_fdir_filter(nic_dev);
354
355         return HINIC_OK;
356 }
357
358 /**
359  * DPDK callback to create the receive queue.
360  *
361  * @param dev
362  *   Pointer to Ethernet device structure.
363  * @param queue_idx
364  *   RX queue index.
365  * @param nb_desc
366  *   Number of descriptors for receive queue.
367  * @param socket_id
368  *   NUMA socket on which memory must be allocated.
369  * @param rx_conf
370  *   Thresholds parameters (unused_).
371  * @param mp
372  *   Memory pool for buffer allocations.
373  *
374  * @return
375  *   0 on success, negative error value otherwise.
376  */
377 static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
378                          uint16_t nb_desc, unsigned int socket_id,
379                          __rte_unused const struct rte_eth_rxconf *rx_conf,
380                          struct rte_mempool *mp)
381 {
382         int rc;
383         struct hinic_nic_dev *nic_dev;
384         struct hinic_hwdev *hwdev;
385         struct hinic_rxq *rxq;
386         u16 rq_depth, rx_free_thresh;
387         u32 buf_size;
388
389         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
390         hwdev = nic_dev->hwdev;
391
392         /* queue depth must be power of 2, otherwise will be aligned up */
393         rq_depth = (nb_desc & (nb_desc - 1)) ?
394                 ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
395
396         /*
397          * Validate number of receive descriptors.
398          * It must not exceed hardware maximum and minimum.
399          */
400         if (rq_depth > HINIC_MAX_QUEUE_DEPTH ||
401                 rq_depth < HINIC_MIN_QUEUE_DEPTH) {
402                 PMD_DRV_LOG(ERR, "RX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
403                             HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
404                             (int)nb_desc, (int)rq_depth,
405                             (int)dev->data->port_id, (int)queue_idx);
406                 return -EINVAL;
407         }
408
409         /*
410          * The RX descriptor ring will be cleaned after rxq->rx_free_thresh
411          * descriptors are used or if the number of descriptors required
412          * to transmit a packet is greater than the number of free RX
413          * descriptors.
414          * The following constraints must be satisfied:
415          *  rx_free_thresh must be greater than 0.
416          *  rx_free_thresh must be less than the size of the ring minus 1.
417          * When set to zero use default values.
418          */
419         rx_free_thresh = (u16)((rx_conf->rx_free_thresh) ?
420                         rx_conf->rx_free_thresh : HINIC_DEFAULT_RX_FREE_THRESH);
421         if (rx_free_thresh >= (rq_depth - 1)) {
422                 PMD_DRV_LOG(ERR, "rx_free_thresh must be less than the number of RX descriptors minus 1. (rx_free_thresh=%u port=%d queue=%d)",
423                             (unsigned int)rx_free_thresh,
424                             (int)dev->data->port_id,
425                             (int)queue_idx);
426                 return -EINVAL;
427         }
428
429         rxq = rte_zmalloc_socket("hinic_rx_queue", sizeof(struct hinic_rxq),
430                                  RTE_CACHE_LINE_SIZE, socket_id);
431         if (!rxq) {
432                 PMD_DRV_LOG(ERR, "Allocate rxq[%d] failed, dev_name: %s",
433                             queue_idx, dev->data->name);
434                 return -ENOMEM;
435         }
436         nic_dev->rxqs[queue_idx] = rxq;
437
438         /* alloc rx sq hw wqepage*/
439         rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
440         if (rc) {
441                 PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
442                             queue_idx, dev->data->name, rq_depth);
443                 goto ceate_rq_fail;
444         }
445
446         /* mbuf pool must be assigned before setup rx resources */
447         rxq->mb_pool = mp;
448
449         rc =
450         hinic_convert_rx_buf_size(rte_pktmbuf_data_room_size(rxq->mb_pool) -
451                                   RTE_PKTMBUF_HEADROOM, &buf_size);
452         if (rc) {
453                 PMD_DRV_LOG(ERR, "Adjust buf size failed, dev_name: %s",
454                             dev->data->name);
455                 goto adjust_bufsize_fail;
456         }
457
458         /* rx queue info, rearm control */
459         rxq->wq = &hwdev->nic_io->rq_wq[queue_idx];
460         rxq->pi_virt_addr = hwdev->nic_io->qps[queue_idx].rq.pi_virt_addr;
461         rxq->nic_dev = nic_dev;
462         rxq->q_id = queue_idx;
463         rxq->q_depth = rq_depth;
464         rxq->buf_len = (u16)buf_size;
465         rxq->rx_free_thresh = rx_free_thresh;
466
467         /* the last point cant do mbuf rearm in bulk */
468         rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
469
470         /* device port identifier */
471         rxq->port_id = dev->data->port_id;
472
473         /* alloc rx_cqe and prepare rq_wqe */
474         rc = hinic_setup_rx_resources(rxq);
475         if (rc) {
476                 PMD_DRV_LOG(ERR, "Setup rxq[%d] rx_resources failed, dev_name:%s",
477                             queue_idx, dev->data->name);
478                 goto setup_rx_res_err;
479         }
480
481         /* record nic_dev rxq in rte_eth rx_queues */
482         dev->data->rx_queues[queue_idx] = rxq;
483
484         return 0;
485
486 setup_rx_res_err:
487 adjust_bufsize_fail:
488         hinic_destroy_rq(hwdev, queue_idx);
489
490 ceate_rq_fail:
491         rte_free(rxq);
492
493         return rc;
494 }
495
496 static void hinic_reset_rx_queue(struct rte_eth_dev *dev)
497 {
498         struct hinic_rxq *rxq;
499         struct hinic_nic_dev *nic_dev;
500         int q_id = 0;
501
502         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
503
504         for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
505                 rxq = dev->data->rx_queues[q_id];
506
507                 rxq->wq->cons_idx = 0;
508                 rxq->wq->prod_idx = 0;
509                 rxq->wq->delta = rxq->q_depth;
510                 rxq->wq->mask = rxq->q_depth - 1;
511
512                 /* alloc mbuf to rq */
513                 hinic_rx_alloc_pkts(rxq);
514         }
515 }
516
517 /**
518  * DPDK callback to configure the transmit queue.
519  *
520  * @param dev
521  *   Pointer to Ethernet device structure.
522  * @param queue_idx
523  *   Transmit queue index.
524  * @param nb_desc
525  *   Number of descriptors for transmit queue.
526  * @param socket_id
527  *   NUMA socket on which memory must be allocated.
528  * @param tx_conf
529  *   Tx queue configuration parameters.
530  *
531  * @return
532  *   0 on success, negative error value otherwise.
533  */
534 static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
535                          uint16_t nb_desc, unsigned int socket_id,
536                          __rte_unused const struct rte_eth_txconf *tx_conf)
537 {
538         int rc;
539         struct hinic_nic_dev *nic_dev;
540         struct hinic_hwdev *hwdev;
541         struct hinic_txq *txq;
542         u16 sq_depth, tx_free_thresh;
543
544         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
545         hwdev = nic_dev->hwdev;
546
547         /* queue depth must be power of 2, otherwise will be aligned up */
548         sq_depth = (nb_desc & (nb_desc - 1)) ?
549                         ((u16)(1U << (ilog2(nb_desc) + 1))) : nb_desc;
550
551         /*
552          * Validate number of transmit descriptors.
553          * It must not exceed hardware maximum and minimum.
554          */
555         if (sq_depth > HINIC_MAX_QUEUE_DEPTH ||
556                 sq_depth < HINIC_MIN_QUEUE_DEPTH) {
557                 PMD_DRV_LOG(ERR, "TX queue depth is out of range from %d to %d, (nb_desc=%d, q_depth=%d, port=%d queue=%d)",
558                           HINIC_MIN_QUEUE_DEPTH, HINIC_MAX_QUEUE_DEPTH,
559                           (int)nb_desc, (int)sq_depth,
560                           (int)dev->data->port_id, (int)queue_idx);
561                 return -EINVAL;
562         }
563
564         /*
565          * The TX descriptor ring will be cleaned after txq->tx_free_thresh
566          * descriptors are used or if the number of descriptors required
567          * to transmit a packet is greater than the number of free TX
568          * descriptors.
569          * The following constraints must be satisfied:
570          *  tx_free_thresh must be greater than 0.
571          *  tx_free_thresh must be less than the size of the ring minus 1.
572          * When set to zero use default values.
573          */
574         tx_free_thresh = (u16)((tx_conf->tx_free_thresh) ?
575                         tx_conf->tx_free_thresh : HINIC_DEFAULT_TX_FREE_THRESH);
576         if (tx_free_thresh >= (sq_depth - 1)) {
577                 PMD_DRV_LOG(ERR, "tx_free_thresh must be less than the number of TX descriptors minus 1. (tx_free_thresh=%u port=%d queue=%d)",
578                         (unsigned int)tx_free_thresh, (int)dev->data->port_id,
579                         (int)queue_idx);
580                 return -EINVAL;
581         }
582
583         txq = rte_zmalloc_socket("hinic_tx_queue", sizeof(struct hinic_txq),
584                                  RTE_CACHE_LINE_SIZE, socket_id);
585         if (!txq) {
586                 PMD_DRV_LOG(ERR, "Allocate txq[%d] failed, dev_name: %s",
587                             queue_idx, dev->data->name);
588                 return -ENOMEM;
589         }
590         nic_dev->txqs[queue_idx] = txq;
591
592         /* alloc tx sq hw wqepage */
593         rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
594         if (rc) {
595                 PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
596                             queue_idx, dev->data->name, sq_depth);
597                 goto create_sq_fail;
598         }
599
600         txq->q_id = queue_idx;
601         txq->q_depth = sq_depth;
602         txq->port_id = dev->data->port_id;
603         txq->tx_free_thresh = tx_free_thresh;
604         txq->nic_dev = nic_dev;
605         txq->wq = &hwdev->nic_io->sq_wq[queue_idx];
606         txq->sq = &hwdev->nic_io->qps[queue_idx].sq;
607         txq->cons_idx_addr = hwdev->nic_io->qps[queue_idx].sq.cons_idx_addr;
608         txq->sq_head_addr = HINIC_GET_WQ_HEAD(txq);
609         txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
610                                         sizeof(struct hinic_sq_bufdesc);
611         txq->cos = nic_dev->default_cos;
612
613         /* alloc software txinfo */
614         rc = hinic_setup_tx_resources(txq);
615         if (rc) {
616                 PMD_DRV_LOG(ERR, "Setup txq[%d] tx_resources failed, dev_name: %s",
617                             queue_idx, dev->data->name);
618                 goto setup_tx_res_fail;
619         }
620
621         /* record nic_dev txq in rte_eth tx_queues */
622         dev->data->tx_queues[queue_idx] = txq;
623
624         return HINIC_OK;
625
626 setup_tx_res_fail:
627         hinic_destroy_sq(hwdev, queue_idx);
628
629 create_sq_fail:
630         rte_free(txq);
631
632         return rc;
633 }
634
635 static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
636 {
637         struct hinic_nic_dev *nic_dev;
638         struct hinic_txq *txq;
639         struct hinic_nic_io *nic_io;
640         struct hinic_hwdev *hwdev;
641         volatile u32 *ci_addr;
642         int q_id = 0;
643
644         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
645         hwdev = nic_dev->hwdev;
646         nic_io = hwdev->nic_io;
647
648         for (q_id = 0; q_id < nic_dev->num_sq; q_id++) {
649                 txq = dev->data->tx_queues[q_id];
650
651                 txq->wq->cons_idx = 0;
652                 txq->wq->prod_idx = 0;
653                 txq->wq->delta = txq->q_depth;
654                 txq->wq->mask  = txq->q_depth - 1;
655
656                 /* clear hardware ci */
657                 ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
658                                                         q_id);
659                 *ci_addr = 0;
660         }
661 }
662
663 /**
664  * Get link speed from NIC.
665  *
666  * @param dev
667  *   Pointer to Ethernet device structure.
668  * @param speed_capa
669  *   Pointer to link speed structure.
670  */
671 static void hinic_get_speed_capa(struct rte_eth_dev *dev, uint32_t *speed_capa)
672 {
673         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
674         u32 supported_link, advertised_link;
675         int err;
676
677 #define HINIC_LINK_MODE_SUPPORT_1G      (1U << HINIC_GE_BASE_KX)
678
679 #define HINIC_LINK_MODE_SUPPORT_10G     (1U << HINIC_10GE_BASE_KR)
680
681 #define HINIC_LINK_MODE_SUPPORT_25G     ((1U << HINIC_25GE_BASE_KR_S) | \
682                                         (1U << HINIC_25GE_BASE_CR_S) | \
683                                         (1U << HINIC_25GE_BASE_KR) | \
684                                         (1U << HINIC_25GE_BASE_CR))
685
686 #define HINIC_LINK_MODE_SUPPORT_40G     ((1U << HINIC_40GE_BASE_KR4) | \
687                                         (1U << HINIC_40GE_BASE_CR4))
688
689 #define HINIC_LINK_MODE_SUPPORT_100G    ((1U << HINIC_100GE_BASE_KR4) | \
690                                         (1U << HINIC_100GE_BASE_CR4))
691
692         err = hinic_get_link_mode(nic_dev->hwdev,
693                                   &supported_link, &advertised_link);
694         if (err || supported_link == HINIC_SUPPORTED_UNKNOWN ||
695             advertised_link == HINIC_SUPPORTED_UNKNOWN) {
696                 PMD_DRV_LOG(WARNING, "Get speed capability info failed, device: %s, port_id: %u",
697                           nic_dev->proc_dev_name, dev->data->port_id);
698         } else {
699                 *speed_capa = 0;
700                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_1G))
701                         *speed_capa |= ETH_LINK_SPEED_1G;
702                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_10G))
703                         *speed_capa |= ETH_LINK_SPEED_10G;
704                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_25G))
705                         *speed_capa |= ETH_LINK_SPEED_25G;
706                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_40G))
707                         *speed_capa |= ETH_LINK_SPEED_40G;
708                 if (!!(supported_link & HINIC_LINK_MODE_SUPPORT_100G))
709                         *speed_capa |= ETH_LINK_SPEED_100G;
710         }
711 }
712
713 /**
714  * DPDK callback to get information about the device.
715  *
716  * @param dev
717  *   Pointer to Ethernet device structure.
718  * @param info
719  *   Pointer to Info structure output buffer.
720  */
721 static int
722 hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
723 {
724         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
725
726         info->max_rx_queues  = nic_dev->nic_cap.max_rqs;
727         info->max_tx_queues  = nic_dev->nic_cap.max_sqs;
728         info->min_rx_bufsize = HINIC_MIN_RX_BUF_SIZE;
729         info->max_rx_pktlen  = HINIC_MAX_JUMBO_FRAME_SIZE;
730         info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
731         info->min_mtu = HINIC_MIN_MTU_SIZE;
732         info->max_mtu = HINIC_MAX_MTU_SIZE;
733
734         hinic_get_speed_capa(dev, &info->speed_capa);
735         info->rx_queue_offload_capa = 0;
736         info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
737                                 DEV_RX_OFFLOAD_IPV4_CKSUM |
738                                 DEV_RX_OFFLOAD_UDP_CKSUM |
739                                 DEV_RX_OFFLOAD_TCP_CKSUM |
740                                 DEV_RX_OFFLOAD_VLAN_FILTER |
741                                 DEV_RX_OFFLOAD_SCATTER |
742                                 DEV_RX_OFFLOAD_JUMBO_FRAME |
743                                 DEV_RX_OFFLOAD_TCP_LRO;
744
745         info->tx_queue_offload_capa = 0;
746         info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
747                                 DEV_TX_OFFLOAD_IPV4_CKSUM |
748                                 DEV_TX_OFFLOAD_UDP_CKSUM |
749                                 DEV_TX_OFFLOAD_TCP_CKSUM |
750                                 DEV_TX_OFFLOAD_SCTP_CKSUM |
751                                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
752                                 DEV_TX_OFFLOAD_TCP_TSO |
753                                 DEV_TX_OFFLOAD_MULTI_SEGS;
754
755         info->hash_key_size = HINIC_RSS_KEY_SIZE;
756         info->reta_size = HINIC_RSS_INDIR_SIZE;
757         info->flow_type_rss_offloads = HINIC_RSS_OFFLOAD_ALL;
758         info->rx_desc_lim = hinic_rx_desc_lim;
759         info->tx_desc_lim = hinic_tx_desc_lim;
760
761         /* Driver-preferred Rx/Tx parameters */
762         info->default_rxportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
763         info->default_txportconf.burst_size = HINIC_DEFAULT_BURST_SIZE;
764         info->default_rxportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
765         info->default_txportconf.nb_queues = HINIC_DEFAULT_NB_QUEUES;
766         info->default_rxportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
767         info->default_txportconf.ring_size = HINIC_DEFAULT_RING_SIZE;
768
769         return 0;
770 }
771
772 static int hinic_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
773                                 size_t fw_size)
774 {
775         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
776         char fw_ver[HINIC_MGMT_VERSION_MAX_LEN] = {0};
777         int err;
778
779         err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
780         if (err) {
781                 PMD_DRV_LOG(ERR, "Failed to get fw version\n");
782                 return -EINVAL;
783         }
784
785         if (fw_size < strlen(fw_ver) + 1)
786                 return (strlen(fw_ver) + 1);
787
788         snprintf(fw_version, fw_size, "%s", fw_ver);
789
790         return 0;
791 }
792
793 static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
794 {
795         int err;
796
797         err = hinic_set_rx_mode(nic_dev->hwdev, rx_mode_ctrl);
798         if (err) {
799                 PMD_DRV_LOG(ERR, "Failed to set rx mode");
800                 return -EINVAL;
801         }
802         nic_dev->rx_mode_status = rx_mode_ctrl;
803
804         return 0;
805 }
806
807
808 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
809 {
810         int err;
811         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
812         bool lro_en;
813
814         /* rx configure, if rss enable, need to init default configuration */
815         err = hinic_rx_configure(dev);
816         if (err) {
817                 PMD_DRV_LOG(ERR, "Configure rss failed");
818                 return err;
819         }
820
821         /* rx mode init */
822         err = hinic_config_rx_mode(nic_dev, HINIC_DEFAULT_RX_MODE);
823         if (err) {
824                 PMD_DRV_LOG(ERR, "Configure rx_mode:0x%x failed",
825                         HINIC_DEFAULT_RX_MODE);
826                 goto set_rx_mode_fail;
827         }
828
829         /* config lro */
830         lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
831                         true : false;
832
833         err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
834                                 HINIC_LRO_WQE_NUM_DEFAULT);
835         if (err) {
836                 PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
837                         lro_en ? "Enable" : "Disable", err);
838                 goto set_rx_mode_fail;
839         }
840
841         return HINIC_OK;
842
843 set_rx_mode_fail:
844         hinic_rx_remove_configure(dev);
845
846         return err;
847 }
848
849 static void hinic_remove_rxtx_configure(struct rte_eth_dev *dev)
850 {
851         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
852
853         (void)hinic_config_rx_mode(nic_dev, 0);
854         hinic_rx_remove_configure(dev);
855 }
856
857 static int hinic_priv_get_dev_link_status(struct hinic_nic_dev *nic_dev,
858                                           struct rte_eth_link *link)
859 {
860         int rc;
861         u8 port_link_status = 0;
862         struct nic_port_info port_link_info;
863         struct hinic_hwdev *nic_hwdev = nic_dev->hwdev;
864         uint32_t port_speed[LINK_SPEED_MAX] = {ETH_SPEED_NUM_10M,
865                                         ETH_SPEED_NUM_100M, ETH_SPEED_NUM_1G,
866                                         ETH_SPEED_NUM_10G, ETH_SPEED_NUM_25G,
867                                         ETH_SPEED_NUM_40G, ETH_SPEED_NUM_100G};
868
869         rc = hinic_get_link_status(nic_hwdev, &port_link_status);
870         if (rc)
871                 return rc;
872
873         if (!port_link_status) {
874                 link->link_status = ETH_LINK_DOWN;
875                 link->link_speed = 0;
876                 link->link_duplex = ETH_LINK_HALF_DUPLEX;
877                 link->link_autoneg = ETH_LINK_FIXED;
878                 return HINIC_OK;
879         }
880
881         memset(&port_link_info, 0, sizeof(port_link_info));
882         rc = hinic_get_port_info(nic_hwdev, &port_link_info);
883         if (rc)
884                 return rc;
885
886         link->link_speed = port_speed[port_link_info.speed % LINK_SPEED_MAX];
887         link->link_duplex = port_link_info.duplex;
888         link->link_autoneg = port_link_info.autoneg_state;
889         link->link_status = port_link_status;
890
891         return HINIC_OK;
892 }
893
894 /**
895  * DPDK callback to retrieve physical link information.
896  *
897  * @param dev
898  *   Pointer to Ethernet device structure.
899  * @param wait_to_complete
900  *   Wait for request completion.
901  *
902  * @return
903  *   0 link status changed, -1 link status not changed
904  */
905 static int hinic_link_update(struct rte_eth_dev *dev, int wait_to_complete)
906 {
907 #define CHECK_INTERVAL 10  /* 10ms */
908 #define MAX_REPEAT_TIME 100  /* 1s (100 * 10ms) in total */
909         int rc = HINIC_OK;
910         struct rte_eth_link link;
911         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
912         unsigned int rep_cnt = MAX_REPEAT_TIME;
913
914         memset(&link, 0, sizeof(link));
915         do {
916                 /* Get link status information from hardware */
917                 rc = hinic_priv_get_dev_link_status(nic_dev, &link);
918                 if (rc != HINIC_OK) {
919                         link.link_speed = ETH_SPEED_NUM_NONE;
920                         link.link_duplex = ETH_LINK_FULL_DUPLEX;
921                         PMD_DRV_LOG(ERR, "Get link status failed");
922                         goto out;
923                 }
924
925                 if (!wait_to_complete || link.link_status)
926                         break;
927
928                 rte_delay_ms(CHECK_INTERVAL);
929         } while (rep_cnt--);
930
931 out:
932         rc = rte_eth_linkstatus_set(dev, &link);
933         return rc;
934 }
935
936 /**
937  * DPDK callback to bring the link UP.
938  *
939  * @param dev
940  *   Pointer to Ethernet device structure.
941  *
942  * @return
943  *   0 on success, negative errno value on failure.
944  */
945 static int hinic_dev_set_link_up(struct rte_eth_dev *dev)
946 {
947         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
948         int ret;
949
950         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, true);
951         if (ret) {
952                 PMD_DRV_LOG(ERR, "Enable port tx xsfp failed, dev_name: %s, port_id: %d",
953                             nic_dev->proc_dev_name, dev->data->port_id);
954                 return ret;
955         }
956
957         /* link status follow phy port status, up will open pma */
958         ret = hinic_set_port_enable(nic_dev->hwdev, true);
959         if (ret)
960                 PMD_DRV_LOG(ERR, "Set mac link up failed, dev_name: %s, port_id: %d",
961                             nic_dev->proc_dev_name, dev->data->port_id);
962
963         return ret;
964 }
965
966 /**
967  * DPDK callback to bring the link DOWN.
968  *
969  * @param dev
970  *   Pointer to Ethernet device structure.
971  *
972  * @return
973  *   0 on success, negative errno value on failure.
974  */
975 static int hinic_dev_set_link_down(struct rte_eth_dev *dev)
976 {
977         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
978         int ret;
979
980         ret = hinic_set_xsfp_tx_status(nic_dev->hwdev, false);
981         if (ret) {
982                 PMD_DRV_LOG(ERR, "Disable port tx xsfp failed, dev_name: %s, port_id: %d",
983                             nic_dev->proc_dev_name, dev->data->port_id);
984                 return ret;
985         }
986
987         /* link status follow phy port status, up will close pma */
988         ret = hinic_set_port_enable(nic_dev->hwdev, false);
989         if (ret)
990                 PMD_DRV_LOG(ERR, "Set mac link down failed, dev_name: %s, port_id: %d",
991                             nic_dev->proc_dev_name, dev->data->port_id);
992
993         return ret;
994 }
995
996 /**
997  * DPDK callback to start the device.
998  *
999  * @param dev
1000  *   Pointer to Ethernet device structure.
1001  *
1002  * @return
1003  *   0 on success, negative errno value on failure.
1004  */
1005 static int hinic_dev_start(struct rte_eth_dev *dev)
1006 {
1007         int rc;
1008         char *name;
1009         struct hinic_nic_dev *nic_dev;
1010
1011         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1012         name = dev->data->name;
1013
1014         /* reset rx and tx queue */
1015         hinic_reset_rx_queue(dev);
1016         hinic_reset_tx_queue(dev);
1017
1018         /* get func rx buf size */
1019         hinic_get_func_rx_buf_size(nic_dev);
1020
1021         /* init txq and rxq context */
1022         rc = hinic_init_qp_ctxts(nic_dev->hwdev);
1023         if (rc) {
1024                 PMD_DRV_LOG(ERR, "Initialize qp context failed, dev_name:%s",
1025                             name);
1026                 goto init_qp_fail;
1027         }
1028
1029         /* rss template */
1030         rc = hinic_config_mq_mode(dev, TRUE);
1031         if (rc) {
1032                 PMD_DRV_LOG(ERR, "Configure mq mode failed, dev_name: %s",
1033                             name);
1034                 goto cfg_mq_mode_fail;
1035         }
1036
1037         /* set default mtu */
1038         rc = hinic_set_port_mtu(nic_dev->hwdev, nic_dev->mtu_size);
1039         if (rc) {
1040                 PMD_DRV_LOG(ERR, "Set mtu_size[%d] failed, dev_name: %s",
1041                             nic_dev->mtu_size, name);
1042                 goto set_mtu_fail;
1043         }
1044
1045         /* configure rss rx_mode and other rx or tx default feature */
1046         rc = hinic_rxtx_configure(dev);
1047         if (rc) {
1048                 PMD_DRV_LOG(ERR, "Configure tx and rx failed, dev_name: %s",
1049                             name);
1050                 goto cfg_rxtx_fail;
1051         }
1052
1053         /* reactive pf status, so that uP report asyn event */
1054         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
1055
1056         /* open virtual port and ready to start packet receiving */
1057         rc = hinic_set_vport_enable(nic_dev->hwdev, true);
1058         if (rc) {
1059                 PMD_DRV_LOG(ERR, "Enable vport failed, dev_name:%s", name);
1060                 goto en_vport_fail;
1061         }
1062
1063         /* open physical port and start packet receiving */
1064         rc = hinic_set_port_enable(nic_dev->hwdev, true);
1065         if (rc) {
1066                 PMD_DRV_LOG(ERR, "Enable physical port failed, dev_name:%s",
1067                             name);
1068                 goto en_port_fail;
1069         }
1070
1071         /* update eth_dev link status */
1072         if (dev->data->dev_conf.intr_conf.lsc != 0)
1073                 (void)hinic_link_update(dev, 0);
1074
1075         hinic_set_bit(HINIC_DEV_START, &nic_dev->dev_status);
1076
1077         return 0;
1078
1079 en_port_fail:
1080         (void)hinic_set_vport_enable(nic_dev->hwdev, false);
1081
1082 en_vport_fail:
1083         hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
1084
1085         /* Flush tx && rx chip resources in case of set vport fake fail */
1086         (void)hinic_flush_qp_res(nic_dev->hwdev);
1087         rte_delay_ms(100);
1088
1089         hinic_remove_rxtx_configure(dev);
1090
1091 cfg_rxtx_fail:
1092 set_mtu_fail:
1093 cfg_mq_mode_fail:
1094         hinic_free_qp_ctxts(nic_dev->hwdev);
1095
1096 init_qp_fail:
1097         hinic_free_all_rx_mbuf(dev);
1098         hinic_free_all_tx_mbuf(dev);
1099
1100         return rc;
1101 }
1102
1103 /**
1104  * DPDK callback to release the receive queue.
1105  *
1106  * @param queue
1107  *   Generic receive queue pointer.
1108  */
1109 static void hinic_rx_queue_release(void *queue)
1110 {
1111         struct hinic_rxq *rxq = queue;
1112         struct hinic_nic_dev *nic_dev;
1113
1114         if (!rxq) {
1115                 PMD_DRV_LOG(WARNING, "Rxq is null when release");
1116                 return;
1117         }
1118         nic_dev = rxq->nic_dev;
1119
1120         /* free rxq_pkt mbuf */
1121         hinic_free_all_rx_mbufs(rxq);
1122
1123         /* free rxq_cqe, rxq_info */
1124         hinic_free_rx_resources(rxq);
1125
1126         /* free root rq wq */
1127         hinic_destroy_rq(nic_dev->hwdev, rxq->q_id);
1128
1129         nic_dev->rxqs[rxq->q_id] = NULL;
1130
1131         /* free rxq */
1132         rte_free(rxq);
1133 }
1134
1135 /**
1136  * DPDK callback to release the transmit queue.
1137  *
1138  * @param queue
1139  *   Generic transmit queue pointer.
1140  */
1141 static void hinic_tx_queue_release(void *queue)
1142 {
1143         struct hinic_txq *txq = queue;
1144         struct hinic_nic_dev *nic_dev;
1145
1146         if (!txq) {
1147                 PMD_DRV_LOG(WARNING, "Txq is null when release");
1148                 return;
1149         }
1150         nic_dev = txq->nic_dev;
1151
1152         /* free txq_pkt mbuf */
1153         hinic_free_all_tx_mbufs(txq);
1154
1155         /* free txq_info */
1156         hinic_free_tx_resources(txq);
1157
1158         /* free root sq wq */
1159         hinic_destroy_sq(nic_dev->hwdev, txq->q_id);
1160         nic_dev->txqs[txq->q_id] = NULL;
1161
1162         /* free txq */
1163         rte_free(txq);
1164 }
1165
1166 static void hinic_free_all_rq(struct hinic_nic_dev *nic_dev)
1167 {
1168         u16 q_id;
1169
1170         for (q_id = 0; q_id < nic_dev->num_rq; q_id++)
1171                 hinic_destroy_rq(nic_dev->hwdev, q_id);
1172 }
1173
1174 static void hinic_free_all_sq(struct hinic_nic_dev *nic_dev)
1175 {
1176         u16 q_id;
1177
1178         for (q_id = 0; q_id < nic_dev->num_sq; q_id++)
1179                 hinic_destroy_sq(nic_dev->hwdev, q_id);
1180 }
1181
1182 /**
1183  * DPDK callback to stop the device.
1184  *
1185  * @param dev
1186  *   Pointer to Ethernet device structure.
1187  */
1188 static void hinic_dev_stop(struct rte_eth_dev *dev)
1189 {
1190         int rc;
1191         char *name;
1192         uint16_t port_id;
1193         struct hinic_nic_dev *nic_dev;
1194         struct rte_eth_link link;
1195
1196         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1197         name = dev->data->name;
1198         port_id = dev->data->port_id;
1199
1200         if (!hinic_test_and_clear_bit(HINIC_DEV_START, &nic_dev->dev_status)) {
1201                 PMD_DRV_LOG(INFO, "Device %s already stopped", name);
1202                 return;
1203         }
1204
1205         /* just stop phy port and vport */
1206         rc = hinic_set_port_enable(nic_dev->hwdev, false);
1207         if (rc)
1208                 PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
1209                           rc, name, port_id);
1210
1211         rc = hinic_set_vport_enable(nic_dev->hwdev, false);
1212         if (rc)
1213                 PMD_DRV_LOG(WARNING, "Disable vport failed, error: %d, dev_name:%s, port_id:%d",
1214                           rc, name, port_id);
1215
1216         /* Clear recorded link status */
1217         memset(&link, 0, sizeof(link));
1218         (void)rte_eth_linkstatus_set(dev, &link);
1219
1220         /* flush pending io request */
1221         rc = hinic_rx_tx_flush(nic_dev->hwdev);
1222         if (rc)
1223                 PMD_DRV_LOG(WARNING, "Flush pending io failed, error: %d, dev_name: %s, port_id: %d",
1224                             rc, name, port_id);
1225
1226         /* clean rss table and rx_mode */
1227         hinic_remove_rxtx_configure(dev);
1228
1229         /* clean root context */
1230         hinic_free_qp_ctxts(nic_dev->hwdev);
1231
1232         hinic_free_fdir_filter(nic_dev);
1233
1234         /* free mbuf */
1235         hinic_free_all_rx_mbuf(dev);
1236         hinic_free_all_tx_mbuf(dev);
1237 }
1238
1239 static void hinic_disable_interrupt(struct rte_eth_dev *dev)
1240 {
1241         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1242         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1243         int ret, retries = 0;
1244
1245         hinic_clear_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
1246
1247         /* disable msix interrupt in hardware */
1248         hinic_set_msix_state(nic_dev->hwdev, 0, HINIC_MSIX_DISABLE);
1249
1250         /* disable rte interrupt */
1251         ret = rte_intr_disable(&pci_dev->intr_handle);
1252         if (ret)
1253                 PMD_DRV_LOG(ERR, "Disable intr failed: %d", ret);
1254
1255         do {
1256                 ret =
1257                 rte_intr_callback_unregister(&pci_dev->intr_handle,
1258                                              hinic_dev_interrupt_handler, dev);
1259                 if (ret >= 0) {
1260                         break;
1261                 } else if (ret == -EAGAIN) {
1262                         rte_delay_ms(100);
1263                         retries++;
1264                 } else {
1265                         PMD_DRV_LOG(ERR, "intr callback unregister failed: %d",
1266                                     ret);
1267                         break;
1268                 }
1269         } while (retries < HINIC_INTR_CB_UNREG_MAX_RETRIES);
1270
1271         if (retries == HINIC_INTR_CB_UNREG_MAX_RETRIES)
1272                 PMD_DRV_LOG(ERR, "Unregister intr callback failed after %d retries",
1273                             retries);
1274 }
1275
1276 static int hinic_set_dev_promiscuous(struct hinic_nic_dev *nic_dev, bool enable)
1277 {
1278         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1279
1280         if (enable)
1281                 rx_mode_ctrl |= HINIC_RX_MODE_PROMISC;
1282         else
1283                 rx_mode_ctrl &= (~HINIC_RX_MODE_PROMISC);
1284
1285         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1286 }
1287
1288 /**
1289  * DPDK callback to get device statistics.
1290  *
1291  * @param dev
1292  *   Pointer to Ethernet device structure.
1293  * @param stats
1294  *   Stats structure output buffer.
1295  *
1296  * @return
1297  *   0 on success and stats is filled,
1298  *   negative error value otherwise.
1299  */
1300 static int
1301 hinic_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1302 {
1303         int i, err, q_num;
1304         u64 rx_discards_pmd = 0;
1305         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1306         struct hinic_vport_stats vport_stats;
1307         struct hinic_rxq        *rxq = NULL;
1308         struct hinic_rxq_stats rxq_stats;
1309         struct hinic_txq        *txq = NULL;
1310         struct hinic_txq_stats txq_stats;
1311
1312         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
1313         if (err) {
1314                 PMD_DRV_LOG(ERR, "Get vport stats from fw failed, nic_dev: %s",
1315                         nic_dev->proc_dev_name);
1316                 return err;
1317         }
1318
1319         /* rx queue stats */
1320         q_num = (nic_dev->num_rq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1321                         nic_dev->num_rq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1322         for (i = 0; i < q_num; i++) {
1323                 rxq = nic_dev->rxqs[i];
1324                 hinic_rxq_get_stats(rxq, &rxq_stats);
1325                 stats->q_ipackets[i] = rxq_stats.packets;
1326                 stats->q_ibytes[i] = rxq_stats.bytes;
1327                 stats->q_errors[i] = rxq_stats.rx_discards;
1328
1329                 stats->ierrors += rxq_stats.errors;
1330                 rx_discards_pmd += rxq_stats.rx_discards;
1331                 dev->data->rx_mbuf_alloc_failed += rxq_stats.rx_nombuf;
1332         }
1333
1334         /* tx queue stats */
1335         q_num = (nic_dev->num_sq < RTE_ETHDEV_QUEUE_STAT_CNTRS) ?
1336                 nic_dev->num_sq : RTE_ETHDEV_QUEUE_STAT_CNTRS;
1337         for (i = 0; i < q_num; i++) {
1338                 txq = nic_dev->txqs[i];
1339                 hinic_txq_get_stats(txq, &txq_stats);
1340                 stats->q_opackets[i] = txq_stats.packets;
1341                 stats->q_obytes[i] = txq_stats.bytes;
1342                 stats->oerrors += (txq_stats.tx_busy + txq_stats.off_errs);
1343         }
1344
1345         /* vport stats */
1346         stats->oerrors += vport_stats.tx_discard_vport;
1347
1348         stats->imissed = vport_stats.rx_discard_vport + rx_discards_pmd;
1349
1350         stats->ipackets = (vport_stats.rx_unicast_pkts_vport +
1351                         vport_stats.rx_multicast_pkts_vport +
1352                         vport_stats.rx_broadcast_pkts_vport -
1353                         rx_discards_pmd);
1354
1355         stats->opackets = (vport_stats.tx_unicast_pkts_vport +
1356                         vport_stats.tx_multicast_pkts_vport +
1357                         vport_stats.tx_broadcast_pkts_vport);
1358
1359         stats->ibytes = (vport_stats.rx_unicast_bytes_vport +
1360                         vport_stats.rx_multicast_bytes_vport +
1361                         vport_stats.rx_broadcast_bytes_vport);
1362
1363         stats->obytes = (vport_stats.tx_unicast_bytes_vport +
1364                         vport_stats.tx_multicast_bytes_vport +
1365                         vport_stats.tx_broadcast_bytes_vport);
1366         return 0;
1367 }
1368
1369 /**
1370  * DPDK callback to clear device statistics.
1371  *
1372  * @param dev
1373  *   Pointer to Ethernet device structure.
1374  */
1375 static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
1376 {
1377         int qid;
1378         struct hinic_rxq        *rxq = NULL;
1379         struct hinic_txq        *txq = NULL;
1380         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1381         int ret;
1382
1383         ret = hinic_clear_vport_stats(nic_dev->hwdev);
1384         if (ret != 0)
1385                 return ret;
1386
1387         for (qid = 0; qid < nic_dev->num_rq; qid++) {
1388                 rxq = nic_dev->rxqs[qid];
1389                 hinic_rxq_stats_reset(rxq);
1390         }
1391
1392         for (qid = 0; qid < nic_dev->num_sq; qid++) {
1393                 txq = nic_dev->txqs[qid];
1394                 hinic_txq_stats_reset(txq);
1395         }
1396
1397         return 0;
1398 }
1399
1400 /**
1401  * DPDK callback to clear device extended statistics.
1402  *
1403  * @param dev
1404  *   Pointer to Ethernet device structure.
1405  */
1406 static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
1407 {
1408         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1409         int ret;
1410
1411         ret = hinic_dev_stats_reset(dev);
1412         if (ret != 0)
1413                 return ret;
1414
1415         if (hinic_func_type(nic_dev->hwdev) != TYPE_VF) {
1416                 ret = hinic_clear_phy_port_stats(nic_dev->hwdev);
1417                 if (ret != 0)
1418                         return ret;
1419         }
1420
1421         return 0;
1422 }
1423
1424 static void hinic_gen_random_mac_addr(struct rte_ether_addr *mac_addr)
1425 {
1426         uint64_t random_value;
1427
1428         /* Set Organizationally Unique Identifier (OUI) prefix */
1429         mac_addr->addr_bytes[0] = 0x00;
1430         mac_addr->addr_bytes[1] = 0x09;
1431         mac_addr->addr_bytes[2] = 0xC0;
1432         /* Force indication of locally assigned MAC address. */
1433         mac_addr->addr_bytes[0] |= RTE_ETHER_LOCAL_ADMIN_ADDR;
1434         /* Generate the last 3 bytes of the MAC address with a random number. */
1435         random_value = rte_rand();
1436         memcpy(&mac_addr->addr_bytes[3], &random_value, 3);
1437 }
1438
1439 /**
1440  * Init mac_vlan table in NIC.
1441  *
1442  * @param dev
1443  *   Pointer to Ethernet device structure.
1444  *
1445  * @return
1446  *   0 on success and stats is filled,
1447  *   negative error value otherwise.
1448  */
1449 static int hinic_init_mac_addr(struct rte_eth_dev *eth_dev)
1450 {
1451         struct hinic_nic_dev *nic_dev =
1452                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1453         uint8_t addr_bytes[RTE_ETHER_ADDR_LEN];
1454         u16 func_id = 0;
1455         int rc = 0;
1456
1457         rc = hinic_get_default_mac(nic_dev->hwdev, addr_bytes);
1458         if (rc)
1459                 return rc;
1460
1461         rte_ether_addr_copy((struct rte_ether_addr *)addr_bytes,
1462                 &eth_dev->data->mac_addrs[0]);
1463         if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[0]))
1464                 hinic_gen_random_mac_addr(&eth_dev->data->mac_addrs[0]);
1465
1466         func_id = hinic_global_func_id(nic_dev->hwdev);
1467         rc = hinic_set_mac(nic_dev->hwdev,
1468                         eth_dev->data->mac_addrs[0].addr_bytes,
1469                         0, func_id);
1470         if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1471                 return rc;
1472
1473         rte_ether_addr_copy(&eth_dev->data->mac_addrs[0],
1474                         &nic_dev->default_addr);
1475
1476         return 0;
1477 }
1478
1479 static void hinic_delete_mc_addr_list(struct hinic_nic_dev *nic_dev)
1480 {
1481         u16 func_id;
1482         u32 i;
1483
1484         func_id = hinic_global_func_id(nic_dev->hwdev);
1485
1486         for (i = 0; i < HINIC_MAX_MC_MAC_ADDRS; i++) {
1487                 if (rte_is_zero_ether_addr(&nic_dev->mc_list[i]))
1488                         break;
1489
1490                 hinic_del_mac(nic_dev->hwdev, nic_dev->mc_list[i].addr_bytes,
1491                               0, func_id);
1492                 memset(&nic_dev->mc_list[i], 0, sizeof(struct rte_ether_addr));
1493         }
1494 }
1495
1496 /**
1497  * Deinit mac_vlan table in NIC.
1498  *
1499  * @param dev
1500  *   Pointer to Ethernet device structure.
1501  *
1502  * @return
1503  *   0 on success and stats is filled,
1504  *   negative error value otherwise.
1505  */
1506 static void hinic_deinit_mac_addr(struct rte_eth_dev *eth_dev)
1507 {
1508         struct hinic_nic_dev *nic_dev =
1509                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1510         u16 func_id = 0;
1511         int rc;
1512         int i;
1513
1514         func_id = hinic_global_func_id(nic_dev->hwdev);
1515
1516         for (i = 0; i < HINIC_MAX_UC_MAC_ADDRS; i++) {
1517                 if (rte_is_zero_ether_addr(&eth_dev->data->mac_addrs[i]))
1518                         continue;
1519
1520                 rc = hinic_del_mac(nic_dev->hwdev,
1521                                    eth_dev->data->mac_addrs[i].addr_bytes,
1522                                    0, func_id);
1523                 if (rc && rc != HINIC_PF_SET_VF_ALREADY)
1524                         PMD_DRV_LOG(ERR, "Delete mac table failed, dev_name: %s",
1525                                     eth_dev->data->name);
1526
1527                 memset(&eth_dev->data->mac_addrs[i], 0,
1528                        sizeof(struct rte_ether_addr));
1529         }
1530
1531         /* delete multicast mac addrs */
1532         hinic_delete_mc_addr_list(nic_dev);
1533 }
1534
1535 static int hinic_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1536 {
1537         int ret = 0;
1538         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1539
1540         PMD_DRV_LOG(INFO, "Set port mtu, port_id: %d, mtu: %d, max_pkt_len: %d",
1541                         dev->data->port_id, mtu, HINIC_MTU_TO_PKTLEN(mtu));
1542
1543         if (mtu < HINIC_MIN_MTU_SIZE || mtu > HINIC_MAX_MTU_SIZE) {
1544                 PMD_DRV_LOG(ERR, "Invalid mtu: %d, must between %d and %d",
1545                                 mtu, HINIC_MIN_MTU_SIZE, HINIC_MAX_MTU_SIZE);
1546                 return -EINVAL;
1547         }
1548
1549         ret = hinic_set_port_mtu(nic_dev->hwdev, mtu);
1550         if (ret) {
1551                 PMD_DRV_LOG(ERR, "Set port mtu failed, ret: %d", ret);
1552                 return ret;
1553         }
1554
1555         /* update max frame size */
1556         dev->data->dev_conf.rxmode.max_rx_pkt_len = HINIC_MTU_TO_PKTLEN(mtu);
1557         nic_dev->mtu_size = mtu;
1558
1559         return ret;
1560 }
1561
1562 static void hinic_store_vlan_filter(struct hinic_nic_dev *nic_dev,
1563                                         u16 vlan_id, bool on)
1564 {
1565         u32 vid_idx, vid_bit;
1566
1567         vid_idx = HINIC_VFTA_IDX(vlan_id);
1568         vid_bit = HINIC_VFTA_BIT(vlan_id);
1569
1570         if (on)
1571                 nic_dev->vfta[vid_idx] |= vid_bit;
1572         else
1573                 nic_dev->vfta[vid_idx] &= ~vid_bit;
1574 }
1575
1576 static bool hinic_find_vlan_filter(struct hinic_nic_dev *nic_dev,
1577                                 uint16_t vlan_id)
1578 {
1579         u32 vid_idx, vid_bit;
1580
1581         vid_idx = HINIC_VFTA_IDX(vlan_id);
1582         vid_bit = HINIC_VFTA_BIT(vlan_id);
1583
1584         return (nic_dev->vfta[vid_idx] & vid_bit) ? TRUE : FALSE;
1585 }
1586
1587 /**
1588  * DPDK callback to set vlan filter.
1589  *
1590  * @param dev
1591  *   Pointer to Ethernet device structure.
1592  * @param vlan_id
1593  *   vlan id is used to filter vlan packets
1594  * @param enable
1595  *   enable disable or enable vlan filter function
1596  */
1597 static int hinic_vlan_filter_set(struct rte_eth_dev *dev,
1598                                 uint16_t vlan_id, int enable)
1599 {
1600         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1601         int err = 0;
1602         u16 func_id;
1603
1604         if (vlan_id > RTE_ETHER_MAX_VLAN_ID)
1605                 return -EINVAL;
1606
1607         func_id = hinic_global_func_id(nic_dev->hwdev);
1608
1609         if (enable) {
1610                 /* If vlanid is already set, just return */
1611                 if (hinic_find_vlan_filter(nic_dev, vlan_id)) {
1612                         PMD_DRV_LOG(INFO, "Vlan %u has been added, device: %s",
1613                                   vlan_id, nic_dev->proc_dev_name);
1614                         return 0;
1615                 }
1616
1617                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1618                                             func_id, TRUE);
1619         } else {
1620                 /* If vlanid can't be found, just return */
1621                 if (!hinic_find_vlan_filter(nic_dev, vlan_id)) {
1622                         PMD_DRV_LOG(INFO, "Vlan %u is not in the vlan filter list, device: %s",
1623                                   vlan_id, nic_dev->proc_dev_name);
1624                         return 0;
1625                 }
1626
1627                 err = hinic_add_remove_vlan(nic_dev->hwdev, vlan_id,
1628                                             func_id, FALSE);
1629         }
1630
1631         if (err) {
1632                 PMD_DRV_LOG(ERR, "%s vlan failed, func_id: %d, vlan_id: %d, err: %d",
1633                       enable ? "Add" : "Remove", func_id, vlan_id, err);
1634                 return err;
1635         }
1636
1637         hinic_store_vlan_filter(nic_dev, vlan_id, enable);
1638
1639         PMD_DRV_LOG(INFO, "%s vlan %u succeed, device: %s",
1640                   enable ? "Add" : "Remove", vlan_id, nic_dev->proc_dev_name);
1641         return 0;
1642 }
1643
1644 /**
1645  * DPDK callback to enable or disable vlan offload.
1646  *
1647  * @param dev
1648  *   Pointer to Ethernet device structure.
1649  * @param mask
1650  *   Definitions used for VLAN setting
1651  */
1652 static int hinic_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1653 {
1654         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1655         struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
1656         bool on;
1657         int err;
1658
1659         /* Enable or disable VLAN filter */
1660         if (mask & ETH_VLAN_FILTER_MASK) {
1661                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ?
1662                         TRUE : FALSE;
1663                 err = hinic_config_vlan_filter(nic_dev->hwdev, on);
1664                 if (err == HINIC_MGMT_CMD_UNSUPPORTED) {
1665                         PMD_DRV_LOG(WARNING,
1666                                 "Current matching version does not support vlan filter configuration, device: %s, port_id: %d",
1667                                   nic_dev->proc_dev_name, dev->data->port_id);
1668                 } else if (err) {
1669                         PMD_DRV_LOG(ERR, "Failed to %s vlan filter, device: %s, port_id: %d, err: %d",
1670                                   on ? "enable" : "disable",
1671                                   nic_dev->proc_dev_name,
1672                                   dev->data->port_id, err);
1673                         return err;
1674                 }
1675
1676                 PMD_DRV_LOG(INFO, "%s vlan filter succeed, device: %s, port_id: %d",
1677                           on ? "Enable" : "Disable",
1678                           nic_dev->proc_dev_name, dev->data->port_id);
1679         }
1680
1681         /* Enable or disable VLAN stripping */
1682         if (mask & ETH_VLAN_STRIP_MASK) {
1683                 on = (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ?
1684                         TRUE : FALSE;
1685                 err = hinic_set_rx_vlan_offload(nic_dev->hwdev, on);
1686                 if (err) {
1687                         PMD_DRV_LOG(ERR, "Failed to %s vlan strip, device: %s, port_id: %d, err: %d",
1688                                   on ? "enable" : "disable",
1689                                   nic_dev->proc_dev_name,
1690                                   dev->data->port_id, err);
1691                         return err;
1692                 }
1693
1694                 PMD_DRV_LOG(INFO, "%s vlan strip succeed, device: %s, port_id: %d",
1695                           on ? "Enable" : "Disable",
1696                           nic_dev->proc_dev_name, dev->data->port_id);
1697         }
1698
1699         if (mask & ETH_VLAN_EXTEND_MASK) {
1700                 PMD_DRV_LOG(ERR, "Don't support vlan qinq, device: %s, port_id: %d",
1701                           nic_dev->proc_dev_name, dev->data->port_id);
1702                 return -ENOTSUP;
1703         }
1704
1705         return 0;
1706 }
1707
1708 static void hinic_remove_all_vlanid(struct rte_eth_dev *eth_dev)
1709 {
1710         struct hinic_nic_dev *nic_dev =
1711                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
1712         u16 func_id;
1713         int i;
1714
1715         func_id = hinic_global_func_id(nic_dev->hwdev);
1716         for (i = 0; i <= RTE_ETHER_MAX_VLAN_ID; i++) {
1717                 /* If can't find it, continue */
1718                 if (!hinic_find_vlan_filter(nic_dev, i))
1719                         continue;
1720
1721                 (void)hinic_add_remove_vlan(nic_dev->hwdev, i, func_id, FALSE);
1722                 hinic_store_vlan_filter(nic_dev, i, false);
1723         }
1724 }
1725
1726 static int hinic_set_dev_allmulticast(struct hinic_nic_dev *nic_dev,
1727                                 bool enable)
1728 {
1729         u32 rx_mode_ctrl = nic_dev->rx_mode_status;
1730
1731         if (enable)
1732                 rx_mode_ctrl |= HINIC_RX_MODE_MC_ALL;
1733         else
1734                 rx_mode_ctrl &= (~HINIC_RX_MODE_MC_ALL);
1735
1736         return hinic_config_rx_mode(nic_dev, rx_mode_ctrl);
1737 }
1738
1739 /**
1740  * DPDK callback to enable allmulticast mode.
1741  *
1742  * @param dev
1743  *   Pointer to Ethernet device structure.
1744  *
1745  * @return
1746  *   0 on success,
1747  *   negative error value otherwise.
1748  */
1749 static int hinic_dev_allmulticast_enable(struct rte_eth_dev *dev)
1750 {
1751         int ret = HINIC_OK;
1752         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1753
1754         ret = hinic_set_dev_allmulticast(nic_dev, true);
1755         if (ret) {
1756                 PMD_DRV_LOG(ERR, "Enable allmulticast failed, error: %d", ret);
1757                 return ret;
1758         }
1759
1760         PMD_DRV_LOG(INFO, "Enable allmulticast succeed, nic_dev: %s, port_id: %d",
1761                 nic_dev->proc_dev_name, dev->data->port_id);
1762         return 0;
1763 }
1764
1765 /**
1766  * DPDK callback to disable allmulticast mode.
1767  *
1768  * @param dev
1769  *   Pointer to Ethernet device structure.
1770  *
1771  * @return
1772  *   0 on success,
1773  *   negative error value otherwise.
1774  */
1775 static int hinic_dev_allmulticast_disable(struct rte_eth_dev *dev)
1776 {
1777         int ret = HINIC_OK;
1778         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1779
1780         ret = hinic_set_dev_allmulticast(nic_dev, false);
1781         if (ret) {
1782                 PMD_DRV_LOG(ERR, "Disable allmulticast failed, error: %d", ret);
1783                 return ret;
1784         }
1785
1786         PMD_DRV_LOG(INFO, "Disable allmulticast succeed, nic_dev: %s, port_id: %d",
1787                 nic_dev->proc_dev_name, dev->data->port_id);
1788         return 0;
1789 }
1790
1791 /**
1792  * DPDK callback to enable promiscuous mode.
1793  *
1794  * @param dev
1795  *   Pointer to Ethernet device structure.
1796  *
1797  * @return
1798  *   0 on success,
1799  *   negative error value otherwise.
1800  */
1801 static int hinic_dev_promiscuous_enable(struct rte_eth_dev *dev)
1802 {
1803         int rc = HINIC_OK;
1804         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1805
1806         PMD_DRV_LOG(INFO, "Enable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1807                     nic_dev->proc_dev_name, dev->data->port_id,
1808                     dev->data->promiscuous);
1809
1810         rc = hinic_set_dev_promiscuous(nic_dev, true);
1811         if (rc)
1812                 PMD_DRV_LOG(ERR, "Enable promiscuous failed");
1813
1814         return rc;
1815 }
1816
1817 /**
1818  * DPDK callback to disable promiscuous mode.
1819  *
1820  * @param dev
1821  *   Pointer to Ethernet device structure.
1822  *
1823  * @return
1824  *   0 on success,
1825  *   negative error value otherwise.
1826  */
1827 static int hinic_dev_promiscuous_disable(struct rte_eth_dev *dev)
1828 {
1829         int rc = HINIC_OK;
1830         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1831
1832         PMD_DRV_LOG(INFO, "Disable promiscuous, nic_dev: %s, port_id: %d, promisc: %d",
1833                     nic_dev->proc_dev_name, dev->data->port_id,
1834                     dev->data->promiscuous);
1835
1836         rc = hinic_set_dev_promiscuous(nic_dev, false);
1837         if (rc)
1838                 PMD_DRV_LOG(ERR, "Disable promiscuous failed");
1839
1840         return rc;
1841 }
1842
1843 /**
1844  * DPDK callback to update the RSS hash key and RSS hash type.
1845  *
1846  * @param dev
1847  *   Pointer to Ethernet device structure.
1848  * @param rss_conf
1849  *   RSS configuration data.
1850  *
1851  * @return
1852  *   0 on success, negative error value otherwise.
1853  */
1854 static int hinic_rss_hash_update(struct rte_eth_dev *dev,
1855                           struct rte_eth_rss_conf *rss_conf)
1856 {
1857         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1858         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1859         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1860         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1861         u64 rss_hf = rss_conf->rss_hf;
1862         struct nic_rss_type rss_type = {0};
1863         int err = 0;
1864
1865         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1866                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1867                 return HINIC_OK;
1868         }
1869
1870         if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
1871                 PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
1872                             rss_conf->rss_key_len);
1873                 return HINIC_ERROR;
1874         }
1875
1876         if (rss_conf->rss_key) {
1877                 memcpy(hashkey, rss_conf->rss_key, rss_conf->rss_key_len);
1878                 err = hinic_rss_set_template_tbl(nic_dev->hwdev, tmpl_idx,
1879                                                  hashkey);
1880                 if (err) {
1881                         PMD_DRV_LOG(ERR, "Set rss template table failed");
1882                         goto disable_rss;
1883                 }
1884         }
1885
1886         rss_type.ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
1887         rss_type.tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
1888         rss_type.ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
1889         rss_type.ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
1890         rss_type.tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
1891         rss_type.tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
1892         rss_type.udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
1893         rss_type.udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
1894
1895         err = hinic_set_rss_type(nic_dev->hwdev, tmpl_idx, rss_type);
1896         if (err) {
1897                 PMD_DRV_LOG(ERR, "Set rss type table failed");
1898                 goto disable_rss;
1899         }
1900
1901         return 0;
1902
1903 disable_rss:
1904         memset(prio_tc, 0, sizeof(prio_tc));
1905         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
1906         return err;
1907 }
1908
1909 /**
1910  * DPDK callback to get the RSS hash configuration.
1911  *
1912  * @param dev
1913  *   Pointer to Ethernet device structure.
1914  * @param rss_conf
1915  *   RSS configuration data.
1916  *
1917  * @return
1918  *   0 on success, negative error value otherwise.
1919  */
1920 static int hinic_rss_conf_get(struct rte_eth_dev *dev,
1921                        struct rte_eth_rss_conf *rss_conf)
1922 {
1923         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1924         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1925         u8 hashkey[HINIC_RSS_KEY_SIZE] = {0};
1926         struct nic_rss_type rss_type = {0};
1927         int err;
1928
1929         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
1930                 PMD_DRV_LOG(WARNING, "RSS is not enabled");
1931                 return HINIC_ERROR;
1932         }
1933
1934         err = hinic_rss_get_template_tbl(nic_dev->hwdev, tmpl_idx, hashkey);
1935         if (err)
1936                 return err;
1937
1938         if (rss_conf->rss_key &&
1939             rss_conf->rss_key_len >= HINIC_RSS_KEY_SIZE) {
1940                 memcpy(rss_conf->rss_key, hashkey, sizeof(hashkey));
1941                 rss_conf->rss_key_len = sizeof(hashkey);
1942         }
1943
1944         err = hinic_get_rss_type(nic_dev->hwdev, tmpl_idx, &rss_type);
1945         if (err)
1946                 return err;
1947
1948         rss_conf->rss_hf = 0;
1949         rss_conf->rss_hf |=  rss_type.ipv4 ?
1950                 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4) : 0;
1951         rss_conf->rss_hf |=  rss_type.tcp_ipv4 ? ETH_RSS_NONFRAG_IPV4_TCP : 0;
1952         rss_conf->rss_hf |=  rss_type.ipv6 ?
1953                 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6) : 0;
1954         rss_conf->rss_hf |=  rss_type.ipv6_ext ? ETH_RSS_IPV6_EX : 0;
1955         rss_conf->rss_hf |=  rss_type.tcp_ipv6 ? ETH_RSS_NONFRAG_IPV6_TCP : 0;
1956         rss_conf->rss_hf |=  rss_type.tcp_ipv6_ext ? ETH_RSS_IPV6_TCP_EX : 0;
1957         rss_conf->rss_hf |=  rss_type.udp_ipv4 ? ETH_RSS_NONFRAG_IPV4_UDP : 0;
1958         rss_conf->rss_hf |=  rss_type.udp_ipv6 ? ETH_RSS_NONFRAG_IPV6_UDP : 0;
1959
1960         return HINIC_OK;
1961 }
1962
1963 /**
1964  * DPDK callback to update the RETA indirection table.
1965  *
1966  * @param dev
1967  *   Pointer to Ethernet device structure.
1968  * @param reta_conf
1969  *   Pointer to RETA configuration structure array.
1970  * @param reta_size
1971  *   Size of the RETA table.
1972  *
1973  * @return
1974  *   0 on success, negative error value otherwise.
1975  */
1976 static int hinic_rss_indirtbl_update(struct rte_eth_dev *dev,
1977                               struct rte_eth_rss_reta_entry64 *reta_conf,
1978                               uint16_t reta_size)
1979 {
1980         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
1981         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
1982         u8 prio_tc[HINIC_DCB_UP_MAX] = {0};
1983         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
1984         int err = 0;
1985         u16 i = 0;
1986         u16 idx, shift;
1987
1988         if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG))
1989                 return HINIC_OK;
1990
1991         if (reta_size != NIC_RSS_INDIR_SIZE) {
1992                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
1993                 return HINIC_ERROR;
1994         }
1995
1996         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
1997         if (err)
1998                 return err;
1999
2000         /* update rss indir_tbl */
2001         for (i = 0; i < reta_size; i++) {
2002                 idx = i / RTE_RETA_GROUP_SIZE;
2003                 shift = i % RTE_RETA_GROUP_SIZE;
2004                 if (reta_conf[idx].mask & (1ULL << shift))
2005                         indirtbl[i] = reta_conf[idx].reta[shift];
2006         }
2007
2008         for (i = 0 ; i < reta_size; i++) {
2009                 if (indirtbl[i] >= nic_dev->num_rq) {
2010                         PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
2011                                     i, nic_dev->num_rq);
2012                         goto disable_rss;
2013                 }
2014         }
2015
2016         err = hinic_rss_set_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2017         if (err)
2018                 goto disable_rss;
2019
2020         nic_dev->rss_indir_flag = true;
2021
2022         return 0;
2023
2024 disable_rss:
2025         memset(prio_tc, 0, sizeof(prio_tc));
2026         (void)hinic_rss_cfg(nic_dev->hwdev, 0, tmpl_idx, 0, prio_tc);
2027
2028         return HINIC_ERROR;
2029 }
2030
2031
2032 /**
2033  * DPDK callback to get the RETA indirection table.
2034  *
2035  * @param dev
2036  *   Pointer to Ethernet device structure.
2037  * @param reta_conf
2038  *   Pointer to RETA configuration structure array.
2039  * @param reta_size
2040  *   Size of the RETA table.
2041  *
2042  * @return
2043  *   0 on success, negative error value otherwise.
2044  */
2045 static int hinic_rss_indirtbl_query(struct rte_eth_dev *dev,
2046                              struct rte_eth_rss_reta_entry64 *reta_conf,
2047                              uint16_t reta_size)
2048 {
2049         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2050         u8 tmpl_idx = nic_dev->rss_tmpl_idx;
2051         int err = 0;
2052         u32 indirtbl[NIC_RSS_INDIR_SIZE] = {0};
2053         u16 idx, shift;
2054         u16 i = 0;
2055
2056         if (reta_size != NIC_RSS_INDIR_SIZE) {
2057                 PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
2058                 return HINIC_ERROR;
2059         }
2060
2061         err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
2062         if (err) {
2063                 PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
2064                             err);
2065                 return err;
2066         }
2067
2068         for (i = 0; i < reta_size; i++) {
2069                 idx = i / RTE_RETA_GROUP_SIZE;
2070                 shift = i % RTE_RETA_GROUP_SIZE;
2071                 if (reta_conf[idx].mask & (1ULL << shift))
2072                         reta_conf[idx].reta[shift] = (uint16_t)indirtbl[i];
2073         }
2074
2075         return HINIC_OK;
2076 }
2077
2078 /**
2079  * DPDK callback to get extended device statistics.
2080  *
2081  * @param dev
2082  *   Pointer to Ethernet device.
2083  * @param xstats
2084  *   Pointer to rte extended stats table.
2085  * @param n
2086  *   The size of the stats table.
2087  *
2088  * @return
2089  *   Number of extended stats on success and stats is filled,
2090  *   negative error value otherwise.
2091  */
2092 static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
2093                          struct rte_eth_xstat *xstats,
2094                          unsigned int n)
2095 {
2096         u16 qid = 0;
2097         u32 i;
2098         int err, count;
2099         struct hinic_nic_dev *nic_dev;
2100         struct hinic_phy_port_stats port_stats;
2101         struct hinic_vport_stats vport_stats;
2102         struct hinic_rxq        *rxq = NULL;
2103         struct hinic_rxq_stats rxq_stats;
2104         struct hinic_txq        *txq = NULL;
2105         struct hinic_txq_stats txq_stats;
2106
2107         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2108         count = hinic_xstats_calc_num(nic_dev);
2109         if ((int)n < count)
2110                 return count;
2111
2112         count = 0;
2113
2114         /* Get stats from hinic_rxq_stats */
2115         for (qid = 0; qid < nic_dev->num_rq; qid++) {
2116                 rxq = nic_dev->rxqs[qid];
2117                 hinic_rxq_get_stats(rxq, &rxq_stats);
2118
2119                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2120                         xstats[count].value =
2121                                 *(uint64_t *)(((char *)&rxq_stats) +
2122                                 hinic_rxq_stats_strings[i].offset);
2123                         xstats[count].id = count;
2124                         count++;
2125                 }
2126         }
2127
2128         /* Get stats from hinic_txq_stats */
2129         for (qid = 0; qid < nic_dev->num_sq; qid++) {
2130                 txq = nic_dev->txqs[qid];
2131                 hinic_txq_get_stats(txq, &txq_stats);
2132
2133                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2134                         xstats[count].value =
2135                                 *(uint64_t *)(((char *)&txq_stats) +
2136                                 hinic_txq_stats_strings[i].offset);
2137                         xstats[count].id = count;
2138                         count++;
2139                 }
2140         }
2141
2142         /* Get stats from hinic_vport_stats */
2143         err = hinic_get_vport_stats(nic_dev->hwdev, &vport_stats);
2144         if (err)
2145                 return err;
2146
2147         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2148                 xstats[count].value =
2149                         *(uint64_t *)(((char *)&vport_stats) +
2150                         hinic_vport_stats_strings[i].offset);
2151                 xstats[count].id = count;
2152                 count++;
2153         }
2154
2155         if (HINIC_IS_VF(nic_dev->hwdev))
2156                 return count;
2157
2158         /* Get stats from hinic_phy_port_stats */
2159         err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
2160         if (err)
2161                 return err;
2162
2163         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2164                 xstats[count].value = *(uint64_t *)(((char *)&port_stats) +
2165                                 hinic_phyport_stats_strings[i].offset);
2166                 xstats[count].id = count;
2167                 count++;
2168         }
2169
2170         return count;
2171 }
2172
2173 static void hinic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2174                                 struct rte_eth_rxq_info *qinfo)
2175 {
2176         struct hinic_rxq  *rxq = dev->data->rx_queues[queue_id];
2177
2178         qinfo->mp = rxq->mb_pool;
2179         qinfo->nb_desc = rxq->q_depth;
2180 }
2181
2182 static void hinic_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
2183                                 struct rte_eth_txq_info *qinfo)
2184 {
2185         struct hinic_txq  *txq = dev->data->tx_queues[queue_id];
2186
2187         qinfo->nb_desc = txq->q_depth;
2188 }
2189
2190 /**
2191  * DPDK callback to retrieve names of extended device statistics
2192  *
2193  * @param dev
2194  *   Pointer to Ethernet device structure.
2195  * @param xstats_names
2196  *   Buffer to insert names into.
2197  *
2198  * @return
2199  *   Number of xstats names.
2200  */
2201 static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
2202                                struct rte_eth_xstat_name *xstats_names,
2203                                __rte_unused unsigned int limit)
2204 {
2205         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2206         int count = 0;
2207         u16 i = 0, q_num;
2208
2209         if (xstats_names == NULL)
2210                 return hinic_xstats_calc_num(nic_dev);
2211
2212         /* get pmd rxq stats */
2213         for (q_num = 0; q_num < nic_dev->num_rq; q_num++) {
2214                 for (i = 0; i < HINIC_RXQ_XSTATS_NUM; i++) {
2215                         snprintf(xstats_names[count].name,
2216                                  sizeof(xstats_names[count].name),
2217                                  "rxq%d_%s_pmd",
2218                                  q_num, hinic_rxq_stats_strings[i].name);
2219                         count++;
2220                 }
2221         }
2222
2223         /* get pmd txq stats */
2224         for (q_num = 0; q_num < nic_dev->num_sq; q_num++) {
2225                 for (i = 0; i < HINIC_TXQ_XSTATS_NUM; i++) {
2226                         snprintf(xstats_names[count].name,
2227                                  sizeof(xstats_names[count].name),
2228                                  "txq%d_%s_pmd",
2229                                  q_num, hinic_txq_stats_strings[i].name);
2230                         count++;
2231                 }
2232         }
2233
2234         /* get vport stats */
2235         for (i = 0; i < HINIC_VPORT_XSTATS_NUM; i++) {
2236                 snprintf(xstats_names[count].name,
2237                          sizeof(xstats_names[count].name),
2238                          "%s",
2239                          hinic_vport_stats_strings[i].name);
2240                 count++;
2241         }
2242
2243         if (HINIC_IS_VF(nic_dev->hwdev))
2244                 return count;
2245
2246         /* get phy port stats */
2247         for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
2248                 snprintf(xstats_names[count].name,
2249                          sizeof(xstats_names[count].name),
2250                          "%s",
2251                          hinic_phyport_stats_strings[i].name);
2252                 count++;
2253         }
2254
2255         return count;
2256 }
2257 /**
2258  *  DPDK callback to set mac address
2259  *
2260  * @param dev
2261  *   Pointer to Ethernet device structure.
2262  * @param addr
2263  *   Pointer to mac address
2264  * @return
2265  *   0 on success, negative error value otherwise.
2266  */
2267 static int hinic_set_mac_addr(struct rte_eth_dev *dev,
2268                               struct rte_ether_addr *addr)
2269 {
2270         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2271         u16 func_id;
2272         int err;
2273
2274         func_id = hinic_global_func_id(nic_dev->hwdev);
2275         err = hinic_update_mac(nic_dev->hwdev, nic_dev->default_addr.addr_bytes,
2276                                addr->addr_bytes, 0, func_id);
2277         if (err)
2278                 return err;
2279
2280         rte_ether_addr_copy(addr, &nic_dev->default_addr);
2281
2282         PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
2283                     addr->addr_bytes[0], addr->addr_bytes[1],
2284                     addr->addr_bytes[2], addr->addr_bytes[3],
2285                     addr->addr_bytes[4], addr->addr_bytes[5]);
2286
2287         return 0;
2288 }
2289
2290 /**
2291  * DPDK callback to remove a MAC address.
2292  *
2293  * @param dev
2294  *   Pointer to Ethernet device structure.
2295  * @param index
2296  *   MAC address index.
2297  */
2298 static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2299 {
2300         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2301         u16 func_id;
2302         int ret;
2303
2304         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2305                 PMD_DRV_LOG(INFO, "Remove mac index(%u) is out of range",
2306                             index);
2307                 return;
2308         }
2309
2310         func_id = hinic_global_func_id(nic_dev->hwdev);
2311         ret = hinic_del_mac(nic_dev->hwdev,
2312                             dev->data->mac_addrs[index].addr_bytes, 0, func_id);
2313         if (ret)
2314                 return;
2315
2316         memset(&dev->data->mac_addrs[index], 0, sizeof(struct rte_ether_addr));
2317 }
2318
2319 /**
2320  * DPDK callback to add a MAC address.
2321  *
2322  * @param dev
2323  *   Pointer to Ethernet device structure.
2324  * @param mac_addr
2325  *   MAC address to register.
2326  * @param index
2327  *   MAC address index.
2328  * @param vmdq
2329  *   VMDq pool index to associate address with (ignored).
2330  *
2331  * @return
2332  *   0 on success, a negative errno value otherwise and rte_errno is set.
2333  */
2334
2335 static int hinic_mac_addr_add(struct rte_eth_dev *dev,
2336                               struct rte_ether_addr *mac_addr, uint32_t index,
2337                               __rte_unused uint32_t vmdq)
2338 {
2339         struct hinic_nic_dev  *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2340         unsigned int i;
2341         u16 func_id;
2342         int ret;
2343
2344         if (index >= HINIC_MAX_UC_MAC_ADDRS) {
2345                 PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
2346                 return -EINVAL;
2347         }
2348
2349         /* First, make sure this address isn't already configured. */
2350         for (i = 0; (i != HINIC_MAX_UC_MAC_ADDRS); ++i) {
2351                 /* Skip this index, it's going to be reconfigured. */
2352                 if (i == index)
2353                         continue;
2354
2355                 if (memcmp(&dev->data->mac_addrs[i],
2356                         mac_addr, sizeof(*mac_addr)))
2357                         continue;
2358
2359                 PMD_DRV_LOG(INFO, "MAC address already configured");
2360                 return -EADDRINUSE;
2361         }
2362
2363         func_id = hinic_global_func_id(nic_dev->hwdev);
2364         ret = hinic_set_mac(nic_dev->hwdev, mac_addr->addr_bytes, 0, func_id);
2365         if (ret)
2366                 return ret;
2367
2368         dev->data->mac_addrs[index] = *mac_addr;
2369         return 0;
2370 }
2371
2372 /**
2373  *  DPDK callback to set multicast mac address
2374  *
2375  * @param dev
2376  *   Pointer to Ethernet device structure.
2377  * @param mc_addr_set
2378  *   Pointer to multicast mac address
2379  * @param nb_mc_addr
2380  *   mc addr count
2381  * @return
2382  *   0 on success, negative error value otherwise.
2383  */
2384 static int hinic_set_mc_addr_list(struct rte_eth_dev *dev,
2385                                   struct rte_ether_addr *mc_addr_set,
2386                                   uint32_t nb_mc_addr)
2387 {
2388         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2389         u16 func_id;
2390         int ret;
2391         u32 i;
2392
2393         func_id = hinic_global_func_id(nic_dev->hwdev);
2394
2395         /* delete old multi_cast addrs firstly */
2396         hinic_delete_mc_addr_list(nic_dev);
2397
2398         if (nb_mc_addr > HINIC_MAX_MC_MAC_ADDRS)
2399                 goto allmulti;
2400
2401         for (i = 0; i < nb_mc_addr; i++) {
2402                 ret = hinic_set_mac(nic_dev->hwdev, mc_addr_set[i].addr_bytes,
2403                                     0, func_id);
2404                 /* if add mc addr failed, set all multi_cast */
2405                 if (ret) {
2406                         hinic_delete_mc_addr_list(nic_dev);
2407                         goto allmulti;
2408                 }
2409
2410                 rte_ether_addr_copy(&mc_addr_set[i], &nic_dev->mc_list[i]);
2411         }
2412
2413         return 0;
2414
2415 allmulti:
2416         hinic_dev_allmulticast_enable(dev);
2417
2418         return 0;
2419 }
2420
2421 /**
2422  * DPDK callback to manage filter operations
2423  *
2424  * @param dev
2425  *   Pointer to Ethernet device structure.
2426  * @param filter_type
2427  *   Filter type.
2428  * @param filter_op
2429  *   Operation to perform.
2430  * @param arg
2431  *   Pointer to operation-specific structure.
2432  *
2433  * @return
2434  *   0 on success, negative errno value on failure.
2435  */
2436 static int hinic_dev_filter_ctrl(struct rte_eth_dev *dev,
2437                      enum rte_filter_type filter_type,
2438                      enum rte_filter_op filter_op,
2439                      void *arg)
2440 {
2441         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2442         int func_id = hinic_global_func_id(nic_dev->hwdev);
2443
2444         switch (filter_type) {
2445         case RTE_ETH_FILTER_GENERIC:
2446                 if (filter_op != RTE_ETH_FILTER_GET)
2447                         return -EINVAL;
2448                 *(const void **)arg = &hinic_flow_ops;
2449                 break;
2450         default:
2451                 PMD_DRV_LOG(INFO, "Filter type (%d) not supported",
2452                         filter_type);
2453                 return -EINVAL;
2454         }
2455
2456         PMD_DRV_LOG(INFO, "Set filter_ctrl succeed, func_id: 0x%x, filter_type: 0x%x,"
2457                         "filter_op: 0x%x.", func_id, filter_type, filter_op);
2458         return 0;
2459 }
2460
2461 static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
2462 {
2463         struct nic_pause_config pause_config = {0};
2464
2465         pause_config.auto_neg = 0;
2466         pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2467         pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
2468
2469         return hinic_set_pause_config(nic_dev->hwdev, pause_config);
2470 }
2471
2472 static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
2473 {
2474         u8 up_tc[HINIC_DCB_UP_MAX] = {0};
2475         u8 up_pgid[HINIC_DCB_UP_MAX] = {0};
2476         u8 up_bw[HINIC_DCB_UP_MAX] = {0};
2477         u8 pg_bw[HINIC_DCB_UP_MAX] = {0};
2478         u8 up_strict[HINIC_DCB_UP_MAX] = {0};
2479         int i = 0;
2480
2481         pg_bw[0] = 100;
2482         for (i = 0; i < HINIC_DCB_UP_MAX; i++)
2483                 up_bw[i] = 100;
2484
2485         return hinic_dcb_set_ets(nic_dev->hwdev, up_tc, pg_bw,
2486                                         up_pgid, up_bw, up_strict);
2487 }
2488
2489 static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
2490 {
2491         u8 cos_id = 0;
2492         int err;
2493
2494         if (!HINIC_IS_VF(nic_dev->hwdev)) {
2495                 nic_dev->default_cos =
2496                                 (hinic_global_func_id(nic_dev->hwdev) +
2497                                                 DEFAULT_BASE_COS) % NR_MAX_COS;
2498         } else {
2499                 err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
2500                 if (err) {
2501                         PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
2502                                         err);
2503                         return HINIC_ERROR;
2504                 }
2505
2506                 nic_dev->default_cos = cos_id;
2507         }
2508
2509         return 0;
2510 }
2511
2512 static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
2513 {
2514         int err;
2515
2516         err = hinic_init_default_cos(nic_dev);
2517         if (err)
2518                 return err;
2519
2520         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2521                 return 0;
2522
2523         /* Restore DCB configure to default status */
2524         err = hinic_set_default_dcb_feature(nic_dev);
2525         if (err)
2526                 return err;
2527
2528         /* Set pause enable, and up will disable pfc. */
2529         err = hinic_set_default_pause_feature(nic_dev);
2530         if (err)
2531                 return err;
2532
2533         err = hinic_reset_port_link_cfg(nic_dev->hwdev);
2534         if (err)
2535                 return err;
2536
2537         err = hinic_set_link_status_follow(nic_dev->hwdev,
2538                                            HINIC_LINK_FOLLOW_PORT);
2539         if (err == HINIC_MGMT_CMD_UNSUPPORTED)
2540                 PMD_DRV_LOG(WARNING, "Don't support to set link status follow phy port status");
2541         else if (err)
2542                 return err;
2543
2544         return hinic_set_anti_attack(nic_dev->hwdev, true);
2545 }
2546
2547 static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
2548 {
2549         struct hinic_board_info info = { 0 };
2550         int rc;
2551
2552         if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
2553                 return 0;
2554
2555         rc = hinic_get_board_info(nic_dev->hwdev, &info);
2556         if (rc)
2557                 return rc;
2558
2559         return (info.service_mode == HINIC_SERVICE_MODE_NIC ? HINIC_OK :
2560                                                 HINIC_ERROR);
2561 }
2562
2563 static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
2564 {
2565         nic_dev->cpy_mpool = rte_mempool_lookup(nic_dev->proc_dev_name);
2566         if (nic_dev->cpy_mpool == NULL) {
2567                 nic_dev->cpy_mpool =
2568                 rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
2569                                         HINIC_COPY_MEMPOOL_DEPTH,
2570                                         0, 0,
2571                                         HINIC_COPY_MBUF_SIZE,
2572                                         rte_socket_id());
2573                 if (!nic_dev->cpy_mpool) {
2574                         PMD_DRV_LOG(ERR, "Create copy mempool failed, errno: %d, dev_name: %s",
2575                                     rte_errno, nic_dev->proc_dev_name);
2576                         return -ENOMEM;
2577                 }
2578         }
2579
2580         return 0;
2581 }
2582
2583 static void hinic_copy_mempool_uninit(struct hinic_nic_dev *nic_dev)
2584 {
2585         if (nic_dev->cpy_mpool != NULL)
2586                 rte_mempool_free(nic_dev->cpy_mpool);
2587 }
2588
2589 static int hinic_init_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2590 {
2591         u32 txq_size;
2592         u32 rxq_size;
2593
2594         /* allocate software txq array */
2595         txq_size = nic_dev->nic_cap.max_sqs * sizeof(*nic_dev->txqs);
2596         nic_dev->txqs = kzalloc_aligned(txq_size, GFP_KERNEL);
2597         if (!nic_dev->txqs) {
2598                 PMD_DRV_LOG(ERR, "Allocate txqs failed");
2599                 return -ENOMEM;
2600         }
2601
2602         /* allocate software rxq array */
2603         rxq_size = nic_dev->nic_cap.max_rqs * sizeof(*nic_dev->rxqs);
2604         nic_dev->rxqs = kzalloc_aligned(rxq_size, GFP_KERNEL);
2605         if (!nic_dev->rxqs) {
2606                 /* free txqs */
2607                 kfree(nic_dev->txqs);
2608                 nic_dev->txqs = NULL;
2609
2610                 PMD_DRV_LOG(ERR, "Allocate rxqs failed");
2611                 return -ENOMEM;
2612         }
2613
2614         return HINIC_OK;
2615 }
2616
2617 static void hinic_deinit_sw_rxtxqs(struct hinic_nic_dev *nic_dev)
2618 {
2619         kfree(nic_dev->txqs);
2620         nic_dev->txqs = NULL;
2621
2622         kfree(nic_dev->rxqs);
2623         nic_dev->rxqs = NULL;
2624 }
2625
2626 static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
2627 {
2628         struct hinic_nic_dev *nic_dev =
2629                                 HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2630         int rc;
2631
2632         nic_dev->hwdev = rte_zmalloc("hinic_hwdev", sizeof(*nic_dev->hwdev),
2633                                      RTE_CACHE_LINE_SIZE);
2634         if (!nic_dev->hwdev) {
2635                 PMD_DRV_LOG(ERR, "Allocate hinic hwdev memory failed, dev_name: %s",
2636                             eth_dev->data->name);
2637                 return -ENOMEM;
2638         }
2639         nic_dev->hwdev->pcidev_hdl = RTE_ETH_DEV_TO_PCI(eth_dev);
2640
2641         /* init osdep*/
2642         rc = hinic_osdep_init(nic_dev->hwdev);
2643         if (rc) {
2644                 PMD_DRV_LOG(ERR, "Initialize os_dep failed, dev_name: %s",
2645                             eth_dev->data->name);
2646                 goto init_osdep_fail;
2647         }
2648
2649         /* init_hwif */
2650         rc = hinic_hwif_res_init(nic_dev->hwdev);
2651         if (rc) {
2652                 PMD_DRV_LOG(ERR, "Initialize hwif failed, dev_name: %s",
2653                             eth_dev->data->name);
2654                 goto init_hwif_fail;
2655         }
2656
2657         /* init_cfg_mgmt */
2658         rc = init_cfg_mgmt(nic_dev->hwdev);
2659         if (rc) {
2660                 PMD_DRV_LOG(ERR, "Initialize cfg_mgmt failed, dev_name: %s",
2661                             eth_dev->data->name);
2662                 goto init_cfgmgnt_fail;
2663         }
2664
2665         /* init_aeqs */
2666         rc = hinic_comm_aeqs_init(nic_dev->hwdev);
2667         if (rc) {
2668                 PMD_DRV_LOG(ERR, "Initialize aeqs failed, dev_name: %s",
2669                             eth_dev->data->name);
2670                 goto init_aeqs_fail;
2671         }
2672
2673         /* init_pf_to_mgnt */
2674         rc = hinic_comm_pf_to_mgmt_init(nic_dev->hwdev);
2675         if (rc) {
2676                 PMD_DRV_LOG(ERR, "Initialize pf_to_mgmt failed, dev_name: %s",
2677                             eth_dev->data->name);
2678                 goto init_pf_to_mgmt_fail;
2679         }
2680
2681         /* init mailbox */
2682         rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
2683         if (rc) {
2684                 PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
2685                             eth_dev->data->name);
2686                 goto init_func_to_func_fail;
2687         }
2688
2689         rc = hinic_card_workmode_check(nic_dev);
2690         if (rc) {
2691                 PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
2692                             eth_dev->data->name);
2693                 goto workmode_check_fail;
2694         }
2695
2696         /* do l2nic reset to make chip clear */
2697         rc = hinic_l2nic_reset(nic_dev->hwdev);
2698         if (rc) {
2699                 PMD_DRV_LOG(ERR, "Do l2nic reset failed, dev_name: %s",
2700                             eth_dev->data->name);
2701                 goto l2nic_reset_fail;
2702         }
2703
2704         /* init dma and aeq msix attribute table */
2705         (void)hinic_init_attr_table(nic_dev->hwdev);
2706
2707         /* init_cmdqs */
2708         rc = hinic_comm_cmdqs_init(nic_dev->hwdev);
2709         if (rc) {
2710                 PMD_DRV_LOG(ERR, "Initialize cmdq failed, dev_name: %s",
2711                             eth_dev->data->name);
2712                 goto init_cmdq_fail;
2713         }
2714
2715         /* set hardware state active */
2716         rc = hinic_activate_hwdev_state(nic_dev->hwdev);
2717         if (rc) {
2718                 PMD_DRV_LOG(ERR, "Initialize resources state failed, dev_name: %s",
2719                             eth_dev->data->name);
2720                 goto init_resources_state_fail;
2721         }
2722
2723         /* init_capability */
2724         rc = hinic_init_capability(nic_dev->hwdev);
2725         if (rc) {
2726                 PMD_DRV_LOG(ERR, "Initialize capability failed, dev_name: %s",
2727                             eth_dev->data->name);
2728                 goto init_cap_fail;
2729         }
2730
2731         /* get nic capability */
2732         if (!hinic_support_nic(nic_dev->hwdev, &nic_dev->nic_cap))
2733                 goto nic_check_fail;
2734
2735         /* init root cla and function table */
2736         rc = hinic_init_nicio(nic_dev->hwdev);
2737         if (rc) {
2738                 PMD_DRV_LOG(ERR, "Initialize nic_io failed, dev_name: %s",
2739                             eth_dev->data->name);
2740                 goto init_nicio_fail;
2741         }
2742
2743         /* init_software_txrxq */
2744         rc = hinic_init_sw_rxtxqs(nic_dev);
2745         if (rc) {
2746                 PMD_DRV_LOG(ERR, "Initialize sw_rxtxqs failed, dev_name: %s",
2747                             eth_dev->data->name);
2748                 goto init_sw_rxtxqs_fail;
2749         }
2750
2751         rc = hinic_copy_mempool_init(nic_dev);
2752         if (rc) {
2753                 PMD_DRV_LOG(ERR, "Create copy mempool failed, dev_name: %s",
2754                          eth_dev->data->name);
2755                 goto init_mpool_fail;
2756         }
2757
2758         /* set hardware feature to default status */
2759         rc = hinic_set_default_hw_feature(nic_dev);
2760         if (rc) {
2761                 PMD_DRV_LOG(ERR, "Initialize hardware default features failed, dev_name: %s",
2762                             eth_dev->data->name);
2763                 goto set_default_hw_feature_fail;
2764         }
2765
2766         return 0;
2767
2768 set_default_hw_feature_fail:
2769         hinic_copy_mempool_uninit(nic_dev);
2770
2771 init_mpool_fail:
2772         hinic_deinit_sw_rxtxqs(nic_dev);
2773
2774 init_sw_rxtxqs_fail:
2775         hinic_deinit_nicio(nic_dev->hwdev);
2776
2777 nic_check_fail:
2778 init_nicio_fail:
2779 init_cap_fail:
2780         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2781
2782 init_resources_state_fail:
2783         hinic_comm_cmdqs_free(nic_dev->hwdev);
2784
2785 init_cmdq_fail:
2786 l2nic_reset_fail:
2787 workmode_check_fail:
2788         hinic_comm_func_to_func_free(nic_dev->hwdev);
2789
2790 init_func_to_func_fail:
2791         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2792
2793 init_pf_to_mgmt_fail:
2794         hinic_comm_aeqs_free(nic_dev->hwdev);
2795
2796 init_aeqs_fail:
2797         free_cfg_mgmt(nic_dev->hwdev);
2798
2799 init_cfgmgnt_fail:
2800         hinic_hwif_res_free(nic_dev->hwdev);
2801
2802 init_hwif_fail:
2803         hinic_osdep_deinit(nic_dev->hwdev);
2804
2805 init_osdep_fail:
2806         rte_free(nic_dev->hwdev);
2807         nic_dev->hwdev = NULL;
2808
2809         return rc;
2810 }
2811
2812 static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
2813 {
2814         struct hinic_nic_dev *nic_dev =
2815                         HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2816
2817         (void)hinic_set_link_status_follow(nic_dev->hwdev,
2818                                            HINIC_LINK_FOLLOW_DEFAULT);
2819         hinic_copy_mempool_uninit(nic_dev);
2820         hinic_deinit_sw_rxtxqs(nic_dev);
2821         hinic_deinit_nicio(nic_dev->hwdev);
2822         hinic_deactivate_hwdev_state(nic_dev->hwdev);
2823         hinic_comm_cmdqs_free(nic_dev->hwdev);
2824         hinic_comm_func_to_func_free(nic_dev->hwdev);
2825         hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
2826         hinic_comm_aeqs_free(nic_dev->hwdev);
2827         free_cfg_mgmt(nic_dev->hwdev);
2828         hinic_hwif_res_free(nic_dev->hwdev);
2829         hinic_osdep_deinit(nic_dev->hwdev);
2830         rte_free(nic_dev->hwdev);
2831         nic_dev->hwdev = NULL;
2832 }
2833
2834 /**
2835  * DPDK callback to close the device.
2836  *
2837  * @param dev
2838  *   Pointer to Ethernet device structure.
2839  */
2840 static void hinic_dev_close(struct rte_eth_dev *dev)
2841 {
2842         struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
2843
2844         if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
2845                 PMD_DRV_LOG(WARNING, "Device %s already closed",
2846                             dev->data->name);
2847                 return;
2848         }
2849
2850         /* stop device first */
2851         hinic_dev_stop(dev);
2852
2853         /* rx_cqe, rx_info */
2854         hinic_free_all_rx_resources(dev);
2855
2856         /* tx_info */
2857         hinic_free_all_tx_resources(dev);
2858
2859         /* free wq, pi_dma_addr */
2860         hinic_free_all_rq(nic_dev);
2861
2862         /* free wq, db_addr */
2863         hinic_free_all_sq(nic_dev);
2864
2865         /* deinit mac vlan tbl */
2866         hinic_deinit_mac_addr(dev);
2867         hinic_remove_all_vlanid(dev);
2868
2869         /* disable hardware and uio interrupt */
2870         hinic_disable_interrupt(dev);
2871
2872         /* deinit nic hardware device */
2873         hinic_nic_dev_destroy(dev);
2874 }
2875
2876 static const struct eth_dev_ops hinic_pmd_ops = {
2877         .dev_configure                 = hinic_dev_configure,
2878         .dev_infos_get                 = hinic_dev_infos_get,
2879         .fw_version_get                = hinic_fw_version_get,
2880         .rx_queue_setup                = hinic_rx_queue_setup,
2881         .tx_queue_setup                = hinic_tx_queue_setup,
2882         .dev_start                     = hinic_dev_start,
2883         .dev_set_link_up               = hinic_dev_set_link_up,
2884         .dev_set_link_down             = hinic_dev_set_link_down,
2885         .link_update                   = hinic_link_update,
2886         .rx_queue_release              = hinic_rx_queue_release,
2887         .tx_queue_release              = hinic_tx_queue_release,
2888         .dev_stop                      = hinic_dev_stop,
2889         .dev_close                     = hinic_dev_close,
2890         .mtu_set                       = hinic_dev_set_mtu,
2891         .vlan_filter_set               = hinic_vlan_filter_set,
2892         .vlan_offload_set              = hinic_vlan_offload_set,
2893         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2894         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2895         .promiscuous_enable            = hinic_dev_promiscuous_enable,
2896         .promiscuous_disable           = hinic_dev_promiscuous_disable,
2897         .rss_hash_update               = hinic_rss_hash_update,
2898         .rss_hash_conf_get             = hinic_rss_conf_get,
2899         .reta_update                   = hinic_rss_indirtbl_update,
2900         .reta_query                    = hinic_rss_indirtbl_query,
2901         .stats_get                     = hinic_dev_stats_get,
2902         .stats_reset                   = hinic_dev_stats_reset,
2903         .xstats_get                    = hinic_dev_xstats_get,
2904         .xstats_reset                  = hinic_dev_xstats_reset,
2905         .xstats_get_names              = hinic_dev_xstats_get_names,
2906         .rxq_info_get                  = hinic_rxq_info_get,
2907         .txq_info_get                  = hinic_txq_info_get,
2908         .mac_addr_set                  = hinic_set_mac_addr,
2909         .mac_addr_remove               = hinic_mac_addr_remove,
2910         .mac_addr_add                  = hinic_mac_addr_add,
2911         .set_mc_addr_list              = hinic_set_mc_addr_list,
2912         .filter_ctrl                   = hinic_dev_filter_ctrl,
2913 };
2914
2915 static const struct eth_dev_ops hinic_pmd_vf_ops = {
2916         .dev_configure                 = hinic_dev_configure,
2917         .dev_infos_get                 = hinic_dev_infos_get,
2918         .fw_version_get                = hinic_fw_version_get,
2919         .rx_queue_setup                = hinic_rx_queue_setup,
2920         .tx_queue_setup                = hinic_tx_queue_setup,
2921         .dev_start                     = hinic_dev_start,
2922         .link_update                   = hinic_link_update,
2923         .rx_queue_release              = hinic_rx_queue_release,
2924         .tx_queue_release              = hinic_tx_queue_release,
2925         .dev_stop                      = hinic_dev_stop,
2926         .dev_close                     = hinic_dev_close,
2927         .mtu_set                       = hinic_dev_set_mtu,
2928         .vlan_filter_set               = hinic_vlan_filter_set,
2929         .vlan_offload_set              = hinic_vlan_offload_set,
2930         .allmulticast_enable           = hinic_dev_allmulticast_enable,
2931         .allmulticast_disable          = hinic_dev_allmulticast_disable,
2932         .rss_hash_update               = hinic_rss_hash_update,
2933         .rss_hash_conf_get             = hinic_rss_conf_get,
2934         .reta_update                   = hinic_rss_indirtbl_update,
2935         .reta_query                    = hinic_rss_indirtbl_query,
2936         .stats_get                     = hinic_dev_stats_get,
2937         .stats_reset                   = hinic_dev_stats_reset,
2938         .xstats_get                    = hinic_dev_xstats_get,
2939         .xstats_reset                  = hinic_dev_xstats_reset,
2940         .xstats_get_names              = hinic_dev_xstats_get_names,
2941         .rxq_info_get                  = hinic_rxq_info_get,
2942         .txq_info_get                  = hinic_txq_info_get,
2943         .mac_addr_set                  = hinic_set_mac_addr,
2944         .mac_addr_remove               = hinic_mac_addr_remove,
2945         .mac_addr_add                  = hinic_mac_addr_add,
2946         .set_mc_addr_list              = hinic_set_mc_addr_list,
2947         .filter_ctrl                   = hinic_dev_filter_ctrl,
2948 };
2949
2950 static int hinic_func_init(struct rte_eth_dev *eth_dev)
2951 {
2952         struct rte_pci_device *pci_dev;
2953         struct rte_ether_addr *eth_addr;
2954         struct hinic_nic_dev *nic_dev;
2955         struct hinic_filter_info *filter_info;
2956         u32 mac_size;
2957         int rc;
2958
2959         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2960
2961         /* EAL is SECONDARY and eth_dev is already created */
2962         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2963                 rc = rte_intr_callback_register(&pci_dev->intr_handle,
2964                                                 hinic_dev_interrupt_handler,
2965                                                 (void *)eth_dev);
2966                 if (rc)
2967                         PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
2968                                     eth_dev->data->name);
2969
2970                 return rc;
2971         }
2972
2973         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
2974         memset(nic_dev, 0, sizeof(*nic_dev));
2975
2976         snprintf(nic_dev->proc_dev_name,
2977                  sizeof(nic_dev->proc_dev_name),
2978                  "hinic-%.4x:%.2x:%.2x.%x",
2979                  pci_dev->addr.domain, pci_dev->addr.bus,
2980                  pci_dev->addr.devid, pci_dev->addr.function);
2981
2982         /* alloc mac_addrs */
2983         mac_size = HINIC_MAX_UC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2984         eth_addr = rte_zmalloc("hinic_mac", mac_size, 0);
2985         if (!eth_addr) {
2986                 PMD_DRV_LOG(ERR, "Allocate ethernet addresses' memory failed, dev_name: %s",
2987                             eth_dev->data->name);
2988                 rc = -ENOMEM;
2989                 goto eth_addr_fail;
2990         }
2991         eth_dev->data->mac_addrs = eth_addr;
2992
2993         mac_size = HINIC_MAX_MC_MAC_ADDRS * sizeof(struct rte_ether_addr);
2994         nic_dev->mc_list = rte_zmalloc("hinic_mc", mac_size, 0);
2995         if (!nic_dev->mc_list) {
2996                 PMD_DRV_LOG(ERR, "Allocate mcast address' memory failed, dev_name: %s",
2997                             eth_dev->data->name);
2998                 rc = -ENOMEM;
2999                 goto mc_addr_fail;
3000         }
3001
3002         /*
3003          * Pass the information to the rte_eth_dev_close() that it should also
3004          * release the private port resources.
3005          */
3006         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
3007
3008         /* create hardware nic_device */
3009         rc = hinic_nic_dev_create(eth_dev);
3010         if (rc) {
3011                 PMD_DRV_LOG(ERR, "Create nic device failed, dev_name: %s",
3012                             eth_dev->data->name);
3013                 goto create_nic_dev_fail;
3014         }
3015
3016         if (HINIC_IS_VF(nic_dev->hwdev))
3017                 eth_dev->dev_ops = &hinic_pmd_vf_ops;
3018         else
3019                 eth_dev->dev_ops = &hinic_pmd_ops;
3020
3021         rc = hinic_init_mac_addr(eth_dev);
3022         if (rc) {
3023                 PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
3024                             eth_dev->data->name);
3025                 goto init_mac_fail;
3026         }
3027
3028         /* register callback func to eal lib */
3029         rc = rte_intr_callback_register(&pci_dev->intr_handle,
3030                                         hinic_dev_interrupt_handler,
3031                                         (void *)eth_dev);
3032         if (rc) {
3033                 PMD_DRV_LOG(ERR, "Register rte interrupt callback failed, dev_name: %s",
3034                             eth_dev->data->name);
3035                 goto reg_intr_cb_fail;
3036         }
3037
3038         /* enable uio/vfio intr/eventfd mapping */
3039         rc = rte_intr_enable(&pci_dev->intr_handle);
3040         if (rc) {
3041                 PMD_DRV_LOG(ERR, "Enable rte interrupt failed, dev_name: %s",
3042                             eth_dev->data->name);
3043                 goto enable_intr_fail;
3044         }
3045         hinic_set_bit(HINIC_DEV_INTR_EN, &nic_dev->dev_status);
3046
3047         /* initialize filter info */
3048         filter_info = &nic_dev->filter;
3049         memset(filter_info, 0, sizeof(struct hinic_filter_info));
3050         /* initialize 5tuple filter list */
3051         TAILQ_INIT(&filter_info->fivetuple_list);
3052         TAILQ_INIT(&nic_dev->filter_ntuple_list);
3053         TAILQ_INIT(&nic_dev->filter_ethertype_list);
3054         TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
3055         TAILQ_INIT(&nic_dev->hinic_flow_list);
3056
3057         hinic_set_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3058         PMD_DRV_LOG(INFO, "Initialize %s in primary successfully",
3059                     eth_dev->data->name);
3060
3061         return 0;
3062
3063 enable_intr_fail:
3064         (void)rte_intr_callback_unregister(&pci_dev->intr_handle,
3065                                            hinic_dev_interrupt_handler,
3066                                            (void *)eth_dev);
3067
3068 reg_intr_cb_fail:
3069         hinic_deinit_mac_addr(eth_dev);
3070
3071 init_mac_fail:
3072         eth_dev->dev_ops = NULL;
3073         hinic_nic_dev_destroy(eth_dev);
3074
3075 create_nic_dev_fail:
3076         rte_free(nic_dev->mc_list);
3077         nic_dev->mc_list = NULL;
3078
3079 mc_addr_fail:
3080         rte_free(eth_addr);
3081         eth_dev->data->mac_addrs = NULL;
3082
3083 eth_addr_fail:
3084         PMD_DRV_LOG(ERR, "Initialize %s in primary failed",
3085                     eth_dev->data->name);
3086         return rc;
3087 }
3088
3089 static int hinic_dev_init(struct rte_eth_dev *eth_dev)
3090 {
3091         struct rte_pci_device *pci_dev;
3092
3093         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3094
3095         PMD_DRV_LOG(INFO, "Initializing pf hinic-%.4x:%.2x:%.2x.%x in %s process",
3096                     pci_dev->addr.domain, pci_dev->addr.bus,
3097                     pci_dev->addr.devid, pci_dev->addr.function,
3098                     (rte_eal_process_type() == RTE_PROC_PRIMARY) ?
3099                     "primary" : "secondary");
3100
3101         /* rte_eth_dev rx_burst and tx_burst */
3102         eth_dev->rx_pkt_burst = hinic_recv_pkts;
3103         eth_dev->tx_pkt_burst = hinic_xmit_pkts;
3104
3105         return hinic_func_init(eth_dev);
3106 }
3107
3108 static int hinic_dev_uninit(struct rte_eth_dev *dev)
3109 {
3110         struct hinic_nic_dev *nic_dev;
3111
3112         nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
3113         hinic_clear_bit(HINIC_DEV_INIT, &nic_dev->dev_status);
3114
3115         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3116                 return 0;
3117
3118         hinic_dev_close(dev);
3119
3120         dev->dev_ops = NULL;
3121         dev->rx_pkt_burst = NULL;
3122         dev->tx_pkt_burst = NULL;
3123
3124         rte_free(nic_dev->mc_list);
3125
3126         rte_free(dev->data->mac_addrs);
3127         dev->data->mac_addrs = NULL;
3128
3129         return HINIC_OK;
3130 }
3131
3132 static struct rte_pci_id pci_id_hinic_map[] = {
3133         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
3134         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
3135         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
3136         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
3137         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
3138         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
3139         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
3140         { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
3141         {.vendor_id = 0},
3142 };
3143
3144 static int hinic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3145                            struct rte_pci_device *pci_dev)
3146 {
3147         return rte_eth_dev_pci_generic_probe(pci_dev,
3148                 sizeof(struct hinic_nic_dev), hinic_dev_init);
3149 }
3150
3151 static int hinic_pci_remove(struct rte_pci_device *pci_dev)
3152 {
3153         return rte_eth_dev_pci_generic_remove(pci_dev, hinic_dev_uninit);
3154 }
3155
3156 static struct rte_pci_driver rte_hinic_pmd = {
3157         .id_table = pci_id_hinic_map,
3158         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
3159         .probe = hinic_pci_probe,
3160         .remove = hinic_pci_remove,
3161 };
3162
3163 RTE_PMD_REGISTER_PCI(net_hinic, rte_hinic_pmd);
3164 RTE_PMD_REGISTER_PCI_TABLE(net_hinic, pci_id_hinic_map);
3165
3166 RTE_INIT(hinic_init_log)
3167 {
3168         hinic_logtype = rte_log_register("pmd.net.hinic");
3169         if (hinic_logtype >= 0)
3170                 rte_log_set_level(hinic_logtype, RTE_LOG_INFO);
3171 }