net/hns3: support mailbox
[dpdk.git] / drivers / net / hns3 / hns3_mbx.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018-2019 Hisilicon Limited.
3  */
4
5 #include <errno.h>
6 #include <stdbool.h>
7 #include <stdint.h>
8 #include <stdio.h>
9 #include <string.h>
10 #include <inttypes.h>
11 #include <unistd.h>
12 #include <rte_byteorder.h>
13 #include <rte_common.h>
14 #include <rte_cycles.h>
15 #include <rte_dev.h>
16 #include <rte_ethdev_driver.h>
17 #include <rte_io.h>
18 #include <rte_spinlock.h>
19 #include <rte_pci.h>
20 #include <rte_bus_pci.h>
21
22 #include "hns3_ethdev.h"
23 #include "hns3_regs.h"
24 #include "hns3_logs.h"
25
26 #define HNS3_REG_MSG_DATA_OFFSET        4
27 #define HNS3_CMD_CODE_OFFSET            2
28
29 static const struct errno_respcode_map err_code_map[] = {
30         {0, 0},
31         {1, -EPERM},
32         {2, -ENOENT},
33         {5, -EIO},
34         {11, -EAGAIN},
35         {12, -ENOMEM},
36         {16, -EBUSY},
37         {22, -EINVAL},
38         {28, -ENOSPC},
39         {95, -EOPNOTSUPP},
40 };
41
42 static int
43 hns3_resp_to_errno(uint16_t resp_code)
44 {
45         uint32_t i, num;
46
47         num = sizeof(err_code_map) / sizeof(struct errno_respcode_map);
48         for (i = 0; i < num; i++) {
49                 if (err_code_map[i].resp_code == resp_code)
50                         return err_code_map[i].err_no;
51         }
52
53         return -EIO;
54 }
55
56 static void
57 hns3_poll_all_sync_msg(void)
58 {
59         struct rte_eth_dev *eth_dev;
60         struct hns3_adapter *adapter;
61         const char *name;
62         uint16_t port_id;
63
64         RTE_ETH_FOREACH_DEV(port_id) {
65                 eth_dev = &rte_eth_devices[port_id];
66                 name = eth_dev->device->driver->name;
67                 if (strcmp(name, "net_hns3") && strcmp(name, "net_hns3_vf"))
68                         continue;
69                 adapter = eth_dev->data->dev_private;
70                 if (!adapter || adapter->hw.adapter_state == HNS3_NIC_CLOSED)
71                         continue;
72                 /* Synchronous msg, the mbx_resp.req_msg_data is non-zero */
73                 if (adapter->hw.mbx_resp.req_msg_data)
74                         hns3_dev_handle_mbx_msg(&adapter->hw);
75         }
76 }
77
78 static int
79 hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
80                   uint8_t *resp_data, uint16_t resp_len)
81 {
82 #define HNS3_MAX_RETRY_MS       500
83         struct hns3_mbx_resp_status *mbx_resp;
84         bool in_irq = false;
85         uint64_t now;
86         uint64_t end;
87
88         if (resp_len > HNS3_MBX_MAX_RESP_DATA_SIZE) {
89                 hns3_err(hw, "VF mbx response len(=%d) exceeds maximum(=%d)",
90                          resp_len, HNS3_MBX_MAX_RESP_DATA_SIZE);
91                 return -EINVAL;
92         }
93
94         now = get_timeofday_ms();
95         end = now + HNS3_MAX_RETRY_MS;
96         while ((hw->mbx_resp.head != hw->mbx_resp.tail + hw->mbx_resp.lost) &&
97                (now < end)) {
98                 /*
99                  * The mbox response is running on the interrupt thread.
100                  * Sending mbox in the interrupt thread cannot wait for the
101                  * response, so polling the mbox response on the irq thread.
102                  */
103                 if (pthread_equal(hw->irq_thread_id, pthread_self())) {
104                         in_irq = true;
105                         hns3_poll_all_sync_msg();
106                 } else {
107                         rte_delay_ms(HNS3_POLL_RESPONE_MS);
108                 }
109                 now = get_timeofday_ms();
110         }
111         hw->mbx_resp.req_msg_data = 0;
112         if (now >= end) {
113                 hw->mbx_resp.lost++;
114                 hns3_err(hw,
115                          "VF could not get mbx(%d,%d) head(%d) tail(%d) lost(%d) from PF in_irq:%d",
116                          code0, code1, hw->mbx_resp.head, hw->mbx_resp.tail,
117                          hw->mbx_resp.lost, in_irq);
118                 return -ETIME;
119         }
120         rte_io_rmb();
121         mbx_resp = &hw->mbx_resp;
122
123         if (mbx_resp->resp_status)
124                 return mbx_resp->resp_status;
125
126         if (resp_data)
127                 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
128
129         return 0;
130 }
131
132 int
133 hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
134                   const uint8_t *msg_data, uint8_t msg_len, bool need_resp,
135                   uint8_t *resp_data, uint16_t resp_len)
136 {
137         struct hns3_mbx_vf_to_pf_cmd *req;
138         struct hns3_cmd_desc desc;
139         int ret;
140
141         req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
142
143         /* first two bytes are reserved for code & subcode */
144         if (msg_len > (HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET)) {
145                 hns3_err(hw,
146                          "VF send mbx msg fail, msg len %d exceeds max payload len %d",
147                          msg_len, HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET);
148                 return -EINVAL;
149         }
150
151         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
152         req->msg[0] = code;
153         req->msg[1] = subcode;
154         if (msg_data)
155                 memcpy(&req->msg[HNS3_CMD_CODE_OFFSET], msg_data, msg_len);
156
157         /* synchronous send */
158         if (need_resp) {
159                 req->mbx_need_resp |= HNS3_MBX_NEED_RESP_BIT;
160                 rte_spinlock_lock(&hw->mbx_resp.lock);
161                 hw->mbx_resp.req_msg_data = (uint32_t)code << 16 | subcode;
162                 hw->mbx_resp.head++;
163                 ret = hns3_cmd_send(hw, &desc, 1);
164                 if (ret) {
165                         rte_spinlock_unlock(&hw->mbx_resp.lock);
166                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
167                                  ret);
168                         return ret;
169                 }
170
171                 ret = hns3_get_mbx_resp(hw, code, subcode, resp_data, resp_len);
172                 rte_spinlock_unlock(&hw->mbx_resp.lock);
173         } else {
174                 /* asynchronous send */
175                 ret = hns3_cmd_send(hw, &desc, 1);
176                 if (ret) {
177                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
178                                  ret);
179                         return ret;
180                 }
181         }
182
183         return ret;
184 }
185
186 static bool
187 hns3_cmd_crq_empty(struct hns3_hw *hw)
188 {
189         uint32_t tail = hns3_read_dev(hw, HNS3_CMDQ_RX_TAIL_REG);
190
191         return tail == hw->cmq.crq.next_to_use;
192 }
193
194 static void
195 hns3_mbx_handler(struct hns3_hw *hw)
196 {
197         struct hns3_mac *mac = &hw->mac;
198         enum hns3_reset_level reset_level;
199         uint16_t *msg_q;
200         uint32_t tail;
201
202         tail = hw->arq.tail;
203
204         /* process all the async queue messages */
205         while (tail != hw->arq.head) {
206                 msg_q = hw->arq.msg_q[hw->arq.head];
207
208                 switch (msg_q[0]) {
209                 case HNS3_MBX_LINK_STAT_CHANGE:
210                         memcpy(&mac->link_speed, &msg_q[2],
211                                    sizeof(mac->link_speed));
212                         mac->link_status = rte_le_to_cpu_16(msg_q[1]);
213                         mac->link_duplex = (uint8_t)rte_le_to_cpu_16(msg_q[4]);
214                         break;
215                 case HNS3_MBX_ASSERTING_RESET:
216                         /* PF has asserted reset hence VF should go in pending
217                          * state and poll for the hardware reset status till it
218                          * has been completely reset. After this stack should
219                          * eventually be re-initialized.
220                          */
221                         reset_level = rte_le_to_cpu_16(msg_q[1]);
222                         hns3_atomic_set_bit(reset_level, &hw->reset.pending);
223
224                         hns3_warn(hw, "PF inform reset level %d", reset_level);
225                         hw->reset.stats.request_cnt++;
226                         break;
227                 default:
228                         hns3_err(hw, "Fetched unsupported(%d) message from arq",
229                                  msg_q[0]);
230                         break;
231                 }
232
233                 hns3_mbx_head_ptr_move_arq(hw->arq);
234                 msg_q = hw->arq.msg_q[hw->arq.head];
235         }
236 }
237
238 /*
239  * Case1: receive response after timeout, req_msg_data
240  *        is 0, not equal resp_msg, do lost--
241  * Case2: receive last response during new send_mbx_msg,
242  *        req_msg_data is different with resp_msg, let
243  *        lost--, continue to wait for response.
244  */
245 static void
246 hns3_update_resp_position(struct hns3_hw *hw, uint32_t resp_msg)
247 {
248         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
249         uint32_t tail = resp->tail + 1;
250
251         if (tail > resp->head)
252                 tail = resp->head;
253         if (resp->req_msg_data != resp_msg) {
254                 if (resp->lost)
255                         resp->lost--;
256                 hns3_warn(hw, "Received a mismatched response req_msg(%x) "
257                           "resp_msg(%x) head(%d) tail(%d) lost(%d)",
258                           resp->req_msg_data, resp_msg, resp->head, tail,
259                           resp->lost);
260         } else if (tail + resp->lost > resp->head) {
261                 resp->lost--;
262                 hns3_warn(hw, "Received a new response again resp_msg(%x) "
263                           "head(%d) tail(%d) lost(%d)", resp_msg,
264                           resp->head, tail, resp->lost);
265         }
266         rte_io_wmb();
267         resp->tail = tail;
268 }
269
270 void
271 hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
272 {
273         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
274         struct hns3_cmq_ring *crq = &hw->cmq.crq;
275         struct hns3_mbx_pf_to_vf_cmd *req;
276         struct hns3_cmd_desc *desc;
277         uint32_t msg_data;
278         uint16_t *msg_q;
279         uint16_t flag;
280         uint8_t *temp;
281         int i;
282
283         while (!hns3_cmd_crq_empty(hw)) {
284                 if (rte_atomic16_read(&hw->reset.disable_cmd))
285                         return;
286
287                 desc = &crq->desc[crq->next_to_use];
288                 req = (struct hns3_mbx_pf_to_vf_cmd *)desc->data;
289
290                 flag = rte_le_to_cpu_16(crq->desc[crq->next_to_use].flag);
291                 if (unlikely(!hns3_get_bit(flag, HNS3_CMDQ_RX_OUTVLD_B))) {
292                         hns3_warn(hw,
293                                   "dropped invalid mailbox message, code = %d",
294                                   req->msg[0]);
295
296                         /* dropping/not processing this invalid message */
297                         crq->desc[crq->next_to_use].flag = 0;
298                         hns3_mbx_ring_ptr_move_crq(crq);
299                         continue;
300                 }
301
302                 switch (req->msg[0]) {
303                 case HNS3_MBX_PF_VF_RESP:
304                         resp->resp_status = hns3_resp_to_errno(req->msg[3]);
305
306                         temp = (uint8_t *)&req->msg[4];
307                         for (i = 0; i < HNS3_MBX_MAX_RESP_DATA_SIZE &&
308                              i < HNS3_REG_MSG_DATA_OFFSET; i++) {
309                                 resp->additional_info[i] = *temp;
310                                 temp++;
311                         }
312                         msg_data = (uint32_t)req->msg[1] << 16 | req->msg[2];
313                         hns3_update_resp_position(hw, msg_data);
314                         break;
315                 case HNS3_MBX_LINK_STAT_CHANGE:
316                 case HNS3_MBX_ASSERTING_RESET:
317                         msg_q = hw->arq.msg_q[hw->arq.tail];
318                         memcpy(&msg_q[0], req->msg,
319                                HNS3_MBX_MAX_ARQ_MSG_SIZE * sizeof(uint16_t));
320                         hns3_mbx_tail_ptr_move_arq(hw->arq);
321
322                         hns3_mbx_handler(hw);
323                         break;
324                 default:
325                         hns3_err(hw,
326                                  "VF received unsupported(%d) mbx msg from PF",
327                                  req->msg[0]);
328                         break;
329                 }
330
331                 crq->desc[crq->next_to_use].flag = 0;
332                 hns3_mbx_ring_ptr_move_crq(crq);
333         }
334
335         /* Write back CMDQ_RQ header pointer, IMP need this pointer */
336         hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, crq->next_to_use);
337 }